agp_base 419 drivers/gpu/drm/amd/display/dc/dc.h uint64_t agp_base; agp_base 381 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c AGP_BASE, pa_config->system_aperture.agp_base >> 24); agp_base 1518 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c config.system_aperture.agp_base = pa_config->system_aperture.agp_base; agp_base 126 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c AGP_BASE, pa_config->system_aperture.agp_base); agp_base 75 drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h uint64_t agp_base; agp_base 2912 drivers/gpu/drm/radeon/evergreen.c WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22); agp_base 3856 drivers/gpu/drm/radeon/r100.c WREG32(R_000170_AGP_BASE, lower_32_bits(rdev->mc.agp_base)); agp_base 3859 drivers/gpu/drm/radeon/r100.c upper_32_bits(rdev->mc.agp_base) & 0xff); agp_base 1346 drivers/gpu/drm/radeon/r300.c WREG32(R_000170_AGP_BASE, lower_32_bits(rdev->mc.agp_base)); agp_base 1348 drivers/gpu/drm/radeon/r300.c upper_32_bits(rdev->mc.agp_base) & 0xff); agp_base 155 drivers/gpu/drm/radeon/r520.c WREG32_MC(R_000006_AGP_BASE, lower_32_bits(rdev->mc.agp_base)); agp_base 157 drivers/gpu/drm/radeon/r520.c S_000007_AGP_BASE_ADDR_2(upper_32_bits(rdev->mc.agp_base))); agp_base 1354 drivers/gpu/drm/radeon/r600.c WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22); agp_base 679 drivers/gpu/drm/radeon/radeon.h resource_size_t agp_base; agp_base 248 drivers/gpu/drm/radeon/radeon_agp.c rdev->mc.agp_base = rdev->ddev->agp->agp_info.aper_base; agp_base 250 drivers/gpu/drm/radeon/radeon_agp.c rdev->mc.gtt_start = rdev->mc.agp_base; agp_base 423 drivers/gpu/drm/radeon/radeon_ttm.c mem->bus.base = rdev->mc.agp_base; agp_base 492 drivers/gpu/drm/radeon/rv515.c WREG32_MC(R_000003_MC_AGP_BASE, lower_32_bits(rdev->mc.agp_base)); agp_base 494 drivers/gpu/drm/radeon/rv515.c S_000004_AGP_BASE_ADDR_2(upper_32_bits(rdev->mc.agp_base))); agp_base 1064 drivers/gpu/drm/radeon/rv770.c WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22); agp_base 91 drivers/gpu/drm/via/via_dma.c uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; agp_base 92 drivers/gpu/drm/via/via_dma.c uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; agp_base 105 drivers/gpu/drm/via/via_dma.c uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; agp_base 106 drivers/gpu/drm/via/via_dma.c uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; agp_base 120 drivers/gpu/drm/via/via_dma.c uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; agp_base 129 drivers/gpu/drm/via/via_dma.c hw_addr = *hw_addr_ptr - agp_base; agp_base 491 drivers/gpu/drm/via/via_dma.c uint32_t agp_base; agp_base 502 drivers/gpu/drm/via/via_dma.c agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; agp_base 507 drivers/gpu/drm/via/via_dma.c agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3); agp_base 523 drivers/gpu/drm/via/via_dma.c uint32_t agp_base; agp_base 530 drivers/gpu/drm/via/via_dma.c agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; agp_base 531 drivers/gpu/drm/via/via_dma.c start_addr = agp_base; agp_base 532 drivers/gpu/drm/via/via_dma.c end_addr = agp_base + dev_priv->dma_high; agp_base 596 drivers/gpu/drm/via/via_dma.c uint32_t agp_base; agp_base 602 drivers/gpu/drm/via/via_dma.c agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; agp_base 2038 drivers/video/fbdev/aty/radeon_base.c u32 agp_base; agp_base 2064 drivers/video/fbdev/aty/radeon_base.c agp_base = aper_base + aper_size; agp_base 2065 drivers/video/fbdev/aty/radeon_base.c if (agp_base & 0xf0000000) agp_base 2066 drivers/video/fbdev/aty/radeon_base.c agp_base = (aper_base | 0x0fffffff) + 1; agp_base 2073 drivers/video/fbdev/aty/radeon_base.c OUTREG(MC_AGP_LOCATION, 0xffff0000 | (agp_base >> 16)); agp_base 2103 drivers/video/fbdev/aty/radeon_base.c 0xffff0000 | (agp_base >> 16));