ae_mask 93 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c if (!self || !self->ae_mask) ae_mask 97 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c if (self->ae_mask & (1 << i)) ae_mask 179 drivers/crypto/qat/qat_c3xxx/adf_drv.c hw_data->ae_mask = hw_data->get_ae_mask(hw_data->fuses); ae_mask 182 drivers/crypto/qat/qat_c3xxx/adf_drv.c if (!hw_data->accel_mask || !hw_data->ae_mask || ae_mask 183 drivers/crypto/qat/qat_c3xxx/adf_drv.c ((~hw_data->ae_mask) & 0x01)) { ae_mask 170 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c hw_data->ae_mask = hw_data->get_ae_mask(hw_data->fuses); ae_mask 98 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c if (!self || !self->ae_mask) ae_mask 102 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c if (self->ae_mask & (1 << i)) ae_mask 179 drivers/crypto/qat/qat_c62x/adf_drv.c hw_data->ae_mask = hw_data->get_ae_mask(hw_data->fuses); ae_mask 182 drivers/crypto/qat/qat_c62x/adf_drv.c if (!hw_data->accel_mask || !hw_data->ae_mask || ae_mask 183 drivers/crypto/qat/qat_c62x/adf_drv.c ((~hw_data->ae_mask) & 0x01)) { ae_mask 170 drivers/crypto/qat/qat_c62xvf/adf_drv.c hw_data->ae_mask = hw_data->get_ae_mask(hw_data->fuses); ae_mask 187 drivers/crypto/qat/qat_common/adf_accel_devices.h uint16_t ae_mask; ae_mask 127 drivers/crypto/qat/qat_common/adf_accel_engine.c if (hw_data->ae_mask & (1 << ae)) { ae_mask 148 drivers/crypto/qat/qat_common/adf_accel_engine.c if (hw_data->ae_mask & (1 << ae)) { ae_mask 61 drivers/crypto/qat/qat_common/icp_qat_fw_loader_handle.h unsigned int ae_mask; ae_mask 142 drivers/crypto/qat/qat_common/icp_qat_hal.h ((ae & handle->hal_handle->ae_mask) << 12)) ae_mask 149 drivers/crypto/qat/qat_common/icp_qat_hal.h ((ae & handle->hal_handle->ae_mask) << 12)) ae_mask 415 drivers/crypto/qat/qat_common/icp_qat_uclo.h unsigned int ae_mask; ae_mask 486 drivers/crypto/qat/qat_common/icp_qat_uclo.h unsigned int ae_mask; ae_mask 320 drivers/crypto/qat/qat_common/qat_hal.c ae_reset_csr |= handle->hal_handle->ae_mask << RST_CSR_AE_LSB; ae_mask 492 drivers/crypto/qat/qat_common/qat_hal.c ae_reset_csr &= ~(handle->hal_handle->ae_mask << RST_CSR_AE_LSB); ae_mask 499 drivers/crypto/qat/qat_common/qat_hal.c } while ((handle->hal_handle->ae_mask | ae_mask 503 drivers/crypto/qat/qat_common/qat_hal.c clk_csr |= handle->hal_handle->ae_mask << 0; ae_mask 730 drivers/crypto/qat/qat_common/qat_hal.c handle->hal_handle->ae_mask = hw_data->ae_mask; ae_mask 736 drivers/crypto/qat/qat_common/qat_hal.c if (!(hw_data->ae_mask & (1 << ae))) ae_mask 693 drivers/crypto/qat/qat_common/qat_uclo.c (unsigned long *)&handle->hal_handle->ae_mask)) ae_mask 919 drivers/crypto/qat/qat_common/qat_uclo.c (unsigned long *)&handle->hal_handle->ae_mask)) ae_mask 1068 drivers/crypto/qat/qat_common/qat_uclo.c suof_img_hdr->ae_mask = ae_mode->ae_mask; ae_mask 1180 drivers/crypto/qat/qat_common/qat_uclo.c if ((suof_img_hdr[i].ae_mask & 0x1) != 0) ae_mask 1380 drivers/crypto/qat/qat_common/qat_uclo.c if (!((virt_addr->ae_mask >> i) & 0x1)) ae_mask 1482 drivers/crypto/qat/qat_common/qat_uclo.c (sizeof(handle->hal_handle->ae_mask) * 8)); ae_mask 100 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c if (!self || !self->ae_mask) ae_mask 104 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c if (self->ae_mask & (1 << i)) ae_mask 179 drivers/crypto/qat/qat_dh895xcc/adf_drv.c hw_data->ae_mask = hw_data->get_ae_mask(hw_data->fuses); ae_mask 182 drivers/crypto/qat/qat_dh895xcc/adf_drv.c if (!hw_data->accel_mask || !hw_data->ae_mask || ae_mask 183 drivers/crypto/qat/qat_dh895xcc/adf_drv.c ((~hw_data->ae_mask) & 0x01)) { ae_mask 170 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c hw_data->ae_mask = hw_data->get_ae_mask(hw_data->fuses); ae_mask 391 drivers/scsi/aic94xx/aic94xx_sds.c __le32 ae_mask;