ae 976 arch/ia64/kernel/efi.c u64 as = 0, ae; ae 1019 arch/ia64/kernel/efi.c ae = min(contig_high, efi_md_end(md)); ae 1023 arch/ia64/kernel/efi.c ae = min(ae, max_addr); ae 1024 arch/ia64/kernel/efi.c if (ae <= as) ae 1028 arch/ia64/kernel/efi.c if (total_mem + (ae - as) > mem_limit) ae 1029 arch/ia64/kernel/efi.c ae -= total_mem + (ae - as) - mem_limit; ae 1031 arch/ia64/kernel/efi.c if (ae <= as) ae 1034 arch/ia64/kernel/efi.c if (ae - as > space_needed) ae 1053 arch/ia64/kernel/efi.c u64 as, ae, lim; ae 1136 arch/ia64/kernel/efi.c ae = contig_high; ae 1138 arch/ia64/kernel/efi.c ae = efi_md_end(md); ae 1142 arch/ia64/kernel/efi.c ae = min(ae, max_addr); ae 1143 arch/ia64/kernel/efi.c if (ae <= as) ae 1147 arch/ia64/kernel/efi.c if (total_mem + (ae - as) > mem_limit) ae 1148 arch/ia64/kernel/efi.c ae -= total_mem + (ae - as) - mem_limit; ae 1150 arch/ia64/kernel/efi.c if (ae <= as) ae 1153 arch/ia64/kernel/efi.c prev->num_pages += (ae - as) >> EFI_PAGE_SHIFT; ae 1154 arch/ia64/kernel/efi.c total_mem += ae - as; ae 1159 arch/ia64/kernel/efi.c k->num_pages = (ae - as) >> EFI_PAGE_SHIFT; ae 1160 arch/ia64/kernel/efi.c total_mem += ae - as; ae 225 arch/powerpc/perf/mpc7450-pmu.c u32 ae; ae 232 arch/powerpc/perf/mpc7450-pmu.c ae = event_alternatives[i][j]; ae 233 arch/powerpc/perf/mpc7450-pmu.c if (ae && ae != (u32)event) ae 234 arch/powerpc/perf/mpc7450-pmu.c alt[nalt++] = ae; ae 276 arch/powerpc/perf/power5+-pmu.c s64 ae; ae 284 arch/powerpc/perf/power5+-pmu.c ae = event_alternatives[i][j]; ae 285 arch/powerpc/perf/power5+-pmu.c if (ae && ae != event) ae 286 arch/powerpc/perf/power5+-pmu.c alt[nalt++] = ae; ae 287 arch/powerpc/perf/power5+-pmu.c nlim += power5p_limited_pmc_event(ae); ae 290 arch/powerpc/perf/power5+-pmu.c ae = find_alternative_bdecode(event); ae 291 arch/powerpc/perf/power5+-pmu.c if (ae > 0) ae 292 arch/powerpc/perf/power5+-pmu.c alt[nalt++] = ae; ae 271 arch/powerpc/perf/power5-pmu.c s64 ae; ae 278 arch/powerpc/perf/power5-pmu.c ae = event_alternatives[i][j]; ae 279 arch/powerpc/perf/power5-pmu.c if (ae && ae != event) ae 280 arch/powerpc/perf/power5-pmu.c alt[nalt++] = ae; ae 283 arch/powerpc/perf/power5-pmu.c ae = find_alternative_bdecode(event); ae 284 arch/powerpc/perf/power5-pmu.c if (ae > 0) ae 285 arch/powerpc/perf/power5-pmu.c alt[nalt++] = ae; ae 159 arch/powerpc/perf/power7-pmu.c s64 ae; ae 166 arch/powerpc/perf/power7-pmu.c ae = event_alternatives[i][j]; ae 167 arch/powerpc/perf/power7-pmu.c if (ae && ae != event) ae 168 arch/powerpc/perf/power7-pmu.c alt[nalt++] = ae; ae 171 arch/powerpc/perf/power7-pmu.c ae = find_alternative_decode(event); ae 172 arch/powerpc/perf/power7-pmu.c if (ae > 0) ae 173 arch/powerpc/perf/power7-pmu.c alt[nalt++] = ae; ae 195 drivers/crypto/cavium/cpt/cpt_hw_types.h u64 ae:8; ae 201 drivers/crypto/cavium/cpt/cpt_hw_types.h u64 ae:8; ae 357 drivers/crypto/cavium/cpt/cptpf_main.c cpt->max_ae_cores = pf_cnsts.s.ae; ae 121 drivers/crypto/qat/qat_common/adf_accel_engine.c uint32_t ae_ctr, ae, max_aes = GET_MAX_ACCELENGINES(accel_dev); ae 126 drivers/crypto/qat/qat_common/adf_accel_engine.c for (ae = 0, ae_ctr = 0; ae < max_aes; ae++) { ae 127 drivers/crypto/qat/qat_common/adf_accel_engine.c if (hw_data->ae_mask & (1 << ae)) { ae 128 drivers/crypto/qat/qat_common/adf_accel_engine.c qat_hal_start(loader_data->fw_loader, ae, 0xFF); ae 142 drivers/crypto/qat/qat_common/adf_accel_engine.c uint32_t ae_ctr, ae, max_aes = GET_MAX_ACCELENGINES(accel_dev); ae 147 drivers/crypto/qat/qat_common/adf_accel_engine.c for (ae = 0, ae_ctr = 0; ae < max_aes; ae++) { ae 148 drivers/crypto/qat/qat_common/adf_accel_engine.c if (hw_data->ae_mask & (1 << ae)) { ae 149 drivers/crypto/qat/qat_common/adf_accel_engine.c qat_hal_stop(loader_data->fw_loader, ae, 0xFF); ae 159 drivers/crypto/qat/qat_common/adf_accel_engine.c static int adf_ae_reset(struct adf_accel_dev *accel_dev, int ae) ae 154 drivers/crypto/qat/qat_common/adf_admin.c static int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae, ae 158 drivers/crypto/qat/qat_common/adf_admin.c int offset = ae * ADF_ADMINMSG_LEN * 2; ae 160 drivers/crypto/qat/qat_common/adf_admin.c int mb_offset = ae * ADF_DH895XCC_MAILBOX_STRIDE; ae 180 drivers/crypto/qat/qat_common/adf_common_drv.h void qat_hal_start(struct icp_qat_fw_loader_handle *handle, unsigned char ae, ae 182 drivers/crypto/qat/qat_common/adf_common_drv.h void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae, ae 187 drivers/crypto/qat/qat_common/adf_common_drv.h unsigned char ae, unsigned int ctx_mask); ae 189 drivers/crypto/qat/qat_common/adf_common_drv.h unsigned int ae); ae 191 drivers/crypto/qat/qat_common/adf_common_drv.h unsigned char ae, enum icp_qat_uof_regtype lm_type, ae 194 drivers/crypto/qat/qat_common/adf_common_drv.h unsigned char ae, unsigned char mode); ae 196 drivers/crypto/qat/qat_common/adf_common_drv.h unsigned char ae, unsigned char mode); ae 198 drivers/crypto/qat/qat_common/adf_common_drv.h unsigned char ae, unsigned int ctx_mask, unsigned int upc); ae 200 drivers/crypto/qat/qat_common/adf_common_drv.h unsigned char ae, unsigned int uaddr, ae 202 drivers/crypto/qat/qat_common/adf_common_drv.h void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae, ae 207 drivers/crypto/qat/qat_common/adf_common_drv.h unsigned char ae, ae 210 drivers/crypto/qat/qat_common/adf_common_drv.h unsigned char ae, unsigned char ctx_mask, ae 214 drivers/crypto/qat/qat_common/adf_common_drv.h unsigned char ae, unsigned char ctx_mask, ae 218 drivers/crypto/qat/qat_common/adf_common_drv.h unsigned char ae, unsigned char ctx_mask, ae 222 drivers/crypto/qat/qat_common/adf_common_drv.h unsigned char ae, unsigned char ctx_mask, ae 225 drivers/crypto/qat/qat_common/adf_common_drv.h unsigned char ae, unsigned short lm_addr, unsigned int value); ae 140 drivers/crypto/qat/qat_common/icp_qat_hal.h #define AE_CSR(handle, ae) \ ae 142 drivers/crypto/qat/qat_common/icp_qat_hal.h ((ae & handle->hal_handle->ae_mask) << 12)) ae 143 drivers/crypto/qat/qat_common/icp_qat_hal.h #define AE_CSR_ADDR(handle, ae, csr) (AE_CSR(handle, ae) + (0x3ff & csr)) ae 144 drivers/crypto/qat/qat_common/icp_qat_hal.h #define SET_AE_CSR(handle, ae, csr, val) \ ae 145 drivers/crypto/qat/qat_common/icp_qat_hal.h ADF_CSR_WR(AE_CSR_ADDR(handle, ae, csr), 0, val) ae 146 drivers/crypto/qat/qat_common/icp_qat_hal.h #define GET_AE_CSR(handle, ae, csr) ADF_CSR_RD(AE_CSR_ADDR(handle, ae, csr), 0) ae 147 drivers/crypto/qat/qat_common/icp_qat_hal.h #define AE_XFER(handle, ae) \ ae 149 drivers/crypto/qat/qat_common/icp_qat_hal.h ((ae & handle->hal_handle->ae_mask) << 12)) ae 150 drivers/crypto/qat/qat_common/icp_qat_hal.h #define AE_XFER_ADDR(handle, ae, reg) (AE_XFER(handle, ae) + \ ae 152 drivers/crypto/qat/qat_common/icp_qat_hal.h #define SET_AE_XFER(handle, ae, reg, val) \ ae 153 drivers/crypto/qat/qat_common/icp_qat_hal.h ADF_CSR_WR(AE_XFER_ADDR(handle, ae, reg), 0, val) ae 399 drivers/crypto/qat/qat_common/icp_qat_uclo.h unsigned int ae; ae 79 drivers/crypto/qat/qat_common/qat_hal.c #define AE(handle, ae) handle->hal_handle->aes[ae] ae 113 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int ctx_mask) ae 115 drivers/crypto/qat/qat_common/qat_hal.c AE(handle, ae).live_ctx_mask = ctx_mask; ae 120 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int csr) ae 126 drivers/crypto/qat/qat_common/qat_hal.c value = GET_AE_CSR(handle, ae, csr); ae 127 drivers/crypto/qat/qat_common/qat_hal.c if (!(GET_AE_CSR(handle, ae, LOCAL_CSR_STATUS) & LCS_STATUS)) ae 136 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int csr, ae 142 drivers/crypto/qat/qat_common/qat_hal.c SET_AE_CSR(handle, ae, csr, value); ae 143 drivers/crypto/qat/qat_common/qat_hal.c if (!(GET_AE_CSR(handle, ae, LOCAL_CSR_STATUS) & LCS_STATUS)) ae 152 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char ctx, ae 157 drivers/crypto/qat/qat_common/qat_hal.c cur_ctx = qat_hal_rd_ae_csr(handle, ae, CSR_CTX_POINTER); ae 158 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, ctx); ae 159 drivers/crypto/qat/qat_common/qat_hal.c *events = qat_hal_rd_ae_csr(handle, ae, CTX_WAKEUP_EVENTS_INDIRECT); ae 160 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, cur_ctx); ae 164 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int cycles, ae 172 drivers/crypto/qat/qat_common/qat_hal.c base_cnt = qat_hal_rd_ae_csr(handle, ae, PROFILE_COUNT); ae 176 drivers/crypto/qat/qat_common/qat_hal.c csr = qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS); ae 178 drivers/crypto/qat/qat_common/qat_hal.c cur_cnt = qat_hal_rd_ae_csr(handle, ae, PROFILE_COUNT); ae 200 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char mode) ae 210 drivers/crypto/qat/qat_common/qat_hal.c csr = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); ae 215 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, new_csr); ae 220 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char mode) ae 224 drivers/crypto/qat/qat_common/qat_hal.c csr = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); ae 232 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, new_csr); ae 238 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, enum icp_qat_uof_regtype lm_type, ae 243 drivers/crypto/qat/qat_common/qat_hal.c csr = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); ae 262 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, new_csr); ae 326 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int ctx_mask, ae 331 drivers/crypto/qat/qat_common/qat_hal.c cur_ctx = qat_hal_rd_ae_csr(handle, ae, CSR_CTX_POINTER); ae 336 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, ctx); ae 337 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, ae_csr, csr_val); ae 340 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, cur_ctx); ae 344 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char ctx, ae 349 drivers/crypto/qat/qat_common/qat_hal.c cur_ctx = qat_hal_rd_ae_csr(handle, ae, CSR_CTX_POINTER); ae 350 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, ctx); ae 351 drivers/crypto/qat/qat_common/qat_hal.c csr_val = qat_hal_rd_ae_csr(handle, ae, ae_csr); ae 352 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, cur_ctx); ae 358 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int ctx_mask, ae 363 drivers/crypto/qat/qat_common/qat_hal.c cur_ctx = qat_hal_rd_ae_csr(handle, ae, CSR_CTX_POINTER); ae 367 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, ctx); ae 368 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_SIG_EVENTS_INDIRECT, events); ae 370 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, cur_ctx); ae 374 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int ctx_mask, ae 379 drivers/crypto/qat/qat_common/qat_hal.c cur_ctx = qat_hal_rd_ae_csr(handle, ae, CSR_CTX_POINTER); ae 383 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, ctx); ae 384 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_WAKEUP_EVENTS_INDIRECT, ae 387 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, cur_ctx); ae 393 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae; ae 396 drivers/crypto/qat/qat_common/qat_hal.c for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { ae 397 drivers/crypto/qat/qat_common/qat_hal.c base_cnt = qat_hal_rd_ae_csr(handle, ae, PROFILE_COUNT); ae 401 drivers/crypto/qat/qat_common/qat_hal.c cur_cnt = qat_hal_rd_ae_csr(handle, ae, PROFILE_COUNT); ae 406 drivers/crypto/qat/qat_common/qat_hal.c pr_err("QAT: AE%d is inactive!!\n", ae); ae 415 drivers/crypto/qat/qat_common/qat_hal.c unsigned int ae) ae 419 drivers/crypto/qat/qat_common/qat_hal.c enable = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); ae 420 drivers/crypto/qat/qat_common/qat_hal.c active = qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS); ae 431 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae; ae 439 drivers/crypto/qat/qat_common/qat_hal.c for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { ae 440 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, TIMESTAMP_LOW, 0); ae 441 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, TIMESTAMP_HIGH, 0); ae 485 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae; ae 510 drivers/crypto/qat/qat_common/qat_hal.c for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { ae 511 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ae 513 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_indr_csr(handle, ae, ICP_QAT_UCLO_AE_ALL_CTX, ae 517 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ARB_CNTL, INIT_CTX_ARB_VALUE); ae 518 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CC_ENABLE, INIT_CCENABLE_VALUE); ae 519 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_put_wakeup_event(handle, ae, ae 522 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_put_sig_event(handle, ae, ae 539 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int ctx_mask) ae 543 drivers/crypto/qat/qat_common/qat_hal.c ctx = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); ae 546 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx); ae 580 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int uaddr, ae 586 drivers/crypto/qat/qat_common/qat_hal.c ustore_addr = qat_hal_rd_ae_csr(handle, ae, USTORE_ADDRESS); ae 588 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, uaddr); ae 596 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_DATA_LOWER, uwrd_lo); ae 597 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_DATA_UPPER, uwrd_hi); ae 599 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, ustore_addr); ae 603 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int ctx_mask) ae 607 drivers/crypto/qat/qat_common/qat_hal.c ctx = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); ae 611 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx); ae 616 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae; ae 619 drivers/crypto/qat/qat_common/qat_hal.c for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { ae 621 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_init_rd_xfer(handle, ae, 0, ICP_SR_RD_ABS, ae 623 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_init_rd_xfer(handle, ae, 0, ICP_DR_RD_ABS, ae 631 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae; ae 638 drivers/crypto/qat/qat_common/qat_hal.c for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { ae 639 drivers/crypto/qat/qat_common/qat_hal.c csr_val = qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL); ae 641 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, AE_MISC_CONTROL, csr_val); ae 642 drivers/crypto/qat/qat_common/qat_hal.c csr_val = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); ae 645 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, csr_val); ae 646 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_uwords(handle, ae, 0, ARRAY_SIZE(inst), ae 648 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_indr_csr(handle, ae, ctx_mask, CTX_STS_INDIRECT, ae 651 drivers/crypto/qat/qat_common/qat_hal.c savctx = qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS); ae 652 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, ACTIVE_CTX_STATUS, 0); ae 653 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_put_wakeup_event(handle, ae, ctx_mask, XCWE_VOLUNTARY); ae 654 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_indr_csr(handle, ae, ctx_mask, ae 656 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_SIG_EVENTS_ACTIVE, 0); ae 657 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_enable_ctx(handle, ae, ctx_mask); ae 659 drivers/crypto/qat/qat_common/qat_hal.c for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { ae 662 drivers/crypto/qat/qat_common/qat_hal.c ret = qat_hal_wait_cycles(handle, ae, 20, 1); ae 666 drivers/crypto/qat/qat_common/qat_hal.c pr_err("QAT: clear GPR of AE %d failed", ae); ae 669 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_disable_ctx(handle, ae, ctx_mask); ae 670 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, ACTIVE_CTX_STATUS, ae 672 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ae 674 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_indr_csr(handle, ae, ctx_mask, CTX_STS_INDIRECT, ae 677 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ARB_CNTL, INIT_CTX_ARB_VALUE); ae 678 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CC_ENABLE, INIT_CCENABLE_VALUE); ae 679 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_put_wakeup_event(handle, ae, ctx_mask, ae 681 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_put_sig_event(handle, ae, ctx_mask, ae 693 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae; ae 735 drivers/crypto/qat/qat_common/qat_hal.c for (ae = 0; ae < ICP_QAT_UCLO_MAX_AE; ae++) { ae 736 drivers/crypto/qat/qat_common/qat_hal.c if (!(hw_data->ae_mask & (1 << ae))) ae 738 drivers/crypto/qat/qat_common/qat_hal.c handle->hal_handle->aes[ae].free_addr = 0; ae 739 drivers/crypto/qat/qat_common/qat_hal.c handle->hal_handle->aes[ae].free_size = ae 741 drivers/crypto/qat/qat_common/qat_hal.c handle->hal_handle->aes[ae].ustore_size = ae 743 drivers/crypto/qat/qat_common/qat_hal.c handle->hal_handle->aes[ae].live_ctx_mask = ae 745 drivers/crypto/qat/qat_common/qat_hal.c max_en_ae_id = ae; ae 760 drivers/crypto/qat/qat_common/qat_hal.c for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { ae 763 drivers/crypto/qat/qat_common/qat_hal.c csr_val = qat_hal_rd_ae_csr(handle, ae, SIGNATURE_ENABLE); ae 765 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, SIGNATURE_ENABLE, csr_val); ae 785 drivers/crypto/qat/qat_common/qat_hal.c void qat_hal_start(struct icp_qat_fw_loader_handle *handle, unsigned char ae, ae 799 drivers/crypto/qat/qat_common/qat_hal.c pr_err("QAT: start error (AE 0x%x FCU_STS = 0x%x)\n", ae, ae 802 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_put_wakeup_event(handle, ae, (~ctx_mask) & ae 804 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_enable_ctx(handle, ae, ctx_mask); ae 808 drivers/crypto/qat/qat_common/qat_hal.c void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae, ae 812 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_disable_ctx(handle, ae, ctx_mask); ae 816 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int ctx_mask, unsigned int upc) ae 818 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_indr_csr(handle, ae, ctx_mask, CTX_STS_INDIRECT, ae 823 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int uaddr, ae 829 drivers/crypto/qat/qat_common/qat_hal.c misc_control = qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL); ae 830 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, AE_MISC_CONTROL, ae 832 drivers/crypto/qat/qat_common/qat_hal.c ustore_addr = qat_hal_rd_ae_csr(handle, ae, USTORE_ADDRESS); ae 835 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, uaddr); ae 837 drivers/crypto/qat/qat_common/qat_hal.c uwrd_lo = qat_hal_rd_ae_csr(handle, ae, USTORE_DATA_LOWER); ae 838 drivers/crypto/qat/qat_common/qat_hal.c uwrd_hi = qat_hal_rd_ae_csr(handle, ae, USTORE_DATA_UPPER); ae 842 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, AE_MISC_CONTROL, misc_control); ae 843 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, ustore_addr); ae 847 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned int uaddr, ae 852 drivers/crypto/qat/qat_common/qat_hal.c ustore_addr = qat_hal_rd_ae_csr(handle, ae, USTORE_ADDRESS); ae 854 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, uaddr); ae 865 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_DATA_LOWER, uwrd_lo); ae 866 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_DATA_UPPER, uwrd_hi); ae 868 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, ustore_addr); ae 873 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char ctx, ae 893 drivers/crypto/qat/qat_common/qat_hal.c ind_lm_addr0 = qat_hal_rd_indr_csr(handle, ae, ctx, LM_ADDR_0_INDIRECT); ae 894 drivers/crypto/qat/qat_common/qat_hal.c ind_lm_addr1 = qat_hal_rd_indr_csr(handle, ae, ctx, LM_ADDR_1_INDIRECT); ae 895 drivers/crypto/qat/qat_common/qat_hal.c ind_lm_addr_byte0 = qat_hal_rd_indr_csr(handle, ae, ctx, ae 897 drivers/crypto/qat/qat_common/qat_hal.c ind_lm_addr_byte1 = qat_hal_rd_indr_csr(handle, ae, ctx, ae 900 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_get_uwords(handle, ae, 0, inst_num, savuwords); ae 901 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_get_wakeup_event(handle, ae, ctx, &wakeup_events); ae 902 drivers/crypto/qat/qat_common/qat_hal.c savpc = qat_hal_rd_indr_csr(handle, ae, ctx, CTX_STS_INDIRECT); ae 904 drivers/crypto/qat/qat_common/qat_hal.c ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); ae 906 drivers/crypto/qat/qat_common/qat_hal.c savcc = qat_hal_rd_ae_csr(handle, ae, CC_ENABLE); ae 907 drivers/crypto/qat/qat_common/qat_hal.c savctx = qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS); ae 908 drivers/crypto/qat/qat_common/qat_hal.c ctxarb_ctl = qat_hal_rd_ae_csr(handle, ae, CTX_ARB_CNTL); ae 909 drivers/crypto/qat/qat_common/qat_hal.c ind_cnt_sig = qat_hal_rd_indr_csr(handle, ae, ctx, ae 911 drivers/crypto/qat/qat_common/qat_hal.c ind_sig = qat_hal_rd_indr_csr(handle, ae, ctx, ae 913 drivers/crypto/qat/qat_common/qat_hal.c act_sig = qat_hal_rd_ae_csr(handle, ae, CTX_SIG_EVENTS_ACTIVE); ae 915 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables); ae 916 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_uwords(handle, ae, 0, inst_num, micro_inst); ae 917 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_indr_csr(handle, ae, (1 << ctx), CTX_STS_INDIRECT, 0); ae 918 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, ACTIVE_CTX_STATUS, ctx & ACS_ACNO); ae 920 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CC_ENABLE, savcc & 0xffffdfff); ae 921 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_put_wakeup_event(handle, ae, (1 << ctx), XCWE_VOLUNTARY); ae 922 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_indr_csr(handle, ae, (1 << ctx), CTX_SIG_EVENTS_INDIRECT, 0); ae 923 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_SIG_EVENTS_ACTIVE, 0); ae 924 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_enable_ctx(handle, ae, (1 << ctx)); ae 926 drivers/crypto/qat/qat_common/qat_hal.c if (qat_hal_wait_cycles(handle, ae, max_cycle, 1) != 0) ae 931 drivers/crypto/qat/qat_common/qat_hal.c ctx_status = qat_hal_rd_indr_csr(handle, ae, ctx, ae 936 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_disable_ctx(handle, ae, (1 << ctx)); ae 938 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_uwords(handle, ae, 0, inst_num, savuwords); ae 939 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_put_wakeup_event(handle, ae, (1 << ctx), wakeup_events); ae 940 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_indr_csr(handle, ae, (1 << ctx), CTX_STS_INDIRECT, ae 942 drivers/crypto/qat/qat_common/qat_hal.c csr_val = qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL); ae 944 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, AE_MISC_CONTROL, newcsr_val); ae 945 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CC_ENABLE, savcc); ae 946 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, ACTIVE_CTX_STATUS, savctx & ACS_ACNO); ae 947 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ARB_CNTL, ctxarb_ctl); ae 948 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_indr_csr(handle, ae, (1 << ctx), ae 950 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_indr_csr(handle, ae, (1 << ctx), ae 952 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_indr_csr(handle, ae, (1 << ctx), ae 954 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_indr_csr(handle, ae, (1 << ctx), ae 956 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_indr_csr(handle, ae, (1 << ctx), ae 958 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_indr_csr(handle, ae, (1 << ctx), ae 960 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_SIG_EVENTS_ACTIVE, act_sig); ae 961 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables); ae 967 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char ctx, ae 990 drivers/crypto/qat/qat_common/qat_hal.c savctx = qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS); ae 991 drivers/crypto/qat/qat_common/qat_hal.c ctxarb_cntl = qat_hal_rd_ae_csr(handle, ae, CTX_ARB_CNTL); ae 992 drivers/crypto/qat/qat_common/qat_hal.c ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); ae 995 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, ACTIVE_CTX_STATUS, ae 997 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_get_uwords(handle, ae, 0, 1, &savuword); ae 998 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables); ae 999 drivers/crypto/qat/qat_common/qat_hal.c ustore_addr = qat_hal_rd_ae_csr(handle, ae, USTORE_ADDRESS); ae 1001 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, uaddr); ae 1005 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_DATA_LOWER, uwrd_lo); ae 1006 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_DATA_UPPER, uwrd_hi); ae 1007 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, uaddr); ae 1009 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wait_cycles(handle, ae, 0x8, 0); ae 1015 drivers/crypto/qat/qat_common/qat_hal.c *data = qat_hal_rd_ae_csr(handle, ae, ALU_OUT); ae 1016 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, ustore_addr); ae 1017 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_uwords(handle, ae, 0, 1, &savuword); ae 1019 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, ACTIVE_CTX_STATUS, ae 1021 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ARB_CNTL, ctxarb_cntl); ae 1022 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables); ae 1028 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char ctx, ae 1070 drivers/crypto/qat/qat_common/qat_hal.c return qat_hal_exec_micro_inst(handle, ae, ctx, insts, num_inst, ae 1109 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char ctx, ae 1118 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_rd_rel_reg(handle, ae, ctx, ICP_GPA_REL, 0, &gpra0); ae 1119 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_rd_rel_reg(handle, ae, ctx, ICP_GPA_REL, 0x1, &gpra1); ae 1120 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_rd_rel_reg(handle, ae, ctx, ICP_GPA_REL, 0x2, &gpra2); ae 1121 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_rd_rel_reg(handle, ae, ctx, ICP_GPB_REL, 0, &gprb0); ae 1122 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_rd_rel_reg(handle, ae, ctx, ICP_GPB_REL, 0x1, &gprb1); ae 1125 drivers/crypto/qat/qat_common/qat_hal.c stat = qat_hal_exec_micro_inst(handle, ae, ctx, micro_inst, inst_num, 1, ae 1129 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_rel_reg(handle, ae, ctx, ICP_GPA_REL, 0, gpra0); ae 1130 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_rel_reg(handle, ae, ctx, ICP_GPA_REL, 0x1, gpra1); ae 1131 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_rel_reg(handle, ae, ctx, ICP_GPA_REL, 0x2, gpra2); ae 1132 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_rel_reg(handle, ae, ctx, ICP_GPB_REL, 0, gprb0); ae 1133 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_rel_reg(handle, ae, ctx, ICP_GPB_REL, 0x1, gprb1); ae 1139 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, ae 1161 drivers/crypto/qat/qat_common/qat_hal.c ae = plm_init->ae; ae 1173 drivers/crypto/qat/qat_common/qat_hal.c stat = qat_hal_exec_micro_init_lm(handle, ae, 0, &first_exec, ae 1182 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char ctx, ae 1192 drivers/crypto/qat/qat_common/qat_hal.c status = ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); ae 1209 drivers/crypto/qat/qat_common/qat_hal.c SET_AE_XFER(handle, ae, reg_addr, val); ae 1213 drivers/crypto/qat/qat_common/qat_hal.c SET_AE_XFER(handle, ae, (reg_addr + dr_offset), val); ae 1223 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char ctx, ae 1242 drivers/crypto/qat/qat_common/qat_hal.c ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); ae 1259 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_rd_rel_reg(handle, ae, ctx, ICP_GPB_REL, gprnum, &gprval); ae 1273 drivers/crypto/qat/qat_common/qat_hal.c status = qat_hal_exec_micro_inst(handle, ae, ctx, micro_inst, num_inst, ae 1275 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_rel_reg(handle, ae, ctx, ICP_GPB_REL, gprnum, gprval); ae 1280 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char ctx, ae 1286 drivers/crypto/qat/qat_common/qat_hal.c ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); ae 1288 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables | CE_NN_MODE); ae 1290 drivers/crypto/qat/qat_common/qat_hal.c stat = qat_hal_put_rel_wr_xfer(handle, ae, ctx, ICP_NEIGH_REL, nn, val); ae 1291 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables); ae 1296 drivers/crypto/qat/qat_common/qat_hal.c *handle, unsigned char ae, ae 1303 drivers/crypto/qat/qat_common/qat_hal.c ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES); ae 1317 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char ctx_mask, ae 1331 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_convert_abs_to_rel(handle, ae, reg_num, ®, ae 1340 drivers/crypto/qat/qat_common/qat_hal.c stat = qat_hal_wr_rel_reg(handle, ae, ctx, type, reg, regdata); ae 1351 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char ctx_mask, ae 1365 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_convert_abs_to_rel(handle, ae, reg_num, ®, ae 1374 drivers/crypto/qat/qat_common/qat_hal.c stat = qat_hal_put_rel_wr_xfer(handle, ae, ctx, type, reg, ae 1386 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char ctx_mask, ae 1400 drivers/crypto/qat/qat_common/qat_hal.c qat_hal_convert_abs_to_rel(handle, ae, reg_num, ®, ae 1409 drivers/crypto/qat/qat_common/qat_hal.c stat = qat_hal_put_rel_rd_xfer(handle, ae, ctx, type, reg, ae 1421 drivers/crypto/qat/qat_common/qat_hal.c unsigned char ae, unsigned char ctx_mask, ae 1433 drivers/crypto/qat/qat_common/qat_hal.c stat = qat_hal_put_rel_nn(handle, ae, ctx, reg_num, regdata); ae 63 drivers/crypto/qat/qat_common/qat_uclo.c unsigned int ae, unsigned int image_num) ae 70 drivers/crypto/qat/qat_common/qat_uclo.c ae_data = &obj_handle->ae_data[ae]; ae 184 drivers/crypto/qat/qat_common/qat_uclo.c unsigned char ae, unsigned int addr, ae 195 drivers/crypto/qat/qat_common/qat_uclo.c qat_hal_wr_umem(handle, ae, addr++, 1, &outval); ae 202 drivers/crypto/qat/qat_common/qat_uclo.c unsigned char ae, ae 214 drivers/crypto/qat/qat_common/qat_uclo.c ae = umem_init->ae; ae 218 drivers/crypto/qat/qat_common/qat_uclo.c qat_uclo_wr_umem_by_words(handle, ae, addr, value, size); ae 243 drivers/crypto/qat/qat_common/qat_uclo.c unsigned long ae = 0; ae 253 drivers/crypto/qat/qat_common/qat_uclo.c if ((kstrtoul(buf, 10, &ae))) ae 256 drivers/crypto/qat/qat_common/qat_uclo.c *num = (unsigned int)ae; ae 262 drivers/crypto/qat/qat_common/qat_uclo.c unsigned int size_range, unsigned int *ae) ae 280 drivers/crypto/qat/qat_common/qat_uclo.c if (qat_uclo_parse_num(str, ae)) { ae 284 drivers/crypto/qat/qat_common/qat_uclo.c if (*ae >= ICP_QAT_UCLO_MAX_AE) { ae 285 drivers/crypto/qat/qat_common/qat_uclo.c pr_err("QAT: ae %d out of range\n", *ae); ae 293 drivers/crypto/qat/qat_common/qat_uclo.c *init_mem, unsigned int ae, ae 323 drivers/crypto/qat/qat_common/qat_uclo.c mem_init->ae = ae; ae 349 drivers/crypto/qat/qat_common/qat_uclo.c unsigned int ae; ae 352 drivers/crypto/qat/qat_common/qat_uclo.c ICP_QAT_UCLO_MAX_LMEM_REG, &ae)) ae 354 drivers/crypto/qat/qat_common/qat_uclo.c if (qat_uclo_create_batch_init_list(handle, init_mem, ae, ae 355 drivers/crypto/qat/qat_common/qat_uclo.c &obj_handle->lm_init_tab[ae])) ae 364 drivers/crypto/qat/qat_common/qat_uclo.c unsigned int ae, ustore_size, uaddr, i; ae 367 drivers/crypto/qat/qat_common/qat_uclo.c if (qat_uclo_fetch_initmem_ae(handle, init_mem, ustore_size, &ae)) ae 369 drivers/crypto/qat/qat_common/qat_uclo.c if (qat_uclo_create_batch_init_list(handle, init_mem, ae, ae 370 drivers/crypto/qat/qat_common/qat_uclo.c &obj_handle->umem_init_tab[ae])) ae 374 drivers/crypto/qat/qat_common/qat_uclo.c for (i = 0; i < obj_handle->ae_data[ae].slice_num; i++) { ae 375 drivers/crypto/qat/qat_common/qat_uclo.c if (obj_handle->ae_data[ae].ae_slices[i]. ae 377 drivers/crypto/qat/qat_common/qat_uclo.c obj_handle->ae_data[ae].ae_slices[i]. ae 410 drivers/crypto/qat/qat_common/qat_uclo.c unsigned char ae; ae 426 drivers/crypto/qat/qat_common/qat_uclo.c for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { ae 427 drivers/crypto/qat/qat_common/qat_uclo.c if (!test_bit(ae, (unsigned long *)&uof_image->ae_assigned)) ae 429 drivers/crypto/qat/qat_common/qat_uclo.c ustore_size = obj_handle->ae_data[ae].eff_ustore_size; ae 432 drivers/crypto/qat/qat_common/qat_uclo.c qat_hal_wr_uwords(handle, (unsigned char)ae, 0, ae 434 drivers/crypto/qat/qat_common/qat_uclo.c qat_hal_wr_uwords(handle, (unsigned char)ae, patt_pos, ae 444 drivers/crypto/qat/qat_common/qat_uclo.c int i, ae; ae 459 drivers/crypto/qat/qat_common/qat_uclo.c for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { ae 460 drivers/crypto/qat/qat_common/qat_uclo.c if (qat_hal_batch_wr_lm(handle, ae, ae 461 drivers/crypto/qat/qat_common/qat_uclo.c obj_handle->lm_init_tab[ae])) { ae 462 drivers/crypto/qat/qat_common/qat_uclo.c pr_err("QAT: fail to batch init lmem for AE %d\n", ae); ae 466 drivers/crypto/qat/qat_common/qat_uclo.c &obj_handle->lm_init_tab[ae]); ae 467 drivers/crypto/qat/qat_common/qat_uclo.c qat_uclo_batch_wr_umem(handle, ae, ae 468 drivers/crypto/qat/qat_common/qat_uclo.c obj_handle->umem_init_tab[ae]); ae 471 drivers/crypto/qat/qat_common/qat_uclo.c umem_init_tab[ae]); ae 687 drivers/crypto/qat/qat_common/qat_uclo.c int i, ae; ae 691 drivers/crypto/qat/qat_common/qat_uclo.c for (ae = 0; ae < max_ae; ae++) { ae 692 drivers/crypto/qat/qat_common/qat_uclo.c if (!test_bit(ae, ae 696 drivers/crypto/qat/qat_common/qat_uclo.c if (!test_bit(ae, (unsigned long *) ae 700 drivers/crypto/qat/qat_common/qat_uclo.c if (qat_uclo_init_ae_data(obj_handle, ae, i)) ae 786 drivers/crypto/qat/qat_common/qat_uclo.c unsigned char ae, unsigned char ctx_mask, ae 797 drivers/crypto/qat/qat_common/qat_uclo.c return qat_hal_init_gpr(handle, ae, ctx_mask, reg_type, ae 809 drivers/crypto/qat/qat_common/qat_uclo.c return qat_hal_init_rd_xfer(handle, ae, ctx_mask, reg_type, ae 817 drivers/crypto/qat/qat_common/qat_uclo.c return qat_hal_init_wr_xfer(handle, ae, ctx_mask, reg_type, ae 820 drivers/crypto/qat/qat_common/qat_uclo.c return qat_hal_init_nn(handle, ae, ctx_mask, reg_addr, value); ae 829 drivers/crypto/qat/qat_common/qat_uclo.c unsigned int ae, ae 849 drivers/crypto/qat/qat_common/qat_uclo.c qat_uclo_init_reg(handle, ae, ctx_mask, ae 862 drivers/crypto/qat/qat_common/qat_uclo.c qat_uclo_init_reg(handle, ae, ae 886 drivers/crypto/qat/qat_common/qat_uclo.c unsigned int s, ae; ae 896 drivers/crypto/qat/qat_common/qat_uclo.c for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { ae 897 drivers/crypto/qat/qat_common/qat_uclo.c for (s = 0; s < obj_handle->ae_data[ae].slice_num; s++) { ae 898 drivers/crypto/qat/qat_common/qat_uclo.c if (!obj_handle->ae_data[ae].ae_slices[s].encap_image) ae 900 drivers/crypto/qat/qat_common/qat_uclo.c if (qat_uclo_init_reg_sym(handle, ae, ae 901 drivers/crypto/qat/qat_common/qat_uclo.c obj_handle->ae_data[ae]. ae 912 drivers/crypto/qat/qat_common/qat_uclo.c unsigned char ae, nn_mode, s; ae 917 drivers/crypto/qat/qat_common/qat_uclo.c for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { ae 918 drivers/crypto/qat/qat_common/qat_uclo.c if (!test_bit(ae, ae 921 drivers/crypto/qat/qat_common/qat_uclo.c ae_data = &obj_handle->ae_data[ae]; ae 924 drivers/crypto/qat/qat_common/qat_uclo.c if (!obj_handle->ae_data[ae].ae_slices[s].encap_image) ae 927 drivers/crypto/qat/qat_common/qat_uclo.c if (qat_hal_set_ae_ctx_mode(handle, ae, ae 934 drivers/crypto/qat/qat_common/qat_uclo.c if (qat_hal_set_ae_nn_mode(handle, ae, nn_mode)) { ae 938 drivers/crypto/qat/qat_common/qat_uclo.c if (qat_hal_set_ae_lm_mode(handle, ae, ICP_LMEM0, ae 944 drivers/crypto/qat/qat_common/qat_uclo.c if (qat_hal_set_ae_lm_mode(handle, ae, ICP_LMEM1, ae 971 drivers/crypto/qat/qat_common/qat_uclo.c unsigned int ae; ae 1011 drivers/crypto/qat/qat_common/qat_uclo.c for (ae = 0; ae < obj_handle->uimage_num; ae++) ae 1012 drivers/crypto/qat/qat_common/qat_uclo.c kfree(obj_handle->ae_uimage[ae].page); ae 1546 drivers/crypto/qat/qat_common/qat_uclo.c *encap_page, unsigned int ae) ae 1573 drivers/crypto/qat/qat_common/qat_uclo.c qat_hal_wr_uwords(handle, (unsigned char)ae, ae 1589 drivers/crypto/qat/qat_common/qat_uclo.c unsigned char ae; ae 1598 drivers/crypto/qat/qat_common/qat_uclo.c for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) { ae 1599 drivers/crypto/qat/qat_common/qat_uclo.c if (!test_bit(ae, (unsigned long *)&image->ae_assigned)) ae 1602 drivers/crypto/qat/qat_common/qat_uclo.c for (s = 0; s < obj_handle->ae_data[ae].slice_num; s++) { ae 1603 drivers/crypto/qat/qat_common/qat_uclo.c if (image->ctx_assigned & obj_handle->ae_data[ae]. ae 1607 drivers/crypto/qat/qat_common/qat_uclo.c if (s >= obj_handle->ae_data[ae].slice_num) ae 1609 drivers/crypto/qat/qat_common/qat_uclo.c page = obj_handle->ae_data[ae].ae_slices[s].page; ae 1612 drivers/crypto/qat/qat_common/qat_uclo.c qat_uclo_wr_uimage_raw_page(handle, page->encap_page, ae); ae 1614 drivers/crypto/qat/qat_common/qat_uclo.c page = obj_handle->ae_data[ae].ae_slices[s].page; ae 1616 drivers/crypto/qat/qat_common/qat_uclo.c obj_handle->ae_data[ae].ae_slices[s].cur_page[ctx] = ae 1618 drivers/crypto/qat/qat_common/qat_uclo.c qat_hal_set_live_ctx(handle, (unsigned char)ae, ae 1620 drivers/crypto/qat/qat_common/qat_uclo.c qat_hal_set_pc(handle, (unsigned char)ae, image->ctx_assigned, ae 91 drivers/misc/mic/host/mic_smpt.c int ae = 0; ae 103 drivers/misc/mic/host/mic_smpt.c ae++; ae 105 drivers/misc/mic/host/mic_smpt.c } else if (ae) /* cannot find contiguous entries */ ae 108 drivers/misc/mic/host/mic_smpt.c if (ae == entries) ae 113 drivers/misc/mic/host/mic_smpt.c for (ae = 0, i = 0; i < smpt_info->info.num_reg; i++) { ae 114 drivers/misc/mic/host/mic_smpt.c ae = (smpt_info->entry[i].ref_count == 0) ? ae + 1 : 0; ae 115 drivers/misc/mic/host/mic_smpt.c if (ae == entries) ae 728 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c u32 ae; ae 730 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c ae = (pa & PCI32ADDR_HIGH) >> PCI32ADDR_HIGH_SHIFT; ae 733 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c ctrl2 |= (ae << D64_CTRL2_AE_SHIFT) & D64_CTRL2_AE; ae 798 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c u32 ae; ae 801 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c ae = (pa & PCI32ADDR_HIGH) >> PCI32ADDR_HIGH_SHIFT; ae 810 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c D64_XC_AE, (ae << D64_XC_AE_SHIFT)); ae 817 drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c D64_RC_AE, (ae << D64_RC_AE_SHIFT)); ae 1430 drivers/power/supply/bq27xxx_battery.c int ae; ae 1432 drivers/power/supply/bq27xxx_battery.c ae = bq27xxx_read(di, BQ27XXX_REG_AE, false); ae 1433 drivers/power/supply/bq27xxx_battery.c if (ae < 0) { ae 1435 drivers/power/supply/bq27xxx_battery.c return ae; ae 1439 drivers/power/supply/bq27xxx_battery.c ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS; ae 1441 drivers/power/supply/bq27xxx_battery.c ae *= 1000; ae 1443 drivers/power/supply/bq27xxx_battery.c return ae; ae 244 drivers/scsi/csiostor/csio_lnode.c struct fc_fdmi_attr_entry *ae = (struct fc_fdmi_attr_entry *)*ptr; ae 251 drivers/scsi/csiostor/csio_lnode.c ae->type = htons(type); ae 254 drivers/scsi/csiostor/csio_lnode.c ae->len = htons(len); ae 255 drivers/scsi/csiostor/csio_lnode.c memcpy(ae->value, val, val_len); ae 257 drivers/scsi/csiostor/csio_lnode.c memset(ae->value + val_len, 0, len - val_len); ae 1221 drivers/scsi/esas2r/atvda.h struct atto_vda_ae_req ae; ae 1097 drivers/scsi/esas2r/esas2r.h void esas2r_nuxi_ae_data(union atto_vda_ae *ae); ae 702 drivers/scsi/esas2r/esas2r_int.c static void esas2r_lun_event(struct esas2r_adapter *a, union atto_vda_ae *ae, ae 712 drivers/scsi/esas2r/esas2r_int.c esas2r_trace("ae->lu.dwevent: %x", ae->lu.dwevent); ae 713 drivers/scsi/esas2r/esas2r_int.c esas2r_trace("ae->lu.bystate: %x", ae->lu.bystate); ae 719 drivers/scsi/esas2r/esas2r_int.c if (ae->lu.dwevent & VDAAE_LU_LOST) { ae 722 drivers/scsi/esas2r/esas2r_int.c switch (ae->lu.bystate) { ae 738 drivers/scsi/esas2r/esas2r_int.c memcpy(&t->lu_event, &ae->lu, cplen); ae 750 drivers/scsi/esas2r/esas2r_int.c union atto_vda_ae *ae = ae 770 drivers/scsi/esas2r/esas2r_int.c last = ae; ae 773 drivers/scsi/esas2r/esas2r_int.c while (ae < last) { ae 776 drivers/scsi/esas2r/esas2r_int.c esas2r_trace("ae: %p", ae); ae 777 drivers/scsi/esas2r/esas2r_int.c esas2r_trace("ae->hdr: %p", &(ae->hdr)); ae 779 drivers/scsi/esas2r/esas2r_int.c length = ae->hdr.bylength; ae 781 drivers/scsi/esas2r/esas2r_int.c if (length > (u32)((u8 *)last - (u8 *)ae) ae 786 drivers/scsi/esas2r/esas2r_int.c ae, length); ae 794 drivers/scsi/esas2r/esas2r_int.c esas2r_nuxi_ae_data(ae); ae 796 drivers/scsi/esas2r/esas2r_int.c esas2r_queue_fw_event(a, fw_event_vda_ae, ae, ae 799 drivers/scsi/esas2r/esas2r_int.c switch (ae->hdr.bytype) { ae 802 drivers/scsi/esas2r/esas2r_int.c if (ae->raid.dwflags & (VDAAE_GROUP_STATE ae 808 drivers/scsi/esas2r/esas2r_int.c ae->raid.acname, ae 809 drivers/scsi/esas2r/esas2r_int.c ae->raid.byrebuild_state, ae 810 drivers/scsi/esas2r/esas2r_int.c ae->raid.bygroup_state); ae 818 drivers/scsi/esas2r/esas2r_int.c ae->lu.dwevent, ae 819 drivers/scsi/esas2r/esas2r_int.c ae->lu.id.tgtlun.wtarget_id, ae 820 drivers/scsi/esas2r/esas2r_int.c ae->lu.id.tgtlun.bylun, ae 821 drivers/scsi/esas2r/esas2r_int.c ae->lu.bystate); ae 823 drivers/scsi/esas2r/esas2r_int.c target = ae->lu.id.tgtlun.wtarget_id; ae 826 drivers/scsi/esas2r/esas2r_int.c esas2r_lun_event(a, ae, target, length); ae 843 drivers/scsi/esas2r/esas2r_int.c ae = (union atto_vda_ae *)((u8 *)ae + length); ae 854 drivers/scsi/esas2r/esas2r_int.c struct atto_vda_ae_hdr ae; ae 857 drivers/scsi/esas2r/esas2r_int.c ae.bytype = VDAAE_HDR_TYPE_PWRMGT; ae 859 drivers/scsi/esas2r/esas2r_int.c ae.bytype = VDAAE_HDR_TYPE_RESET; ae 861 drivers/scsi/esas2r/esas2r_int.c ae.byversion = VDAAE_HDR_VER_0; ae 862 drivers/scsi/esas2r/esas2r_int.c ae.byflags = 0; ae 863 drivers/scsi/esas2r/esas2r_int.c ae.bylength = (u8)sizeof(struct atto_vda_ae_hdr); ae 870 drivers/scsi/esas2r/esas2r_int.c esas2r_queue_fw_event(a, fw_event_vda_ae, &ae, ae 1446 drivers/scsi/esas2r/esas2r_main.c void esas2r_nuxi_ae_data(union atto_vda_ae *ae) ae 1448 drivers/scsi/esas2r/esas2r_main.c struct atto_vda_ae_raid *r = &ae->raid; ae 1449 drivers/scsi/esas2r/esas2r_main.c struct atto_vda_ae_lu *l = &ae->lu; ae 1451 drivers/scsi/esas2r/esas2r_main.c switch (ae->hdr.bytype) { ae 1704 drivers/scsi/esas2r/esas2r_main.c struct esas2r_vda_ae *ae = (struct esas2r_vda_ae *)fw_event->data; ae 1707 drivers/scsi/esas2r/esas2r_main.c switch (ae->vda_ae.hdr.bytype) { ae 1776 drivers/scsi/esas2r/esas2r_main.c esas2r_log_hexdump(ESAS2R_LOG_WARN, &ae->vda_ae, ae 1777 drivers/scsi/esas2r/esas2r_main.c ae->vda_ae.hdr.bylength); ae 1836 drivers/scsi/esas2r/esas2r_main.c struct esas2r_vda_ae *ae = ae 1839 drivers/scsi/esas2r/esas2r_main.c ae->signature = ESAS2R_VDA_EVENT_SIG; ae 1840 drivers/scsi/esas2r/esas2r_main.c ae->bus_number = a->pcid->bus->number; ae 1841 drivers/scsi/esas2r/esas2r_main.c ae->devfn = a->pcid->devfn; ae 1842 drivers/scsi/esas2r/esas2r_main.c memcpy(&ae->vda_ae, data, sizeof(ae->vda_ae)); ae 422 drivers/scsi/esas2r/esas2r_vda.c struct atto_vda_ae_req *vrq = &rq->vrq->ae; ae 2583 drivers/scsi/ibmvscsi/ibmvfc.c static const struct ibmvfc_async_desc *ibmvfc_get_ae_desc(u64 ae) ae 2588 drivers/scsi/ibmvscsi/ibmvfc.c if (ae_desc[i].ae == ae) ae 539 drivers/scsi/ibmvscsi/ibmvfc.h enum ibmvfc_async_event ae; ae 2056 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2059 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2060 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, sizeof(struct lpfc_name)); ae 2062 drivers/scsi/lpfc/lpfc_ct.c memcpy(&ae->un.AttrWWN, &vport->fc_sparam.nodeName, ae 2073 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2076 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2077 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2082 drivers/scsi/lpfc/lpfc_ct.c strncpy(ae->un.AttrString, ae 2084 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2085 drivers/scsi/lpfc/lpfc_ct.c len = strnlen(ae->un.AttrString, ae 2086 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2098 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2101 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2102 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2104 drivers/scsi/lpfc/lpfc_ct.c strncpy(ae->un.AttrString, phba->SerialNumber, ae 2105 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2106 drivers/scsi/lpfc/lpfc_ct.c len = strnlen(ae->un.AttrString, ae 2107 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2120 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2123 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2124 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2126 drivers/scsi/lpfc/lpfc_ct.c strncpy(ae->un.AttrString, phba->ModelName, ae 2127 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2128 drivers/scsi/lpfc/lpfc_ct.c len = strnlen(ae->un.AttrString, sizeof(ae->un.AttrString)); ae 2141 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2144 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2145 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2147 drivers/scsi/lpfc/lpfc_ct.c strncpy(ae->un.AttrString, phba->ModelDesc, ae 2148 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2149 drivers/scsi/lpfc/lpfc_ct.c len = strnlen(ae->un.AttrString, ae 2150 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2164 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2167 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2168 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2175 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrString[7 - i] = ae 2179 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrString[7 - i] = ae 2194 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2197 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2198 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2200 drivers/scsi/lpfc/lpfc_ct.c strncpy(ae->un.AttrString, lpfc_release_version, ae 2201 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2202 drivers/scsi/lpfc/lpfc_ct.c len = strnlen(ae->un.AttrString, ae 2203 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2216 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2219 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2220 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2223 drivers/scsi/lpfc/lpfc_ct.c lpfc_decode_firmware_rev(phba, ae->un.AttrString, 1); ae 2225 drivers/scsi/lpfc/lpfc_ct.c strncpy(ae->un.AttrString, phba->OptionROMVersion, ae 2226 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2227 drivers/scsi/lpfc/lpfc_ct.c len = strnlen(ae->un.AttrString, ae 2228 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2241 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2244 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2245 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2247 drivers/scsi/lpfc/lpfc_ct.c lpfc_decode_firmware_rev(phba, ae->un.AttrString, 1); ae 2248 drivers/scsi/lpfc/lpfc_ct.c len = strnlen(ae->un.AttrString, ae 2249 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2261 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2264 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2265 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2267 drivers/scsi/lpfc/lpfc_ct.c snprintf(ae->un.AttrString, sizeof(ae->un.AttrString), "%s %s %s", ae 2272 drivers/scsi/lpfc/lpfc_ct.c len = strnlen(ae->un.AttrString, sizeof(ae->un.AttrString)); ae 2284 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2287 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2289 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(LPFC_MAX_CT_SIZE); ae 2300 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2303 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2304 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2307 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrString, 256); ae 2319 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2322 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2325 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(0); ae 2336 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2339 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2342 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(1); ae 2353 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2356 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2357 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, sizeof(struct lpfc_name)); ae 2359 drivers/scsi/lpfc/lpfc_ct.c memcpy(&ae->un.AttrWWN, &vport->fabric_nodename, ae 2372 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2375 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2376 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2378 drivers/scsi/lpfc/lpfc_ct.c strlcat(ae->un.AttrString, phba->BIOSVersion, ae 2379 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2380 drivers/scsi/lpfc/lpfc_ct.c len = strnlen(ae->un.AttrString, ae 2381 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2393 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2396 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2399 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(0); ae 2410 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2413 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2414 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2416 drivers/scsi/lpfc/lpfc_ct.c strncpy(ae->un.AttrString, "EMULEX", ae 2417 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2418 drivers/scsi/lpfc/lpfc_ct.c len = strnlen(ae->un.AttrString, ae 2419 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2433 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2436 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2437 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 32); ae 2439 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrTypes[3] = 0x02; /* Type 0x1 - ELS */ ae 2440 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrTypes[2] = 0x01; /* Type 0x8 - FCP */ ae 2441 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrTypes[7] = 0x01; /* Type 0x20 - CT */ ae 2446 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrTypes[6] = 0x01; /* Type 0x28 - NVME */ ae 2459 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2462 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2464 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = 0; ae 2467 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt |= HBA_PORTSPEED_128GFC; ae 2469 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt |= HBA_PORTSPEED_64GFC; ae 2471 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt |= HBA_PORTSPEED_32GFC; ae 2473 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt |= HBA_PORTSPEED_16GFC; ae 2475 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt |= HBA_PORTSPEED_10GFC; ae 2477 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt |= HBA_PORTSPEED_8GFC; ae 2479 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt |= HBA_PORTSPEED_4GFC; ae 2481 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt |= HBA_PORTSPEED_2GFC; ae 2483 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt |= HBA_PORTSPEED_1GFC; ae 2488 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_10GE; ae 2491 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_25GE; ae 2494 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_40GE; ae 2497 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_100GE; ae 2501 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(ae->un.AttrInt); ae 2513 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2516 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2521 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_1GFC; ae 2524 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_2GFC; ae 2527 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_4GFC; ae 2530 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_8GFC; ae 2533 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_10GFC; ae 2536 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_16GFC; ae 2539 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_32GFC; ae 2542 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_64GFC; ae 2545 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_128GFC; ae 2548 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_UNKNOWN; ae 2554 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_10GE; ae 2557 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_25GE; ae 2560 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_40GE; ae 2563 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_100GE; ae 2566 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = HBA_PORTSPEED_UNKNOWN; ae 2571 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(ae->un.AttrInt); ae 2583 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2586 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2589 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = (((uint32_t) hsp->cmn.bbRcvSizeMsb & 0x0F) << 8) | ae 2591 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(ae->un.AttrInt); ae 2603 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2606 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2607 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2609 drivers/scsi/lpfc/lpfc_ct.c snprintf(ae->un.AttrString, sizeof(ae->un.AttrString), ae 2611 drivers/scsi/lpfc/lpfc_ct.c len = strnlen((char *)ae->un.AttrString, ae 2612 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2624 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2627 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2628 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2630 drivers/scsi/lpfc/lpfc_ct.c scnprintf(ae->un.AttrString, sizeof(ae->un.AttrString), "%s", ae 2633 drivers/scsi/lpfc/lpfc_ct.c len = strnlen(ae->un.AttrString, sizeof(ae->un.AttrString)); ae 2645 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2648 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2649 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, sizeof(struct lpfc_name)); ae 2651 drivers/scsi/lpfc/lpfc_ct.c memcpy(&ae->un.AttrWWN, &vport->fc_sparam.nodeName, ae 2663 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2666 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2667 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, sizeof(struct lpfc_name)); ae 2669 drivers/scsi/lpfc/lpfc_ct.c memcpy(&ae->un.AttrWWN, &vport->fc_sparam.portName, ae 2681 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2684 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2685 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2687 drivers/scsi/lpfc/lpfc_ct.c len = lpfc_vport_symbolic_port_name(vport, ae->un.AttrString, 256); ae 2700 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2703 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2705 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(LPFC_FDMI_PORTTYPE_NLPORT); ae 2707 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(LPFC_FDMI_PORTTYPE_NPORT); ae 2718 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2721 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2722 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(FC_COS_CLASS2 | FC_COS_CLASS3); ae 2733 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2736 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2737 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, sizeof(struct lpfc_name)); ae 2739 drivers/scsi/lpfc/lpfc_ct.c memcpy(&ae->un.AttrWWN, &vport->fabric_portname, ae 2751 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2754 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2755 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 32); ae 2757 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrTypes[3] = 0x02; /* Type 0x1 - ELS */ ae 2758 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrTypes[2] = 0x01; /* Type 0x8 - FCP */ ae 2759 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrTypes[7] = 0x01; /* Type 0x20 - CT */ ae 2763 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrTypes[6] = 0x1; /* Type 0x28 - NVME */ ae 2775 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2778 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2780 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(LPFC_FDMI_PORTSTATE_ONLINE); ae 2791 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2794 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2796 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(vport->fdmi_num_disc); ae 2807 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2810 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2811 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(vport->fc_myDID); ae 2822 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2825 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2826 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2828 drivers/scsi/lpfc/lpfc_ct.c strncpy(ae->un.AttrString, "Smart SAN Initiator", ae 2829 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2830 drivers/scsi/lpfc/lpfc_ct.c len = strnlen(ae->un.AttrString, ae 2831 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2843 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2846 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2847 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2849 drivers/scsi/lpfc/lpfc_ct.c memcpy(&ae->un.AttrString, &vport->fc_sparam.nodeName, ae 2851 drivers/scsi/lpfc/lpfc_ct.c memcpy((((uint8_t *)&ae->un.AttrString) + ae 2864 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2867 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2868 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2870 drivers/scsi/lpfc/lpfc_ct.c strncpy(ae->un.AttrString, "Smart SAN Version 2.0", ae 2871 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2872 drivers/scsi/lpfc/lpfc_ct.c len = strnlen(ae->un.AttrString, ae 2873 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2886 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2889 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2890 drivers/scsi/lpfc/lpfc_ct.c memset(ae, 0, 256); ae 2892 drivers/scsi/lpfc/lpfc_ct.c strncpy(ae->un.AttrString, phba->ModelName, ae 2893 drivers/scsi/lpfc/lpfc_ct.c sizeof(ae->un.AttrString)); ae 2894 drivers/scsi/lpfc/lpfc_ct.c len = strnlen(ae->un.AttrString, sizeof(ae->un.AttrString)); ae 2906 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2909 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2913 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(2); /* NPIV */ ae 2915 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(1); /* Physical */ ae 2926 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2929 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2930 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(0); ae 2941 drivers/scsi/lpfc/lpfc_ct.c struct lpfc_fdmi_attr_entry *ae; ae 2944 drivers/scsi/lpfc/lpfc_ct.c ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; ae 2945 drivers/scsi/lpfc/lpfc_ct.c ae->un.AttrInt = cpu_to_be32(1); ae 2477 drivers/staging/media/ipu3/include/intel-ipu3.h struct ipu3_uapi_ae_config ae; ae 1300 drivers/staging/media/ipu3/ipu3-abi.h struct imgu_abi_ae_config ae; ae 1678 drivers/staging/media/ipu3/ipu3-abi.h u8 ae; ae 2450 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.grid_cfg = acc_user->ae.grid_cfg; ae 2451 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.ae_ccm = acc_user->ae.ae_ccm; ae 2453 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.weights[i] = acc_user->ae.weights[i]; ae 2456 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.grid_cfg = acc_old->ae.grid_cfg; ae 2457 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.ae_ccm = acc_old->ae.ae_ccm; ae 2459 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.weights[i] = acc_old->ae.weights[i]; ae 2465 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.grid_cfg = imgu_css_ae_grid_defaults; ae 2466 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.ae_ccm = imgu_css_ae_ccm_defaults; ae 2468 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.weights[i] = weight_def; ae 2471 drivers/staging/media/ipu3/ipu3-css-params.c b_w_log2 = acc->ae.grid_cfg.block_width_log2; ae 2472 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.grid_cfg.x_end = imgu_css_grid_end(acc->ae.grid_cfg.x_start, ae 2473 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.grid_cfg.width, ae 2475 drivers/staging/media/ipu3/ipu3-css-params.c b_w_log2 = acc->ae.grid_cfg.block_height_log2; ae 2476 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.grid_cfg.y_end = imgu_css_grid_end(acc->ae.grid_cfg.y_start, ae 2477 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.grid_cfg.height, ae 2481 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.stripes[i].grid = acc->ae.grid_cfg; ae 2483 drivers/staging/media/ipu3/ipu3-css-params.c if (acc->ae.grid_cfg.x_start >= ae 2486 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.stripes[0].grid.ae_en = 0; ae 2487 drivers/staging/media/ipu3/ipu3-css-params.c } else if (acc->ae.grid_cfg.x_end <= ae 2490 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.stripes[1].grid.ae_en = 0; ae 2495 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.stripes[0].grid.width = ae 2497 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.grid_cfg.x_start + 1) >> ae 2498 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.grid_cfg.block_width_log2; ae 2500 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.stripes[1].grid.width = ae 2501 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.grid_cfg.width - acc->ae.stripes[0].grid.width; ae 2503 drivers/staging/media/ipu3/ipu3-css-params.c b_w_log2 = acc->ae.stripes[0].grid.block_width_log2; ae 2504 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.stripes[0].grid.x_end = ae 2505 drivers/staging/media/ipu3/ipu3-css-params.c imgu_css_grid_end(acc->ae.stripes[0].grid.x_start, ae 2506 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.stripes[0].grid.width, ae 2509 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.stripes[1].grid.x_start = ae 2510 drivers/staging/media/ipu3/ipu3-css-params.c (acc->ae.stripes[0].grid.x_end + 1 - ae 2513 drivers/staging/media/ipu3/ipu3-css-params.c b_w_log2 = acc->ae.stripes[1].grid.block_width_log2; ae 2514 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.stripes[1].grid.x_end = ae 2515 drivers/staging/media/ipu3/ipu3-css-params.c imgu_css_grid_end(acc->ae.stripes[1].grid.x_start, ae 2516 drivers/staging/media/ipu3/ipu3-css-params.c acc->ae.stripes[1].grid.width, ae 167 lib/test_hexdump.c int ae, he, e, f, r; ae 180 lib/test_hexdump.c ae = rs * 2 /* hex */ + rs / gs /* spaces */ + 1 /* space */ + len /* ascii */; ae 184 lib/test_hexdump.c e = ae; ae 23 net/mac80211/mesh_hwmp.c static inline u32 u32_field_get(const u8 *preq_elem, int offset, bool ae) ae 25 net/mac80211/mesh_hwmp.c if (ae) ae 30 net/mac80211/mesh_hwmp.c static inline u16 u16_field_get(const u8 *preq_elem, int offset, bool ae) ae 32 net/mac80211/mesh_hwmp.c if (ae) ae 431 net/wireless/util.c int ae = flags & MESH_FLAGS_AE; ae 433 net/wireless/util.c switch (ae) { ae 53 security/selinux/avc.c struct avc_entry ae; ae 331 security/selinux/avc.c node->ae.xp_node->xp.len++; ae 336 security/selinux/avc.c list_add(&dest_xpd->xpd_list, &node->ae.xp_node->xpd_head); ae 375 security/selinux/avc.c node->ae.xp_node = dest; ae 433 security/selinux/avc.c avc_xperms_free(node->ae.xp_node); ae 447 security/selinux/avc.c avc_xperms_free(node->ae.xp_node); ae 517 security/selinux/avc.c node->ae.ssid = ssid; ae 518 security/selinux/avc.c node->ae.tsid = tsid; ae 519 security/selinux/avc.c node->ae.tclass = tclass; ae 520 security/selinux/avc.c memcpy(&node->ae.avd, avd, sizeof(node->ae.avd)); ae 533 security/selinux/avc.c if (ssid == node->ae.ssid && ae 534 security/selinux/avc.c tclass == node->ae.tclass && ae 535 security/selinux/avc.c tsid == node->ae.tsid) { ae 641 security/selinux/avc.c if (pos->ae.ssid == ssid && ae 642 security/selinux/avc.c pos->ae.tsid == tsid && ae 643 security/selinux/avc.c pos->ae.tclass == tclass) { ae 870 security/selinux/avc.c if (ssid == pos->ae.ssid && ae 871 security/selinux/avc.c tsid == pos->ae.tsid && ae 872 security/selinux/avc.c tclass == pos->ae.tclass && ae 873 security/selinux/avc.c seqno == pos->ae.avd.seqno){ ae 889 security/selinux/avc.c avc_node_populate(node, ssid, tsid, tclass, &orig->ae.avd); ae 891 security/selinux/avc.c if (orig->ae.xp_node) { ae 892 security/selinux/avc.c rc = avc_xperms_populate(node, orig->ae.xp_node); ae 901 security/selinux/avc.c node->ae.avd.allowed |= perms; ae 902 security/selinux/avc.c if (node->ae.xp_node && (flags & AVC_EXTENDED_PERMS)) ae 903 security/selinux/avc.c avc_xperms_allow_perm(node->ae.xp_node, driver, xperm); ae 907 security/selinux/avc.c node->ae.avd.allowed &= ~perms; ae 910 security/selinux/avc.c node->ae.avd.auditallow |= perms; ae 913 security/selinux/avc.c node->ae.avd.auditallow &= ~perms; ae 916 security/selinux/avc.c node->ae.avd.auditdeny |= perms; ae 919 security/selinux/avc.c node->ae.avd.auditdeny &= ~perms; ae 1058 security/selinux/avc.c memcpy(&avd, &node->ae.avd, sizeof(avd)); ae 1059 security/selinux/avc.c xp_node = node->ae.xp_node; ae 1149 security/selinux/avc.c memcpy(avd, &node->ae.avd, sizeof(*avd));