adev 61 arch/arm/mach-versatile/versatile_dt.c struct amba_device *adev = container_of(dev, struct amba_device, dev); adev 64 arch/arm/mach-versatile/versatile_dt.c if (adev->res.start == VERSATILE_MMCI0_BASE) adev 77 arch/arm64/kernel/pci.c struct acpi_device *adev = to_acpi_device(cfg->parent); adev 78 arch/arm64/kernel/pci.c struct acpi_pci_root *root = acpi_driver_data(adev); adev 87 arch/arm64/kernel/pci.c struct acpi_device *adev = to_acpi_device(cfg->parent); adev 90 arch/arm64/kernel/pci.c ACPI_COMPANION_SET(&bridge->dev, adev); adev 91 arch/arm64/kernel/pci.c set_dev_node(bus_dev, acpi_get_node(acpi_device_handle(adev))); adev 122 arch/arm64/kernel/pci.c struct acpi_device *adev; adev 132 arch/arm64/kernel/pci.c adev = acpi_resource_consumer(&cfgres); adev 133 arch/arm64/kernel/pci.c if (adev) adev 135 arch/arm64/kernel/pci.c dev_name(&adev->dev)); adev 67 arch/x86/kernel/apb_timer.c static inline void __iomem *adev_virt_addr(struct apbt_dev *adev) adev 69 arch/x86/kernel/apb_timer.c return apbt_virt_address + adev->num * APBTMRS_REG_SIZE; adev 137 arch/x86/kernel/apb_timer.c struct apbt_dev *adev = this_cpu_ptr(&cpu_apbt_dev); adev 146 arch/x86/kernel/apb_timer.c adev->num = smp_processor_id(); adev 147 arch/x86/kernel/apb_timer.c adev->timer = dw_apb_clockevent_init(smp_processor_id(), "apbt0", adev 150 arch/x86/kernel/apb_timer.c adev_virt_addr(adev), 0, apbt_freq); adev 152 arch/x86/kernel/apb_timer.c adev->timer->eoi = NULL; adev 155 arch/x86/kernel/apb_timer.c global_clock_event = &adev->timer->ced; adev 160 arch/x86/kernel/apb_timer.c dw_apb_clockevent_register(adev->timer); adev 168 arch/x86/kernel/apb_timer.c static void apbt_setup_irq(struct apbt_dev *adev) adev 170 arch/x86/kernel/apb_timer.c irq_modify_status(adev->irq, 0, IRQ_MOVE_PCNTXT); adev 171 arch/x86/kernel/apb_timer.c irq_set_affinity(adev->irq, cpumask_of(adev->cpu)); adev 177 arch/x86/kernel/apb_timer.c struct apbt_dev *adev; adev 185 arch/x86/kernel/apb_timer.c adev = this_cpu_ptr(&cpu_apbt_dev); adev 186 arch/x86/kernel/apb_timer.c if (!adev->timer) { adev 187 arch/x86/kernel/apb_timer.c adev->timer = dw_apb_clockevent_init(cpu, adev->name, adev 188 arch/x86/kernel/apb_timer.c APBT_CLOCKEVENT_RATING, adev_virt_addr(adev), adev 189 arch/x86/kernel/apb_timer.c adev->irq, apbt_freq); adev 190 arch/x86/kernel/apb_timer.c adev->timer->eoi = NULL; adev 192 arch/x86/kernel/apb_timer.c dw_apb_clockevent_resume(adev->timer); adev 196 arch/x86/kernel/apb_timer.c cpu, adev->name, adev->cpu); adev 198 arch/x86/kernel/apb_timer.c apbt_setup_irq(adev); adev 199 arch/x86/kernel/apb_timer.c dw_apb_clockevent_register(adev->timer); adev 216 arch/x86/kernel/apb_timer.c struct apbt_dev *adev = &per_cpu(cpu_apbt_dev, cpu); adev 218 arch/x86/kernel/apb_timer.c dw_apb_clockevent_pause(adev->timer); adev 223 arch/x86/kernel/apb_timer.c dw_apb_clockevent_stop(adev->timer); adev 287 arch/x86/kernel/apb_timer.c struct apbt_dev *adev; adev 329 arch/x86/kernel/apb_timer.c adev = &per_cpu(cpu_apbt_dev, i); adev 330 arch/x86/kernel/apb_timer.c adev->num = i; adev 331 arch/x86/kernel/apb_timer.c adev->cpu = i; adev 334 arch/x86/kernel/apb_timer.c adev->irq = p_mtmr->irq; adev 337 arch/x86/kernel/apb_timer.c snprintf(adev->name, sizeof(adev->name) - 1, "apbt%d", i); adev 48 drivers/acpi/acpi_amba.c static int amba_handler_attach(struct acpi_device *adev, adev 59 drivers/acpi/acpi_amba.c if (adev->physical_node_count) adev 62 drivers/acpi/acpi_amba.c dev = amba_device_alloc(dev_name(&adev->dev), 0, 0); adev 64 drivers/acpi/acpi_amba.c dev_err(&adev->dev, "%s(): amba_device_alloc() failed\n", adev 70 drivers/acpi/acpi_amba.c ret = acpi_dev_get_resources(adev, &resource_list, NULL, NULL); adev 87 drivers/acpi/acpi_amba.c dev_warn(&adev->dev, "Invalid resource\n"); adev 99 drivers/acpi/acpi_amba.c if (adev->parent) adev 100 drivers/acpi/acpi_amba.c dev->dev.parent = acpi_get_first_physical_node(adev->parent); adev 102 drivers/acpi/acpi_amba.c ACPI_COMPANION_SET(&dev->dev, adev); adev 106 drivers/acpi/acpi_amba.c dev_err(&adev->dev, "%s(): amba_device_add() failed (%d)\n", adev 50 drivers/acpi/acpi_apd.c struct acpi_device *adev; adev 63 drivers/acpi/acpi_apd.c clk = clk_register_fixed_rate(&pdata->adev->dev, adev 64 drivers/acpi/acpi_apd.c dev_name(&pdata->adev->dev), adev 66 drivers/acpi/acpi_apd.c clk_register_clkdev(clk, NULL, dev_name(&pdata->adev->dev)); adev 84 drivers/acpi/acpi_apd.c struct acpi_device *adev = pdata->adev; adev 91 drivers/acpi/acpi_apd.c clk_data = devm_kzalloc(&adev->dev, sizeof(*clk_data), GFP_KERNEL); adev 96 drivers/acpi/acpi_apd.c ret = acpi_dev_get_resources(adev, &resource_list, misc_check_res, adev 102 drivers/acpi/acpi_apd.c clk_data->base = devm_ioremap(&adev->dev, rentry->res->start, adev 109 drivers/acpi/acpi_apd.c clkdev = platform_device_register_data(&adev->dev, "clk-st", adev 190 drivers/acpi/acpi_apd.c static int acpi_apd_create_device(struct acpi_device *adev, adev 199 drivers/acpi/acpi_apd.c pdev = acpi_create_platform_device(adev, NULL); adev 207 drivers/acpi/acpi_apd.c pdata->adev = adev; adev 216 drivers/acpi/acpi_apd.c adev->driver_data = pdata; adev 217 drivers/acpi/acpi_apd.c pdev = acpi_create_platform_device(adev, dev_desc->properties); adev 222 drivers/acpi/acpi_apd.c adev->driver_data = NULL; adev 54 drivers/acpi/acpi_cmos_rtc.c static int acpi_install_cmos_rtc_space_handler(struct acpi_device *adev, adev 59 drivers/acpi/acpi_cmos_rtc.c status = acpi_install_address_space_handler(adev->handle, adev 71 drivers/acpi/acpi_cmos_rtc.c static void acpi_remove_cmos_rtc_space_handler(struct acpi_device *adev) adev 73 drivers/acpi/acpi_cmos_rtc.c if (ACPI_FAILURE(acpi_remove_address_space_handler(adev->handle, adev 93 drivers/acpi/acpi_lpss.c struct acpi_device *adev; adev 167 drivers/acpi/acpi_lpss.c struct acpi_device *adev = pdata->adev; adev 170 drivers/acpi/acpi_lpss.c if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1")) adev 181 drivers/acpi/acpi_lpss.c const char *uid_str = acpi_device_uid(pdata->adev); adev 182 drivers/acpi/acpi_lpss.c acpi_handle handle = pdata->adev->handle; adev 213 drivers/acpi/acpi_lpss.c struct acpi_device *adev = pdata->adev; adev 216 drivers/acpi/acpi_lpss.c if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1")) adev 391 drivers/acpi/acpi_lpss.c static int register_device_clock(struct acpi_device *adev, adev 395 drivers/acpi/acpi_lpss.c const char *devname = dev_name(&adev->dev); adev 502 drivers/acpi/acpi_lpss.c static bool hid_uid_match(struct acpi_device *adev, adev 505 drivers/acpi/acpi_lpss.c const char *hid1 = acpi_device_hid(adev); adev 506 drivers/acpi/acpi_lpss.c const char *uid1 = acpi_device_uid(adev); adev 517 drivers/acpi/acpi_lpss.c static bool acpi_lpss_is_supplier(struct acpi_device *adev, adev 520 drivers/acpi/acpi_lpss.c return hid_uid_match(adev, link->supplier_hid, link->supplier_uid); adev 523 drivers/acpi/acpi_lpss.c static bool acpi_lpss_is_consumer(struct acpi_device *adev, adev 526 drivers/acpi/acpi_lpss.c return hid_uid_match(adev, link->consumer_hid, link->consumer_uid); adev 536 drivers/acpi/acpi_lpss.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 539 drivers/acpi/acpi_lpss.c if (!adev) adev 542 drivers/acpi/acpi_lpss.c return hid_uid_match(adev, id->hid, id->uid); adev 561 drivers/acpi/acpi_lpss.c static bool acpi_lpss_dep(struct acpi_device *adev, acpi_handle handle) adev 567 drivers/acpi/acpi_lpss.c if (!acpi_has_method(adev->handle, "_DEP")) adev 570 drivers/acpi/acpi_lpss.c status = acpi_evaluate_reference(adev->handle, "_DEP", NULL, adev 573 drivers/acpi/acpi_lpss.c dev_dbg(&adev->dev, "Failed to evaluate _DEP.\n"); adev 617 drivers/acpi/acpi_lpss.c static void acpi_lpss_create_device_links(struct acpi_device *adev, adev 625 drivers/acpi/acpi_lpss.c if (acpi_lpss_is_supplier(adev, link)) adev 628 drivers/acpi/acpi_lpss.c if (acpi_lpss_is_consumer(adev, link)) adev 633 drivers/acpi/acpi_lpss.c static int acpi_lpss_create_device(struct acpi_device *adev, adev 645 drivers/acpi/acpi_lpss.c pdev = acpi_create_platform_device(adev, NULL); adev 653 drivers/acpi/acpi_lpss.c ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL); adev 672 drivers/acpi/acpi_lpss.c adev->pnp.type.platform_id = 0; adev 678 drivers/acpi/acpi_lpss.c pdata->adev = adev; adev 685 drivers/acpi/acpi_lpss.c ret = register_device_clock(adev, pdata); adev 698 drivers/acpi/acpi_lpss.c acpi_device_fix_up_power(adev); adev 700 drivers/acpi/acpi_lpss.c adev->driver_data = pdata; adev 701 drivers/acpi/acpi_lpss.c pdev = acpi_create_platform_device(adev, dev_desc->properties); adev 703 drivers/acpi/acpi_lpss.c acpi_lpss_create_device_links(adev, pdev); adev 708 drivers/acpi/acpi_lpss.c adev->driver_data = NULL; adev 728 drivers/acpi/acpi_lpss.c struct acpi_device *adev; adev 733 drivers/acpi/acpi_lpss.c ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev); adev 742 drivers/acpi/acpi_lpss.c pdata = acpi_driver_data(adev); adev 1269 drivers/acpi/acpi_lpss.c struct acpi_device *adev; adev 1276 drivers/acpi/acpi_lpss.c if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev)) adev 1279 drivers/acpi/acpi_lpss.c pdata = acpi_driver_data(adev); adev 164 drivers/acpi/acpi_memhotplug.c struct acpi_device *adev) adev 166 drivers/acpi/acpi_memhotplug.c return walk_memory_blocks(info->start_addr, info->length, adev, adev 34 drivers/acpi/acpi_platform.c static struct platform_device *acpi_platform_device_find_by_companion(struct acpi_device *adev) adev 38 drivers/acpi/acpi_platform.c dev = bus_find_device_by_acpi_dev(&platform_bus_type, adev); adev 45 drivers/acpi/acpi_platform.c struct acpi_device *adev = arg; adev 53 drivers/acpi/acpi_platform.c if (!acpi_device_enumerated(adev)) adev 56 drivers/acpi/acpi_platform.c pdev = acpi_platform_device_find_by_companion(adev); adev 72 drivers/acpi/acpi_platform.c static void acpi_platform_fill_resource(struct acpi_device *adev, adev 83 drivers/acpi/acpi_platform.c parent = acpi_get_first_physical_node(adev->parent); adev 99 drivers/acpi/acpi_platform.c struct platform_device *acpi_create_platform_device(struct acpi_device *adev, adev 110 drivers/acpi/acpi_platform.c if (adev->physical_node_count) adev 113 drivers/acpi/acpi_platform.c if (!acpi_match_device_ids(adev, forbidden_id_list)) adev 117 drivers/acpi/acpi_platform.c count = acpi_dev_get_resources(adev, &resource_list, NULL, NULL); adev 124 drivers/acpi/acpi_platform.c dev_err(&adev->dev, "No memory for resources\n"); adev 130 drivers/acpi/acpi_platform.c acpi_platform_fill_resource(adev, rentry->res, adev 142 drivers/acpi/acpi_platform.c pdevinfo.parent = adev->parent ? adev 143 drivers/acpi/acpi_platform.c acpi_get_first_physical_node(adev->parent) : NULL; adev 144 drivers/acpi/acpi_platform.c pdevinfo.name = dev_name(&adev->dev); adev 148 drivers/acpi/acpi_platform.c pdevinfo.fwnode = acpi_fwnode_handle(adev); adev 151 drivers/acpi/acpi_platform.c if (acpi_dma_supported(adev)) adev 158 drivers/acpi/acpi_platform.c dev_err(&adev->dev, "platform device creation failed: %ld\n", adev 161 drivers/acpi/acpi_platform.c set_dev_node(&pdev->dev, acpi_get_node(adev->handle)); adev 162 drivers/acpi/acpi_platform.c dev_dbg(&adev->dev, "created platform device %s\n", adev 348 drivers/acpi/acpi_pnp.c static int acpi_pnp_attach(struct acpi_device *adev, adev 365 drivers/acpi/acpi_pnp.c static int is_cmos_rtc_device(struct acpi_device *adev) adev 373 drivers/acpi/acpi_pnp.c return !acpi_match_device_ids(adev, ids); adev 376 drivers/acpi/acpi_pnp.c bool acpi_is_pnp_device(struct acpi_device *adev) adev 378 drivers/acpi/acpi_pnp.c return adev->handler == &acpi_pnp_handler || is_cmos_rtc_device(adev); adev 1915 drivers/acpi/acpi_video.c struct acpi_device *adev = device->dev; adev 1917 drivers/acpi/acpi_video.c status = acpi_install_notify_handler(adev->handle, ACPI_DEVICE_NOTIFY, adev 1920 drivers/acpi/acpi_video.c dev_err(&adev->dev, "Error installing notify handler\n"); adev 266 drivers/acpi/arm64/iort.c struct acpi_device *adev = to_acpi_device_node(dev->fwnode); adev 269 drivers/acpi/arm64/iort.c if (!adev) adev 272 drivers/acpi/arm64/iort.c status = acpi_get_name(adev->handle, ACPI_FULL_PATHNAME, &buf); adev 344 drivers/acpi/bus.c struct acpi_device *adev; adev 393 drivers/acpi/bus.c adev = acpi_bus_get_acpi_device(handle); adev 394 drivers/acpi/bus.c if (!adev) adev 397 drivers/acpi/bus.c driver = adev->driver; adev 400 drivers/acpi/bus.c driver->ops.notify(adev, type); adev 403 drivers/acpi/bus.c acpi_bus_put_acpi_device(adev); adev 407 drivers/acpi/bus.c if (ACPI_SUCCESS(acpi_hotplug_schedule(adev, type))) adev 410 drivers/acpi/bus.c acpi_bus_put_acpi_device(adev); adev 535 drivers/acpi/bus.c struct device *acpi_get_first_physical_node(struct acpi_device *adev) adev 537 drivers/acpi/bus.c struct mutex *physical_node_lock = &adev->physical_node_lock; adev 541 drivers/acpi/bus.c if (list_empty(&adev->physical_node_list)) { adev 546 drivers/acpi/bus.c node = list_first_entry(&adev->physical_node_list, adev 555 drivers/acpi/bus.c static struct acpi_device *acpi_primary_dev_companion(struct acpi_device *adev, adev 558 drivers/acpi/bus.c const struct device *phys_dev = acpi_get_first_physical_node(adev); adev 560 drivers/acpi/bus.c return phys_dev && phys_dev == dev ? adev : NULL; adev 574 drivers/acpi/bus.c bool acpi_device_is_first_physical_node(struct acpi_device *adev, adev 577 drivers/acpi/bus.c return !!acpi_primary_dev_companion(adev, dev); adev 603 drivers/acpi/bus.c struct acpi_device *adev; adev 605 drivers/acpi/bus.c adev = ACPI_COMPANION(dev); adev 606 drivers/acpi/bus.c if (!adev) adev 609 drivers/acpi/bus.c if (list_empty(&adev->pnp.ids)) adev 612 drivers/acpi/bus.c return acpi_primary_dev_companion(adev, dev); adev 625 drivers/acpi/bus.c static bool acpi_of_match_device(struct acpi_device *adev, adev 632 drivers/acpi/bus.c if (!adev) adev 635 drivers/acpi/bus.c of_compatible = adev->data.of_compatible; adev 661 drivers/acpi/bus.c static bool acpi_of_modalias(struct acpi_device *adev, adev 668 drivers/acpi/bus.c of_compatible = adev->data.of_compatible; adev 695 drivers/acpi/bus.c void acpi_set_modalias(struct acpi_device *adev, const char *default_id, adev 698 drivers/acpi/bus.c if (!acpi_of_modalias(adev, modalias, len)) adev 791 drivers/acpi/bus.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 794 drivers/acpi/bus.c if (!acpi_of_match_device(adev, dev->driver->of_match_table, &match)) adev 31 drivers/acpi/container.c struct acpi_device *adev = ACPI_COMPANION(&cdev->dev); adev 35 drivers/acpi/container.c list_for_each_entry(child, &adev->children, node) adev 47 drivers/acpi/container.c static int container_device_attach(struct acpi_device *adev, adev 54 drivers/acpi/container.c if (adev->flags.is_dock_station) adev 64 drivers/acpi/container.c dev_set_name(dev, "%s", dev_name(&adev->dev)); adev 65 drivers/acpi/container.c ACPI_COMPANION_SET(dev, adev); adev 72 drivers/acpi/container.c adev->driver_data = dev; adev 76 drivers/acpi/container.c static void container_device_detach(struct acpi_device *adev) adev 78 drivers/acpi/container.c struct device *dev = acpi_driver_data(adev); adev 80 drivers/acpi/container.c adev->driver_data = NULL; adev 85 drivers/acpi/container.c static void container_device_online(struct acpi_device *adev) adev 87 drivers/acpi/container.c struct device *dev = acpi_driver_data(adev); adev 139 drivers/acpi/device_pm.c static int acpi_dev_pm_explicit_set(struct acpi_device *adev, int state) adev 141 drivers/acpi/device_pm.c if (adev->power.states[state].flags.explicit_set) { adev 145 drivers/acpi/device_pm.c status = acpi_evaluate_object(adev->handle, method, NULL, NULL); adev 446 drivers/acpi/device_pm.c struct acpi_device *adev; adev 453 drivers/acpi/device_pm.c adev = acpi_bus_get_acpi_device(handle); adev 454 drivers/acpi/device_pm.c if (!adev) adev 459 drivers/acpi/device_pm.c if (adev->wakeup.flags.notifier_present) { adev 460 drivers/acpi/device_pm.c pm_wakeup_ws_event(adev->wakeup.ws, 0, acpi_s2idle_wakeup()); adev 461 drivers/acpi/device_pm.c if (adev->wakeup.context.func) { adev 463 drivers/acpi/device_pm.c adev->wakeup.context.func, adev 464 drivers/acpi/device_pm.c dev_name(adev->wakeup.context.dev)); adev 465 drivers/acpi/device_pm.c adev->wakeup.context.func(&adev->wakeup.context); adev 471 drivers/acpi/device_pm.c acpi_bus_put_acpi_device(adev); adev 485 drivers/acpi/device_pm.c acpi_status acpi_add_pm_notifier(struct acpi_device *adev, struct device *dev, adev 495 drivers/acpi/device_pm.c if (adev->wakeup.flags.notifier_present) adev 498 drivers/acpi/device_pm.c status = acpi_install_notify_handler(adev->handle, ACPI_SYSTEM_NOTIFY, adev 504 drivers/acpi/device_pm.c adev->wakeup.ws = wakeup_source_register(&adev->dev, adev 505 drivers/acpi/device_pm.c dev_name(&adev->dev)); adev 506 drivers/acpi/device_pm.c adev->wakeup.context.dev = dev; adev 507 drivers/acpi/device_pm.c adev->wakeup.context.func = func; adev 508 drivers/acpi/device_pm.c adev->wakeup.flags.notifier_present = true; adev 520 drivers/acpi/device_pm.c acpi_status acpi_remove_pm_notifier(struct acpi_device *adev) adev 526 drivers/acpi/device_pm.c if (!adev->wakeup.flags.notifier_present) adev 529 drivers/acpi/device_pm.c status = acpi_remove_notify_handler(adev->handle, adev 536 drivers/acpi/device_pm.c adev->wakeup.context.func = NULL; adev 537 drivers/acpi/device_pm.c adev->wakeup.context.dev = NULL; adev 538 drivers/acpi/device_pm.c wakeup_source_unregister(adev->wakeup.ws); adev 539 drivers/acpi/device_pm.c adev->wakeup.flags.notifier_present = false; adev 559 drivers/acpi/device_pm.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 561 drivers/acpi/device_pm.c return adev ? acpi_device_can_wakeup(adev) : false; adev 585 drivers/acpi/device_pm.c static int acpi_dev_pm_get_state(struct device *dev, struct acpi_device *adev, adev 589 drivers/acpi/device_pm.c acpi_handle handle = adev->handle; adev 626 drivers/acpi/device_pm.c if (!adev->power.states[ret].flags.valid) { adev 637 drivers/acpi/device_pm.c wakeup = device_may_wakeup(dev) && adev->wakeup.flags.valid adev 638 drivers/acpi/device_pm.c && adev->wakeup.sleep_state >= target_state; adev 640 drivers/acpi/device_pm.c wakeup = adev->wakeup.flags.valid; adev 662 drivers/acpi/device_pm.c if (!adev->power.states[ret].flags.valid) adev 693 drivers/acpi/device_pm.c struct acpi_device *adev; adev 707 drivers/acpi/device_pm.c adev = ACPI_COMPANION(dev); adev 708 drivers/acpi/device_pm.c if (!adev) { adev 713 drivers/acpi/device_pm.c ret = acpi_dev_pm_get_state(dev, adev, acpi_target_system_state(), adev 723 drivers/acpi/device_pm.c if (adev->power.states[d_max].flags.valid) adev 751 drivers/acpi/device_pm.c static int __acpi_device_wakeup_enable(struct acpi_device *adev, adev 754 drivers/acpi/device_pm.c struct acpi_device_wakeup *wakeup = &adev->wakeup; adev 766 drivers/acpi/device_pm.c error = acpi_enable_wakeup_device_power(adev, target_state); adev 772 drivers/acpi/device_pm.c acpi_disable_wakeup_device_power(adev); adev 777 drivers/acpi/device_pm.c acpi_handle_debug(adev->handle, "GPE%2X enabled for wakeup\n", adev 800 drivers/acpi/device_pm.c static int acpi_device_wakeup_enable(struct acpi_device *adev, u32 target_state) adev 802 drivers/acpi/device_pm.c return __acpi_device_wakeup_enable(adev, target_state, 1); adev 814 drivers/acpi/device_pm.c static void acpi_device_wakeup_disable(struct acpi_device *adev) adev 816 drivers/acpi/device_pm.c struct acpi_device_wakeup *wakeup = &adev->wakeup; adev 824 drivers/acpi/device_pm.c acpi_disable_wakeup_device_power(adev); adev 835 drivers/acpi/device_pm.c struct acpi_device *adev; adev 838 drivers/acpi/device_pm.c adev = ACPI_COMPANION(dev); adev 839 drivers/acpi/device_pm.c if (!adev) { adev 844 drivers/acpi/device_pm.c if (!acpi_device_can_wakeup(adev)) adev 848 drivers/acpi/device_pm.c acpi_device_wakeup_disable(adev); adev 853 drivers/acpi/device_pm.c error = __acpi_device_wakeup_enable(adev, acpi_target_system_state(), adev 889 drivers/acpi/device_pm.c static int acpi_dev_pm_low_power(struct device *dev, struct acpi_device *adev, adev 894 drivers/acpi/device_pm.c if (!acpi_device_power_manageable(adev)) adev 897 drivers/acpi/device_pm.c ret = acpi_dev_pm_get_state(dev, adev, system_state, NULL, &state); adev 898 drivers/acpi/device_pm.c return ret ? ret : acpi_device_set_power(adev, state); adev 905 drivers/acpi/device_pm.c static int acpi_dev_pm_full_power(struct acpi_device *adev) adev 907 drivers/acpi/device_pm.c return acpi_device_power_manageable(adev) ? adev 908 drivers/acpi/device_pm.c acpi_device_set_power(adev, ACPI_STATE_D0) : 0; adev 923 drivers/acpi/device_pm.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 927 drivers/acpi/device_pm.c if (!adev) adev 930 drivers/acpi/device_pm.c if (wakeup && acpi_device_can_wakeup(adev)) { adev 931 drivers/acpi/device_pm.c error = acpi_device_wakeup_enable(adev, target_state); adev 938 drivers/acpi/device_pm.c error = acpi_dev_pm_low_power(dev, adev, target_state); adev 940 drivers/acpi/device_pm.c acpi_device_wakeup_disable(adev); adev 955 drivers/acpi/device_pm.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 958 drivers/acpi/device_pm.c if (!adev) adev 961 drivers/acpi/device_pm.c error = acpi_dev_pm_full_power(adev); adev 962 drivers/acpi/device_pm.c acpi_device_wakeup_disable(adev); adev 996 drivers/acpi/device_pm.c static bool acpi_dev_needs_resume(struct device *dev, struct acpi_device *adev) adev 1001 drivers/acpi/device_pm.c if (!pm_runtime_suspended(dev) || !adev || (adev->wakeup.flags.valid && adev 1002 drivers/acpi/device_pm.c device_may_wakeup(dev) != !!adev->wakeup.prepare_count)) adev 1008 drivers/acpi/device_pm.c if (adev->power.flags.dsw_present) adev 1011 drivers/acpi/device_pm.c ret = acpi_dev_pm_get_state(dev, adev, sys_target, NULL, &state); adev 1015 drivers/acpi/device_pm.c return state != adev->power.state; adev 1024 drivers/acpi/device_pm.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 1036 drivers/acpi/device_pm.c return !acpi_dev_needs_resume(dev, adev); adev 1279 drivers/acpi/device_pm.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 1281 drivers/acpi/device_pm.c if (adev && dev->pm_domain == &acpi_general_pm_domain) { adev 1283 drivers/acpi/device_pm.c acpi_remove_pm_notifier(adev); adev 1293 drivers/acpi/device_pm.c acpi_device_wakeup_disable(adev); adev 1294 drivers/acpi/device_pm.c acpi_dev_pm_low_power(dev, adev, ACPI_STATE_S0); adev 1327 drivers/acpi/device_pm.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 1329 drivers/acpi/device_pm.c if (!adev || !acpi_match_device_ids(adev, special_pm_ids)) adev 1337 drivers/acpi/device_pm.c if (!acpi_device_is_first_physical_node(adev, dev)) adev 1340 drivers/acpi/device_pm.c acpi_add_pm_notifier(adev, dev, acpi_pm_notify_work_func); adev 1343 drivers/acpi/device_pm.c acpi_dev_pm_full_power(adev); adev 1344 drivers/acpi/device_pm.c acpi_device_wakeup_disable(adev); adev 240 drivers/acpi/device_sysfs.c int __acpi_device_uevent_modalias(struct acpi_device *adev, adev 245 drivers/acpi/device_sysfs.c if (!adev) adev 248 drivers/acpi/device_sysfs.c if (list_empty(&adev->pnp.ids)) adev 254 drivers/acpi/device_sysfs.c len = create_pnp_modalias(adev, &env->buf[env->buflen - 1], adev 260 drivers/acpi/device_sysfs.c if (!adev->data.of_compatible) adev 266 drivers/acpi/device_sysfs.c len = create_of_modalias(adev, &env->buf[env->buflen - 1], adev 290 drivers/acpi/device_sysfs.c static int __acpi_device_modalias(struct acpi_device *adev, char *buf, int size) adev 294 drivers/acpi/device_sysfs.c if (!adev) adev 297 drivers/acpi/device_sysfs.c if (list_empty(&adev->pnp.ids)) adev 300 drivers/acpi/device_sysfs.c len = create_pnp_modalias(adev, buf, size - 1); adev 307 drivers/acpi/device_sysfs.c if (!adev->data.of_compatible) adev 310 drivers/acpi/device_sysfs.c count = create_of_modalias(adev, buf + len, size - 1); adev 345 drivers/acpi/device_sysfs.c struct acpi_device *adev = to_acpi_device(dev); adev 349 drivers/acpi/device_sysfs.c ret = acpi_device_get_power(adev, &state); adev 361 drivers/acpi/device_sysfs.c struct acpi_device *adev = to_acpi_device(dev); adev 363 drivers/acpi/device_sysfs.c return sprintf(buf, "%s\n", acpi_power_state_string(adev->power.state)); adev 46 drivers/acpi/dock.c struct acpi_device *adev; adev 74 drivers/acpi/dock.c struct acpi_device *adev) adev 82 drivers/acpi/dock.c dd->adev = adev; adev 92 drivers/acpi/dock.c struct acpi_device *adev = dd->adev; adev 96 drivers/acpi/dock.c if (!adev->hp) adev 102 drivers/acpi/dock.c fixup = adev->hp->fixup; adev 105 drivers/acpi/dock.c fixup(adev); adev 111 drivers/acpi/dock.c uevent = adev->hp->uevent; adev 114 drivers/acpi/dock.c uevent(adev, event); adev 120 drivers/acpi/dock.c notify = adev->hp->notify; adev 123 drivers/acpi/dock.c notify(adev, event); adev 152 drivers/acpi/dock.c find_dock_dependent_device(struct dock_station *ds, struct acpi_device *adev) adev 157 drivers/acpi/dock.c if (adev == dd->adev) adev 163 drivers/acpi/dock.c void register_dock_dependent_device(struct acpi_device *adev, adev 168 drivers/acpi/dock.c if (ds && !find_dock_dependent_device(ds, adev)) adev 169 drivers/acpi/dock.c add_dock_dependent_device(ds, adev); adev 184 drivers/acpi/dock.c int is_dock_device(struct acpi_device *adev) adev 191 drivers/acpi/dock.c if (acpi_dock_match(adev->handle)) adev 195 drivers/acpi/dock.c if (find_dock_dependent_device(dock_station, adev)) adev 239 drivers/acpi/dock.c acpi_bus_trim(dd->adev); adev 271 drivers/acpi/dock.c struct acpi_device *adev = dd->adev; adev 273 drivers/acpi/dock.c if (!acpi_device_enumerated(adev)) { adev 274 drivers/acpi/dock.c int ret = acpi_bus_scan(adev->handle); adev 276 drivers/acpi/dock.c dev_dbg(&adev->dev, "scan error %d\n", -ret); adev 422 drivers/acpi/dock.c int dock_notify(struct acpi_device *adev, u32 event) adev 424 drivers/acpi/dock.c acpi_handle handle = adev->handle; adev 451 drivers/acpi/dock.c if (!dock_in_progress(ds) && !acpi_device_enumerated(adev)) { adev 492 drivers/acpi/dock.c struct acpi_device *adev = NULL; adev 494 drivers/acpi/dock.c acpi_bus_get_device(dock_station->handle, &adev); adev 495 drivers/acpi/dock.c return snprintf(buf, PAGE_SIZE, "%u\n", acpi_device_enumerated(adev)); adev 586 drivers/acpi/dock.c void acpi_dock_add(struct acpi_device *adev) adev 590 drivers/acpi/dock.c acpi_handle handle = adev->handle; adev 597 drivers/acpi/dock.c pdevinfo.fwnode = acpi_fwnode_handle(adev); adev 620 drivers/acpi/dock.c if (acpi_device_is_battery(adev)) adev 628 drivers/acpi/dock.c ret = add_dock_dependent_device(dock_station, adev); adev 634 drivers/acpi/dock.c adev->flags.is_dock_station = true; adev 635 drivers/acpi/dock.c dev_info(&adev->dev, "ACPI dock station (docks/bays count: %d)\n", adev 30 drivers/acpi/dptf/int340x_thermal.c static int int340x_thermal_handler_attach(struct acpi_device *adev, adev 34 drivers/acpi/dptf/int340x_thermal.c acpi_create_platform_device(adev, NULL); adev 38 drivers/acpi/dptf/int340x_thermal.c acpi_create_platform_device(adev, NULL); adev 88 drivers/acpi/glue.c static int find_child_checks(struct acpi_device *adev, bool check_children) adev 94 drivers/acpi/glue.c status = acpi_evaluate_integer(adev->handle, "_STA", NULL, &sta); adev 100 drivers/acpi/glue.c if (check_children && list_empty(&adev->children)) adev 110 drivers/acpi/glue.c return sta_present && !adev->pnp.type.platform_id ? adev 117 drivers/acpi/glue.c struct acpi_device *adev, *ret = NULL; adev 123 drivers/acpi/glue.c list_for_each_entry(adev, &parent->children, node) { adev 128 drivers/acpi/glue.c status = acpi_evaluate_integer(adev->handle, METHOD_NAME__ADR, adev 135 drivers/acpi/glue.c ret = adev; adev 153 drivers/acpi/glue.c score = find_child_checks(adev, check_children); adev 155 drivers/acpi/glue.c return adev; adev 157 drivers/acpi/glue.c ret = adev; adev 301 drivers/acpi/glue.c struct acpi_device *adev; adev 306 drivers/acpi/glue.c struct acpi_device *adev; adev 308 drivers/acpi/glue.c adev = type->find_companion(dev); adev 309 drivers/acpi/glue.c if (!adev) { adev 314 drivers/acpi/glue.c ret = acpi_bind_one(dev, adev); adev 318 drivers/acpi/glue.c adev = ACPI_COMPANION(dev); adev 319 drivers/acpi/glue.c if (!adev) adev 327 drivers/acpi/glue.c else if (adev->handler && adev->handler->bind) adev 328 drivers/acpi/glue.c adev->handler->bind(dev); adev 347 drivers/acpi/glue.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 350 drivers/acpi/glue.c if (!adev) adev 356 drivers/acpi/glue.c else if (adev->handler && adev->handler->unbind) adev 357 drivers/acpi/glue.c adev->handler->unbind(dev); adev 46 drivers/acpi/internal.h void register_dock_dependent_device(struct acpi_device *adev, adev 48 drivers/acpi/internal.h int dock_notify(struct acpi_device *adev, u32 event); adev 49 drivers/acpi/internal.h void acpi_dock_add(struct acpi_device *adev); adev 51 drivers/acpi/internal.h static inline void register_dock_dependent_device(struct acpi_device *adev, adev 53 drivers/acpi/internal.h static inline int dock_notify(struct acpi_device *adev, u32 event) { return -ENODEV; } adev 54 drivers/acpi/internal.h static inline void acpi_dock_add(struct acpi_device *adev) {} adev 83 drivers/acpi/internal.h acpi_status acpi_hotplug_schedule(struct acpi_device *adev, u32 src); adev 85 drivers/acpi/internal.h void acpi_device_hotplug(struct acpi_device *adev, u32 src); adev 86 drivers/acpi/internal.h bool acpi_scan_is_offline(struct acpi_device *adev, bool uevent); adev 113 drivers/acpi/internal.h bool acpi_device_is_present(const struct acpi_device *adev); adev 114 drivers/acpi/internal.h bool acpi_device_is_battery(struct acpi_device *adev); adev 115 drivers/acpi/internal.h bool acpi_device_is_first_physical_node(struct acpi_device *adev, adev 123 drivers/acpi/internal.h int __acpi_device_uevent_modalias(struct acpi_device *adev, adev 134 drivers/acpi/internal.h void acpi_power_add_remove_device(struct acpi_device *adev, bool add); adev 238 drivers/acpi/internal.h void acpi_init_properties(struct acpi_device *adev); adev 239 drivers/acpi/internal.h void acpi_free_properties(struct acpi_device *adev); adev 242 drivers/acpi/internal.h void acpi_extract_apple_properties(struct acpi_device *adev); adev 244 drivers/acpi/internal.h static inline void acpi_extract_apple_properties(struct acpi_device *adev) {} adev 464 drivers/acpi/nfit/core.c struct acpi_device *adev = nfit_mem->adev; adev 466 drivers/acpi/nfit/core.c if (!adev) adev 475 drivers/acpi/nfit/core.c handle = adev->handle; adev 477 drivers/acpi/nfit/core.c struct acpi_device *adev = to_acpi_dev(acpi_desc); adev 484 drivers/acpi/nfit/core.c handle = adev->handle; adev 1750 drivers/acpi/nfit/core.c struct acpi_device *adev = data; adev 1751 drivers/acpi/nfit/core.c struct device *dev = &adev->dev; adev 1758 drivers/acpi/nfit/core.c static bool acpi_nvdimm_has_method(struct acpi_device *adev, char *method) adev 1763 drivers/acpi/nfit/core.c status = acpi_get_handle(adev->handle, method, &handle); adev 1772 drivers/acpi/nfit/core.c struct device *dev = &nfit_mem->adev->dev; adev 1786 drivers/acpi/nfit/core.c struct acpi_device *adev = nfit_mem->adev; adev 1787 drivers/acpi/nfit/core.c acpi_handle handle = adev->handle; adev 1829 drivers/acpi/nfit/core.c struct acpi_device *adev, *adev_dimm; adev 1852 drivers/acpi/nfit/core.c adev = to_acpi_dev(acpi_desc); adev 1853 drivers/acpi/nfit/core.c if (!adev) { adev 1859 drivers/acpi/nfit/core.c adev_dimm = acpi_find_child_device(adev, device_handle, false); adev 1860 drivers/acpi/nfit/core.c nfit_mem->adev = adev_dimm; adev 1988 drivers/acpi/nfit/core.c struct acpi_device *adev_dimm = nfit_mem->adev; adev 2151 drivers/acpi/nfit/core.c struct acpi_device *adev; adev 2157 drivers/acpi/nfit/core.c adev = to_acpi_dev(acpi_desc); adev 2158 drivers/acpi/nfit/core.c if (!adev) adev 2162 drivers/acpi/nfit/core.c if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) adev 2176 drivers/acpi/nfit/core.c if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) adev 3614 drivers/acpi/nfit/core.c static int acpi_nfit_add(struct acpi_device *adev) adev 3618 drivers/acpi/nfit/core.c struct device *dev = &adev->dev; adev 3645 drivers/acpi/nfit/core.c acpi_nfit_desc_init(acpi_desc, &adev->dev); adev 3651 drivers/acpi/nfit/core.c status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); adev 3673 drivers/acpi/nfit/core.c static int acpi_nfit_remove(struct acpi_device *adev) adev 3749 drivers/acpi/nfit/core.c static void acpi_nfit_notify(struct acpi_device *adev, u32 event) adev 3751 drivers/acpi/nfit/core.c nfit_device_lock(&adev->dev); adev 3752 drivers/acpi/nfit/core.c __acpi_nfit_notify(&adev->dev, adev->handle, event); adev 3753 drivers/acpi/nfit/core.c nfit_device_unlock(&adev->dev); adev 200 drivers/acpi/nfit/nfit.h struct acpi_device *adev; adev 1147 drivers/acpi/osl.c struct acpi_device *adev; adev 1156 drivers/acpi/osl.c acpi_device_hotplug(hpw->adev, hpw->src); adev 1160 drivers/acpi/osl.c acpi_status acpi_hotplug_schedule(struct acpi_device *adev, u32 src) adev 1166 drivers/acpi/osl.c adev, src)); adev 1173 drivers/acpi/osl.c hpw->adev = adev; adev 35 drivers/acpi/pci_root.c static int acpi_pci_root_scan_dependent(struct acpi_device *adev) adev 37 drivers/acpi/pci_root.c acpiphp_check_host_bridge(adev); adev 304 drivers/acpi/power.c int acpi_device_power_add_dependent(struct acpi_device *adev, adev 311 drivers/acpi/power.c if (!adev->flags.power_manageable) adev 314 drivers/acpi/power.c resources = &adev->power.states[ACPI_STATE_D0].resources; adev 339 drivers/acpi/power.c void acpi_device_power_remove_dependent(struct acpi_device *adev, adev 345 drivers/acpi/power.c if (!adev->flags.power_manageable) adev 348 drivers/acpi/power.c resources = &adev->power.states[ACPI_STATE_D0].resources; adev 522 drivers/acpi/power.c static void acpi_power_hide_list(struct acpi_device *adev, adev 534 drivers/acpi/power.c sysfs_remove_link_from_group(&adev->dev.kobj, adev 538 drivers/acpi/power.c sysfs_remove_group(&adev->dev.kobj, attr_group); adev 541 drivers/acpi/power.c static void acpi_power_expose_list(struct acpi_device *adev, adev 551 drivers/acpi/power.c ret = sysfs_create_group(&adev->dev.kobj, attr_group); adev 558 drivers/acpi/power.c ret = sysfs_add_link_to_group(&adev->dev.kobj, adev 563 drivers/acpi/power.c acpi_power_hide_list(adev, resources, attr_group); adev 569 drivers/acpi/power.c static void acpi_power_expose_hide(struct acpi_device *adev, adev 575 drivers/acpi/power.c acpi_power_expose_list(adev, resources, attr_group); adev 577 drivers/acpi/power.c acpi_power_hide_list(adev, resources, attr_group); adev 580 drivers/acpi/power.c void acpi_power_add_remove_device(struct acpi_device *adev, bool add) adev 584 drivers/acpi/power.c if (adev->wakeup.flags.valid) adev 585 drivers/acpi/power.c acpi_power_expose_hide(adev, &adev->wakeup.resources, adev 588 drivers/acpi/power.c if (!adev->power.flags.power_resources) adev 592 drivers/acpi/power.c acpi_power_expose_hide(adev, adev 593 drivers/acpi/power.c &adev->power.states[state].resources, adev 78 drivers/acpi/proc.c static void physical_device_enable_wakeup(struct acpi_device *adev) adev 82 drivers/acpi/proc.c mutex_lock(&adev->physical_node_lock); adev 85 drivers/acpi/proc.c &adev->physical_node_list, node) adev 91 drivers/acpi/proc.c mutex_unlock(&adev->physical_node_lock); adev 287 drivers/acpi/property.c static void acpi_init_of_compatible(struct acpi_device *adev) adev 292 drivers/acpi/property.c ret = acpi_data_get_property_array(&adev->data, "compatible", adev 295 drivers/acpi/property.c ret = acpi_dev_get_property(adev, "compatible", adev 298 drivers/acpi/property.c if (adev->parent adev 299 drivers/acpi/property.c && adev->parent->flags.of_compatible_ok) adev 305 drivers/acpi/property.c adev->data.of_compatible = of_compatible; adev 308 drivers/acpi/property.c adev->flags.of_compatible_ok = 1; adev 381 drivers/acpi/property.c void acpi_init_properties(struct acpi_device *adev) adev 388 drivers/acpi/property.c INIT_LIST_HEAD(&adev->data.properties); adev 389 drivers/acpi/property.c INIT_LIST_HEAD(&adev->data.subnodes); adev 391 drivers/acpi/property.c if (!adev->handle) adev 398 drivers/acpi/property.c list_for_each_entry(hwid, &adev->pnp.ids, list) { adev 405 drivers/acpi/property.c status = acpi_evaluate_object_typed(adev->handle, "_DSD", NULL, &buf, adev 410 drivers/acpi/property.c if (acpi_extract_properties(buf.pointer, &adev->data)) { adev 411 drivers/acpi/property.c adev->data.pointer = buf.pointer; adev 413 drivers/acpi/property.c acpi_init_of_compatible(adev); adev 415 drivers/acpi/property.c if (acpi_enumerate_nondev_subnodes(adev->handle, buf.pointer, adev 416 drivers/acpi/property.c &adev->data, acpi_fwnode_handle(adev))) adev 417 drivers/acpi/property.c adev->data.pointer = buf.pointer; adev 419 drivers/acpi/property.c if (!adev->data.pointer) { adev 420 drivers/acpi/property.c acpi_handle_debug(adev->handle, "Invalid _DSD data, skipping\n"); adev 425 drivers/acpi/property.c if (acpi_of && !adev->flags.of_compatible_ok) adev 426 drivers/acpi/property.c acpi_handle_info(adev->handle, adev 429 drivers/acpi/property.c if (!adev->data.pointer) adev 430 drivers/acpi/property.c acpi_extract_apple_properties(adev); adev 449 drivers/acpi/property.c void acpi_free_properties(struct acpi_device *adev) adev 453 drivers/acpi/property.c acpi_destroy_nondev_subnodes(&adev->data.subnodes); adev 454 drivers/acpi/property.c ACPI_FREE((void *)adev->data.pointer); adev 455 drivers/acpi/property.c adev->data.of_compatible = NULL; adev 456 drivers/acpi/property.c adev->data.pointer = NULL; adev 457 drivers/acpi/property.c list_for_each_entry_safe(props, tmp, &adev->data.properties, list) { adev 528 drivers/acpi/property.c int acpi_dev_get_property(const struct acpi_device *adev, const char *name, adev 531 drivers/acpi/property.c return adev ? acpi_data_get_property(&adev->data, name, type, obj) : -EINVAL; adev 539 drivers/acpi/property.c const struct acpi_device *adev = to_acpi_device_node(fwnode); adev 540 drivers/acpi/property.c return &adev->data; adev 839 drivers/acpi/property.c int acpi_dev_prop_read_single(struct acpi_device *adev, const char *propname, adev 844 drivers/acpi/property.c if (!adev) adev 847 drivers/acpi/property.c ret = acpi_data_prop_read_single(&adev->data, propname, proptype, val); adev 983 drivers/acpi/property.c int acpi_dev_prop_read(const struct acpi_device *adev, const char *propname, adev 986 drivers/acpi/property.c return adev ? acpi_data_prop_read(&adev->data, propname, proptype, val, nval) : -EINVAL; adev 1017 drivers/acpi/property.c const struct acpi_device *adev = to_acpi_device_node(fwnode); adev 1024 drivers/acpi/property.c if (adev) adev 1025 drivers/acpi/property.c head = &adev->children; adev 1033 drivers/acpi/property.c adev = to_acpi_device_node(child); adev 1034 drivers/acpi/property.c next = adev->node.next; adev 1059 drivers/acpi/property.c adev = to_acpi_device_node(fwnode); adev 1060 drivers/acpi/property.c if (adev) adev 1061 drivers/acpi/property.c head = &adev->data.subnodes; adev 1102 drivers/acpi/property.c struct acpi_device *adev; adev 1104 drivers/acpi/property.c if (!acpi_bus_get_device(parent_handle, &adev)) adev 1105 drivers/acpi/property.c return acpi_fwnode_handle(adev); adev 569 drivers/acpi/resource.c static int __acpi_dev_get_resources(struct acpi_device *adev, adev 577 drivers/acpi/resource.c if (!adev || !adev->handle || !list_empty(list)) adev 580 drivers/acpi/resource.c if (!acpi_has_method(adev->handle, method)) adev 588 drivers/acpi/resource.c status = acpi_walk_resources(adev->handle, method, adev 622 drivers/acpi/resource.c int acpi_dev_get_resources(struct acpi_device *adev, struct list_head *list, adev 626 drivers/acpi/resource.c return __acpi_dev_get_resources(adev, list, preproc, preproc_data, adev 659 drivers/acpi/resource.c int acpi_dev_get_dma_resources(struct acpi_device *adev, struct list_head *list) adev 661 drivers/acpi/resource.c return __acpi_dev_get_resources(adev, list, is_memory, NULL, adev 721 drivers/acpi/resource.c static int acpi_dev_consumes_res(struct acpi_device *adev, struct resource *res) adev 728 drivers/acpi/resource.c ret = acpi_dev_get_resources(adev, &resource_list, NULL, NULL); adev 749 drivers/acpi/resource.c struct acpi_device *adev; adev 751 drivers/acpi/resource.c if (acpi_bus_get_device(handle, &adev)) adev 754 drivers/acpi/resource.c if (acpi_dev_consumes_res(adev, res)) { adev 755 drivers/acpi/resource.c *consumer = adev; adev 81 drivers/acpi/scan.c void acpi_initialize_hp_context(struct acpi_device *adev, adev 89 drivers/acpi/scan.c acpi_set_hp_context(adev, hp); adev 116 drivers/acpi/scan.c bool acpi_scan_is_offline(struct acpi_device *adev, bool uevent) adev 126 drivers/acpi/scan.c mutex_lock_nested(&adev->physical_node_lock, SINGLE_DEPTH_NESTING); adev 128 drivers/acpi/scan.c list_for_each_entry(pn, &adev->physical_node_list, node) adev 137 drivers/acpi/scan.c mutex_unlock(&adev->physical_node_lock); adev 300 drivers/acpi/scan.c static int acpi_scan_device_not_present(struct acpi_device *adev) adev 302 drivers/acpi/scan.c if (!acpi_device_enumerated(adev)) { adev 303 drivers/acpi/scan.c dev_warn(&adev->dev, "Still not present\n"); adev 306 drivers/acpi/scan.c acpi_bus_trim(adev); adev 310 drivers/acpi/scan.c static int acpi_scan_device_check(struct acpi_device *adev) adev 314 drivers/acpi/scan.c acpi_bus_get_status(adev); adev 315 drivers/acpi/scan.c if (adev->status.present || adev->status.functional) { adev 324 drivers/acpi/scan.c if (adev->handler) { adev 325 drivers/acpi/scan.c dev_warn(&adev->dev, "Already enumerated\n"); adev 328 drivers/acpi/scan.c error = acpi_bus_scan(adev->handle); adev 330 drivers/acpi/scan.c dev_warn(&adev->dev, "Namespace scan failure\n"); adev 333 drivers/acpi/scan.c if (!adev->handler) { adev 334 drivers/acpi/scan.c dev_warn(&adev->dev, "Enumeration failure\n"); adev 338 drivers/acpi/scan.c error = acpi_scan_device_not_present(adev); adev 343 drivers/acpi/scan.c static int acpi_scan_bus_check(struct acpi_device *adev) adev 345 drivers/acpi/scan.c struct acpi_scan_handler *handler = adev->handler; adev 349 drivers/acpi/scan.c acpi_bus_get_status(adev); adev 350 drivers/acpi/scan.c if (!(adev->status.present || adev->status.functional)) { adev 351 drivers/acpi/scan.c acpi_scan_device_not_present(adev); adev 355 drivers/acpi/scan.c return handler->hotplug.scan_dependent(adev); adev 357 drivers/acpi/scan.c error = acpi_bus_scan(adev->handle); adev 359 drivers/acpi/scan.c dev_warn(&adev->dev, "Namespace scan failure\n"); adev 362 drivers/acpi/scan.c list_for_each_entry(child, &adev->children, node) { adev 370 drivers/acpi/scan.c static int acpi_generic_hotplug_event(struct acpi_device *adev, u32 type) adev 374 drivers/acpi/scan.c return acpi_scan_bus_check(adev); adev 376 drivers/acpi/scan.c return acpi_scan_device_check(adev); adev 379 drivers/acpi/scan.c if (adev->handler && !adev->handler->hotplug.enabled) { adev 380 drivers/acpi/scan.c dev_info(&adev->dev, "Eject disabled\n"); adev 383 drivers/acpi/scan.c acpi_evaluate_ost(adev->handle, ACPI_NOTIFY_EJECT_REQUEST, adev 385 drivers/acpi/scan.c return acpi_scan_hot_remove(adev); adev 390 drivers/acpi/scan.c void acpi_device_hotplug(struct acpi_device *adev, u32 src) adev 403 drivers/acpi/scan.c if (adev->handle == INVALID_ACPI_HANDLE) adev 406 drivers/acpi/scan.c if (adev->flags.is_dock_station) { adev 407 drivers/acpi/scan.c error = dock_notify(adev, src); adev 408 drivers/acpi/scan.c } else if (adev->flags.hotplug_notify) { adev 409 drivers/acpi/scan.c error = acpi_generic_hotplug_event(adev, src); adev 414 drivers/acpi/scan.c notify = adev->hp ? adev->hp->notify : NULL; adev 421 drivers/acpi/scan.c error = notify(adev, src); adev 441 drivers/acpi/scan.c acpi_evaluate_ost(adev->handle, src, ost_code, NULL); adev 444 drivers/acpi/scan.c acpi_bus_put_acpi_device(adev); adev 514 drivers/acpi/scan.c struct acpi_device *adev; adev 522 drivers/acpi/scan.c adev = list_first_entry(&acpi_device_del_list, adev 524 drivers/acpi/scan.c list_del(&adev->del_list); adev 529 drivers/acpi/scan.c ACPI_RECONFIG_DEVICE_REMOVE, adev); adev 531 drivers/acpi/scan.c acpi_device_del(adev); adev 536 drivers/acpi/scan.c acpi_power_transition(adev, ACPI_STATE_D3_COLD); adev 537 drivers/acpi/scan.c put_device(&adev->dev); adev 557 drivers/acpi/scan.c struct acpi_device *adev = context; adev 574 drivers/acpi/scan.c list_add_tail(&adev->del_list, &acpi_device_del_list); adev 576 drivers/acpi/scan.c adev->handle = INVALID_ACPI_HANDLE; adev 613 drivers/acpi/scan.c struct acpi_device *adev = NULL; adev 615 drivers/acpi/scan.c acpi_get_device_data(handle, &adev, get_acpi_device); adev 616 drivers/acpi/scan.c return adev; adev 619 drivers/acpi/scan.c void acpi_bus_put_acpi_device(struct acpi_device *adev) adev 621 drivers/acpi/scan.c put_device(&adev->dev); adev 1087 drivers/acpi/scan.c bool acpi_device_is_battery(struct acpi_device *adev) adev 1091 drivers/acpi/scan.c list_for_each_entry(hwid, &adev->pnp.ids, list) adev 1098 drivers/acpi/scan.c static bool is_ejectable_bay(struct acpi_device *adev) adev 1100 drivers/acpi/scan.c acpi_handle handle = adev->handle; adev 1102 drivers/acpi/scan.c if (acpi_has_method(handle, "_EJ0") && acpi_device_is_battery(adev)) adev 1342 drivers/acpi/scan.c bool acpi_dma_supported(struct acpi_device *adev) adev 1344 drivers/acpi/scan.c if (!adev) adev 1347 drivers/acpi/scan.c if (adev->flags.cca_seen) adev 1367 drivers/acpi/scan.c enum dev_dma_attr acpi_get_dma_attr(struct acpi_device *adev) adev 1369 drivers/acpi/scan.c if (!acpi_dma_supported(adev)) adev 1372 drivers/acpi/scan.c if (adev->flags.coherent_dma) adev 1395 drivers/acpi/scan.c struct acpi_device *adev; adev 1408 drivers/acpi/scan.c adev = ACPI_COMPANION(dma_dev); adev 1409 drivers/acpi/scan.c if (adev && acpi_has_method(adev->handle, METHOD_NAME__DMA)) adev 1418 drivers/acpi/scan.c if (!acpi_has_method(adev->handle, METHOD_NAME__CRS)) { adev 1419 drivers/acpi/scan.c acpi_handle_warn(adev->handle, "_DMA is valid only if _CRS is present\n"); adev 1423 drivers/acpi/scan.c ret = acpi_dev_get_dma_resources(adev, &list); adev 1485 drivers/acpi/scan.c static void acpi_init_coherency(struct acpi_device *adev) adev 1489 drivers/acpi/scan.c struct acpi_device *parent = adev->parent; adev 1496 drivers/acpi/scan.c adev->flags.cca_seen = 1; adev 1499 drivers/acpi/scan.c status = acpi_evaluate_integer(adev->handle, "_CCA", adev 1502 drivers/acpi/scan.c adev->flags.cca_seen = 1; adev 1511 drivers/acpi/scan.c acpi_handle_debug(adev->handle, adev 1515 drivers/acpi/scan.c adev->flags.coherent_dma = cca; adev 1739 drivers/acpi/scan.c bool acpi_device_is_present(const struct acpi_device *adev) adev 1741 drivers/acpi/scan.c return adev->status.present || adev->status.functional; adev 1788 drivers/acpi/scan.c static void acpi_scan_init_hotplug(struct acpi_device *adev) adev 1792 drivers/acpi/scan.c if (acpi_dock_match(adev->handle) || is_ejectable_bay(adev)) { adev 1793 drivers/acpi/scan.c acpi_dock_add(adev); adev 1796 drivers/acpi/scan.c list_for_each_entry(hwid, &adev->pnp.ids, list) { adev 1801 drivers/acpi/scan.c adev->flags.hotplug_notify = true; adev 1807 drivers/acpi/scan.c static void acpi_device_dep_initialize(struct acpi_device *adev) adev 1814 drivers/acpi/scan.c adev->dep_unmet = 0; adev 1816 drivers/acpi/scan.c if (!acpi_has_method(adev->handle, "_DEP")) adev 1819 drivers/acpi/scan.c status = acpi_evaluate_reference(adev->handle, "_DEP", NULL, adev 1822 drivers/acpi/scan.c dev_dbg(&adev->dev, "Failed to evaluate _DEP.\n"); adev 1832 drivers/acpi/scan.c dev_dbg(&adev->dev, "Error reading _DEP device info\n"); adev 1853 drivers/acpi/scan.c dep->slave = adev->handle; adev 1854 drivers/acpi/scan.c adev->dep_unmet++; adev 1917 drivers/acpi/scan.c static int acpi_generic_device_attach(struct acpi_device *adev, adev 1924 drivers/acpi/scan.c if (adev->data.of_compatible) adev 1925 drivers/acpi/scan.c acpi_default_enumeration(adev); adev 2025 drivers/acpi/scan.c struct acpi_device *adev; adev 2030 drivers/acpi/scan.c acpi_bus_get_device(dep->slave, &adev); adev 2031 drivers/acpi/scan.c if (!adev) adev 2034 drivers/acpi/scan.c adev->dep_unmet--; adev 2035 drivers/acpi/scan.c if (!adev->dep_unmet) adev 2036 drivers/acpi/scan.c acpi_bus_attach(adev); adev 2081 drivers/acpi/scan.c void acpi_bus_trim(struct acpi_device *adev) adev 2083 drivers/acpi/scan.c struct acpi_scan_handler *handler = adev->handler; adev 2086 drivers/acpi/scan.c list_for_each_entry_reverse(child, &adev->children, node) adev 2089 drivers/acpi/scan.c adev->flags.match_driver = false; adev 2092 drivers/acpi/scan.c handler->detach(adev); adev 2094 drivers/acpi/scan.c adev->handler = NULL; adev 2096 drivers/acpi/scan.c device_release_driver(&adev->dev); adev 2102 drivers/acpi/scan.c acpi_device_set_power(adev, ACPI_STATE_D3_COLD); adev 2103 drivers/acpi/scan.c adev->flags.initialized = false; adev 2104 drivers/acpi/scan.c acpi_device_clear_enumerated(adev); adev 852 drivers/acpi/sleep.c struct acpi_device *adev; adev 854 drivers/acpi/sleep.c if (!handle || acpi_bus_get_device(handle, &adev)) adev 860 drivers/acpi/sleep.c acpi_power_state_string(adev->power.state)); adev 862 drivers/acpi/sleep.c if (!adev->flags.power_manageable) { adev 868 drivers/acpi/sleep.c if (adev->power.state < lpi_constraints_table[i].min_dstate) adev 872 drivers/acpi/sleep.c acpi_power_state_string(adev->power.state)); adev 890 drivers/acpi/sleep.c static int lps0_device_attach(struct acpi_device *adev, adev 903 drivers/acpi/sleep.c out_obj = acpi_evaluate_dsm(adev->handle, &lps0_dsm_guid, 1, 0, NULL); adev 905 drivers/acpi/sleep.c acpi_handle_debug(adev->handle, adev 914 drivers/acpi/sleep.c acpi_handle_debug(adev->handle, "_DSM function mask: 0x%x\n", adev 917 drivers/acpi/sleep.c lps0_device_handle = adev->handle; adev 735 drivers/acpi/utils.c struct acpi_device *adev = to_acpi_device(dev); adev 740 drivers/acpi/utils.c if (acpi_match_device_ids(adev, match->hid)) adev 743 drivers/acpi/utils.c if (match->uid && (!adev->pnp.unique_id || adev 744 drivers/acpi/utils.c strcmp(adev->pnp.unique_id, match->uid))) adev 750 drivers/acpi/utils.c status = acpi_evaluate_integer(adev->handle, "_HRV", NULL, &hrv); adev 27 drivers/acpi/x86/apple.c void acpi_extract_apple_properties(struct acpi_device *adev) adev 37 drivers/acpi/x86/apple.c props = acpi_evaluate_dsm_typed(adev->handle, &apple_prp_guid, 1, 0, adev 46 drivers/acpi/x86/apple.c acpi_handle_info(adev->handle, FW_INFO adev 53 drivers/acpi/x86/apple.c props = acpi_evaluate_dsm_typed(adev->handle, &apple_prp_guid, 1, 1, adev 84 drivers/acpi/x86/apple.c acpi_handle_info(adev->handle, FW_INFO adev 132 drivers/acpi/x86/apple.c adev->data.pointer = newprops; adev 133 drivers/acpi/x86/apple.c acpi_data_add_props(&adev->data, &apple_prp_guid, newprops); adev 112 drivers/acpi/x86/utils.c bool acpi_device_always_present(struct acpi_device *adev) adev 118 drivers/acpi/x86/utils.c if (acpi_match_device_ids(adev, always_present_ids[i].hid)) adev 121 drivers/acpi/x86/utils.c if (!adev->pnp.unique_id || adev 122 drivers/acpi/x86/utils.c strcmp(adev->pnp.unique_id, always_present_ids[i].uid)) adev 549 drivers/ata/ata_piix.c static void piix_set_timings(struct ata_port *ap, struct ata_device *adev, adev 554 drivers/ata/ata_piix.c unsigned int is_slave = (adev->devno != 0); adev 576 drivers/ata/ata_piix.c if (ata_pio_need_iordy(adev)) adev 579 drivers/ata/ata_piix.c if (adev->class == ATA_DEV_ATA) adev 585 drivers/ata/ata_piix.c if (adev->pio_mode < XFER_PIO_0 + pio) adev 628 drivers/ata/ata_piix.c udma_enable &= ~(1 << (2 * ap->port_no + adev->devno)); adev 646 drivers/ata/ata_piix.c static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 648 drivers/ata/ata_piix.c piix_set_timings(ap, adev, adev->pio_mode - XFER_PIO_0); adev 663 drivers/ata/ata_piix.c static void do_pata_set_dmamode(struct ata_port *ap, struct ata_device *adev, int isich) adev 667 drivers/ata/ata_piix.c u8 speed = adev->dma_mode; adev 668 drivers/ata/ata_piix.c int devid = adev->devno + 2 * ap->port_no; adev 726 drivers/ata/ata_piix.c piix_set_timings(ap, adev, pio); adev 741 drivers/ata/ata_piix.c static void piix_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 743 drivers/ata/ata_piix.c do_pata_set_dmamode(ap, adev, 0); adev 757 drivers/ata/ata_piix.c static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 759 drivers/ata/ata_piix.c do_pata_set_dmamode(ap, adev, 1); adev 135 drivers/ata/libata-acpi.c static int ata_acpi_dev_notify_dock(struct acpi_device *adev, u32 event) adev 137 drivers/ata/libata-acpi.c struct ata_device *dev = ata_hotplug_data(adev->hp).dev; adev 142 drivers/ata/libata-acpi.c static int ata_acpi_ap_notify_dock(struct acpi_device *adev, u32 event) adev 144 drivers/ata/libata-acpi.c ata_acpi_handle_hotplug(ata_hotplug_data(adev->hp).ap, NULL, event); adev 167 drivers/ata/libata-acpi.c static void ata_acpi_ap_uevent(struct acpi_device *adev, u32 event) adev 169 drivers/ata/libata-acpi.c ata_acpi_uevent(ata_hotplug_data(adev->hp).ap, NULL, event); adev 172 drivers/ata/libata-acpi.c static void ata_acpi_dev_uevent(struct acpi_device *adev, u32 event) adev 174 drivers/ata/libata-acpi.c struct ata_device *dev = ata_hotplug_data(adev->hp).dev; adev 182 drivers/ata/libata-acpi.c struct acpi_device *adev; adev 193 drivers/ata/libata-acpi.c adev = ACPI_COMPANION(&ap->tdev); adev 194 drivers/ata/libata-acpi.c if (!adev || adev->hp) adev 202 drivers/ata/libata-acpi.c acpi_initialize_hp_context(adev, &context->hp, ata_acpi_ap_notify_dock, adev 211 drivers/ata/libata-acpi.c struct acpi_device *parent, *adev; adev 235 drivers/ata/libata-acpi.c adev = ACPI_COMPANION(&dev->tdev); adev 236 drivers/ata/libata-acpi.c if (!adev || adev->hp) adev 244 drivers/ata/libata-acpi.c acpi_initialize_hp_context(adev, &context->hp, ata_acpi_dev_notify_dock, adev 1749 drivers/ata/libata-core.c unsigned int ata_pio_need_iordy(const struct ata_device *adev) adev 1755 drivers/ata/libata-core.c if (adev->link->ap->pflags & ATA_PFLAG_RESETTING) adev 1760 drivers/ata/libata-core.c if (adev->link->ap->flags & ATA_FLAG_NO_IORDY) adev 1763 drivers/ata/libata-core.c if (ata_id_is_cfa(adev->id) adev 1764 drivers/ata/libata-core.c && (adev->pio_mode == XFER_PIO_5 || adev->pio_mode == XFER_PIO_6)) adev 1767 drivers/ata/libata-core.c if (adev->pio_mode > XFER_PIO_2) adev 1770 drivers/ata/libata-core.c if (ata_id_has_iordy(adev->id)) adev 1782 drivers/ata/libata-core.c static u32 ata_pio_mask_no_iordy(const struct ata_device *adev) adev 1785 drivers/ata/libata-core.c if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ adev 1786 drivers/ata/libata-core.c u16 pio = adev->id[ATA_ID_EIDE_PIO]; adev 3009 drivers/ata/libata-core.c struct ata_device *ata_dev_pair(struct ata_device *adev) adev 3011 drivers/ata/libata-core.c struct ata_link *link = adev->link; adev 3012 drivers/ata/libata-core.c struct ata_device *pair = &link->device[1 - adev->devno]; adev 3268 drivers/ata/libata-core.c int ata_timing_compute(struct ata_device *adev, unsigned short speed, adev 3271 drivers/ata/libata-core.c const u16 *id = adev->id; adev 3317 drivers/ata/libata-core.c ata_timing_compute(adev, adev->pio_mode, &p, T, UT); adev 5807 drivers/ata/libata-core.c struct ata_device *adev; adev 5810 drivers/ata/libata-core.c ata_for_each_dev(adev, link, ENABLED) adev 5811 drivers/ata/libata-core.c if (adev->class == ATA_DEV_ATAPI && adev 5812 drivers/ata/libata-core.c !zpodd_dev_enabled(adev)) adev 267 drivers/ata/libata-zpodd.c struct acpi_device *adev = ACPI_COMPANION(&dev->tdev); adev 271 drivers/ata/libata-zpodd.c if (dev->zpodd || !adev || !acpi_device_can_poweroff(adev)) adev 73 drivers/ata/pata_acpi.c static unsigned long pacpi_discover_modes(struct ata_port *ap, struct ata_device *adev) adev 83 drivers/ata/pata_acpi.c xfer_mask = ata_acpi_gtm_xfermask(adev, &probe); adev 100 drivers/ata/pata_acpi.c static unsigned long pacpi_mode_filter(struct ata_device *adev, unsigned long mask) adev 102 drivers/ata/pata_acpi.c struct pata_acpi *acpi = adev->link->ap->private_data; adev 103 drivers/ata/pata_acpi.c return mask & acpi->mask[adev->devno]; adev 112 drivers/ata/pata_acpi.c static void pacpi_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 114 drivers/ata/pata_acpi.c int unit = adev->devno; adev 122 drivers/ata/pata_acpi.c t = ata_timing_find_mode(adev->pio_mode); adev 135 drivers/ata/pata_acpi.c static void pacpi_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 137 drivers/ata/pata_acpi.c int unit = adev->devno; adev 145 drivers/ata/pata_acpi.c t = ata_timing_find_mode(adev->dma_mode); adev 146 drivers/ata/pata_acpi.c if (adev->dma_mode >= XFER_UDMA_0) { adev 170 drivers/ata/pata_acpi.c struct ata_device *adev = qc->dev; adev 176 drivers/ata/pata_acpi.c if (adev != acpi->last) { adev 177 drivers/ata/pata_acpi.c pacpi_set_piomode(ap, adev); adev 178 drivers/ata/pata_acpi.c if (ata_dma_enabled(adev)) adev 179 drivers/ata/pata_acpi.c pacpi_set_dmamode(ap, adev); adev 180 drivers/ata/pata_acpi.c acpi->last = adev; adev 118 drivers/ata/pata_ali.c static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask) adev 122 drivers/ata/pata_ali.c if (adev->class != ATA_DEV_ATA) adev 124 drivers/ata/pata_ali.c ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); adev 141 drivers/ata/pata_ali.c static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on) adev 146 drivers/ata/pata_ali.c int shift = 4 * adev->devno; adev 170 drivers/ata/pata_ali.c static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra) adev 175 drivers/ata/pata_ali.c int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */ adev 177 drivers/ata/pata_ali.c int shift = 4 * adev->devno; adev 207 drivers/ata/pata_ali.c static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 209 drivers/ata/pata_ali.c struct ata_device *pair = ata_dev_pair(adev); adev 213 drivers/ata/pata_ali.c ata_timing_compute(adev, adev->pio_mode, &t, T, 1); adev 225 drivers/ata/pata_ali.c if (adev->class != ATA_DEV_ATA) adev 226 drivers/ata/pata_ali.c ali_fifo_control(ap, adev, 0x00); adev 227 drivers/ata/pata_ali.c ali_program_modes(ap, adev, &t, 0); adev 228 drivers/ata/pata_ali.c if (adev->class == ATA_DEV_ATA) adev 229 drivers/ata/pata_ali.c ali_fifo_control(ap, adev, 0x05); adev 241 drivers/ata/pata_ali.c static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 244 drivers/ata/pata_ali.c struct ata_device *pair = ata_dev_pair(adev); adev 250 drivers/ata/pata_ali.c if (adev->class == ATA_DEV_ATA) adev 251 drivers/ata/pata_ali.c ali_fifo_control(ap, adev, 0x08); adev 253 drivers/ata/pata_ali.c if (adev->dma_mode >= XFER_UDMA_0) { adev 254 drivers/ata/pata_ali.c ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]); adev 255 drivers/ata/pata_ali.c if (adev->dma_mode >= XFER_UDMA_3) { adev 262 drivers/ata/pata_ali.c ata_timing_compute(adev, adev->dma_mode, &t, T, 1); adev 272 drivers/ata/pata_ali.c ali_program_modes(ap, adev, &t, 0); adev 284 drivers/ata/pata_ali.c static void ali_warn_atapi_dma(struct ata_device *adev) adev 286 drivers/ata/pata_ali.c struct ata_eh_context *ehc = &adev->link->eh_context; adev 289 drivers/ata/pata_ali.c if (print_info && adev->class == ATA_DEV_ATAPI && !ali_atapi_dma) { adev 290 drivers/ata/pata_ali.c ata_dev_warn(adev, adev 292 drivers/ata/pata_ali.c ata_dev_warn(adev, adev 308 drivers/ata/pata_ali.c static void ali_lock_sectors(struct ata_device *adev) adev 310 drivers/ata/pata_ali.c adev->max_sectors = 255; adev 311 drivers/ata/pata_ali.c ali_warn_atapi_dma(adev); adev 43 drivers/ata/pata_amd.c static void timing_setup(struct ata_port *ap, struct ata_device *adev, int offset, int speed, int clock) adev 50 drivers/ata/pata_amd.c struct ata_device *peer = ata_dev_pair(adev); adev 51 drivers/ata/pata_amd.c int dn = ap->port_no * 2 + adev->devno; adev 62 drivers/ata/pata_amd.c if (ata_timing_compute(adev, speed, &at, T, UT) < 0) { adev 180 drivers/ata/pata_amd.c struct ata_device *adev; adev 187 drivers/ata/pata_amd.c ata_for_each_dev(adev, &ap->link, ENABLED) { adev 188 drivers/ata/pata_amd.c if (adev->class == ATA_DEV_ATAPI) adev 209 drivers/ata/pata_amd.c static void amd33_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 212 drivers/ata/pata_amd.c timing_setup(ap, adev, 0x40, adev->pio_mode, 1); adev 215 drivers/ata/pata_amd.c static void amd66_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 218 drivers/ata/pata_amd.c timing_setup(ap, adev, 0x40, adev->pio_mode, 2); adev 221 drivers/ata/pata_amd.c static void amd100_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 224 drivers/ata/pata_amd.c timing_setup(ap, adev, 0x40, adev->pio_mode, 3); adev 227 drivers/ata/pata_amd.c static void amd133_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 230 drivers/ata/pata_amd.c timing_setup(ap, adev, 0x40, adev->pio_mode, 4); adev 242 drivers/ata/pata_amd.c static void amd33_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 244 drivers/ata/pata_amd.c timing_setup(ap, adev, 0x40, adev->dma_mode, 1); adev 247 drivers/ata/pata_amd.c static void amd66_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 249 drivers/ata/pata_amd.c timing_setup(ap, adev, 0x40, adev->dma_mode, 2); adev 252 drivers/ata/pata_amd.c static void amd100_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 254 drivers/ata/pata_amd.c timing_setup(ap, adev, 0x40, adev->dma_mode, 3); adev 257 drivers/ata/pata_amd.c static void amd133_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 259 drivers/ata/pata_amd.c timing_setup(ap, adev, 0x40, adev->dma_mode, 4); adev 354 drivers/ata/pata_amd.c static void nv100_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 356 drivers/ata/pata_amd.c timing_setup(ap, adev, 0x50, adev->pio_mode, 3); adev 359 drivers/ata/pata_amd.c static void nv133_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 361 drivers/ata/pata_amd.c timing_setup(ap, adev, 0x50, adev->pio_mode, 4); adev 373 drivers/ata/pata_amd.c static void nv100_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 375 drivers/ata/pata_amd.c timing_setup(ap, adev, 0x50, adev->dma_mode, 3); adev 378 drivers/ata/pata_amd.c static void nv133_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 380 drivers/ata/pata_amd.c timing_setup(ap, adev, 0x50, adev->dma_mode, 4); adev 720 drivers/ata/pata_arasan_cf.c static void arasan_cf_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 723 drivers/ata/pata_arasan_cf.c u8 pio = adev->pio_mode - XFER_PIO_0; adev 746 drivers/ata/pata_arasan_cf.c static void arasan_cf_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 749 drivers/ata/pata_arasan_cf.c u32 opmode, tmcfg, dma_mode = adev->dma_mode; adev 99 drivers/ata/pata_artop.c static void artop6210_load_piomode(struct ata_port *ap, struct ata_device *adev, unsigned int pio) adev 102 drivers/ata/pata_artop.c int dn = adev->devno + 2 * ap->port_no; adev 126 drivers/ata/pata_artop.c static void artop6210_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 129 drivers/ata/pata_artop.c int dn = adev->devno + 2 * ap->port_no; adev 132 drivers/ata/pata_artop.c artop6210_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); adev 153 drivers/ata/pata_artop.c static void artop6260_load_piomode (struct ata_port *ap, struct ata_device *adev, unsigned int pio) adev 156 drivers/ata/pata_artop.c int dn = adev->devno + 2 * ap->port_no; adev 180 drivers/ata/pata_artop.c static void artop6260_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 185 drivers/ata/pata_artop.c artop6260_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); adev 189 drivers/ata/pata_artop.c ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */ adev 204 drivers/ata/pata_artop.c static void artop6210_set_dmamode (struct ata_port *ap, struct ata_device *adev) adev 208 drivers/ata/pata_artop.c int dn = adev->devno + 2 * ap->port_no; adev 211 drivers/ata/pata_artop.c if (adev->dma_mode == XFER_MW_DMA_0) adev 217 drivers/ata/pata_artop.c artop6210_load_piomode(ap, adev, pio); adev 223 drivers/ata/pata_artop.c if (adev->dma_mode >= XFER_UDMA_0) { adev 224 drivers/ata/pata_artop.c u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock; adev 244 drivers/ata/pata_artop.c static void artop6260_set_dmamode (struct ata_port *ap, struct ata_device *adev) adev 250 drivers/ata/pata_artop.c if (adev->dma_mode == XFER_MW_DMA_0) adev 256 drivers/ata/pata_artop.c artop6260_load_piomode(ap, adev, pio); adev 260 drivers/ata/pata_artop.c ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */ adev 261 drivers/ata/pata_artop.c if (adev->dma_mode >= XFER_UDMA_0) { adev 262 drivers/ata/pata_artop.c u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock; adev 265 drivers/ata/pata_artop.c ultra |= (mode << (4 * adev->devno)); adev 102 drivers/ata/pata_atiixp.c static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev, int pio) adev 107 drivers/ata/pata_atiixp.c int dn = 2 * ap->port_no + adev->devno; adev 108 drivers/ata/pata_atiixp.c int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1); adev 132 drivers/ata/pata_atiixp.c static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 136 drivers/ata/pata_atiixp.c atiixp_set_pio_timing(ap, adev, adev->pio_mode - XFER_PIO_0); adev 149 drivers/ata/pata_atiixp.c static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 154 drivers/ata/pata_atiixp.c int dma = adev->dma_mode; adev 155 drivers/ata/pata_atiixp.c int dn = 2 * ap->port_no + adev->devno; adev 161 drivers/ata/pata_atiixp.c if (adev->dma_mode >= XFER_UDMA_0) { adev 171 drivers/ata/pata_atiixp.c int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1); adev 187 drivers/ata/pata_atiixp.c if (adev->dma_mode >= XFER_MW_DMA_2) adev 189 drivers/ata/pata_atiixp.c else if (adev->dma_mode == XFER_MW_DMA_1) adev 191 drivers/ata/pata_atiixp.c else if (adev->dma_mode == XFER_MW_DMA_0) adev 195 drivers/ata/pata_atiixp.c if (adev->pio_mode != wanted_pio) adev 196 drivers/ata/pata_atiixp.c atiixp_set_pio_timing(ap, adev, wanted_pio); adev 214 drivers/ata/pata_atiixp.c struct ata_device *adev = qc->dev; adev 217 drivers/ata/pata_atiixp.c int dn = (2 * ap->port_no) + adev->devno; adev 221 drivers/ata/pata_atiixp.c if (ata_using_udma(adev)) adev 107 drivers/ata/pata_atp867x.c static void atp867x_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 111 drivers/ata/pata_atp867x.c u8 speed = adev->dma_mode; adev 128 drivers/ata/pata_atp867x.c if (adev->devno & 1) { adev 202 drivers/ata/pata_atp867x.c static void atp867x_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 204 drivers/ata/pata_atp867x.c struct ata_device *peer = ata_dev_pair(adev); adev 206 drivers/ata/pata_atp867x.c u8 speed = adev->pio_mode; adev 214 drivers/ata/pata_atp867x.c ata_timing_compute(adev, speed, &t, T, UT); adev 221 drivers/ata/pata_atp867x.c if (adev->devno & 1) adev 230 drivers/ata/pata_atp867x.c if (adev->devno & 1) adev 134 drivers/ata/pata_bk3710.c struct ata_device *adev) adev 137 drivers/ata/pata_bk3710.c int is_slave = adev->devno; adev 138 drivers/ata/pata_bk3710.c const u8 xferspeed = adev->dma_mode; adev 145 drivers/ata/pata_bk3710.c adev->id[ATA_ID_EIDE_DMA_MIN], adev 199 drivers/ata/pata_bk3710.c struct ata_device *adev) adev 202 drivers/ata/pata_bk3710.c struct ata_device *pair = ata_dev_pair(adev); adev 203 drivers/ata/pata_bk3710.c const struct ata_timing *t = ata_timing_find_mode(adev->pio_mode); adev 204 drivers/ata/pata_bk3710.c const u16 *id = adev->id; adev 206 drivers/ata/pata_bk3710.c int is_slave = adev->devno; adev 207 drivers/ata/pata_bk3710.c const u8 pio = adev->pio_mode - XFER_PIO_0; adev 52 drivers/ata/pata_cmd640.c static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 60 drivers/ata/pata_cmd640.c int arttim = ARTIM0 + 2 * adev->devno; adev 61 drivers/ata/pata_cmd640.c struct ata_device *pair = ata_dev_pair(adev); adev 63 drivers/ata/pata_cmd640.c if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) { adev 116 drivers/ata/pata_cmd640.c timing->reg58[adev->devno] = (t.active << 4) | t.recover; adev 132 drivers/ata/pata_cmd640.c struct ata_device *adev = qc->dev; adev 136 drivers/ata/pata_cmd640.c if (ap->port_no != 0 && adev->devno != timing->last) { adev 137 drivers/ata/pata_cmd640.c pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]); adev 138 drivers/ata/pata_cmd640.c timing->last = adev->devno; adev 94 drivers/ata/pata_cmd64x.c static void cmd64x_set_timing(struct ata_port *ap, struct ata_device *adev, u8 mode) adev 113 drivers/ata/pata_cmd64x.c int arttim = arttim_port[ap->port_no][adev->devno]; adev 114 drivers/ata/pata_cmd64x.c int drwtim = drwtim_port[ap->port_no][adev->devno]; adev 118 drivers/ata/pata_cmd64x.c if (ata_timing_compute(adev, mode, &t, T, 0) < 0) { adev 124 drivers/ata/pata_cmd64x.c struct ata_device *pair = ata_dev_pair(adev); adev 178 drivers/ata/pata_cmd64x.c static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 180 drivers/ata/pata_cmd64x.c cmd64x_set_timing(ap, adev, adev->pio_mode); adev 191 drivers/ata/pata_cmd64x.c static void cmd64x_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 202 drivers/ata/pata_cmd64x.c int shift = 2 * adev->devno; adev 208 drivers/ata/pata_cmd64x.c regD &= ~(0x20 << adev->devno); adev 212 drivers/ata/pata_cmd64x.c regU &= ~(0x05 << adev->devno); adev 214 drivers/ata/pata_cmd64x.c if (adev->dma_mode >= XFER_UDMA_0) { adev 216 drivers/ata/pata_cmd64x.c regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift; adev 218 drivers/ata/pata_cmd64x.c regU |= 1 << adev->devno; /* UDMA on */ adev 219 drivers/ata/pata_cmd64x.c if (adev->dma_mode > XFER_UDMA_2) /* 15nS timing */ adev 220 drivers/ata/pata_cmd64x.c regU |= 4 << adev->devno; adev 222 drivers/ata/pata_cmd64x.c regU &= ~ (1 << adev->devno); /* UDMA off */ adev 223 drivers/ata/pata_cmd64x.c cmd64x_set_timing(ap, adev, adev->dma_mode); adev 226 drivers/ata/pata_cmd64x.c regD |= 0x20 << adev->devno; adev 60 drivers/ata/pata_cs5520.c static void cs5520_set_timings(struct ata_port *ap, struct ata_device *adev, int pio) adev 63 drivers/ata/pata_cs5520.c int slave = adev->devno; adev 91 drivers/ata/pata_cs5520.c static void cs5520_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 93 drivers/ata/pata_cs5520.c cs5520_set_timings(ap, adev, adev->pio_mode); adev 42 drivers/ata/pata_cs5530.c static void cs5530_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 57 drivers/ata/pata_cs5530.c if (adev->devno) adev 60 drivers/ata/pata_cs5530.c iowrite32(cs5530_pio_timings[format][adev->pio_mode - XFER_PIO_0], base); adev 73 drivers/ata/pata_cs5530.c static void cs5530_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 82 drivers/ata/pata_cs5530.c switch(adev->dma_mode) { adev 100 drivers/ata/pata_cs5530.c if (adev->devno == 0) /* Master */ adev 113 drivers/ata/pata_cs5530.c reg |= (1 << (5 + adev->devno)); adev 118 drivers/ata/pata_cs5530.c ap->private_data = adev; adev 134 drivers/ata/pata_cs5530.c struct ata_device *adev = qc->dev; adev 138 drivers/ata/pata_cs5530.c if (ata_dma_enabled(adev) && adev != prev && prev != NULL) { adev 140 drivers/ata/pata_cs5530.c if ((ata_using_udma(adev) && !ata_using_udma(prev)) || adev 141 drivers/ata/pata_cs5530.c (ata_using_udma(prev) && !ata_using_udma(adev))) adev 143 drivers/ata/pata_cs5530.c cs5530_set_dmamode(ap, adev); adev 85 drivers/ata/pata_cs5535.c static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 94 drivers/ata/pata_cs5535.c struct ata_device *pair = ata_dev_pair(adev); adev 96 drivers/ata/pata_cs5535.c int mode = adev->pio_mode - XFER_PIO_0; adev 109 drivers/ata/pata_cs5535.c wrmsr(ATAC_CH0D0_PIO + 2 * adev->devno, adev 113 drivers/ata/pata_cs5535.c rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy); adev 114 drivers/ata/pata_cs5535.c wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg | 0x80000000UL, 0); adev 124 drivers/ata/pata_cs5535.c static void cs5535_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 133 drivers/ata/pata_cs5535.c int mode = adev->dma_mode; adev 135 drivers/ata/pata_cs5535.c rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy); adev 141 drivers/ata/pata_cs5535.c wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, 0); adev 108 drivers/ata/pata_cs5536.c static void cs5536_program_dtc(struct ata_device *adev, u8 tim) adev 110 drivers/ata/pata_cs5536.c struct pci_dev *pdev = to_pci_dev(adev->link->ap->host->dev); adev 111 drivers/ata/pata_cs5536.c int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT; adev 148 drivers/ata/pata_cs5536.c static void cs5536_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 163 drivers/ata/pata_cs5536.c struct ata_device *pair = ata_dev_pair(adev); adev 164 drivers/ata/pata_cs5536.c int mode = adev->pio_mode - XFER_PIO_0; adev 166 drivers/ata/pata_cs5536.c int cshift = adev->devno ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT; adev 172 drivers/ata/pata_cs5536.c cs5536_program_dtc(adev, drv_timings[mode]); adev 192 drivers/ata/pata_cs5536.c static void cs5536_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 204 drivers/ata/pata_cs5536.c int mode = adev->dma_mode; adev 205 drivers/ata/pata_cs5536.c int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT; adev 214 drivers/ata/pata_cs5536.c cs5536_program_dtc(adev, mwdma_timings[mode - XFER_MW_DMA_0]); adev 52 drivers/ata/pata_cypress.c static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 60 drivers/ata/pata_cypress.c if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) { adev 70 drivers/ata/pata_cypress.c if (adev->devno == 0) { adev 101 drivers/ata/pata_cypress.c static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 107 drivers/ata/pata_cypress.c outb(adev->dma_mode - XFER_MW_DMA_0, 0x23); adev 84 drivers/ata/pata_efar.c static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev) adev 86 drivers/ata/pata_efar.c unsigned int pio = adev->pio_mode - XFER_PIO_0; adev 108 drivers/ata/pata_efar.c if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */ adev 111 drivers/ata/pata_efar.c if (adev->class == ATA_DEV_ATA) adev 119 drivers/ata/pata_efar.c if (adev->devno == 0) { adev 142 drivers/ata/pata_efar.c udma_enable &= ~(1 << (2 * ap->port_no + adev->devno)); adev 158 drivers/ata/pata_efar.c static void efar_set_dmamode (struct ata_port *ap, struct ata_device *adev) adev 163 drivers/ata/pata_efar.c u8 speed = adev->dma_mode; adev 164 drivers/ata/pata_efar.c int devid = adev->devno + 2 * ap->port_no; adev 181 drivers/ata/pata_efar.c unsigned int udma = adev->dma_mode - XFER_UDMA_0; adev 197 drivers/ata/pata_efar.c unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0; adev 210 drivers/ata/pata_efar.c if (adev->pio_mode < needed_pio[mwdma]) adev 214 drivers/ata/pata_efar.c if (adev->devno) { /* Slave */ adev 331 drivers/ata/pata_ep93xx.c struct ata_device *adev) adev 334 drivers/ata/pata_ep93xx.c struct ata_device *pair = ata_dev_pair(adev); adev 344 drivers/ata/pata_ep93xx.c ata_timing_compute(adev, adev->pio_mode, &drv_data->t, T, 0); adev 351 drivers/ata/pata_ep93xx.c drv_data->iordy = ata_pio_need_iordy(adev); adev 354 drivers/ata/pata_ep93xx.c adev->pio_mode - XFER_PIO_0); adev 707 drivers/ata/pata_ep93xx.c struct ata_device *adev = qc->dev; adev 739 drivers/ata/pata_ep93xx.c ((adev->xfer_mode - XFER_UDMA_0) << IDECFG_MODE_SHIFT), adev 141 drivers/ata/pata_ftide010.c static void ftide010_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 144 drivers/ata/pata_ftide010.c u8 speed = adev->dma_mode; adev 145 drivers/ata/pata_ftide010.c u8 devno = adev->devno & 1; adev 215 drivers/ata/pata_ftide010.c ap->private_data = adev; adev 220 drivers/ata/pata_ftide010.c static void ftide010_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 223 drivers/ata/pata_ftide010.c u8 pio = adev->pio_mode - XFER_PIO_0; adev 226 drivers/ata/pata_ftide010.c adev->pio_mode, pio); adev 240 drivers/ata/pata_ftide010.c struct ata_device *adev = qc->dev; adev 247 drivers/ata/pata_ftide010.c if (adev != ap->private_data && ata_dma_enabled(adev)) adev 248 drivers/ata/pata_ftide010.c ftide010_set_dmamode(ap, adev); adev 199 drivers/ata/pata_hpt366.c static unsigned long hpt366_filter(struct ata_device *adev, unsigned long mask) adev 201 drivers/ata/pata_hpt366.c if (adev->class == ATA_DEV_ATA) { adev 202 drivers/ata/pata_hpt366.c if (hpt_dma_blacklisted(adev, "UDMA", bad_ata33)) adev 204 drivers/ata/pata_hpt366.c if (hpt_dma_blacklisted(adev, "UDMA3", bad_ata66_3)) adev 206 drivers/ata/pata_hpt366.c if (hpt_dma_blacklisted(adev, "UDMA4", bad_ata66_4)) adev 208 drivers/ata/pata_hpt366.c } else if (adev->class == ATA_DEV_ATAPI) adev 229 drivers/ata/pata_hpt366.c static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev, adev 233 drivers/ata/pata_hpt366.c u32 addr = 0x40 + 4 * adev->devno; adev 264 drivers/ata/pata_hpt366.c static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 266 drivers/ata/pata_hpt366.c hpt366_set_mode(ap, adev, adev->pio_mode); adev 278 drivers/ata/pata_hpt366.c static void hpt366_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 280 drivers/ata/pata_hpt366.c hpt366_set_mode(ap, adev, adev->dma_mode); adev 282 drivers/ata/pata_hpt37x.c static unsigned long hpt370_filter(struct ata_device *adev, unsigned long mask) adev 284 drivers/ata/pata_hpt37x.c if (adev->class == ATA_DEV_ATA) { adev 285 drivers/ata/pata_hpt37x.c if (hpt_dma_blacklisted(adev, "UDMA", bad_ata33)) adev 287 drivers/ata/pata_hpt37x.c if (hpt_dma_blacklisted(adev, "UDMA100", bad_ata100_5)) adev 300 drivers/ata/pata_hpt37x.c static unsigned long hpt370a_filter(struct ata_device *adev, unsigned long mask) adev 302 drivers/ata/pata_hpt37x.c if (adev->class == ATA_DEV_ATA) { adev 303 drivers/ata/pata_hpt37x.c if (hpt_dma_blacklisted(adev, "UDMA100", bad_ata100_5)) adev 317 drivers/ata/pata_hpt37x.c static unsigned long hpt372_filter(struct ata_device *adev, unsigned long mask) adev 319 drivers/ata/pata_hpt37x.c if (ata_id_is_sata(adev->id)) adev 408 drivers/ata/pata_hpt37x.c static void hpt370_set_mode(struct ata_port *ap, struct ata_device *adev, adev 416 drivers/ata/pata_hpt37x.c addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); adev 447 drivers/ata/pata_hpt37x.c static void hpt370_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 449 drivers/ata/pata_hpt37x.c hpt370_set_mode(ap, adev, adev->pio_mode); adev 460 drivers/ata/pata_hpt37x.c static void hpt370_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 462 drivers/ata/pata_hpt37x.c hpt370_set_mode(ap, adev, adev->dma_mode); adev 502 drivers/ata/pata_hpt37x.c static void hpt372_set_mode(struct ata_port *ap, struct ata_device *adev, adev 510 drivers/ata/pata_hpt37x.c addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); adev 541 drivers/ata/pata_hpt37x.c static void hpt372_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 543 drivers/ata/pata_hpt37x.c hpt372_set_mode(ap, adev, adev->pio_mode); adev 554 drivers/ata/pata_hpt37x.c static void hpt372_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 556 drivers/ata/pata_hpt37x.c hpt372_set_mode(ap, adev, adev->dma_mode); adev 125 drivers/ata/pata_hpt3x2n.c static unsigned long hpt372n_filter(struct ata_device *adev, unsigned long mask) adev 127 drivers/ata/pata_hpt3x2n.c if (ata_id_is_sata(adev->id)) adev 182 drivers/ata/pata_hpt3x2n.c static void hpt3x2n_set_mode(struct ata_port *ap, struct ata_device *adev, adev 190 drivers/ata/pata_hpt3x2n.c addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no); adev 221 drivers/ata/pata_hpt3x2n.c static void hpt3x2n_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 223 drivers/ata/pata_hpt3x2n.c hpt3x2n_set_mode(ap, adev, adev->pio_mode); adev 234 drivers/ata/pata_hpt3x2n.c static void hpt3x2n_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 236 drivers/ata/pata_hpt3x2n.c hpt3x2n_set_mode(ap, adev, adev->dma_mode); adev 37 drivers/ata/pata_hpt3x3.c static void hpt3x3_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 41 drivers/ata/pata_hpt3x3.c int dn = 2 * ap->port_no + adev->devno; adev 47 drivers/ata/pata_hpt3x3.c r1 |= (adev->pio_mode - XFER_PIO_0) << (3 * dn); adev 67 drivers/ata/pata_hpt3x3.c static void hpt3x3_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 71 drivers/ata/pata_hpt3x3.c int dn = 2 * ap->port_no + adev->devno; adev 72 drivers/ata/pata_hpt3x3.c int mode_num = adev->dma_mode & 0x0F; adev 81 drivers/ata/pata_hpt3x3.c if (adev->dma_mode >= XFER_UDMA_0) adev 188 drivers/ata/pata_icside.c static void pata_icside_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 198 drivers/ata/pata_icside.c if (ata_timing_compute(adev, adev->dma_mode, &t, 1000, 1)) adev 214 drivers/ata/pata_icside.c ata_dev_info(adev, "timings: act %dns rec %dns cyc %dns (%c)\n", adev 217 drivers/ata/pata_icside.c state->port[ap->port_no].speed[adev->devno] = cycle; adev 55 drivers/ata/pata_imx.c static void pata_imx_set_timing(struct ata_device *adev, adev 64 drivers/ata/pata_imx.c if (adev->pio_mode < XFER_PIO_0 || adev->pio_mode > XFER_PIO_4 || adev 69 drivers/ata/pata_imx.c ata_timing_compute(adev, adev->pio_mode, &timing, T * 1000, 0); adev 71 drivers/ata/pata_imx.c mode = adev->pio_mode - XFER_PIO_0; adev 85 drivers/ata/pata_imx.c static void pata_imx_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 90 drivers/ata/pata_imx.c pata_imx_set_timing(adev, priv); adev 93 drivers/ata/pata_imx.c if (ata_pio_need_iordy(adev)) adev 75 drivers/ata/pata_it8213.c static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev) adev 77 drivers/ata/pata_it8213.c unsigned int pio = adev->pio_mode - XFER_PIO_0; adev 97 drivers/ata/pata_it8213.c if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */ adev 100 drivers/ata/pata_it8213.c if (adev->class != ATA_DEV_ATA) adev 106 drivers/ata/pata_it8213.c if (adev->devno == 0) { adev 140 drivers/ata/pata_it8213.c static void it8213_set_dmamode (struct ata_port *ap, struct ata_device *adev) adev 144 drivers/ata/pata_it8213.c u8 speed = adev->dma_mode; adev 145 drivers/ata/pata_it8213.c int devid = adev->devno; adev 159 drivers/ata/pata_it8213.c unsigned int udma = adev->dma_mode - XFER_UDMA_0; adev 192 drivers/ata/pata_it8213.c unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0; adev 205 drivers/ata/pata_it8213.c if (adev->pio_mode < needed_pio[mwdma]) adev 126 drivers/ata/pata_it821x.c static void it821x_program(struct ata_port *ap, struct ata_device *adev, u16 timing) adev 154 drivers/ata/pata_it821x.c static void it821x_program_udma(struct ata_port *ap, struct ata_device *adev, u16 timing) adev 159 drivers/ata/pata_it821x.c int unit = adev->devno; adev 185 drivers/ata/pata_it821x.c static void it821x_clock_strategy(struct ata_port *ap, struct ata_device *adev) adev 189 drivers/ata/pata_it821x.c u8 unit = adev->devno; adev 190 drivers/ata/pata_it821x.c struct ata_device *pair = ata_dev_pair(adev); adev 241 drivers/ata/pata_it821x.c it821x_program_udma(ap, adev, itdev->udma[unit]); adev 242 drivers/ata/pata_it821x.c it821x_program(ap, adev, itdev->pio[unit]); adev 255 drivers/ata/pata_it821x.c static void it821x_passthru_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 262 drivers/ata/pata_it821x.c int unit = adev->devno; adev 263 drivers/ata/pata_it821x.c int mode_wanted = adev->pio_mode - XFER_PIO_0; adev 269 drivers/ata/pata_it821x.c it821x_clock_strategy(ap, adev); adev 270 drivers/ata/pata_it821x.c it821x_program(ap, adev, itdev->pio[unit]); adev 285 drivers/ata/pata_it821x.c static void it821x_passthru_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 295 drivers/ata/pata_it821x.c int unit = adev->devno; adev 298 drivers/ata/pata_it821x.c if (adev->dma_mode >= XFER_UDMA_0) { adev 299 drivers/ata/pata_it821x.c int mode_wanted = adev->dma_mode - XFER_UDMA_0; adev 315 drivers/ata/pata_it821x.c it821x_clock_strategy(ap, adev); adev 316 drivers/ata/pata_it821x.c it821x_program_udma(ap, adev, itdev->udma[unit]); adev 318 drivers/ata/pata_it821x.c int mode_wanted = adev->dma_mode - XFER_MW_DMA_0; adev 332 drivers/ata/pata_it821x.c it821x_clock_strategy(ap, adev); adev 348 drivers/ata/pata_it821x.c struct ata_device *adev = qc->dev; adev 350 drivers/ata/pata_it821x.c int unit = adev->devno; adev 353 drivers/ata/pata_it821x.c it821x_program(ap, adev, itdev->mwdma[unit]); adev 355 drivers/ata/pata_it821x.c it821x_program_udma(ap, adev, itdev->udma[unit]); adev 371 drivers/ata/pata_it821x.c struct ata_device *adev = qc->dev; adev 373 drivers/ata/pata_it821x.c int unit = adev->devno; adev 377 drivers/ata/pata_it821x.c it821x_program(ap, adev, itdev->pio[unit]); adev 394 drivers/ata/pata_it821x.c struct ata_device *adev = &ap->link.device[device]; adev 395 drivers/ata/pata_it821x.c it821x_program(ap, adev, itdev->pio[adev->devno]); adev 499 drivers/ata/pata_it821x.c static void it821x_dev_config(struct ata_device *adev) adev 503 drivers/ata/pata_it821x.c ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); adev 505 drivers/ata/pata_it821x.c if (adev->max_sectors > 255) adev 506 drivers/ata/pata_it821x.c adev->max_sectors = 255; adev 510 drivers/ata/pata_it821x.c ata_dev_info(adev, "%sRAID%d volume", adev 511 drivers/ata/pata_it821x.c adev->id[147] ? "Bootable " : "", adev 512 drivers/ata/pata_it821x.c adev->id[129]); adev 513 drivers/ata/pata_it821x.c if (adev->id[129] != 1) adev 514 drivers/ata/pata_it821x.c pr_cont("(%dK stripe)", adev->id[146]); adev 519 drivers/ata/pata_it821x.c adev->horkage &= ~ATA_HORKAGE_DIAGNOSTIC; adev 521 drivers/ata/pata_it821x.c adev->horkage |= ATA_HORKAGE_BROKEN_HPA; adev 536 drivers/ata/pata_it821x.c static unsigned int it821x_read_id(struct ata_device *adev, adev 542 drivers/ata/pata_it821x.c err_mask = ata_do_dev_read_id(adev, tf, id); adev 253 drivers/ata/pata_legacy.c static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 256 drivers/ata/pata_legacy.c int pio = adev->pio_mode - XFER_PIO_0; adev 281 drivers/ata/pata_legacy.c rt &= 0x07 << (3 * adev->devno); adev 283 drivers/ata/pata_legacy.c rt |= (1 + 3 * pio) << (3 * adev->devno); adev 348 drivers/ata/pata_legacy.c static void ht6560a_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 354 drivers/ata/pata_legacy.c ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000); adev 382 drivers/ata/pata_legacy.c static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 388 drivers/ata/pata_legacy.c ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000); adev 400 drivers/ata/pata_legacy.c if (adev->class != ATA_DEV_ATA) { adev 446 drivers/ata/pata_legacy.c struct ata_device *adev) adev 450 drivers/ata/pata_legacy.c struct ata_device *pair = ata_dev_pair(adev); adev 464 drivers/ata/pata_legacy.c ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000); adev 481 drivers/ata/pata_legacy.c rc |= (adev->devno << 7); adev 491 drivers/ata/pata_legacy.c rc |= adev->devno; /* Index select */ adev 521 drivers/ata/pata_legacy.c static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 525 drivers/ata/pata_legacy.c struct ata_device *pair = ata_dev_pair(adev); adev 543 drivers/ata/pata_legacy.c ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000); adev 560 drivers/ata/pata_legacy.c rc |= (adev->devno << 7); adev 570 drivers/ata/pata_legacy.c rc |= adev->devno; /* Index select */ adev 608 drivers/ata/pata_legacy.c struct ata_device *adev = qc->dev; adev 614 drivers/ata/pata_legacy.c opti82c46x_set_piomode(ap, adev); adev 638 drivers/ata/pata_legacy.c static void qdi65x0_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 646 drivers/ata/pata_legacy.c ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); adev 656 drivers/ata/pata_legacy.c ld_qdi->clock[adev->devno] = timing; adev 659 drivers/ata/pata_legacy.c outb(timing, ld_qdi->timing + 2 * adev->devno); adev 664 drivers/ata/pata_legacy.c if (ld_qdi->type != QDI6500 && adev->class != ATA_DEV_ATA) adev 679 drivers/ata/pata_legacy.c struct ata_device *adev = qc->dev; adev 682 drivers/ata/pata_legacy.c if (ld_qdi->clock[adev->devno] != ld_qdi->last) { adev 683 drivers/ata/pata_legacy.c if (adev->pio_mode) { adev 684 drivers/ata/pata_legacy.c ld_qdi->last = ld_qdi->clock[adev->devno]; adev 685 drivers/ata/pata_legacy.c outb(ld_qdi->clock[adev->devno], ld_qdi->timing + adev 696 drivers/ata/pata_legacy.c struct ata_device *adev = qc->dev; adev 697 drivers/ata/pata_legacy.c struct ata_port *ap = adev->link->ap; adev 700 drivers/ata/pata_legacy.c if (ata_id_has_dword_io(adev->id) && (slop == 0 || slop == 3) adev 775 drivers/ata/pata_legacy.c static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 781 drivers/ata/pata_legacy.c int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2); adev 787 drivers/ata/pata_legacy.c ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000); adev 789 drivers/ata/pata_legacy.c ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); adev 799 drivers/ata/pata_legacy.c if (adev->class != ATA_DEV_ATA) adev 801 drivers/ata/pata_legacy.c if (!ata_pio_need_iordy(adev)) adev 392 drivers/ata/pata_macio.c struct ata_device *adev) adev 398 drivers/ata/pata_macio.c adev->devno, adev 399 drivers/ata/pata_macio.c adev->pio_mode, adev 400 drivers/ata/pata_macio.c ata_mode_string(ata_xfer_mode2mask(adev->pio_mode)), adev 401 drivers/ata/pata_macio.c adev->dma_mode, adev 402 drivers/ata/pata_macio.c ata_mode_string(ata_xfer_mode2mask(adev->dma_mode))); adev 405 drivers/ata/pata_macio.c priv->treg[adev->devno][0] = priv->treg[adev->devno][1] = 0; adev 408 drivers/ata/pata_macio.c t = pata_macio_find_timing(priv, adev->pio_mode); adev 411 drivers/ata/pata_macio.c adev->pio_mode); adev 417 drivers/ata/pata_macio.c priv->treg[adev->devno][0] |= t->reg1; adev 420 drivers/ata/pata_macio.c t = pata_macio_find_timing(priv, adev->dma_mode); adev 428 drivers/ata/pata_macio.c priv->treg[adev->devno][0] |= t->reg1; adev 429 drivers/ata/pata_macio.c priv->treg[adev->devno][1] |= t->reg2; adev 432 drivers/ata/pata_macio.c priv->treg[adev->devno][0], adev 433 drivers/ata/pata_macio.c priv->treg[adev->devno][1]); adev 436 drivers/ata/pata_macio.c pata_macio_apply_timings(ap, adev->devno); adev 390 drivers/ata/pata_mpc52xx.c mpc52xx_ata_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 395 drivers/ata/pata_mpc52xx.c pio = adev->pio_mode - XFER_PIO_0; adev 397 drivers/ata/pata_mpc52xx.c rv = mpc52xx_ata_compute_pio_timings(priv, adev->devno, pio); adev 404 drivers/ata/pata_mpc52xx.c mpc52xx_ata_apply_timings(priv, adev->devno); adev 408 drivers/ata/pata_mpc52xx.c mpc52xx_ata_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 413 drivers/ata/pata_mpc52xx.c if (adev->dma_mode >= XFER_UDMA_0) { adev 414 drivers/ata/pata_mpc52xx.c int dma = adev->dma_mode - XFER_UDMA_0; adev 415 drivers/ata/pata_mpc52xx.c rv = mpc52xx_ata_compute_udma_timings(priv, adev->devno, dma); adev 417 drivers/ata/pata_mpc52xx.c int dma = adev->dma_mode - XFER_MW_DMA_0; adev 418 drivers/ata/pata_mpc52xx.c rv = mpc52xx_ata_compute_mdma_timings(priv, adev->devno, dma); adev 424 drivers/ata/pata_mpc52xx.c adev->dma_mode); adev 428 drivers/ata/pata_mpc52xx.c mpc52xx_ata_apply_timings(priv, adev->devno); adev 76 drivers/ata/pata_mpiix.c static void mpiix_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 79 drivers/ata/pata_mpiix.c int pio = adev->pio_mode - XFER_PIO_0; adev 92 drivers/ata/pata_mpiix.c if (adev->class == ATA_DEV_ATA) adev 94 drivers/ata/pata_mpiix.c if (ata_pio_need_iordy(adev)) adev 101 drivers/ata/pata_mpiix.c idetim &= ~(0x07 << (4 * adev->devno)); adev 102 drivers/ata/pata_mpiix.c idetim |= control << (4 * adev->devno); adev 109 drivers/ata/pata_mpiix.c ap->private_data = adev; adev 126 drivers/ata/pata_mpiix.c struct ata_device *adev = qc->dev; adev 133 drivers/ata/pata_mpiix.c if (adev->pio_mode && adev != ap->private_data) adev 134 drivers/ata/pata_mpiix.c mpiix_set_piomode(ap, adev); adev 23 drivers/ata/pata_netcell.c static unsigned int netcell_read_id(struct ata_device *adev, adev 26 drivers/ata/pata_netcell.c unsigned int err_mask = ata_do_dev_read_id(adev, tf, id); adev 59 drivers/ata/pata_ninja32.c static void ninja32_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 64 drivers/ata/pata_ninja32.c iowrite8(pio_timing[adev->pio_mode - XFER_PIO_0], adev 66 drivers/ata/pata_ninja32.c ap->private_data = adev; adev 72 drivers/ata/pata_ninja32.c struct ata_device *adev = &ap->link.device[device]; adev 73 drivers/ata/pata_ninja32.c if (ap->private_data != adev) { adev 76 drivers/ata/pata_ninja32.c ninja32_set_piomode(ap, adev); adev 50 drivers/ata/pata_ns87410.c static void ns87410_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 69 drivers/ata/pata_ns87410.c if (ata_pio_need_iordy(adev)) adev 74 drivers/ata/pata_ns87410.c if (ata_timing_compute(adev, adev->pio_mode, &at, 30303, 1) < 0) { adev 75 drivers/ata/pata_ns87410.c dev_err(&pdev->dev, "unknown mode %d\n", adev->pio_mode); adev 89 drivers/ata/pata_ns87410.c ap->private_data = adev; adev 104 drivers/ata/pata_ns87410.c struct ata_device *adev = qc->dev; adev 111 drivers/ata/pata_ns87410.c if (adev->pio_mode && adev != ap->private_data) adev 112 drivers/ata/pata_ns87410.c ns87410_set_piomode(ap, adev); adev 53 drivers/ata/pata_ns87415.c static void ns87415_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mode) adev 56 drivers/ata/pata_ns87415.c int unit = 2 * ap->port_no + adev->devno; adev 67 drivers/ata/pata_ns87415.c ata_timing_compute(adev, adev->pio_mode, &t, T, 0); adev 78 drivers/ata/pata_ns87415.c if (mode >= XFER_MW_DMA_0 || !ata_pio_need_iordy(adev)) adev 108 drivers/ata/pata_ns87415.c static void ns87415_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 110 drivers/ata/pata_ns87415.c ns87415_set_mode(ap, adev, adev->pio_mode); adev 64 drivers/ata/pata_oldpiix.c static void oldpiix_set_piomode (struct ata_port *ap, struct ata_device *adev) adev 66 drivers/ata/pata_oldpiix.c unsigned int pio = adev->pio_mode - XFER_PIO_0; adev 87 drivers/ata/pata_oldpiix.c if (ata_pio_need_iordy(adev)) adev 91 drivers/ata/pata_oldpiix.c if (adev->class == ATA_DEV_ATA) adev 100 drivers/ata/pata_oldpiix.c if (adev->devno == 0) { adev 112 drivers/ata/pata_oldpiix.c ap->private_data = adev; adev 126 drivers/ata/pata_oldpiix.c static void oldpiix_set_dmamode (struct ata_port *ap, struct ata_device *adev) adev 145 drivers/ata/pata_oldpiix.c unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0; adev 156 drivers/ata/pata_oldpiix.c if (adev->class == ATA_DEV_ATA) adev 162 drivers/ata/pata_oldpiix.c if (adev->pio_mode < needed_pio[mwdma]) adev 168 drivers/ata/pata_oldpiix.c if (adev->devno == 0) { adev 179 drivers/ata/pata_oldpiix.c ap->private_data = adev; adev 196 drivers/ata/pata_oldpiix.c struct ata_device *adev = qc->dev; adev 198 drivers/ata/pata_oldpiix.c if (adev != ap->private_data) { adev 199 drivers/ata/pata_oldpiix.c oldpiix_set_piomode(ap, adev); adev 200 drivers/ata/pata_oldpiix.c if (ata_dma_enabled(adev)) adev 201 drivers/ata/pata_oldpiix.c oldpiix_set_dmamode(ap, adev); adev 107 drivers/ata/pata_opti.c static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 109 drivers/ata/pata_opti.c struct ata_device *pair = ata_dev_pair(adev); adev 111 drivers/ata/pata_opti.c int pio = adev->pio_mode - XFER_PIO_0; adev 142 drivers/ata/pata_opti.c opti_write_reg(ap, adev->devno, MISC_REG); adev 116 drivers/ata/pata_optidma.c static void optidma_mode_setup(struct ata_port *ap, struct ata_device *adev, u8 mode) adev 118 drivers/ata/pata_optidma.c struct ata_device *pair = ata_dev_pair(adev); adev 119 drivers/ata/pata_optidma.c int pio = adev->pio_mode - XFER_PIO_0; adev 120 drivers/ata/pata_optidma.c int dma = adev->dma_mode - XFER_MW_DMA_0; adev 166 drivers/ata/pata_optidma.c iowrite8(adev->devno, regio + MISC_REG); adev 176 drivers/ata/pata_optidma.c iowrite8(addr | adev->devno, regio + MISC_REG); adev 201 drivers/ata/pata_optidma.c static void optiplus_mode_setup(struct ata_port *ap, struct ata_device *adev, u8 mode) adev 206 drivers/ata/pata_optidma.c int dev2 = 2 * adev->devno; adev 207 drivers/ata/pata_optidma.c int unit = 2 * ap->port_no + adev->devno; adev 213 drivers/ata/pata_optidma.c optidma_mode_setup(ap, adev, adev->dma_mode); adev 239 drivers/ata/pata_optidma.c static void optidma_set_pio_mode(struct ata_port *ap, struct ata_device *adev) adev 241 drivers/ata/pata_optidma.c optidma_mode_setup(ap, adev, adev->pio_mode); adev 254 drivers/ata/pata_optidma.c static void optidma_set_dma_mode(struct ata_port *ap, struct ata_device *adev) adev 256 drivers/ata/pata_optidma.c optidma_mode_setup(ap, adev, adev->dma_mode); adev 269 drivers/ata/pata_optidma.c static void optiplus_set_pio_mode(struct ata_port *ap, struct ata_device *adev) adev 271 drivers/ata/pata_optidma.c optiplus_mode_setup(ap, adev, adev->pio_mode); adev 284 drivers/ata/pata_optidma.c static void optiplus_set_dma_mode(struct ata_port *ap, struct ata_device *adev) adev 286 drivers/ata/pata_optidma.c optiplus_mode_setup(ap, adev, adev->dma_mode); adev 297 drivers/ata/pata_optidma.c static u8 optidma_make_bits43(struct ata_device *adev) adev 302 drivers/ata/pata_optidma.c if (!ata_dev_enabled(adev)) adev 304 drivers/ata/pata_optidma.c if (adev->dma_mode) adev 305 drivers/ata/pata_optidma.c return adev->dma_mode - XFER_MW_DMA_0; adev 306 drivers/ata/pata_optidma.c return bits43[adev->pio_mode - XFER_PIO_0]; adev 64 drivers/ata/pata_pdc2027x.c static void pdc2027x_set_piomode(struct ata_port *ap, struct ata_device *adev); adev 65 drivers/ata/pata_pdc2027x.c static void pdc2027x_set_dmamode(struct ata_port *ap, struct ata_device *adev); adev 67 drivers/ata/pata_pdc2027x.c static unsigned long pdc2027x_mode_filter(struct ata_device *adev, unsigned long mask); adev 192 drivers/ata/pata_pdc2027x.c static inline void __iomem *dev_mmio(struct ata_port *ap, struct ata_device *adev, unsigned int offset) adev 194 drivers/ata/pata_pdc2027x.c u8 adj = (adev->devno) ? 0x08 : 0x00; adev 261 drivers/ata/pata_pdc2027x.c static unsigned long pdc2027x_mode_filter(struct ata_device *adev, unsigned long mask) adev 264 drivers/ata/pata_pdc2027x.c struct ata_device *pair = ata_dev_pair(adev); adev 266 drivers/ata/pata_pdc2027x.c if (adev->class != ATA_DEV_ATA || adev->devno == 0 || pair == NULL) adev 290 drivers/ata/pata_pdc2027x.c static void pdc2027x_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 292 drivers/ata/pata_pdc2027x.c unsigned int pio = adev->pio_mode - XFER_PIO_0; adev 295 drivers/ata/pata_pdc2027x.c PDPRINTK("adev->pio_mode[%X]\n", adev->pio_mode); adev 307 drivers/ata/pata_pdc2027x.c ctcr0 = ioread32(dev_mmio(ap, adev, PDC_CTCR0)); adev 311 drivers/ata/pata_pdc2027x.c iowrite32(ctcr0, dev_mmio(ap, adev, PDC_CTCR0)); adev 313 drivers/ata/pata_pdc2027x.c ctcr1 = ioread32(dev_mmio(ap, adev, PDC_CTCR1)); adev 316 drivers/ata/pata_pdc2027x.c iowrite32(ctcr1, dev_mmio(ap, adev, PDC_CTCR1)); adev 333 drivers/ata/pata_pdc2027x.c static void pdc2027x_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 335 drivers/ata/pata_pdc2027x.c unsigned int dma_mode = adev->dma_mode; adev 349 drivers/ata/pata_pdc2027x.c ctcr1 = ioread32(dev_mmio(ap, adev, PDC_CTCR1)); adev 350 drivers/ata/pata_pdc2027x.c iowrite32(ctcr1 & ~(1 << 7), dev_mmio(ap, adev, PDC_CTCR1)); adev 355 drivers/ata/pata_pdc2027x.c ctcr1 = ioread32(dev_mmio(ap, adev, PDC_CTCR1)); adev 360 drivers/ata/pata_pdc2027x.c iowrite32(ctcr1, dev_mmio(ap, adev, PDC_CTCR1)); adev 372 drivers/ata/pata_pdc2027x.c ctcr0 = ioread32(dev_mmio(ap, adev, PDC_CTCR0)); adev 378 drivers/ata/pata_pdc2027x.c iowrite32(ctcr0, dev_mmio(ap, adev, PDC_CTCR0)); adev 79 drivers/ata/pata_pdc202xx_old.c static void pdc202xx_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio) adev 82 drivers/ata/pata_pdc202xx_old.c int port = 0x60 + 8 * ap->port_no + 4 * adev->devno; adev 95 drivers/ata/pata_pdc202xx_old.c if (ata_pio_need_iordy(adev)) adev 97 drivers/ata/pata_pdc202xx_old.c if (adev->class == ATA_DEV_ATA) adev 112 drivers/ata/pata_pdc202xx_old.c static void pdc202xx_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 114 drivers/ata/pata_pdc202xx_old.c pdc202xx_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); adev 126 drivers/ata/pata_pdc202xx_old.c static void pdc202xx_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 129 drivers/ata/pata_pdc202xx_old.c int port = 0x60 + 8 * ap->port_no + 4 * adev->devno; adev 151 drivers/ata/pata_pdc202xx_old.c if (adev->dma_mode >= XFER_UDMA_0) { adev 152 drivers/ata/pata_pdc202xx_old.c int speed = adev->dma_mode - XFER_UDMA_0; adev 157 drivers/ata/pata_pdc202xx_old.c int speed = adev->dma_mode - XFER_MW_DMA_0; adev 180 drivers/ata/pata_pdc202xx_old.c struct ata_device *adev = qc->dev; adev 191 drivers/ata/pata_pdc202xx_old.c if (adev->dma_mode > XFER_UDMA_2) adev 230 drivers/ata/pata_pdc202xx_old.c struct ata_device *adev = qc->dev; adev 245 drivers/ata/pata_pdc202xx_old.c if (adev->dma_mode > XFER_UDMA_2) adev 248 drivers/ata/pata_pdc202xx_old.c pdc202xx_set_piomode(ap, adev); adev 260 drivers/ata/pata_pdc202xx_old.c static void pdc2026x_dev_config(struct ata_device *adev) adev 262 drivers/ata/pata_pdc202xx_old.c adev->max_sectors = 256; adev 31 drivers/ata/pata_piccolo.c static void tosh_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 40 drivers/ata/pata_piccolo.c conf |= pio[adev->pio_mode - XFER_PIO_0]; adev 44 drivers/ata/pata_piccolo.c static void tosh_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 50 drivers/ata/pata_piccolo.c if (adev->dma_mode >= XFER_UDMA_0) { adev 51 drivers/ata/pata_piccolo.c int udma = adev->dma_mode - XFER_UDMA_0; adev 59 drivers/ata/pata_piccolo.c conf |= mwdma[adev->dma_mode - XFER_MW_DMA_0]; adev 40 drivers/ata/pata_radisys.c static void radisys_set_piomode (struct ata_port *ap, struct ata_device *adev) adev 42 drivers/ata/pata_radisys.c unsigned int pio = adev->pio_mode - XFER_PIO_0; adev 63 drivers/ata/pata_radisys.c if (ata_pio_need_iordy(adev)) adev 71 drivers/ata/pata_radisys.c idetm_data |= (control << (4 * adev->devno)); adev 77 drivers/ata/pata_radisys.c ap->private_data = adev; adev 91 drivers/ata/pata_radisys.c static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev) adev 112 drivers/ata/pata_radisys.c if (adev->dma_mode < XFER_UDMA_0) { adev 113 drivers/ata/pata_radisys.c unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0; adev 123 drivers/ata/pata_radisys.c if (adev->pio_mode < needed_pio[mwdma]) adev 130 drivers/ata/pata_radisys.c idetm_data |= control << (4 * adev->devno); adev 133 drivers/ata/pata_radisys.c udma_enable &= ~(1 << adev->devno); adev 141 drivers/ata/pata_radisys.c if (adev->xfer_mode == XFER_UDMA_2) adev 142 drivers/ata/pata_radisys.c udma_mode &= ~(2 << (adev->devno * 4)); adev 144 drivers/ata/pata_radisys.c udma_mode |= (2 << (adev->devno * 4)); adev 148 drivers/ata/pata_radisys.c udma_enable |= (1 << adev->devno); adev 154 drivers/ata/pata_radisys.c ap->private_data = adev; adev 171 drivers/ata/pata_radisys.c struct ata_device *adev = qc->dev; adev 173 drivers/ata/pata_radisys.c if (adev != ap->private_data) { adev 175 drivers/ata/pata_radisys.c if (adev->dma_mode < XFER_UDMA_0) { adev 176 drivers/ata/pata_radisys.c if (adev->dma_mode) adev 177 drivers/ata/pata_radisys.c radisys_set_dmamode(ap, adev); adev 178 drivers/ata/pata_radisys.c else if (adev->pio_mode) adev 179 drivers/ata/pata_radisys.c radisys_set_piomode(ap, adev); adev 88 drivers/ata/pata_rdc.c static void rdc_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 90 drivers/ata/pata_rdc.c unsigned int pio = adev->pio_mode - XFER_PIO_0; adev 93 drivers/ata/pata_rdc.c unsigned int is_slave = (adev->devno != 0); adev 110 drivers/ata/pata_rdc.c if (ata_pio_need_iordy(adev)) adev 113 drivers/ata/pata_rdc.c if (adev->class == ATA_DEV_ATA) adev 153 drivers/ata/pata_rdc.c udma_enable &= ~(1 << (2 * ap->port_no + adev->devno)); adev 170 drivers/ata/pata_rdc.c static void rdc_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 176 drivers/ata/pata_rdc.c u8 speed = adev->dma_mode; adev 177 drivers/ata/pata_rdc.c int devid = adev->devno + 2 * ap->port_no; adev 193 drivers/ata/pata_rdc.c unsigned int udma = adev->dma_mode - XFER_UDMA_0; adev 232 drivers/ata/pata_rdc.c unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0; adev 245 drivers/ata/pata_rdc.c if (adev->pio_mode < needed_pio[mwdma]) adev 249 drivers/ata/pata_rdc.c if (adev->devno) { /* Slave */ adev 103 drivers/ata/pata_samsung_cf.c static void pata_s3c_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 112 drivers/ata/pata_samsung_cf.c if (ata_pio_need_iordy(adev)) adev 119 drivers/ata/pata_samsung_cf.c ata_timing_compute(adev, adev->pio_mode, &timing, adev 72 drivers/ata/pata_sc1200.c static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 88 drivers/ata/pata_sc1200.c int mode = adev->pio_mode - XFER_PIO_0; adev 93 drivers/ata/pata_sc1200.c pci_write_config_dword(pdev, reg + 8 * adev->devno, adev 106 drivers/ata/pata_sc1200.c static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 123 drivers/ata/pata_sc1200.c int mode = adev->dma_mode; adev 131 drivers/ata/pata_sc1200.c if (adev->devno == 0) { adev 155 drivers/ata/pata_sc1200.c struct ata_device *adev = qc->dev; adev 159 drivers/ata/pata_sc1200.c if (ata_dma_enabled(adev) && adev != prev && prev != NULL) { adev 161 drivers/ata/pata_sc1200.c if ((ata_using_udma(adev) && !ata_using_udma(prev)) || adev 162 drivers/ata/pata_sc1200.c (ata_using_udma(prev) && !ata_using_udma(adev))) adev 164 drivers/ata/pata_sc1200.c sc1200_set_dmamode(ap, adev); adev 40 drivers/ata/pata_sch.c static void sch_set_piomode(struct ata_port *ap, struct ata_device *adev); adev 41 drivers/ata/pata_sch.c static void sch_set_dmamode(struct ata_port *ap, struct ata_device *adev); adev 96 drivers/ata/pata_sch.c static void sch_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 98 drivers/ata/pata_sch.c unsigned int pio = adev->pio_mode - XFER_PIO_0; adev 100 drivers/ata/pata_sch.c unsigned int port = adev->devno ? D1TIM : D0TIM; adev 109 drivers/ata/pata_sch.c if (adev->class == ATA_DEV_ATA) adev 125 drivers/ata/pata_sch.c static void sch_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 127 drivers/ata/pata_sch.c unsigned int dma_mode = adev->dma_mode; adev 129 drivers/ata/pata_sch.c unsigned int port = adev->devno ? D1TIM : D0TIM; adev 153 drivers/ata/pata_serverworks.c static unsigned long serverworks_osb4_filter(struct ata_device *adev, unsigned long mask) adev 155 drivers/ata/pata_serverworks.c if (adev->class == ATA_DEV_ATA) adev 169 drivers/ata/pata_serverworks.c static unsigned long serverworks_csb_filter(struct ata_device *adev, unsigned long mask) adev 176 drivers/ata/pata_serverworks.c if (adev->class != ATA_DEV_ATA) adev 180 drivers/ata/pata_serverworks.c ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); adev 197 drivers/ata/pata_serverworks.c static void serverworks_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 200 drivers/ata/pata_serverworks.c int offset = 1 + 2 * ap->port_no - adev->devno; adev 201 drivers/ata/pata_serverworks.c int devbits = (2 * ap->port_no + adev->devno) * 4; adev 204 drivers/ata/pata_serverworks.c int pio = adev->pio_mode - XFER_PIO_0; adev 227 drivers/ata/pata_serverworks.c static void serverworks_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 230 drivers/ata/pata_serverworks.c int offset = 1 + 2 * ap->port_no - adev->devno; adev 231 drivers/ata/pata_serverworks.c int devbits = 2 * ap->port_no + adev->devno; adev 238 drivers/ata/pata_serverworks.c ultra &= ~(0x0F << (adev->devno * 4)); adev 240 drivers/ata/pata_serverworks.c if (adev->dma_mode >= XFER_UDMA_0) { adev 243 drivers/ata/pata_serverworks.c ultra |= (adev->dma_mode - XFER_UDMA_0) adev 244 drivers/ata/pata_serverworks.c << (adev->devno * 4); adev 248 drivers/ata/pata_serverworks.c dma_mode[adev->dma_mode - XFER_MW_DMA_0]); adev 67 drivers/ata/pata_sil680.c static unsigned long sil680_seldev(struct ata_port *ap, struct ata_device *adev, int r) adev 71 drivers/ata/pata_sil680.c base |= adev->devno ? 2 : 0; adev 106 drivers/ata/pata_sil680.c static void sil680_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 116 drivers/ata/pata_sil680.c unsigned long addr = sil680_seldev(ap, adev, 0x04); adev 119 drivers/ata/pata_sil680.c int pio = adev->pio_mode - XFER_PIO_0; adev 121 drivers/ata/pata_sil680.c int port_shift = 4 * adev->devno; adev 125 drivers/ata/pata_sil680.c struct ata_device *pair = ata_dev_pair(adev); adev 127 drivers/ata/pata_sil680.c if (pair != NULL && adev->pio_mode > pair->pio_mode) adev 139 drivers/ata/pata_sil680.c if (ata_pio_need_iordy(adev)) { adev 158 drivers/ata/pata_sil680.c static void sil680_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 167 drivers/ata/pata_sil680.c unsigned long ma = sil680_seldev(ap, adev, 0x08); adev 168 drivers/ata/pata_sil680.c unsigned long ua = sil680_seldev(ap, adev, 0x0C); adev 170 drivers/ata/pata_sil680.c int port_shift = adev->devno * 4; adev 186 drivers/ata/pata_sil680.c if (adev->dma_mode >= XFER_UDMA_0) { adev 188 drivers/ata/pata_sil680.c ultra |= ultra_table[scsc][adev->dma_mode - XFER_UDMA_0]; adev 191 drivers/ata/pata_sil680.c multi = dma_table[adev->dma_mode - XFER_MW_DMA_0]; adev 86 drivers/ata/pata_sis.c static int sis_old_port_base(struct ata_device *adev) adev 88 drivers/ata/pata_sis.c return 0x40 + (4 * adev->link->ap->port_no) + (2 * adev->devno); adev 99 drivers/ata/pata_sis.c static int sis_port_base(struct ata_device *adev) adev 101 drivers/ata/pata_sis.c struct ata_port *ap = adev->link->ap; adev 111 drivers/ata/pata_sis.c return port + (8 * ap->port_no) + (4 * adev->devno); adev 195 drivers/ata/pata_sis.c static void sis_set_fifo(struct ata_port *ap, struct ata_device *adev) adev 202 drivers/ata/pata_sis.c mask <<= adev->devno; adev 209 drivers/ata/pata_sis.c if (adev->class == ATA_DEV_ATA) adev 227 drivers/ata/pata_sis.c static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev) adev 230 drivers/ata/pata_sis.c int port = sis_old_port_base(adev); adev 232 drivers/ata/pata_sis.c int speed = adev->pio_mode - XFER_PIO_0; adev 237 drivers/ata/pata_sis.c sis_set_fifo(ap, adev); adev 264 drivers/ata/pata_sis.c static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev) adev 267 drivers/ata/pata_sis.c int port = sis_old_port_base(adev); adev 268 drivers/ata/pata_sis.c int speed = adev->pio_mode - XFER_PIO_0; adev 272 drivers/ata/pata_sis.c sis_set_fifo(ap, adev); adev 289 drivers/ata/pata_sis.c static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev) adev 294 drivers/ata/pata_sis.c int speed = adev->pio_mode - XFER_PIO_0; adev 311 drivers/ata/pata_sis.c sis_set_fifo(ap, adev); adev 313 drivers/ata/pata_sis.c port = sis_port_base(adev); adev 337 drivers/ata/pata_sis.c static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev) adev 340 drivers/ata/pata_sis.c int speed = adev->dma_mode - XFER_MW_DMA_0; adev 341 drivers/ata/pata_sis.c int drive_pci = sis_old_port_base(adev); adev 349 drivers/ata/pata_sis.c if (adev->dma_mode < XFER_UDMA_0) { adev 356 drivers/ata/pata_sis.c speed = adev->dma_mode - XFER_UDMA_0; adev 376 drivers/ata/pata_sis.c static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev) adev 379 drivers/ata/pata_sis.c int speed = adev->dma_mode - XFER_MW_DMA_0; adev 380 drivers/ata/pata_sis.c int drive_pci = sis_old_port_base(adev); adev 389 drivers/ata/pata_sis.c if (adev->dma_mode < XFER_UDMA_0) { adev 396 drivers/ata/pata_sis.c speed = adev->dma_mode - XFER_UDMA_0; adev 415 drivers/ata/pata_sis.c static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev) adev 418 drivers/ata/pata_sis.c int speed = adev->dma_mode - XFER_MW_DMA_0; adev 419 drivers/ata/pata_sis.c int drive_pci = sis_old_port_base(adev); adev 426 drivers/ata/pata_sis.c if (adev->dma_mode < XFER_UDMA_0) { adev 430 drivers/ata/pata_sis.c speed = adev->dma_mode - XFER_UDMA_0; adev 449 drivers/ata/pata_sis.c static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *adev) adev 452 drivers/ata/pata_sis.c int speed = adev->dma_mode - XFER_MW_DMA_0; adev 453 drivers/ata/pata_sis.c int drive_pci = sis_old_port_base(adev); adev 460 drivers/ata/pata_sis.c if (adev->dma_mode < XFER_UDMA_0) { adev 464 drivers/ata/pata_sis.c speed = adev->dma_mode - XFER_UDMA_0; adev 482 drivers/ata/pata_sis.c static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev) adev 488 drivers/ata/pata_sis.c port = sis_port_base(adev); adev 491 drivers/ata/pata_sis.c if (adev->dma_mode < XFER_UDMA_0) { adev 495 drivers/ata/pata_sis.c int speed = adev->dma_mode - XFER_MW_DMA_0; adev 508 drivers/ata/pata_sis.c int speed = adev->dma_mode - XFER_UDMA_0; adev 528 drivers/ata/pata_sis.c static unsigned long sis_133_mode_filter(struct ata_device *adev, unsigned long mask) adev 530 drivers/ata/pata_sis.c struct ata_port *ap = adev->link->ap; adev 532 drivers/ata/pata_sis.c int port = sis_port_base(adev); adev 78 drivers/ata/pata_sl82c105.c static void sl82c105_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio) adev 85 drivers/ata/pata_sl82c105.c int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno); adev 101 drivers/ata/pata_sl82c105.c static void sl82c105_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 103 drivers/ata/pata_sl82c105.c sl82c105_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); adev 115 drivers/ata/pata_sl82c105.c static void sl82c105_configure_dmamode(struct ata_port *ap, struct ata_device *adev) adev 122 drivers/ata/pata_sl82c105.c int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno); adev 123 drivers/ata/pata_sl82c105.c int dma = adev->dma_mode - XFER_MW_DMA_0; adev 73 drivers/ata/pata_triflex.c static void triflex_load_timing(struct ata_port *ap, struct ata_device *adev, int speed) adev 79 drivers/ata/pata_triflex.c unsigned int is_slave = (adev->devno != 0); adev 126 drivers/ata/pata_triflex.c static void triflex_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 128 drivers/ata/pata_triflex.c triflex_load_timing(ap, adev, adev->pio_mode); adev 245 drivers/ata/pata_via.c static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, adev 249 drivers/ata/pata_via.c struct ata_device *peer = ata_dev_pair(adev); adev 255 drivers/ata/pata_via.c int offset = 3 - (2*ap->port_no) - adev->devno; adev 267 drivers/ata/pata_via.c ata_timing_compute(adev, mode, &t, T, UT); adev 330 drivers/ata/pata_via.c static void via_set_piomode(struct ata_port *ap, struct ata_device *adev) adev 335 drivers/ata/pata_via.c via_do_set_mode(ap, adev, adev->pio_mode, set_ast, config->udma_mask); adev 338 drivers/ata/pata_via.c static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev) adev 343 drivers/ata/pata_via.c via_do_set_mode(ap, adev, adev->dma_mode, set_ast, config->udma_mask); adev 1405 drivers/ata/sata_mv.c static void mv6_dev_config(struct ata_device *adev) adev 1413 drivers/ata/sata_mv.c if (adev->flags & ATA_DFLAG_NCQ) { adev 1414 drivers/ata/sata_mv.c if (sata_pmp_attached(adev->link->ap)) { adev 1415 drivers/ata/sata_mv.c adev->flags &= ~ATA_DFLAG_NCQ; adev 1416 drivers/ata/sata_mv.c ata_dev_info(adev, adev 82 drivers/ata/sata_via.c static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev); adev 83 drivers/ata/sata_via.c static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev); adev 402 drivers/ata/sata_via.c static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev) adev 406 drivers/ata/sata_via.c pci_write_config_byte(pdev, PATA_PIO_TIMING - adev->devno, adev 407 drivers/ata/sata_via.c pio_bits[adev->pio_mode - XFER_PIO_0]); adev 410 drivers/ata/sata_via.c static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev) adev 414 drivers/ata/sata_via.c pci_write_config_byte(pdev, PATA_UDMA_TIMING - adev->devno, adev 415 drivers/ata/sata_via.c udma_bits[adev->dma_mode - XFER_UDMA_0]); adev 3481 drivers/base/core.c int device_match_acpi_dev(struct device *dev, const void *adev) adev 3483 drivers/base/core.c return ACPI_COMPANION(dev) == adev; adev 640 drivers/base/property.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 645 drivers/base/property.c else if (adev) adev 646 drivers/base/property.c fwnode = acpi_fwnode_handle(adev); adev 918 drivers/bluetooth/hci_bcm.c struct acpi_device *adev = ACPI_COMPANION(dev->dev); adev 921 drivers/bluetooth/hci_bcm.c if (!adev || adev 922 drivers/bluetooth/hci_bcm.c ACPI_FAILURE(acpi_get_handle(adev->handle, "BTLP", &dev->btlp)) || adev 923 drivers/bluetooth/hci_bcm.c ACPI_FAILURE(acpi_get_handle(adev->handle, "BTPU", &dev->btpu)) || adev 924 drivers/bluetooth/hci_bcm.c ACPI_FAILURE(acpi_get_handle(adev->handle, "BTPD", &dev->btpd))) adev 927 drivers/bluetooth/hci_bcm.c if (!acpi_dev_get_property(adev, "baud", ACPI_TYPE_BUFFER, &obj) && adev 344 drivers/bus/hisi_lpc.c static int hisi_lpc_acpi_xlat_io_res(struct acpi_device *adev, adev 378 drivers/bus/hisi_lpc.c struct acpi_device *adev; adev 390 drivers/bus/hisi_lpc.c adev = to_acpi_device(child); adev 392 drivers/bus/hisi_lpc.c if (!adev->status.present) { adev 397 drivers/bus/hisi_lpc.c if (acpi_device_enumerated(adev)) { adev 407 drivers/bus/hisi_lpc.c count = acpi_dev_get_resources(adev, &resource_list, NULL, NULL); adev 433 drivers/bus/hisi_lpc.c ret = hisi_lpc_acpi_xlat_io_res(adev, host, &resources[i]); adev 461 drivers/bus/hisi_lpc.c struct acpi_device *adev = ACPI_COMPANION(hostdev); adev 466 drivers/bus/hisi_lpc.c list_for_each_entry(child, &adev->children, node) adev 482 drivers/bus/hisi_lpc.c struct acpi_device *adev = ACPI_COMPANION(hostdev); adev 487 drivers/bus/hisi_lpc.c list_for_each_entry(child, &adev->children, node) { adev 495 drivers/bus/hisi_lpc.c ret = hisi_lpc_acpi_set_io_res(&child->dev, &adev->dev, &res, adev 1941 drivers/char/ipmi/ipmi_ssif.c static int ssif_adapter_handler(struct device *adev, void *opaque) adev 1945 drivers/char/ipmi/ipmi_ssif.c if (adev->type != &i2c_adapter_type) adev 1948 drivers/char/ipmi/ipmi_ssif.c addr_info->added_client = i2c_new_device(to_i2c_adapter(adev), adev 42 drivers/dma/acpi-dma.c struct acpi_device *adev, struct acpi_dma *adma) adev 54 drivers/dma/acpi-dma.c ret = acpi_dev_get_resources(adev, &resource_list, NULL, NULL); adev 79 drivers/dma/acpi-dma.c dev_dbg(&adev->dev, "matches with %.4s%04X (rev %u)\n", adev 87 drivers/dma/acpi-dma.c ret = dma_coerce_mask_and_coherent(&adev->dev, adev 96 drivers/dma/acpi-dma.c dev_dbg(&adev->dev, "request line base: 0x%04x end: 0x%04x\n", adev 115 drivers/dma/acpi-dma.c static void acpi_dma_parse_csrt(struct acpi_device *adev, struct acpi_dma *adma) adev 126 drivers/dma/acpi-dma.c dev_warn(&adev->dev, "failed to get the CSRT table\n"); adev 134 drivers/dma/acpi-dma.c ret = acpi_dma_parse_resource_group(grp, adev, adma); adev 136 drivers/dma/acpi-dma.c dev_warn(&adev->dev, adev 164 drivers/dma/acpi-dma.c struct acpi_device *adev; adev 171 drivers/dma/acpi-dma.c adev = ACPI_COMPANION(dev); adev 172 drivers/dma/acpi-dma.c if (!adev) adev 183 drivers/dma/acpi-dma.c acpi_dma_parse_csrt(adev, adma); adev 362 drivers/dma/acpi-dma.c struct acpi_device *adev; adev 371 drivers/dma/acpi-dma.c adev = ACPI_COMPANION(dev); adev 372 drivers/dma/acpi-dma.c if (!adev) adev 383 drivers/dma/acpi-dma.c acpi_dev_get_resources(adev, &resource_list, adev 283 drivers/dma/amba-pl08x.c struct amba_device *adev; adev 395 drivers/dma/amba-pl08x.c dev_vdbg(&pl08x->adev->dev, adev 402 drivers/dma/amba-pl08x.c dev_vdbg(&pl08x->adev->dev, adev 866 drivers/dma/amba-pl08x.c dev_dbg(&pl08x->adev->dev, "no physical channel available for xfer on %s\n", plchan->name); adev 872 drivers/dma/amba-pl08x.c dev_dbg(&pl08x->adev->dev, "allocated physical channel %d for xfer on %s\n", adev 885 drivers/dma/amba-pl08x.c dev_dbg(&pl08x->adev->dev, "reassigned physical channel %d for xfer on %s\n", adev 1221 drivers/dma/amba-pl08x.c dev_vdbg(&pl08x->adev->dev, adev 1225 drivers/dma/amba-pl08x.c dev_vdbg(&pl08x->adev->dev, adev 1234 drivers/dma/amba-pl08x.c dev_vdbg(&pl08x->adev->dev, adev 1238 drivers/dma/amba-pl08x.c dev_vdbg(&pl08x->adev->dev, adev 1270 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, "%s no memory for llis\n", __func__); adev 1296 drivers/dma/amba-pl08x.c dev_vdbg(&pl08x->adev->dev, adev 1305 drivers/dma/amba-pl08x.c dev_vdbg(&pl08x->adev->dev, "mbus=%s sbus=%s\n", adev 1341 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, "%s sg len can't be zero", adev 1348 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, adev 1378 drivers/dma/amba-pl08x.c dev_vdbg(&pl08x->adev->dev, adev 1391 drivers/dma/amba-pl08x.c dev_dbg(&pl08x->adev->dev, adev 1404 drivers/dma/amba-pl08x.c dev_vdbg(&pl08x->adev->dev, adev 1431 drivers/dma/amba-pl08x.c dev_vdbg(&pl08x->adev->dev, adev 1448 drivers/dma/amba-pl08x.c dev_vdbg(&pl08x->adev->dev, adev 1457 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, adev 1464 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, adev 1768 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, adev 1807 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, adev 1851 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, adev 1901 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, adev 1951 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, "%s no txd\n", __func__); adev 1976 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, adev 1984 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, adev 2005 drivers/dma/amba-pl08x.c dev_dbg(&pl08x->adev->dev, adev 2011 drivers/dma/amba-pl08x.c dev_dbg(&pl08x->adev->dev, "allocated DMA request signal %d for xfer on %s\n", adev 2061 drivers/dma/amba-pl08x.c dev_dbg(&pl08x->adev->dev, "%s prepare transaction of %d bytes from %s\n", adev 2075 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, "%s no mem for pl080 sg\n", adev 2102 drivers/dma/amba-pl08x.c dev_dbg(&pl08x->adev->dev, adev 2149 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, adev 2300 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, "%s error interrupt, register value 0x%08x\n", adev 2319 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, adev 2415 drivers/dma/amba-pl08x.c dev_dbg(&pl08x->adev->dev, adev 2422 drivers/dma/amba-pl08x.c dev_info(&pl08x->adev->dev, "initialized %d virtual %s channels\n", adev 2511 drivers/dma/amba-pl08x.c debugfs_create_file(dev_name(&pl08x->adev->dev), S_IFREG | S_IRUGO, adev 2550 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, adev 2557 drivers/dma/amba-pl08x.c dev_err(&pl08x->adev->dev, adev 2563 drivers/dma/amba-pl08x.c dev_dbg(&pl08x->adev->dev, adev 2572 drivers/dma/amba-pl08x.c static int pl08x_of_probe(struct amba_device *adev, adev 2582 drivers/dma/amba-pl08x.c pd = devm_kzalloc(&adev->dev, sizeof(*pd), GFP_KERNEL); adev 2592 drivers/dma/amba-pl08x.c dev_info(&adev->dev, "no bus masters for LLIs stated, assume all\n"); adev 2602 drivers/dma/amba-pl08x.c dev_info(&adev->dev, "no bus masters for memory stated, assume all\n"); adev 2609 drivers/dma/amba-pl08x.c dev_info(&adev->dev, "no memcpy burst size specified, using 1 byte\n"); adev 2614 drivers/dma/amba-pl08x.c dev_err(&adev->dev, "illegal burst size for memcpy, set to 1\n"); adev 2644 drivers/dma/amba-pl08x.c dev_info(&adev->dev, "no memcpy bus width specified, using 8 bits\n"); adev 2649 drivers/dma/amba-pl08x.c dev_err(&adev->dev, "illegal bus width for memcpy, set to 8 bits\n"); adev 2669 drivers/dma/amba-pl08x.c chanp = devm_kcalloc(&adev->dev, adev 2689 drivers/dma/amba-pl08x.c return of_dma_controller_register(adev->dev.of_node, pl08x_of_xlate, adev 2693 drivers/dma/amba-pl08x.c static inline int pl08x_of_probe(struct amba_device *adev, adev 2701 drivers/dma/amba-pl08x.c static int pl08x_probe(struct amba_device *adev, const struct amba_id *id) adev 2705 drivers/dma/amba-pl08x.c struct device_node *np = adev->dev.of_node; adev 2710 drivers/dma/amba-pl08x.c ret = amba_request_regions(adev, NULL); adev 2715 drivers/dma/amba-pl08x.c ret = dma_set_mask_and_coherent(&adev->dev, DMA_BIT_MASK(32)); adev 2727 drivers/dma/amba-pl08x.c pl08x->adev = adev; adev 2730 drivers/dma/amba-pl08x.c pl08x->base = ioremap(adev->res.start, resource_size(&adev->res)); adev 2740 drivers/dma/amba-pl08x.c dev_info(&pl08x->adev->dev, "FTDMAC020 %d.%d rel %d\n", adev 2743 drivers/dma/amba-pl08x.c dev_info(&pl08x->adev->dev, "FTDMAC020 %d channels, " adev 2752 drivers/dma/amba-pl08x.c dev_warn(&pl08x->adev->dev, adev 2760 drivers/dma/amba-pl08x.c pl08x->memcpy.dev = &adev->dev; adev 2787 drivers/dma/amba-pl08x.c pl08x->slave.dev = &adev->dev; adev 2810 drivers/dma/amba-pl08x.c pl08x->pd = dev_get_platdata(&adev->dev); adev 2813 drivers/dma/amba-pl08x.c ret = pl08x_of_probe(adev, pl08x, np); adev 2817 drivers/dma/amba-pl08x.c dev_err(&adev->dev, "no platform data supplied\n"); adev 2842 drivers/dma/amba-pl08x.c pl08x->pool = dma_pool_create(DRIVER_NAME, &pl08x->adev->dev, adev 2861 drivers/dma/amba-pl08x.c ret = request_irq(adev->irq[0], pl08x_irq, 0, DRIVER_NAME, pl08x); adev 2863 drivers/dma/amba-pl08x.c dev_err(&adev->dev, "%s failed to request interrupt %d\n", adev 2864 drivers/dma/amba-pl08x.c __func__, adev->irq[0]); adev 2912 drivers/dma/amba-pl08x.c dev_info(&adev->dev, "physical channel %d reserved for secure access only\n", i); adev 2917 drivers/dma/amba-pl08x.c dev_dbg(&adev->dev, "physical channel %d is %s\n", adev 2925 drivers/dma/amba-pl08x.c dev_warn(&pl08x->adev->dev, adev 2936 drivers/dma/amba-pl08x.c dev_warn(&pl08x->adev->dev, adev 2945 drivers/dma/amba-pl08x.c dev_warn(&pl08x->adev->dev, adev 2954 drivers/dma/amba-pl08x.c dev_warn(&pl08x->adev->dev, adev 2961 drivers/dma/amba-pl08x.c amba_set_drvdata(adev, pl08x); adev 2963 drivers/dma/amba-pl08x.c dev_info(&pl08x->adev->dev, "DMA: PL%03x%s rev%u at 0x%08llx irq %d\n", adev 2964 drivers/dma/amba-pl08x.c amba_part(adev), pl08x->vd->pl080s ? "s" : "", amba_rev(adev), adev 2965 drivers/dma/amba-pl08x.c (unsigned long long)adev->res.start, adev->irq[0]); adev 2979 drivers/dma/amba-pl08x.c free_irq(adev->irq[0], pl08x); adev 2988 drivers/dma/amba-pl08x.c amba_release_regions(adev); adev 1269 drivers/dma/iop-adma.c struct iop_adma_device *adev; adev 1282 drivers/dma/iop-adma.c adev = kzalloc(sizeof(*adev), GFP_KERNEL); adev 1283 drivers/dma/iop-adma.c if (!adev) adev 1285 drivers/dma/iop-adma.c dma_dev = &adev->common; adev 1291 drivers/dma/iop-adma.c adev->dma_desc_pool_virt = dma_alloc_wc(&pdev->dev, adev 1293 drivers/dma/iop-adma.c &adev->dma_desc_pool, adev 1295 drivers/dma/iop-adma.c if (!adev->dma_desc_pool_virt) { adev 1301 drivers/dma/iop-adma.c __func__, adev->dma_desc_pool_virt, adev 1302 drivers/dma/iop-adma.c (void *) adev->dma_desc_pool); adev 1304 drivers/dma/iop-adma.c adev->id = plat_data->hw_id; adev 1309 drivers/dma/iop-adma.c adev->pdev = pdev; adev 1310 drivers/dma/iop-adma.c platform_set_drvdata(pdev, adev); adev 1347 drivers/dma/iop-adma.c iop_chan->device = adev; adev 1385 drivers/dma/iop-adma.c ret = iop_adma_memcpy_self_test(adev); adev 1392 drivers/dma/iop-adma.c ret = iop_adma_xor_val_self_test(adev); adev 1401 drivers/dma/iop-adma.c ret = iop_adma_pq_zero_sum_self_test(adev); adev 1427 drivers/dma/iop-adma.c dma_free_coherent(&adev->pdev->dev, plat_data->pool_size, adev 1428 drivers/dma/iop-adma.c adev->dma_desc_pool_virt, adev->dma_desc_pool); adev 1430 drivers/dma/iop-adma.c kfree(adev); adev 2995 drivers/dma/pl330.c pl330_probe(struct amba_device *adev, const struct amba_id *id) adev 3004 drivers/dma/pl330.c struct device_node *np = adev->dev.of_node; adev 3006 drivers/dma/pl330.c ret = dma_set_mask_and_coherent(&adev->dev, DMA_BIT_MASK(32)); adev 3011 drivers/dma/pl330.c pl330 = devm_kzalloc(&adev->dev, sizeof(*pl330), GFP_KERNEL); adev 3016 drivers/dma/pl330.c pd->dev = &adev->dev; adev 3025 drivers/dma/pl330.c res = &adev->res; adev 3026 drivers/dma/pl330.c pl330->base = devm_ioremap_resource(&adev->dev, res); adev 3030 drivers/dma/pl330.c amba_set_drvdata(adev, pl330); adev 3032 drivers/dma/pl330.c pl330->rstc = devm_reset_control_get_optional(&adev->dev, "dma"); adev 3035 drivers/dma/pl330.c dev_err(&adev->dev, "Failed to get reset!\n"); adev 3040 drivers/dma/pl330.c dev_err(&adev->dev, "Couldn't deassert the device from reset!\n"); adev 3045 drivers/dma/pl330.c pl330->rstc_ocp = devm_reset_control_get_optional(&adev->dev, "dma-ocp"); adev 3048 drivers/dma/pl330.c dev_err(&adev->dev, "Failed to get OCP reset!\n"); adev 3053 drivers/dma/pl330.c dev_err(&adev->dev, "Couldn't deassert the device from OCP reset!\n"); adev 3059 drivers/dma/pl330.c irq = adev->irq[i]; adev 3061 drivers/dma/pl330.c ret = devm_request_irq(&adev->dev, irq, adev 3063 drivers/dma/pl330.c dev_name(&adev->dev), pl330); adev 3073 drivers/dma/pl330.c pcfg->periph_id = adev->periphid; adev 3084 drivers/dma/pl330.c dev_warn(&adev->dev, "unable to allocate desc\n"); adev 3102 drivers/dma/pl330.c pch->chan.private = adev->dev.of_node; adev 3142 drivers/dma/pl330.c dev_err(&adev->dev, "unable to register DMAC\n"); adev 3146 drivers/dma/pl330.c if (adev->dev.of_node) { adev 3147 drivers/dma/pl330.c ret = of_dma_controller_register(adev->dev.of_node, adev 3150 drivers/dma/pl330.c dev_err(&adev->dev, adev 3155 drivers/dma/pl330.c adev->dev.dma_parms = &pl330->dma_parms; adev 3161 drivers/dma/pl330.c ret = dma_set_max_seg_size(&adev->dev, 1900800); adev 3163 drivers/dma/pl330.c dev_err(&adev->dev, "unable to set the seg size\n"); adev 3167 drivers/dma/pl330.c dev_info(&adev->dev, adev 3168 drivers/dma/pl330.c "Loaded driver for PL330 DMAC-%x\n", adev->periphid); adev 3169 drivers/dma/pl330.c dev_info(&adev->dev, adev 3174 drivers/dma/pl330.c pm_runtime_irq_safe(&adev->dev); adev 3175 drivers/dma/pl330.c pm_runtime_use_autosuspend(&adev->dev); adev 3176 drivers/dma/pl330.c pm_runtime_set_autosuspend_delay(&adev->dev, PL330_AUTOSUSPEND_DELAY); adev 3177 drivers/dma/pl330.c pm_runtime_mark_last_busy(&adev->dev); adev 3178 drivers/dma/pl330.c pm_runtime_put_autosuspend(&adev->dev); adev 3206 drivers/dma/pl330.c static int pl330_remove(struct amba_device *adev) adev 3208 drivers/dma/pl330.c struct pl330_dmac *pl330 = amba_get_drvdata(adev); adev 3214 drivers/dma/pl330.c if (adev->dev.of_node) adev 3215 drivers/dma/pl330.c of_dma_controller_free(adev->dev.of_node); adev 3218 drivers/dma/pl330.c irq = adev->irq[i]; adev 3220 drivers/dma/pl330.c devm_free_irq(&adev->dev, irq, pl330); adev 3770 drivers/dma/ppc4xx/adma.c static void ppc440spe_adma_init_capabilities(struct ppc440spe_adma_device *adev) adev 3772 drivers/dma/ppc4xx/adma.c switch (adev->id) { adev 3775 drivers/dma/ppc4xx/adma.c dma_cap_set(DMA_MEMCPY, adev->common.cap_mask); adev 3776 drivers/dma/ppc4xx/adma.c dma_cap_set(DMA_INTERRUPT, adev->common.cap_mask); adev 3777 drivers/dma/ppc4xx/adma.c dma_cap_set(DMA_PQ, adev->common.cap_mask); adev 3778 drivers/dma/ppc4xx/adma.c dma_cap_set(DMA_PQ_VAL, adev->common.cap_mask); adev 3779 drivers/dma/ppc4xx/adma.c dma_cap_set(DMA_XOR_VAL, adev->common.cap_mask); adev 3782 drivers/dma/ppc4xx/adma.c dma_cap_set(DMA_XOR, adev->common.cap_mask); adev 3783 drivers/dma/ppc4xx/adma.c dma_cap_set(DMA_PQ, adev->common.cap_mask); adev 3784 drivers/dma/ppc4xx/adma.c dma_cap_set(DMA_INTERRUPT, adev->common.cap_mask); adev 3785 drivers/dma/ppc4xx/adma.c adev->common.cap_mask = adev->common.cap_mask; adev 3790 drivers/dma/ppc4xx/adma.c adev->common.device_alloc_chan_resources = adev 3792 drivers/dma/ppc4xx/adma.c adev->common.device_free_chan_resources = adev 3794 drivers/dma/ppc4xx/adma.c adev->common.device_tx_status = ppc440spe_adma_tx_status; adev 3795 drivers/dma/ppc4xx/adma.c adev->common.device_issue_pending = ppc440spe_adma_issue_pending; adev 3798 drivers/dma/ppc4xx/adma.c if (dma_has_cap(DMA_MEMCPY, adev->common.cap_mask)) { adev 3799 drivers/dma/ppc4xx/adma.c adev->common.device_prep_dma_memcpy = adev 3802 drivers/dma/ppc4xx/adma.c if (dma_has_cap(DMA_XOR, adev->common.cap_mask)) { adev 3803 drivers/dma/ppc4xx/adma.c adev->common.max_xor = XOR_MAX_OPS; adev 3804 drivers/dma/ppc4xx/adma.c adev->common.device_prep_dma_xor = adev 3807 drivers/dma/ppc4xx/adma.c if (dma_has_cap(DMA_PQ, adev->common.cap_mask)) { adev 3808 drivers/dma/ppc4xx/adma.c switch (adev->id) { adev 3810 drivers/dma/ppc4xx/adma.c dma_set_maxpq(&adev->common, adev 3814 drivers/dma/ppc4xx/adma.c dma_set_maxpq(&adev->common, adev 3818 drivers/dma/ppc4xx/adma.c adev->common.max_pq = XOR_MAX_OPS * 3; adev 3821 drivers/dma/ppc4xx/adma.c adev->common.device_prep_dma_pq = adev 3824 drivers/dma/ppc4xx/adma.c if (dma_has_cap(DMA_PQ_VAL, adev->common.cap_mask)) { adev 3825 drivers/dma/ppc4xx/adma.c switch (adev->id) { adev 3827 drivers/dma/ppc4xx/adma.c adev->common.max_pq = DMA0_FIFO_SIZE / adev 3831 drivers/dma/ppc4xx/adma.c adev->common.max_pq = DMA1_FIFO_SIZE / adev 3835 drivers/dma/ppc4xx/adma.c adev->common.device_prep_dma_pq_val = adev 3838 drivers/dma/ppc4xx/adma.c if (dma_has_cap(DMA_XOR_VAL, adev->common.cap_mask)) { adev 3839 drivers/dma/ppc4xx/adma.c switch (adev->id) { adev 3841 drivers/dma/ppc4xx/adma.c adev->common.max_xor = DMA0_FIFO_SIZE / adev 3845 drivers/dma/ppc4xx/adma.c adev->common.max_xor = DMA1_FIFO_SIZE / adev 3849 drivers/dma/ppc4xx/adma.c adev->common.device_prep_dma_xor_val = adev 3852 drivers/dma/ppc4xx/adma.c if (dma_has_cap(DMA_INTERRUPT, adev->common.cap_mask)) { adev 3853 drivers/dma/ppc4xx/adma.c adev->common.device_prep_dma_interrupt = adev 3858 drivers/dma/ppc4xx/adma.c dev_name(adev->dev), adev 3859 drivers/dma/ppc4xx/adma.c dma_has_cap(DMA_PQ, adev->common.cap_mask) ? "pq " : "", adev 3860 drivers/dma/ppc4xx/adma.c dma_has_cap(DMA_PQ_VAL, adev->common.cap_mask) ? "pq_val " : "", adev 3861 drivers/dma/ppc4xx/adma.c dma_has_cap(DMA_XOR, adev->common.cap_mask) ? "xor " : "", adev 3862 drivers/dma/ppc4xx/adma.c dma_has_cap(DMA_XOR_VAL, adev->common.cap_mask) ? "xor_val " : "", adev 3863 drivers/dma/ppc4xx/adma.c dma_has_cap(DMA_MEMCPY, adev->common.cap_mask) ? "memcpy " : "", adev 3864 drivers/dma/ppc4xx/adma.c dma_has_cap(DMA_INTERRUPT, adev->common.cap_mask) ? "intr " : ""); adev 3867 drivers/dma/ppc4xx/adma.c static int ppc440spe_adma_setup_irqs(struct ppc440spe_adma_device *adev, adev 3875 drivers/dma/ppc4xx/adma.c ofdev = container_of(adev->dev, struct platform_device, dev); adev 3877 drivers/dma/ppc4xx/adma.c if (adev->id != PPC440SPE_XOR_ID) { adev 3878 drivers/dma/ppc4xx/adma.c adev->err_irq = irq_of_parse_and_map(np, 1); adev 3879 drivers/dma/ppc4xx/adma.c if (!adev->err_irq) { adev 3880 drivers/dma/ppc4xx/adma.c dev_warn(adev->dev, "no err irq resource?\n"); adev 3882 drivers/dma/ppc4xx/adma.c adev->err_irq = -ENXIO; adev 3886 drivers/dma/ppc4xx/adma.c adev->err_irq = -ENXIO; adev 3889 drivers/dma/ppc4xx/adma.c adev->irq = irq_of_parse_and_map(np, 0); adev 3890 drivers/dma/ppc4xx/adma.c if (!adev->irq) { adev 3891 drivers/dma/ppc4xx/adma.c dev_err(adev->dev, "no irq resource\n"); adev 3896 drivers/dma/ppc4xx/adma.c dev_dbg(adev->dev, "irq %d, err irq %d\n", adev 3897 drivers/dma/ppc4xx/adma.c adev->irq, adev->err_irq); adev 3899 drivers/dma/ppc4xx/adma.c ret = request_irq(adev->irq, ppc440spe_adma_eot_handler, adev 3900 drivers/dma/ppc4xx/adma.c 0, dev_driver_string(adev->dev), chan); adev 3902 drivers/dma/ppc4xx/adma.c dev_err(adev->dev, "can't request irq %d\n", adev 3903 drivers/dma/ppc4xx/adma.c adev->irq); adev 3912 drivers/dma/ppc4xx/adma.c if (adev->err_irq > 0) { adev 3914 drivers/dma/ppc4xx/adma.c ret = request_irq(adev->err_irq, adev 3917 drivers/dma/ppc4xx/adma.c dev_driver_string(adev->dev), adev 3920 drivers/dma/ppc4xx/adma.c dev_err(adev->dev, "can't request irq %d\n", adev 3921 drivers/dma/ppc4xx/adma.c adev->err_irq); adev 3928 drivers/dma/ppc4xx/adma.c if (adev->id == PPC440SPE_XOR_ID) { adev 3932 drivers/dma/ppc4xx/adma.c &adev->xor_reg->ier); adev 3943 drivers/dma/ppc4xx/adma.c adev->i2o_reg = of_iomap(np, 0); adev 3944 drivers/dma/ppc4xx/adma.c if (!adev->i2o_reg) { adev 3954 drivers/dma/ppc4xx/adma.c enable = (adev->id == PPC440SPE_DMA0_ID) ? adev 3957 drivers/dma/ppc4xx/adma.c mask = ioread32(&adev->i2o_reg->iopim) & enable; adev 3958 drivers/dma/ppc4xx/adma.c iowrite32(mask, &adev->i2o_reg->iopim); adev 3963 drivers/dma/ppc4xx/adma.c free_irq(adev->irq, chan); adev 3965 drivers/dma/ppc4xx/adma.c irq_dispose_mapping(adev->irq); adev 3967 drivers/dma/ppc4xx/adma.c if (adev->err_irq > 0) { adev 3969 drivers/dma/ppc4xx/adma.c irq_dispose_mapping(adev->err_irq); adev 3974 drivers/dma/ppc4xx/adma.c static void ppc440spe_adma_release_irqs(struct ppc440spe_adma_device *adev, adev 3979 drivers/dma/ppc4xx/adma.c if (adev->id == PPC440SPE_XOR_ID) { adev 3981 drivers/dma/ppc4xx/adma.c mask = ioread32be(&adev->xor_reg->ier); adev 3984 drivers/dma/ppc4xx/adma.c iowrite32be(mask, &adev->xor_reg->ier); adev 3987 drivers/dma/ppc4xx/adma.c disable = (adev->id == PPC440SPE_DMA0_ID) ? adev 3990 drivers/dma/ppc4xx/adma.c mask = ioread32(&adev->i2o_reg->iopim) | disable; adev 3991 drivers/dma/ppc4xx/adma.c iowrite32(mask, &adev->i2o_reg->iopim); adev 3993 drivers/dma/ppc4xx/adma.c free_irq(adev->irq, chan); adev 3994 drivers/dma/ppc4xx/adma.c irq_dispose_mapping(adev->irq); adev 3995 drivers/dma/ppc4xx/adma.c if (adev->err_irq > 0) { adev 3996 drivers/dma/ppc4xx/adma.c free_irq(adev->err_irq, chan); adev 3998 drivers/dma/ppc4xx/adma.c irq_dispose_mapping(adev->err_irq); adev 3999 drivers/dma/ppc4xx/adma.c iounmap(adev->i2o_reg); adev 4011 drivers/dma/ppc4xx/adma.c struct ppc440spe_adma_device *adev; adev 4070 drivers/dma/ppc4xx/adma.c adev = kzalloc(sizeof(*adev), GFP_KERNEL); adev 4071 drivers/dma/ppc4xx/adma.c if (!adev) { adev 4077 drivers/dma/ppc4xx/adma.c adev->id = id; adev 4078 drivers/dma/ppc4xx/adma.c adev->pool_size = pool_size; adev 4080 drivers/dma/ppc4xx/adma.c adev->dma_desc_pool_virt = dma_alloc_coherent(&ofdev->dev, adev 4081 drivers/dma/ppc4xx/adma.c adev->pool_size, &adev->dma_desc_pool, adev 4083 drivers/dma/ppc4xx/adma.c if (adev->dma_desc_pool_virt == NULL) { adev 4086 drivers/dma/ppc4xx/adma.c adev->pool_size); adev 4092 drivers/dma/ppc4xx/adma.c adev->dma_desc_pool_virt, (u64)adev->dma_desc_pool); adev 4101 drivers/dma/ppc4xx/adma.c if (adev->id == PPC440SPE_XOR_ID) { adev 4102 drivers/dma/ppc4xx/adma.c adev->xor_reg = regs; adev 4104 drivers/dma/ppc4xx/adma.c iowrite32be(XOR_CRSR_XASR_BIT, &adev->xor_reg->crsr); adev 4105 drivers/dma/ppc4xx/adma.c iowrite32be(XOR_CRSR_64BA_BIT, &adev->xor_reg->crrr); adev 4107 drivers/dma/ppc4xx/adma.c size_t fifo_size = (adev->id == PPC440SPE_DMA0_ID) ? adev 4109 drivers/dma/ppc4xx/adma.c adev->dma_reg = regs; adev 4116 drivers/dma/ppc4xx/adma.c &adev->dma_reg->fsiz); adev 4119 drivers/dma/ppc4xx/adma.c &adev->dma_reg->cfg); adev 4121 drivers/dma/ppc4xx/adma.c iowrite32(~0, &adev->dma_reg->dsts); adev 4124 drivers/dma/ppc4xx/adma.c adev->dev = &ofdev->dev; adev 4125 drivers/dma/ppc4xx/adma.c adev->common.dev = &ofdev->dev; adev 4126 drivers/dma/ppc4xx/adma.c INIT_LIST_HEAD(&adev->common.channels); adev 4127 drivers/dma/ppc4xx/adma.c platform_set_drvdata(ofdev, adev); adev 4140 drivers/dma/ppc4xx/adma.c chan->device = adev; adev 4141 drivers/dma/ppc4xx/adma.c chan->common.device = &adev->common; adev 4143 drivers/dma/ppc4xx/adma.c list_add_tail(&chan->common.device_node, &adev->common.channels); adev 4150 drivers/dma/ppc4xx/adma.c if (adev->id != PPC440SPE_XOR_ID) { adev 4179 drivers/dma/ppc4xx/adma.c ret = ppc440spe_adma_setup_irqs(adev, chan, &initcode); adev 4183 drivers/dma/ppc4xx/adma.c ppc440spe_adma_init_capabilities(adev); adev 4185 drivers/dma/ppc4xx/adma.c ret = dma_async_device_register(&adev->common); adev 4195 drivers/dma/ppc4xx/adma.c ppc440spe_adma_release_irqs(adev, chan); adev 4204 drivers/dma/ppc4xx/adma.c if (adev->id != PPC440SPE_XOR_ID) { adev 4215 drivers/dma/ppc4xx/adma.c if (adev->id == PPC440SPE_XOR_ID) adev 4216 drivers/dma/ppc4xx/adma.c iounmap(adev->xor_reg); adev 4218 drivers/dma/ppc4xx/adma.c iounmap(adev->dma_reg); adev 4220 drivers/dma/ppc4xx/adma.c dma_free_coherent(adev->dev, adev->pool_size, adev 4221 drivers/dma/ppc4xx/adma.c adev->dma_desc_pool_virt, adev 4222 drivers/dma/ppc4xx/adma.c adev->dma_desc_pool); adev 4224 drivers/dma/ppc4xx/adma.c kfree(adev); adev 4239 drivers/dma/ppc4xx/adma.c struct ppc440spe_adma_device *adev = platform_get_drvdata(ofdev); adev 4246 drivers/dma/ppc4xx/adma.c if (adev->id < PPC440SPE_ADMA_ENGINES_NUM) adev 4247 drivers/dma/ppc4xx/adma.c ppc440spe_adma_devices[adev->id] = -1; adev 4249 drivers/dma/ppc4xx/adma.c dma_async_device_unregister(&adev->common); adev 4251 drivers/dma/ppc4xx/adma.c list_for_each_entry_safe(chan, _chan, &adev->common.channels, adev 4254 drivers/dma/ppc4xx/adma.c ppc440spe_adma_release_irqs(adev, ppc440spe_chan); adev 4256 drivers/dma/ppc4xx/adma.c if (adev->id != PPC440SPE_XOR_ID) { adev 4276 drivers/dma/ppc4xx/adma.c dma_free_coherent(adev->dev, adev->pool_size, adev 4277 drivers/dma/ppc4xx/adma.c adev->dma_desc_pool_virt, adev->dma_desc_pool); adev 4278 drivers/dma/ppc4xx/adma.c if (adev->id == PPC440SPE_XOR_ID) adev 4279 drivers/dma/ppc4xx/adma.c iounmap(adev->xor_reg); adev 4281 drivers/dma/ppc4xx/adma.c iounmap(adev->dma_reg); adev 4284 drivers/dma/ppc4xx/adma.c kfree(adev); adev 330 drivers/extcon/extcon-axp288.c struct acpi_device *adev; adev 354 drivers/extcon/extcon-axp288.c adev = acpi_dev_get_first_match_dev("INT3496", NULL, -1); adev 355 drivers/extcon/extcon-axp288.c if (adev) { adev 356 drivers/extcon/extcon-axp288.c info->id_extcon = extcon_get_extcon_dev(acpi_dev_name(adev)); adev 357 drivers/extcon/extcon-axp288.c put_device(&adev->dev); adev 23 drivers/firmware/efi/dev-path-parser.c struct acpi_device *adev = to_acpi_device(dev); adev 25 drivers/firmware/efi/dev-path-parser.c if (acpi_match_device_ids(adev, hid_uid.hid)) adev 28 drivers/firmware/efi/dev-path-parser.c if (adev->pnp.unique_id) adev 29 drivers/firmware/efi/dev-path-parser.c return !strcmp(adev->pnp.unique_id, hid_uid.uid); adev 382 drivers/gpio/gpio-merrifield.c struct acpi_device *adev; adev 385 drivers/gpio/gpio-merrifield.c adev = acpi_dev_get_first_match_dev("INTC1002", NULL, -1); adev 386 drivers/gpio/gpio-merrifield.c if (adev) { adev 387 drivers/gpio/gpio-merrifield.c name = devm_kstrdup(priv->dev, acpi_dev_name(adev), GFP_KERNEL); adev 388 drivers/gpio/gpio-merrifield.c acpi_dev_put(adev); adev 282 drivers/gpio/gpio-pl061.c static int pl061_probe(struct amba_device *adev, const struct amba_id *id) adev 284 drivers/gpio/gpio-pl061.c struct device *dev = &adev->dev; adev 293 drivers/gpio/gpio-pl061.c pl061->base = devm_ioremap_resource(dev, &adev->res); adev 325 drivers/gpio/gpio-pl061.c irq = adev->irq[0]; adev 327 drivers/gpio/gpio-pl061.c dev_err(&adev->dev, "invalid IRQ\n"); adev 348 drivers/gpio/gpio-pl061.c amba_set_drvdata(adev, pl061); adev 446 drivers/gpio/gpiolib-acpi.c int acpi_dev_add_driver_gpios(struct acpi_device *adev, adev 449 drivers/gpio/gpiolib-acpi.c if (adev && gpios) { adev 450 drivers/gpio/gpiolib-acpi.c adev->driver_gpios = gpios; adev 457 drivers/gpio/gpiolib-acpi.c void acpi_dev_remove_driver_gpios(struct acpi_device *adev) adev 459 drivers/gpio/gpiolib-acpi.c if (adev) adev 460 drivers/gpio/gpiolib-acpi.c adev->driver_gpios = NULL; adev 495 drivers/gpio/gpiolib-acpi.c static bool acpi_get_driver_gpio_data(struct acpi_device *adev, adev 502 drivers/gpio/gpiolib-acpi.c if (!adev->driver_gpios) adev 505 drivers/gpio/gpiolib-acpi.c for (gm = adev->driver_gpios; gm->name; gm++) adev 509 drivers/gpio/gpiolib-acpi.c args->fwnode = acpi_fwnode_handle(adev); adev 589 drivers/gpio/gpiolib-acpi.c struct device *dev = &info->adev->dev; adev 685 drivers/gpio/gpiolib-acpi.c struct acpi_device *adev = lookup->info.adev; adev 691 drivers/gpio/gpiolib-acpi.c ret = acpi_dev_get_resources(adev, &res_list, adev 719 drivers/gpio/gpiolib-acpi.c struct acpi_device *adev = to_acpi_device_node(fwnode); adev 721 drivers/gpio/gpiolib-acpi.c if (!adev) adev 724 drivers/gpio/gpiolib-acpi.c if (!acpi_get_driver_gpio_data(adev, propname, index, &args, adev 741 drivers/gpio/gpiolib-acpi.c lookup->info.adev = to_acpi_device_node(args.fwnode); adev 769 drivers/gpio/gpiolib-acpi.c static struct gpio_desc *acpi_get_gpiod_by_index(struct acpi_device *adev, adev 776 drivers/gpio/gpiolib-acpi.c if (!adev) adev 783 drivers/gpio/gpiolib-acpi.c dev_dbg(&adev->dev, "GPIO: looking up %s\n", propname); adev 785 drivers/gpio/gpiolib-acpi.c ret = acpi_gpio_property_lookup(acpi_fwnode_handle(adev), adev 790 drivers/gpio/gpiolib-acpi.c dev_dbg(&adev->dev, "GPIO: _DSD returned %s %d %d %u\n", adev 791 drivers/gpio/gpiolib-acpi.c dev_name(&lookup.info.adev->dev), lookup.index, adev 794 drivers/gpio/gpiolib-acpi.c dev_dbg(&adev->dev, "GPIO: looking up %d in _CRS\n", index); adev 795 drivers/gpio/gpiolib-acpi.c lookup.info.adev = adev; adev 802 drivers/gpio/gpiolib-acpi.c static bool acpi_can_fallback_to_crs(struct acpi_device *adev, adev 806 drivers/gpio/gpiolib-acpi.c if (acpi_dev_has_props(adev) || adev->driver_gpios) adev 818 drivers/gpio/gpiolib-acpi.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 834 drivers/gpio/gpiolib-acpi.c desc = acpi_get_gpiod_by_index(adev, propname, idx, &info); adev 843 drivers/gpio/gpiolib-acpi.c if (!acpi_can_fallback_to_crs(adev, con_id)) adev 846 drivers/gpio/gpiolib-acpi.c desc = acpi_get_gpiod_by_index(adev, NULL, idx, &info); adev 882 drivers/gpio/gpiolib-acpi.c struct acpi_device *adev; adev 885 drivers/gpio/gpiolib-acpi.c adev = to_acpi_device_node(fwnode); adev 886 drivers/gpio/gpiolib-acpi.c if (adev) adev 887 drivers/gpio/gpiolib-acpi.c return acpi_get_gpiod_by_index(adev, propname, index, info); adev 920 drivers/gpio/gpiolib-acpi.c int acpi_dev_gpio_irq_get(struct acpi_device *adev, int index) adev 930 drivers/gpio/gpiolib-acpi.c desc = acpi_get_gpiod_by_index(adev, NULL, i, &info); adev 1295 drivers/gpio/gpiolib-acpi.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 1312 drivers/gpio/gpiolib-acpi.c ret = acpi_dev_get_property(adev, propname, ACPI_TYPE_ANY, adev 1319 drivers/gpio/gpiolib-acpi.c } else if (adev->driver_gpios) { adev 1320 drivers/gpio/gpiolib-acpi.c for (gm = adev->driver_gpios; gm->name; gm++) adev 1335 drivers/gpio/gpiolib-acpi.c if (!acpi_can_fallback_to_crs(adev, con_id)) adev 1339 drivers/gpio/gpiolib-acpi.c acpi_dev_get_resources(adev, &resource_list, adev 24 drivers/gpio/gpiolib-acpi.h struct acpi_device *adev; adev 96 drivers/gpu/drm/amd/amdgpu/amdgpu.h struct amdgpu_device *adev; adev 261 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_device_ip_get_clockgating_state(struct amdgpu_device *adev, adev 263 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_device_ip_wait_for_idle(struct amdgpu_device *adev, adev 265 drivers/gpu/drm/amd/amdgpu/amdgpu.h bool amdgpu_device_ip_is_idle(struct amdgpu_device *adev, adev 291 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_device_ip_block_version_cmp(struct amdgpu_device *adev, adev 296 drivers/gpu/drm/amd/amdgpu/amdgpu.h amdgpu_device_ip_get_ip_block(struct amdgpu_device *adev, adev 299 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_device_ip_block_add(struct amdgpu_device *adev, adev 305 drivers/gpu/drm/amd/amdgpu/amdgpu.h bool amdgpu_get_bios(struct amdgpu_device *adev); adev 306 drivers/gpu/drm/amd/amdgpu/amdgpu.h bool amdgpu_read_bios(struct amdgpu_device *adev); adev 386 drivers/gpu/drm/amd/amdgpu/amdgpu.h struct amdgpu_device *adev; adev 428 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_device_get_job_timeout_settings(struct amdgpu_device *adev); adev 430 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm, adev 432 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib, adev 437 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_ib_pool_init(struct amdgpu_device *adev); adev 438 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_ib_pool_fini(struct amdgpu_device *adev); adev 439 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_ib_ring_tests(struct amdgpu_device *adev); adev 457 drivers/gpu/drm/amd/amdgpu/amdgpu.h struct amdgpu_device *adev; adev 515 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb); adev 516 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb); adev 521 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_benchmark(struct amdgpu_device *adev, int test_number); adev 527 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_test_moves(struct amdgpu_device *adev); adev 549 drivers/gpu/drm/amd/amdgpu/amdgpu.h bool (*read_disabled_bios)(struct amdgpu_device *adev); adev 550 drivers/gpu/drm/amd/amdgpu/amdgpu.h bool (*read_bios_from_rom)(struct amdgpu_device *adev, adev 552 drivers/gpu/drm/amd/amdgpu/amdgpu.h int (*read_register)(struct amdgpu_device *adev, u32 se_num, adev 554 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*set_vga_state)(struct amdgpu_device *adev, bool state); adev 555 drivers/gpu/drm/amd/amdgpu/amdgpu.h int (*reset)(struct amdgpu_device *adev); adev 556 drivers/gpu/drm/amd/amdgpu/amdgpu.h enum amd_reset_method (*reset_method)(struct amdgpu_device *adev); adev 558 drivers/gpu/drm/amd/amdgpu/amdgpu.h u32 (*get_xclk)(struct amdgpu_device *adev); adev 560 drivers/gpu/drm/amd/amdgpu/amdgpu.h int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32 dclk); adev 561 drivers/gpu/drm/amd/amdgpu/amdgpu.h int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk); adev 563 drivers/gpu/drm/amd/amdgpu/amdgpu.h int (*get_pcie_lanes)(struct amdgpu_device *adev); adev 564 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes); adev 566 drivers/gpu/drm/amd/amdgpu/amdgpu.h u32 (*get_config_memsize)(struct amdgpu_device *adev); adev 568 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*flush_hdp)(struct amdgpu_device *adev, struct amdgpu_ring *ring); adev 570 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*invalidate_hdp)(struct amdgpu_device *adev, adev 573 drivers/gpu/drm/amd/amdgpu/amdgpu.h bool (*need_full_reset)(struct amdgpu_device *adev); adev 575 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*init_doorbell_index)(struct amdgpu_device *adev); adev 577 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*get_pcie_usage)(struct amdgpu_device *adev, uint64_t *count0, adev 580 drivers/gpu/drm/amd/amdgpu/amdgpu.h bool (*need_reset_on_init)(struct amdgpu_device *adev); adev 582 drivers/gpu/drm/amd/amdgpu/amdgpu.h uint64_t (*get_pcie_replay_count)(struct amdgpu_device *adev); adev 632 drivers/gpu/drm/amd/amdgpu/amdgpu.h struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev); adev 680 drivers/gpu/drm/amd/amdgpu/amdgpu.h u32 (*get_hdp_flush_req_offset)(struct amdgpu_device *adev); adev 681 drivers/gpu/drm/amd/amdgpu/amdgpu.h u32 (*get_hdp_flush_done_offset)(struct amdgpu_device *adev); adev 682 drivers/gpu/drm/amd/amdgpu/amdgpu.h u32 (*get_pcie_index_offset)(struct amdgpu_device *adev); adev 683 drivers/gpu/drm/amd/amdgpu/amdgpu.h u32 (*get_pcie_data_offset)(struct amdgpu_device *adev); adev 684 drivers/gpu/drm/amd/amdgpu/amdgpu.h u32 (*get_rev_id)(struct amdgpu_device *adev); adev 685 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*mc_access_enable)(struct amdgpu_device *adev, bool enable); adev 686 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*hdp_flush)(struct amdgpu_device *adev, struct amdgpu_ring *ring); adev 687 drivers/gpu/drm/amd/amdgpu/amdgpu.h u32 (*get_memsize)(struct amdgpu_device *adev); adev 688 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*sdma_doorbell_range)(struct amdgpu_device *adev, int instance, adev 690 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*vcn_doorbell_range)(struct amdgpu_device *adev, bool use_doorbell, adev 692 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*enable_doorbell_aperture)(struct amdgpu_device *adev, adev 694 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*enable_doorbell_selfring_aperture)(struct amdgpu_device *adev, adev 696 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*ih_doorbell_range)(struct amdgpu_device *adev, adev 698 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev, adev 700 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*update_medium_grain_light_sleep)(struct amdgpu_device *adev, adev 702 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*get_clockgating_state)(struct amdgpu_device *adev, adev 704 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*ih_control)(struct amdgpu_device *adev); adev 705 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*init_registers)(struct amdgpu_device *adev); adev 706 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*detect_hw_virt)(struct amdgpu_device *adev); adev 707 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*remap_hdp_registers)(struct amdgpu_device *adev); adev 711 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*sw_init)(struct amdgpu_device *adev); adev 712 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*enable_broadcast_mode)(struct amdgpu_device *adev, adev 714 drivers/gpu/drm/amd/amdgpu/amdgpu.h u32 (*get_fb_channel_number)(struct amdgpu_device *adev); adev 715 drivers/gpu/drm/amd/amdgpu/amdgpu.h u32 (*get_hbm_channel_number)(struct amdgpu_device *adev); adev 716 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev, adev 718 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*get_clockgating_state)(struct amdgpu_device *adev, adev 720 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*enable_ecc_force_par_wr_rmw)(struct amdgpu_device *adev, adev 722 drivers/gpu/drm/amd/amdgpu/amdgpu.h int (*pmc_start)(struct amdgpu_device *adev, uint64_t config, adev 724 drivers/gpu/drm/amd/amdgpu/amdgpu.h int (*pmc_stop)(struct amdgpu_device *adev, uint64_t config, adev 726 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*pmc_get_count)(struct amdgpu_device *adev, uint64_t config, adev 728 drivers/gpu/drm/amd/amdgpu/amdgpu.h uint64_t (*get_fica)(struct amdgpu_device *adev, uint32_t ficaa_val); adev 729 drivers/gpu/drm/amd/amdgpu/amdgpu.h void (*set_fica)(struct amdgpu_device *adev, uint32_t ficaa_val, adev 1029 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_device_init(struct amdgpu_device *adev, adev 1033 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_device_fini(struct amdgpu_device *adev); adev 1034 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_gpu_wait_for_idle(struct amdgpu_device *adev); adev 1036 drivers/gpu/drm/amd/amdgpu/amdgpu.h uint32_t amdgpu_mm_rreg(struct amdgpu_device *adev, uint32_t reg, adev 1038 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_mm_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v, adev 1040 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value); adev 1041 drivers/gpu/drm/amd/amdgpu/amdgpu.h uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset); adev 1043 drivers/gpu/drm/amd/amdgpu/amdgpu.h u32 amdgpu_io_rreg(struct amdgpu_device *adev, u32 reg); adev 1044 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_io_wreg(struct amdgpu_device *adev, u32 reg, u32 v); adev 1047 drivers/gpu/drm/amd/amdgpu/amdgpu.h bool amdgpu_device_has_dc_support(struct amdgpu_device *adev); adev 1049 drivers/gpu/drm/amd/amdgpu/amdgpu.h int emu_soc_asic_init(struct amdgpu_device *adev); adev 1058 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RREG32_NO_KIQ(reg) amdgpu_mm_rreg(adev, (reg), AMDGPU_REGS_NO_KIQ) adev 1059 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_NO_KIQ(reg, v) amdgpu_mm_wreg(adev, (reg), (v), AMDGPU_REGS_NO_KIQ) adev 1061 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RREG8(reg) amdgpu_mm_rreg8(adev, (reg)) adev 1062 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG8(reg, v) amdgpu_mm_wreg8(adev, (reg), (v)) adev 1064 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RREG32(reg) amdgpu_mm_rreg(adev, (reg), 0) adev 1065 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RREG32_IDX(reg) amdgpu_mm_rreg(adev, (reg), AMDGPU_REGS_IDX) adev 1066 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define DREG32(reg) printk(KERN_INFO "REGISTER: " #reg " : 0x%08X\n", amdgpu_mm_rreg(adev, (reg), 0)) adev 1067 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32(reg, v) amdgpu_mm_wreg(adev, (reg), (v), 0) adev 1068 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_IDX(reg, v) amdgpu_mm_wreg(adev, (reg), (v), AMDGPU_REGS_IDX) adev 1071 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RREG32_PCIE(reg) adev->pcie_rreg(adev, (reg)) adev 1072 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_PCIE(reg, v) adev->pcie_wreg(adev, (reg), (v)) adev 1073 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RREG32_PCIE_PORT(reg) adev->pciep_rreg(adev, (reg)) adev 1074 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_PCIE_PORT(reg, v) adev->pciep_wreg(adev, (reg), (v)) adev 1075 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RREG64_PCIE(reg) adev->pcie_rreg64(adev, (reg)) adev 1076 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG64_PCIE(reg, v) adev->pcie_wreg64(adev, (reg), (v)) adev 1077 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RREG32_SMC(reg) adev->smc_rreg(adev, (reg)) adev 1078 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_SMC(reg, v) adev->smc_wreg(adev, (reg), (v)) adev 1079 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RREG32_UVD_CTX(reg) adev->uvd_ctx_rreg(adev, (reg)) adev 1080 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_UVD_CTX(reg, v) adev->uvd_ctx_wreg(adev, (reg), (v)) adev 1081 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RREG32_DIDT(reg) adev->didt_rreg(adev, (reg)) adev 1082 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_DIDT(reg, v) adev->didt_wreg(adev, (reg), (v)) adev 1083 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RREG32_GC_CAC(reg) adev->gc_cac_rreg(adev, (reg)) adev 1084 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_GC_CAC(reg, v) adev->gc_cac_wreg(adev, (reg), (v)) adev 1085 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RREG32_SE_CAC(reg) adev->se_cac_rreg(adev, (reg)) adev 1086 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_SE_CAC(reg, v) adev->se_cac_wreg(adev, (reg), (v)) adev 1087 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RREG32_AUDIO_ENDPT(block, reg) adev->audio_endpt_rreg(adev, (block), (reg)) adev 1088 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_AUDIO_ENDPT(block, reg, v) adev->audio_endpt_wreg(adev, (block), (reg), (v)) adev 1105 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define DREG32_SYS(sqf, adev, reg) seq_printf((sqf), #reg " : 0x%08X\n", amdgpu_mm_rreg((adev), (reg), false)) adev 1106 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RREG32_IO(reg) amdgpu_io_rreg(adev, (reg)) adev 1107 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define WREG32_IO(reg, v) amdgpu_io_wreg(adev, (reg), (v)) adev 1128 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define RBIOS8(i) (adev->bios[i]) adev 1135 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_set_vga_state(adev, state) (adev)->asic_funcs->set_vga_state((adev), (state)) adev 1136 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_reset(adev) (adev)->asic_funcs->reset((adev)) adev 1137 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_reset_method(adev) (adev)->asic_funcs->reset_method((adev)) adev 1138 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_get_xclk(adev) (adev)->asic_funcs->get_xclk((adev)) adev 1139 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_set_uvd_clocks(adev, v, d) (adev)->asic_funcs->set_uvd_clocks((adev), (v), (d)) adev 1140 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_set_vce_clocks(adev, ev, ec) (adev)->asic_funcs->set_vce_clocks((adev), (ev), (ec)) adev 1141 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_get_pcie_lanes(adev) (adev)->asic_funcs->get_pcie_lanes((adev)) adev 1142 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_set_pcie_lanes(adev, l) (adev)->asic_funcs->set_pcie_lanes((adev), (l)) adev 1143 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_get_gpu_clock_counter(adev) (adev)->asic_funcs->get_gpu_clock_counter((adev)) adev 1144 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_read_disabled_bios(adev) (adev)->asic_funcs->read_disabled_bios((adev)) adev 1145 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_read_bios_from_rom(adev, b, l) (adev)->asic_funcs->read_bios_from_rom((adev), (b), (l)) adev 1146 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_read_register(adev, se, sh, offset, v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v))) adev 1147 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_get_config_memsize(adev) (adev)->asic_funcs->get_config_memsize((adev)) adev 1148 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_flush_hdp(adev, r) (adev)->asic_funcs->flush_hdp((adev), (r)) adev 1149 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_invalidate_hdp(adev, r) (adev)->asic_funcs->invalidate_hdp((adev), (r)) adev 1150 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_need_full_reset(adev) (adev)->asic_funcs->need_full_reset((adev)) adev 1151 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_init_doorbell_index(adev) (adev)->asic_funcs->init_doorbell_index((adev)) adev 1152 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_get_pcie_usage(adev, cnt0, cnt1) ((adev)->asic_funcs->get_pcie_usage((adev), (cnt0), (cnt1))) adev 1153 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_need_reset_on_init(adev) (adev)->asic_funcs->need_reset_on_init((adev)) adev 1154 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_asic_get_pcie_replay_count(adev) ((adev)->asic_funcs->get_pcie_replay_count((adev))) adev 1155 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter)); adev 1158 drivers/gpu/drm/amd/amdgpu/amdgpu.h bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev); adev 1159 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_device_gpu_recover(struct amdgpu_device *adev, adev 1161 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_device_pci_config_reset(struct amdgpu_device *adev); adev 1162 drivers/gpu/drm/amd/amdgpu/amdgpu.h bool amdgpu_device_need_post(struct amdgpu_device *adev); adev 1164 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes, adev 1166 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev); adev 1167 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_device_program_register_sequence(struct amdgpu_device *adev, adev 1172 drivers/gpu/drm/amd/amdgpu/amdgpu.h bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev, adev 1210 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_device_ip_suspend(struct amdgpu_device *adev); adev 1240 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_acpi_init(struct amdgpu_device *adev); adev 1241 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_acpi_fini(struct amdgpu_device *adev); adev 1242 drivers/gpu/drm/amd/amdgpu/amdgpu.h bool amdgpu_acpi_is_pcie_performance_request_supported(struct amdgpu_device *adev); adev 1243 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_acpi_pcie_performance_request(struct amdgpu_device *adev, adev 1245 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev); adev 1247 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_acpi_get_backlight_caps(struct amdgpu_device *adev, adev 1250 drivers/gpu/drm/amd/amdgpu/amdgpu.h static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; } adev 1251 drivers/gpu/drm/amd/amdgpu/amdgpu.h static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { } adev 1259 drivers/gpu/drm/amd/amdgpu/amdgpu.h int amdgpu_dm_display_resume(struct amdgpu_device *adev ); adev 1261 drivers/gpu/drm/amd/amdgpu/amdgpu.h static inline int amdgpu_dm_display_resume(struct amdgpu_device *adev) { return 0; } adev 1265 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_register_gpu_instance(struct amdgpu_device *adev); adev 1266 drivers/gpu/drm/amd/amdgpu/amdgpu.h void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev); adev 98 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 100 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.parent = adev->dev; adev 102 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.cgs_device = adev 103 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c amdgpu_cgs_create_device(adev); adev 104 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c if (!adev->acp.cgs_device) adev 112 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 114 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c if (adev->acp.cgs_device) adev 115 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c amdgpu_cgs_destroy_device(adev->acp.cgs_device); adev 121 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c void *adev; adev 128 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c struct amdgpu_device *adev; adev 132 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev = apd->adev; adev 139 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c if (adev->powerplay.pp_funcs && adev 140 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->powerplay.pp_funcs->set_powergating_by_smu) adev 141 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true); adev 149 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c struct amdgpu_device *adev; adev 153 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev = apd->adev; adev 160 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c if (adev->powerplay.pp_funcs->set_powergating_by_smu) adev 161 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false); adev 194 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 197 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_ACP); adev 202 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c r = amd_acp_hw_init(adev->acp.cgs_device, adev 206 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true); adev 212 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c if (adev->rmmio_size == 0 || adev->rmmio_size < 0x5289) adev 215 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c acp_base = adev->rmmio_base; adev 218 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_genpd = kzalloc(sizeof(struct acp_pm_domain), GFP_KERNEL); adev 219 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c if (adev->acp.acp_genpd == NULL) adev 222 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_genpd->gpd.name = "ACP_AUDIO"; adev 223 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_genpd->gpd.power_off = acp_poweroff; adev 224 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_genpd->gpd.power_on = acp_poweron; adev 227 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_genpd->adev = adev; adev 229 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c pm_genpd_init(&adev->acp.acp_genpd->gpd, NULL, false); adev 231 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell = kcalloc(ACP_DEVS, sizeof(struct mfd_cell), adev 234 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c if (adev->acp.acp_cell == NULL) { adev 239 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res = kcalloc(5, sizeof(struct resource), GFP_KERNEL); adev 240 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c if (adev->acp.acp_res == NULL) { adev 251 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c switch (adev->asic_type) { adev 263 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c switch (adev->asic_type) { adev 280 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c switch (adev->asic_type) { adev 293 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[0].name = "acp2x_dma"; adev 294 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[0].flags = IORESOURCE_MEM; adev 295 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[0].start = acp_base; adev 296 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[0].end = acp_base + ACP_DMA_REGS_END; adev 298 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[1].name = "acp2x_dw_i2s_play"; adev 299 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[1].flags = IORESOURCE_MEM; adev 300 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[1].start = acp_base + ACP_I2S_PLAY_REGS_START; adev 301 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[1].end = acp_base + ACP_I2S_PLAY_REGS_END; adev 303 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[2].name = "acp2x_dw_i2s_cap"; adev 304 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[2].flags = IORESOURCE_MEM; adev 305 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[2].start = acp_base + ACP_I2S_CAP_REGS_START; adev 306 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[2].end = acp_base + ACP_I2S_CAP_REGS_END; adev 308 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[3].name = "acp2x_dw_bt_i2s_play_cap"; adev 309 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[3].flags = IORESOURCE_MEM; adev 310 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[3].start = acp_base + ACP_BT_PLAY_REGS_START; adev 311 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[3].end = acp_base + ACP_BT_PLAY_REGS_END; adev 313 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[4].name = "acp2x_dma_irq"; adev 314 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[4].flags = IORESOURCE_IRQ; adev 315 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[4].start = amdgpu_irq_create_mapping(adev, 162); adev 316 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_res[4].end = adev->acp.acp_res[4].start; adev 318 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[0].name = "acp_audio_dma"; adev 319 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[0].num_resources = 5; adev 320 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[0].resources = &adev->acp.acp_res[0]; adev 321 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[0].platform_data = &adev->asic_type; adev 322 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[0].pdata_size = sizeof(adev->asic_type); adev 324 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[1].name = "designware-i2s"; adev 325 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[1].num_resources = 1; adev 326 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[1].resources = &adev->acp.acp_res[1]; adev 327 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[1].platform_data = &i2s_pdata[0]; adev 328 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[1].pdata_size = sizeof(struct i2s_platform_data); adev 330 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[2].name = "designware-i2s"; adev 331 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[2].num_resources = 1; adev 332 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[2].resources = &adev->acp.acp_res[2]; adev 333 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[2].platform_data = &i2s_pdata[1]; adev 334 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[2].pdata_size = sizeof(struct i2s_platform_data); adev 336 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[3].name = "designware-i2s"; adev 337 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[3].num_resources = 1; adev 338 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[3].resources = &adev->acp.acp_res[3]; adev 339 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[3].platform_data = &i2s_pdata[2]; adev 340 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->acp.acp_cell[3].pdata_size = sizeof(struct i2s_platform_data); adev 342 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c r = mfd_add_hotplug_devices(adev->acp.parent, adev->acp.acp_cell, adev 348 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i); adev 349 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c r = pm_genpd_add_device(&adev->acp.acp_genpd->gpd, dev); adev 358 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); adev 361 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); adev 365 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); adev 370 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); adev 377 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL); adev 379 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val); adev 384 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS); adev 388 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); adev 395 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); adev 397 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); adev 402 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c kfree(adev->acp.acp_res); adev 403 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c kfree(adev->acp.acp_cell); adev 404 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c kfree(adev->acp.acp_genpd); adev 420 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 423 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c if (!adev->acp.acp_genpd) { adev 424 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false); adev 429 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); adev 432 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); adev 436 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); adev 441 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); adev 447 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL); adev 449 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val); adev 454 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS); adev 458 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); adev 465 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i); adev 472 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c mfd_remove_devices(adev->acp.parent); adev 473 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c kfree(adev->acp.acp_res); adev 474 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c kfree(adev->acp.acp_genpd); adev 475 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c kfree(adev->acp.acp_cell); adev 482 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 485 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c if (!adev->acp.acp_cell) adev 486 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false); adev 492 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 495 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c if (!adev->acp.acp_cell) adev 496 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true); adev 529 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 532 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c if (adev->powerplay.pp_funcs && adev 533 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c adev->powerplay.pp_funcs->set_powergating_by_smu) adev 534 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, enable); adev 413 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c static int amdgpu_atif_handler(struct amdgpu_device *adev, adev 416 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c struct amdgpu_atif *atif = adev->atif; adev 449 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c !amdgpu_device_has_dc_support(adev)) { adev 458 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c amdgpu_display_backlight_set_level(adev, enc, req.backlight_level); adev 467 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c if (adev->flags & AMD_IS_PX) { adev 468 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c pm_runtime_get_sync(adev->ddev->dev); adev 470 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c drm_helper_hpd_irq_event(adev->ddev); adev 471 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c pm_runtime_mark_last_busy(adev->ddev->dev); adev 472 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c pm_runtime_put_autosuspend(adev->ddev->dev); adev 607 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c bool amdgpu_acpi_is_pcie_performance_request_supported(struct amdgpu_device *adev) adev 609 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c struct amdgpu_atcs *atcs = &adev->atcs; adev 626 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev) adev 630 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c struct amdgpu_atcs *atcs = &adev->atcs; adev 633 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c handle = ACPI_HANDLE(&adev->pdev->dev); adev 660 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c int amdgpu_acpi_pcie_performance_request(struct amdgpu_device *adev, adev 665 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c struct amdgpu_atcs *atcs = &adev->atcs; adev 672 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c if (amdgpu_acpi_pcie_notify_device_ready(adev)) adev 676 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c handle = ACPI_HANDLE(&adev->pdev->dev); adev 685 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c atcs_input.client_id = adev->pdev->devfn | (adev->pdev->bus->number << 8); adev 745 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c struct amdgpu_device *adev = container_of(nb, struct amdgpu_device, acpi_nb); adev 754 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c amdgpu_pm_acpi_event_handler(adev); adev 758 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c return amdgpu_atif_handler(adev, entry); adev 771 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c int amdgpu_acpi_init(struct amdgpu_device *adev) adev 775 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c struct amdgpu_atcs *atcs = &adev->atcs; adev 779 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c handle = ACPI_HANDLE(&adev->pdev->dev); adev 781 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c if (!adev->bios || !handle) adev 809 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c adev->atif = atif; adev 815 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c list_for_each_entry(tmp, &adev->ddev->mode_config.encoder_list, adev 860 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c adev->acpi_nb.notifier_call = amdgpu_acpi_event; adev 861 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c register_acpi_notifier(&adev->acpi_nb); adev 866 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c void amdgpu_acpi_get_backlight_caps(struct amdgpu_device *adev, adev 869 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c if (!adev->atif) { adev 873 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c caps->caps_valid = adev->atif->backlight_caps.caps_valid; adev 874 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c caps->min_input_signal = adev->atif->backlight_caps.min_input_signal; adev 875 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c caps->max_input_signal = adev->atif->backlight_caps.max_input_signal; adev 885 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c void amdgpu_acpi_fini(struct amdgpu_device *adev) adev 887 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c unregister_acpi_notifier(&adev->acpi_nb); adev 888 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c kfree(adev->atif); adev 64 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev) adev 68 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c switch (adev->asic_type) { adev 99 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c dev_info(adev->dev, "kfd not supported on this ASIC\n"); adev 103 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c adev->kfd.dev = kgd2kfd_probe((struct kgd_dev *)adev, adev 104 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c adev->pdev, kfd2kgd); adev 106 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (adev->kfd.dev) adev 107 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c amdgpu_amdkfd_total_mem_size += adev->gmc.real_vram_size; adev 123 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev, adev 132 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (adev->doorbell.size > adev->doorbell.num_doorbells * sizeof(u32)) { adev 133 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c *aperture_base = adev->doorbell.base; adev 134 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c *aperture_size = adev->doorbell.size; adev 135 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c *start_offset = adev->doorbell.num_doorbells * sizeof(u32); adev 143 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) adev 148 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (adev->kfd.dev) { adev 151 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c .num_pipe_per_mec = adev->gfx.mec.num_pipe_per_mec, adev 152 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe, adev 153 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c .gpuvm_size = min(adev->vm_manager.max_pfn adev 156 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c .drm_render_minor = adev->ddev->render->index, adev 157 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c .sdma_doorbell_idx = adev->doorbell_index.sdma_engine, adev 165 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c adev->gfx.mec.queue_bitmap, adev 169 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (adev->gfx.kiq.ring.sched.ready) adev 170 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c clear_bit(amdgpu_gfx_mec_queue_to_bit(adev, adev 171 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c adev->gfx.kiq.ring.me - 1, adev 172 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c adev->gfx.kiq.ring.pipe, adev 173 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c adev->gfx.kiq.ring.queue), adev 180 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c * adev->gfx.mec.num_pipe_per_mec adev 181 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c * adev->gfx.mec.num_queue_per_pipe; adev 185 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c amdgpu_doorbell_get_kfd_info(adev, adev 198 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (adev->asic_type >= CHIP_VEGA10) { adev 200 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c adev->doorbell_index.first_non_cp; adev 202 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c adev->doorbell_index.last_non_cp; adev 205 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c kgd2kfd_device_init(adev->kfd.dev, &gpu_resources); adev 209 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c void amdgpu_amdkfd_device_fini(struct amdgpu_device *adev) adev 211 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (adev->kfd.dev) { adev 212 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c kgd2kfd_device_exit(adev->kfd.dev); adev 213 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c adev->kfd.dev = NULL; adev 217 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev, adev 220 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (adev->kfd.dev) adev 221 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c kgd2kfd_interrupt(adev->kfd.dev, ih_ring_entry); adev 224 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c void amdgpu_amdkfd_suspend(struct amdgpu_device *adev) adev 226 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (adev->kfd.dev) adev 227 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c kgd2kfd_suspend(adev->kfd.dev); adev 230 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c int amdgpu_amdkfd_resume(struct amdgpu_device *adev) adev 234 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (adev->kfd.dev) adev 235 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c r = kgd2kfd_resume(adev->kfd.dev); adev 240 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev) adev 244 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (adev->kfd.dev) adev 245 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c r = kgd2kfd_pre_reset(adev->kfd.dev); adev 250 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev) adev 254 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (adev->kfd.dev) adev 255 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c r = kgd2kfd_post_reset(adev->kfd.dev); adev 262 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 264 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (amdgpu_device_should_recover_gpu(adev)) adev 265 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c amdgpu_device_gpu_recover(adev, NULL); adev 272 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 289 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c r = amdgpu_bo_create(adev, &bp, &bo); adev 291 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c dev_err(adev->dev, adev 299 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c dev_err(adev->dev, "(%d) failed to reserve bo for amdkfd\n", r); adev 305 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c dev_err(adev->dev, "(%d) failed to pin bo for amdkfd\n", r); adev 311 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c dev_err(adev->dev, "%p bind failed\n", bo); adev 317 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c dev_err(adev->dev, adev 354 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 367 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c r = amdgpu_bo_create(adev, &bp, &bo); adev 369 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c dev_err(adev->dev, adev 388 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 392 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->gfx.pfp_fw_version; adev 395 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->gfx.me_fw_version; adev 398 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->gfx.ce_fw_version; adev 401 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->gfx.mec_fw_version; adev 404 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->gfx.mec2_fw_version; adev 407 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->gfx.rlc_fw_version; adev 410 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->sdma.instance[0].fw_version; adev 413 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->sdma.instance[1].fw_version; adev 425 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 426 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c uint64_t address_mask = adev->dev->dma_mask ? ~*adev->dev->dma_mask : adev 428 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c resource_size_t aper_limit = adev->gmc.aper_base + adev->gmc.aper_size; adev 431 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (!(adev->gmc.aper_base & address_mask || aper_limit & address_mask)) { adev 432 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c mem_info->local_mem_size_public = adev->gmc.visible_vram_size; adev 433 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c mem_info->local_mem_size_private = adev->gmc.real_vram_size - adev 434 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c adev->gmc.visible_vram_size; adev 437 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c mem_info->local_mem_size_private = adev->gmc.real_vram_size; adev 439 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c mem_info->vram_width = adev->gmc.vram_width; adev 442 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c &adev->gmc.aper_base, &aper_limit, adev 446 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (amdgpu_sriov_vf(adev)) adev 447 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c mem_info->mem_clk_max = adev->clock.default_mclk / 100; adev 448 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c else if (adev->powerplay.pp_funcs) { adev 452 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c mem_info->mem_clk_max = amdgpu_dpm_get_mclk(adev, false) / 100; adev 459 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 461 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (adev->gfx.funcs->get_gpu_clock_counter) adev 462 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->gfx.funcs->get_gpu_clock_counter(adev); adev 468 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 471 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (amdgpu_sriov_vf(adev)) adev 472 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->clock.default_sclk / 100; adev 473 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c else if (adev->powerplay.pp_funcs) adev 474 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return amdgpu_dpm_get_sclk(adev, false) / 100; adev 481 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 482 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_cu_info acu_info = adev->gfx.cu_info; adev 492 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c cu_info->num_shader_engines = adev->gfx.config.max_shader_engines; adev 493 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c cu_info->num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se; adev 494 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c cu_info->num_cu_per_sh = adev->gfx.config.max_cu_per_sh; adev 508 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 524 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (obj->dev->driver != adev->ddev->driver) adev 528 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c adev = obj->dev->dev_private; adev 537 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c *dma_buf_kgd = (struct kgd_dev *)adev; adev 560 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 562 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return amdgpu_vram_mgr_usage(&adev->mman.bdev.man[TTM_PL_VRAM]); adev 567 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 569 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->gmc.xgmi.hive_id; adev 574 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)dst; adev 575 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c int ret = amdgpu_xgmi_get_hops_count(adev, peer_adev); adev 579 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c adev->gmc.xgmi.physical_node_id, adev 588 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 590 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->rmmio_remap.bus_addr; adev 595 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 597 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->gds.gws_size; adev 604 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 613 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c ring = &adev->gfx.compute_ring[0]; adev 616 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c ring = &adev->sdma.instance[0].ring; adev 619 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c ring = &adev->sdma.instance[1].ring; adev 627 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c ret = amdgpu_job_alloc(adev, 1, &job, NULL); adev 657 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 659 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (is_support_sw_smu(adev)) adev 660 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c smu_switch_power_profile(&adev->smu, adev 663 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c else if (adev->powerplay.pp_funcs && adev 664 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c adev->powerplay.pp_funcs->switch_power_profile) adev 665 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c amdgpu_dpm_switch_power_profile(adev, adev 670 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid) adev 672 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c if (adev->kfd.dev) { adev 682 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 684 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c return adev->have_atomics_support; adev 697 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev, adev 125 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h void amdgpu_amdkfd_suspend(struct amdgpu_device *adev); adev 126 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h int amdgpu_amdkfd_resume(struct amdgpu_device *adev); adev 127 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev, adev 129 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev); adev 130 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h void amdgpu_amdkfd_device_init(struct amdgpu_device *adev); adev 131 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h void amdgpu_amdkfd_device_fini(struct amdgpu_device *adev); adev 146 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid); adev 148 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev); adev 150 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev); adev 205 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev, adev 72 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c static uint32_t get_sdma_base_addr(struct amdgpu_device *adev, adev 104 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c static u32 sdma_v4_0_get_reg_offset(struct amdgpu_device *adev, adev 109 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c return (adev->reg_offset[SDMA0_HWIP][0][0] + offset); adev 111 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c return (adev->reg_offset[SDMA1_HWIP][0][1] + offset); adev 113 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c return (adev->reg_offset[SDMA2_HWIP][0][1] + offset); adev 115 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c return (adev->reg_offset[SDMA3_HWIP][0][1] + offset); adev 117 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c return (adev->reg_offset[SDMA4_HWIP][0][1] + offset); adev 119 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c return (adev->reg_offset[SDMA5_HWIP][0][1] + offset); adev 121 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c return (adev->reg_offset[SDMA6_HWIP][0][1] + offset); adev 123 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c return (adev->reg_offset[SDMA7_HWIP][0][1] + offset); adev 133 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 142 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, adev 144 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c sdmax_gfx_context_cntl = sdma_v4_0_get_reg_offset(adev, adev 207 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 208 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c uint32_t sdma_base_addr = get_sdma_base_addr(adev, engine_id, queue_id); adev 236 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 242 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, adev 256 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 263 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, adev 86 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c static uint32_t get_watch_base_addr(struct amdgpu_device *adev); adev 116 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 118 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c config->gb_addr_config = adev->gfx.config.gb_addr_config; adev 125 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c config->num_banks = REG_GET_FIELD(adev->gfx.config.mc_arb_ramcfg, adev 127 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c config->num_ranks = REG_GET_FIELD(adev->gfx.config.mc_arb_ramcfg, adev 131 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c config->tile_config_ptr = adev->gfx.config.tile_mode_array; adev 133 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c ARRAY_SIZE(adev->gfx.config.tile_mode_array); adev 135 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c adev->gfx.config.macrotile_mode_array; adev 137 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c ARRAY_SIZE(adev->gfx.config.macrotile_mode_array); adev 181 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 183 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c mutex_lock(&adev->srbm_mutex); adev 184 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c nv_grbm_select(adev, mec, pipe, queue, vmid); adev 189 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 191 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c nv_grbm_select(adev, 0, 0, 0, 0); adev 192 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c mutex_unlock(&adev->srbm_mutex); adev 198 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 200 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; adev 201 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); adev 206 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c static uint32_t get_queue_mask(struct amdgpu_device *adev, adev 209 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c unsigned int bit = (pipe_id * adev->gfx.mec.num_queue_per_pipe + adev 226 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 240 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 291 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 295 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; adev 296 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); adev 309 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c static uint32_t get_sdma_base_addr(struct amdgpu_device *adev, adev 336 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c static uint32_t get_watch_base_addr(struct amdgpu_device *adev) adev 362 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 376 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; adev 377 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); adev 436 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c pr_debug("%s setting CP_PQ_WPTR_POLL_CNTL1 to %x\n", __func__, get_queue_mask(adev, pipe_id, queue_id)); adev 438 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c get_queue_mask(adev, pipe_id, queue_id)); adev 458 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 489 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 498 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, adev 565 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 566 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c uint32_t sdma_base_addr = get_sdma_base_addr(adev, engine_id, queue_id); adev 598 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 619 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 625 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, adev 641 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 747 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 754 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, adev 786 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 797 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 804 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c static int invalidate_tlbs_with_kiq(struct amdgpu_device *adev, uint16_t pasid) adev 808 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_ring *ring = &adev->gfx.kiq.ring; adev 810 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c spin_lock(&adev->gfx.kiq.ring_lock); adev 818 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c spin_unlock(&adev->gfx.kiq.ring_lock); adev 820 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c r = amdgpu_fence_wait_polling(ring, seq, adev->usec_timeout); adev 831 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 833 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_ring *ring = &adev->gfx.kiq.ring; adev 836 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c return invalidate_tlbs_with_kiq(adev, pasid); adev 839 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) adev 844 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c amdgpu_gmc_flush_gpu_tlb(adev, vmid, adev 856 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 858 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) { adev 863 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c amdgpu_gmc_flush_gpu_tlb(adev, vmid, AMDGPU_GFXHUB_0, 0); adev 885 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 888 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c mutex_lock(&adev->grbm_idx_mutex); adev 901 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c mutex_unlock(&adev->grbm_idx_mutex); adev 916 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 919 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) { adev 933 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c lower_32_bits(adev->vm_manager.max_pfn - 1)); adev 935 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c upper_32_bits(adev->vm_manager.max_pfn - 1)); adev 154 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 156 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c config->gb_addr_config = adev->gfx.config.gb_addr_config; adev 157 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c config->num_banks = REG_GET_FIELD(adev->gfx.config.mc_arb_ramcfg, adev 159 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c config->num_ranks = REG_GET_FIELD(adev->gfx.config.mc_arb_ramcfg, adev 162 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c config->tile_config_ptr = adev->gfx.config.tile_mode_array; adev 164 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c ARRAY_SIZE(adev->gfx.config.tile_mode_array); adev 166 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c adev->gfx.config.macrotile_mode_array; adev 168 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c ARRAY_SIZE(adev->gfx.config.macrotile_mode_array); adev 212 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 215 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c mutex_lock(&adev->srbm_mutex); adev 221 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 224 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c mutex_unlock(&adev->srbm_mutex); adev 230 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 232 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; adev 233 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); adev 249 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 264 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 289 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 293 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; adev 294 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); adev 333 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 378 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 413 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 478 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 504 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 525 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 546 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 552 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c if (adev->in_gpu_reset) adev 646 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 680 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 704 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 733 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 736 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c mutex_lock(&adev->grbm_idx_mutex); adev 749 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c mutex_unlock(&adev->grbm_idx_mutex); adev 765 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 775 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 784 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 794 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 796 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) { adev 806 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 810 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c if (adev->in_gpu_reset) adev 814 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) adev 831 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 833 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) { adev 852 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 109 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 111 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c config->gb_addr_config = adev->gfx.config.gb_addr_config; adev 112 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c config->num_banks = REG_GET_FIELD(adev->gfx.config.mc_arb_ramcfg, adev 114 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c config->num_ranks = REG_GET_FIELD(adev->gfx.config.mc_arb_ramcfg, adev 117 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c config->tile_config_ptr = adev->gfx.config.tile_mode_array; adev 119 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c ARRAY_SIZE(adev->gfx.config.tile_mode_array); adev 121 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c adev->gfx.config.macrotile_mode_array; adev 123 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c ARRAY_SIZE(adev->gfx.config.macrotile_mode_array); adev 168 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 171 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c mutex_lock(&adev->srbm_mutex); adev 177 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 180 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c mutex_unlock(&adev->srbm_mutex); adev 186 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 188 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; adev 189 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); adev 205 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 220 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 246 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 250 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; adev 251 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); adev 289 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 303 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; adev 304 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); adev 363 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 398 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 462 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 497 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 518 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 539 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 546 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c if (adev->in_gpu_reset) adev 642 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 678 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 688 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 712 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 715 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c mutex_lock(&adev->grbm_idx_mutex); adev 728 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c mutex_unlock(&adev->grbm_idx_mutex); adev 743 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 753 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 755 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) { adev 765 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 769 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c if (adev->in_gpu_reset) adev 773 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) adev 790 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 792 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) { adev 69 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 71 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c config->gb_addr_config = adev->gfx.config.gb_addr_config; adev 73 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c config->tile_config_ptr = adev->gfx.config.tile_mode_array; adev 75 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c ARRAY_SIZE(adev->gfx.config.tile_mode_array); adev 77 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c adev->gfx.config.macrotile_mode_array; adev 79 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c ARRAY_SIZE(adev->gfx.config.macrotile_mode_array); adev 92 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 94 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c mutex_lock(&adev->srbm_mutex); adev 95 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c soc15_grbm_select(adev, mec, pipe, queue, vmid); adev 100 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 102 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c soc15_grbm_select(adev, 0, 0, 0, 0); adev 103 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c mutex_unlock(&adev->srbm_mutex); adev 109 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 111 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; adev 112 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); adev 117 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c static uint32_t get_queue_mask(struct amdgpu_device *adev, adev 120 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c unsigned int bit = (pipe_id * adev->gfx.mec.num_queue_per_pipe + adev 137 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 151 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 211 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 215 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; adev 216 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); adev 229 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c static uint32_t get_sdma_base_addr(struct amdgpu_device *adev, adev 264 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 277 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; adev 278 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); adev 338 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c get_queue_mask(adev, pipe_id, queue_id)); adev 358 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 389 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 398 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, adev 464 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 465 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c uint32_t sdma_base_addr = get_sdma_base_addr(adev, engine_id, queue_id); adev 494 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 515 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 521 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, adev 537 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 543 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c if (adev->in_gpu_reset) adev 585 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 592 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c sdma_base_addr = get_sdma_base_addr(adev, m->sdma_engine_id, adev 624 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 635 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 642 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c static int invalidate_tlbs_with_kiq(struct amdgpu_device *adev, uint16_t pasid, adev 647 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_ring *ring = &adev->gfx.kiq.ring; adev 649 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c spin_lock(&adev->gfx.kiq.ring_lock); adev 659 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c spin_unlock(&adev->gfx.kiq.ring_lock); adev 661 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c r = amdgpu_fence_wait_polling(ring, seq, adev->usec_timeout); adev 672 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 674 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_ring *ring = &adev->gfx.kiq.ring; adev 677 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c if (adev->in_gpu_reset) adev 679 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c if (adev->gmc.xgmi.num_physical_nodes && adev 680 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c adev->asic_type == CHIP_VEGA20) adev 684 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c return invalidate_tlbs_with_kiq(adev, pasid, flush_type); adev 687 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) adev 692 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c for (i = 0; i < adev->num_vmhubs; i++) adev 693 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c amdgpu_gmc_flush_gpu_tlb(adev, vmid, adev 705 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = (struct amdgpu_device *) kgd; adev 708 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) { adev 728 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c for (i = 0; i < adev->num_vmhubs; i++) adev 729 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c amdgpu_gmc_flush_gpu_tlb(adev, vmid, i, 0); adev 752 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 755 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c mutex_lock(&adev->grbm_idx_mutex); adev 768 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c mutex_unlock(&adev->grbm_idx_mutex); adev 792 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 794 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) { adev 804 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c if (adev->asic_type == CHIP_ARCTURUS) { adev 806 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c mmhub_v9_4_setup_vm_pt_regs(adev, 0, vmid, page_table_base); adev 807 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c mmhub_v9_4_setup_vm_pt_regs(adev, 1, vmid, page_table_base); adev 809 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c mmhub_v1_0_setup_vm_pt_regs(adev, vmid, page_table_base); adev 811 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c gfxhub_v1_0_setup_vm_pt_regs(adev, vmid, page_table_base); adev 116 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c static int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device *adev, adev 123 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c acc_size = ttm_bo_dma_acc_size(&adev->mman.bdev, size, adev 149 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c (adev->kfd.vram_used + vram_needed > adev 150 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c adev->gmc.real_vram_size - reserved_for_pt)) { adev 155 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c adev->kfd.vram_used += vram_needed; adev 162 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c static void unreserve_mem_limit(struct amdgpu_device *adev, adev 167 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c acc_size = ttm_bo_dma_acc_size(&adev->mman.bdev, size, adev 181 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c adev->kfd.vram_used -= size; adev 182 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c WARN_ONCE(adev->kfd.vram_used < 0, adev 196 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 205 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c unreserve_mem_limit(adev, amdgpu_bo_size(bo), domain, sg); adev 313 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c struct amdgpu_device *adev = amdgpu_ttm_adev(pd->tbo.bdev); adev 320 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ret = amdgpu_vm_validate_pt_bos(adev, vm, amdgpu_amdkfd_validate, adev 349 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c struct amdgpu_device *adev = amdgpu_ttm_adev(pd->tbo.bdev); adev 352 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ret = amdgpu_vm_update_directories(adev, vm); adev 371 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c static int add_bo_to_vm(struct amdgpu_device *adev, struct kgd_mem *mem, adev 398 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c bo_va_entry->bo_va = amdgpu_vm_bo_add(adev, vm, bo); adev 407 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c bo_va_entry->pte_flags = amdgpu_gmc_get_pte_flags(adev, adev 409 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c bo_va_entry->kgd_dev = (void *)adev; adev 425 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c amdgpu_vm_bo_rmv(adev, bo_va_entry->bo_va); adev 432 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c static void remove_bo_from_vm(struct amdgpu_device *adev, adev 438 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c amdgpu_vm_bo_rmv(adev, entry->bo_va); adev 706 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c static int unmap_bo_from_gpuvm(struct amdgpu_device *adev, adev 713 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c amdgpu_vm_bo_unmap(adev, bo_va, entry->va); adev 715 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c amdgpu_vm_clear_freed(adev, vm, &bo_va->last_pt_update); adev 722 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c static int update_gpuvm_pte(struct amdgpu_device *adev, adev 730 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ret = amdgpu_vm_bo_update(adev, bo_va, false); adev 739 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c static int map_bo_to_gpuvm(struct amdgpu_device *adev, adev 746 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ret = amdgpu_vm_bo_map(adev, entry->bo_va, entry->va, 0, adev 758 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ret = update_gpuvm_pte(adev, entry, sync); adev 767 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c unmap_bo_from_gpuvm(adev, entry, sync); adev 930 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 939 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ret = amdgpu_vm_init(adev, new_vm, AMDGPU_VM_CONTEXT_COMPUTE, pasid); adev 955 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c amdgpu_vm_fini(adev, new_vm); adev 966 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 977 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ret = amdgpu_vm_make_compute(adev, avm, pasid); adev 991 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev, adev 1027 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 1036 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c amdgpu_vm_fini(adev, avm); adev 1042 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 1056 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c amdgpu_vm_release_compute(adev, avm); adev 1063 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c struct amdgpu_device *adev = amdgpu_ttm_adev(pd->tbo.bdev); adev 1065 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c if (adev->asic_type < CHIP_VEGA10) adev 1075 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 1139 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c byte_align = (adev->family == AMDGPU_FAMILY_VI && adev 1140 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c adev->asic_type != CHIP_FIJI && adev 1141 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c adev->asic_type != CHIP_POLARIS10 && adev 1142 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c adev->asic_type != CHIP_POLARIS11 && adev 1143 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c adev->asic_type != CHIP_POLARIS12 && adev 1144 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c adev->asic_type != CHIP_VEGAM) ? adev 1160 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ret = amdgpu_amdkfd_reserve_mem_limit(adev, size, alloc_domain, !!sg); adev 1176 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ret = amdgpu_bo_create(adev, &bp, &bo); adev 1214 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c unreserve_mem_limit(adev, size, alloc_domain, !!sg); adev 1301 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 1359 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ret = add_bo_to_vm(adev, mem, avm, false, adev 1364 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ret = add_bo_to_vm(adev, mem, avm, adev 1394 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ret = map_bo_to_gpuvm(adev, entry, ctx.sync, adev 1424 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c remove_bo_from_vm(adev, bo_va_entry_aql, bo_size); adev 1427 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c remove_bo_from_vm(adev, bo_va_entry, bo_size); adev 1439 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c struct amdgpu_device *adev = get_amdgpu_device(kgd); adev 1474 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c ret = unmap_bo_from_gpuvm(adev, entry, ctx.sync); adev 1580 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c struct amdgpu_device *adev; adev 1582 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c adev = (struct amdgpu_device *)kgd; adev 1583 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c if (atomic_read(&adev->gmc.vm_fault_info_updated) == 1) { adev 1584 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c *mem = *adev->gmc.vm_fault_info; adev 1586 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c atomic_set(&adev->gmc.vm_fault_info_updated, 0); adev 1597 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c struct amdgpu_device *adev = (struct amdgpu_device *)kgd; adev 1607 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c if (obj->dev->dev_private != adev) adev 39 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c static void amdgpu_atombios_lookup_i2c_gpio_quirks(struct amdgpu_device *adev, adev 89 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_i2c_bus_rec amdgpu_atombios_lookup_i2c_gpio(struct amdgpu_device *adev, adev 92 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct atom_context *ctx = adev->mode_info.atom_context; adev 112 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atombios_lookup_i2c_gpio_quirks(adev, gpio, i); adev 126 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c void amdgpu_atombios_i2c_init(struct amdgpu_device *adev) adev 128 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct atom_context *ctx = adev->mode_info.atom_context; adev 145 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atombios_lookup_i2c_gpio_quirks(adev, gpio, i); adev 151 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->i2c_bus[i] = amdgpu_i2c_create(adev->ddev, &i2c, stmp); adev 160 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atombios_lookup_gpio(struct amdgpu_device *adev, adev 163 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct atom_context *ctx = adev->mode_info.atom_context; adev 199 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atombios_get_hpd_info_from_gpio(struct amdgpu_device *adev, adev 207 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c reg = amdgpu_display_hpd_get_gpio_reg(adev); adev 264 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c bool amdgpu_atombios_has_dce_engine_info(struct amdgpu_device *adev) adev 266 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 291 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c bool amdgpu_atombios_get_connector_info_from_object_table(struct amdgpu_device *adev) adev 293 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 395 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_display_add_encoder(adev, encoder_obj, adev 440 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atombios_lookup_i2c_gpio(adev, adev 502 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c ddc_bus = amdgpu_atombios_lookup_i2c_gpio(adev, adev 510 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c gpio = amdgpu_atombios_lookup_gpio(adev, adev 512 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c hpd = amdgpu_atombios_get_hpd_info_from_gpio(adev, &gpio); adev 533 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_display_add_connector(adev, adev 544 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_link_encoder_connector(adev->ddev); adev 558 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int amdgpu_atombios_get_clock_info(struct amdgpu_device *adev) adev 560 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 569 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_pll *ppll = &adev->clock.ppll[0]; adev 570 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_pll *spll = &adev->clock.spll; adev 571 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_pll *mpll = &adev->clock.mpll; adev 613 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.ppll[i] = *ppll; adev 661 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.default_sclk = adev 663 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.default_mclk = adev 675 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.default_dispclk = adev 678 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (adev->clock.default_dispclk < 53900) { adev 680 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.default_dispclk / 100); adev 681 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.default_dispclk = 60000; adev 682 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c } else if (adev->clock.default_dispclk <= 60000) { adev 684 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.default_dispclk / 100); adev 685 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.default_dispclk = 62500; adev 687 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.dp_extclk = adev 689 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.current_dispclk = adev->clock.default_dispclk; adev 691 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.max_pixel_clock = le16_to_cpu(firmware_info->info.usMaxPixelClock); adev 692 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (adev->clock.max_pixel_clock == 0) adev 693 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->clock.max_pixel_clock = 40000; adev 696 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->mode_info.firmware_flags = adev 702 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->pm.current_sclk = adev->clock.default_sclk; adev 703 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->pm.current_mclk = adev->clock.default_mclk; adev 712 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int amdgpu_atombios_get_gfx_info(struct amdgpu_device *adev) adev 714 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 725 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->gfx.config.max_shader_engines = gfx_info->info.max_shader_engines; adev 726 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->gfx.config.max_tile_pipes = gfx_info->info.max_tile_pipes; adev 727 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->gfx.config.max_cu_per_sh = gfx_info->info.max_cu_per_sh; adev 728 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->gfx.config.max_sh_per_se = gfx_info->info.max_sh_per_se; adev 729 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->gfx.config.max_backends_per_se = gfx_info->info.max_backends_per_se; adev 730 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->gfx.config.max_texture_channel_caches = adev 751 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int amdgpu_atombios_get_vram_width(struct amdgpu_device *adev) adev 753 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 776 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c static void amdgpu_atombios_get_igp_ss_overrides(struct amdgpu_device *adev, adev 780 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 880 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c bool amdgpu_atombios_get_asic_ss_info(struct amdgpu_device *adev, adev 884 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 893 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (!(adev->mode_info.firmware_flags & ATOM_BIOS_INFO_MEMORY_CLOCK_SS_SUPPORT)) adev 897 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (!(adev->mode_info.firmware_flags & ATOM_BIOS_INFO_ENGINE_CLOCK_SS_SUPPORT)) adev 969 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (adev->flags & AMD_IS_APU) adev 970 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atombios_get_igp_ss_overrides(adev, ss, id); adev 996 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int amdgpu_atombios_get_clock_dividers(struct amdgpu_device *adev, adev 1009 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, &crev)) adev 1021 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1035 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (adev->asic_type >= CHIP_TAHITI) adev 1041 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1059 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1070 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1086 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int amdgpu_atombios_get_memory_pll_dividers(struct amdgpu_device *adev, adev 1098 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, &crev)) adev 1111 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1137 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c void amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev, adev 1153 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1156 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c void amdgpu_atombios_get_default_voltages(struct amdgpu_device *adev, adev 1159 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 1189 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int amdgpu_atombios_get_max_vddc(struct amdgpu_device *adev, u8 voltage_type, adev 1196 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, &crev)) adev 1207 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1216 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1228 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int amdgpu_atombios_get_leakage_vddc_based_on_leakage_idx(struct amdgpu_device *adev, adev 1232 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c return amdgpu_atombios_get_max_vddc(adev, VOLTAGE_TYPE_VDDC, leakage_idx, voltage); adev 1235 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int amdgpu_atombios_get_leakage_id_from_vbios(struct amdgpu_device *adev, adev 1242 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, &crev)) adev 1252 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1264 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int amdgpu_atombios_get_leakage_vddc_based_on_leakage_params(struct amdgpu_device *adev, adev 1279 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (!amdgpu_atom_parse_data_header(adev->mode_info.atom_context, index, &size, adev 1284 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (adev->mode_info.atom_context->bios + data_offset); adev 1295 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (adev->mode_info.atom_context->bios + data_offset + adev 1298 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (adev->mode_info.atom_context->bios + data_offset + adev 1301 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (adev->mode_info.atom_context->bios + data_offset + adev 1304 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (adev->mode_info.atom_context->bios + data_offset + adev 1307 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (adev->mode_info.atom_context->bios + data_offset + adev 1355 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int amdgpu_atombios_get_voltage_evv(struct amdgpu_device *adev, adev 1361 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c u32 count = adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; adev 1365 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].v == adev 1377 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c cpu_to_le32(adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].clk); adev 1379 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1416 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int amdgpu_atombios_get_svi2_info(struct amdgpu_device *adev, adev 1426 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context, index, &size, adev 1429 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (adev->mode_info.atom_context->bios + data_offset); adev 1461 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atombios_is_voltage_gpio(struct amdgpu_device *adev, adev 1469 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context, index, &size, adev 1472 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (adev->mode_info.atom_context->bios + data_offset); adev 1496 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int amdgpu_atombios_get_voltage_table(struct amdgpu_device *adev, adev 1507 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context, index, &size, adev 1510 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (adev->mode_info.atom_context->bios + data_offset); adev 1567 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int amdgpu_atombios_init_mc_reg_table(struct amdgpu_device *adev, adev 1579 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context, index, &size, adev 1582 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c (adev->mode_info.atom_context->bios + data_offset); adev 1658 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c bool amdgpu_atombios_has_gpu_virtualization_table(struct amdgpu_device *adev) adev 1664 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context, index, &size, adev 1671 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c void amdgpu_atombios_scratch_regs_lock(struct amdgpu_device *adev, bool lock) adev 1675 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c bios_6_scratch = RREG32(adev->bios_scratch_reg_offset + 6); adev 1685 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c WREG32(adev->bios_scratch_reg_offset + 6, bios_6_scratch); adev 1688 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c static void amdgpu_atombios_scratch_regs_init(struct amdgpu_device *adev) adev 1692 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->bios_scratch_reg_offset = mmBIOS_SCRATCH_0; adev 1694 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c bios_2_scratch = RREG32(adev->bios_scratch_reg_offset + 2); adev 1695 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c bios_6_scratch = RREG32(adev->bios_scratch_reg_offset + 6); adev 1706 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c WREG32(adev->bios_scratch_reg_offset + 2, bios_2_scratch); adev 1707 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c WREG32(adev->bios_scratch_reg_offset + 6, bios_6_scratch); adev 1710 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev, adev 1713 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c u32 tmp = RREG32(adev->bios_scratch_reg_offset + 3); adev 1720 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c WREG32(adev->bios_scratch_reg_offset + 3, tmp); adev 1723 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c bool amdgpu_atombios_scratch_need_asic_init(struct amdgpu_device *adev) adev 1725 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c u32 tmp = RREG32(adev->bios_scratch_reg_offset + 7); adev 1765 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c static int amdgpu_atombios_allocate_fb_scratch(struct amdgpu_device *adev) adev 1767 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct atom_context *ctx = adev->mode_info.atom_context; adev 1789 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->fw_vram_usage.start_offset = (start_addr & adev 1791 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->fw_vram_usage.size = size << 10; adev 1885 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_device *adev = info->dev->dev_private; adev 1901 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_device *adev = info->dev->dev_private; adev 1919 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_device *adev = info->dev->dev_private; adev 1935 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_device *adev = info->dev->dev_private; adev 1947 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct amdgpu_device *adev = ddev->dev_private; adev 1948 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c struct atom_context *ctx = adev->mode_info.atom_context; adev 1965 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c void amdgpu_atombios_fini(struct amdgpu_device *adev) adev 1967 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (adev->mode_info.atom_context) { adev 1968 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c kfree(adev->mode_info.atom_context->scratch); adev 1969 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c kfree(adev->mode_info.atom_context->iio); adev 1971 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c kfree(adev->mode_info.atom_context); adev 1972 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->mode_info.atom_context = NULL; adev 1973 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c kfree(adev->mode_info.atom_card_info); adev 1974 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->mode_info.atom_card_info = NULL; adev 1975 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c device_remove_file(adev->dev, &dev_attr_vbios_version); adev 1988 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c int amdgpu_atombios_init(struct amdgpu_device *adev) adev 1997 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->mode_info.atom_card_info = atom_card_info; adev 1998 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c atom_card_info->dev = adev->ddev; adev 2002 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (adev->rio_mem) { adev 2015 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c adev->mode_info.atom_context = amdgpu_atom_parse(atom_card_info, adev->bios); adev 2016 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (!adev->mode_info.atom_context) { adev 2017 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atombios_fini(adev); adev 2021 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c mutex_init(&adev->mode_info.atom_context->mutex); adev 2022 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (adev->is_atom_fw) { adev 2023 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atomfirmware_scratch_regs_init(adev); adev 2024 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atomfirmware_allocate_fb_scratch(adev); adev 2026 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atombios_scratch_regs_init(adev); adev 2027 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c amdgpu_atombios_allocate_fb_scratch(adev); adev 2030 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c ret = device_create_file(adev->dev, &dev_attr_vbios_version); adev 136 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h amdgpu_atombios_lookup_gpio(struct amdgpu_device *adev, adev 139 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h struct amdgpu_i2c_bus_rec amdgpu_atombios_lookup_i2c_gpio(struct amdgpu_device *adev, adev 141 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h void amdgpu_atombios_i2c_init(struct amdgpu_device *adev); adev 143 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h bool amdgpu_atombios_has_dce_engine_info(struct amdgpu_device *adev); adev 145 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h bool amdgpu_atombios_get_connector_info_from_object_table(struct amdgpu_device *adev); adev 147 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_get_clock_info(struct amdgpu_device *adev); adev 149 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_get_gfx_info(struct amdgpu_device *adev); adev 151 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_get_vram_width(struct amdgpu_device *adev); adev 153 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h bool amdgpu_atombios_get_asic_ss_info(struct amdgpu_device *adev, adev 157 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_get_clock_dividers(struct amdgpu_device *adev, adev 163 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_get_memory_pll_dividers(struct amdgpu_device *adev, adev 168 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h void amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev, adev 171 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_get_leakage_id_from_vbios(struct amdgpu_device *adev, adev 174 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_get_leakage_vddc_based_on_leakage_params(struct amdgpu_device *adev, adev 179 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_get_voltage_evv(struct amdgpu_device *adev, adev 184 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h amdgpu_atombios_is_voltage_gpio(struct amdgpu_device *adev, adev 187 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_get_voltage_table(struct amdgpu_device *adev, adev 191 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_init_mc_reg_table(struct amdgpu_device *adev, adev 195 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h bool amdgpu_atombios_has_gpu_virtualization_table(struct amdgpu_device *adev); adev 197 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h void amdgpu_atombios_scratch_regs_lock(struct amdgpu_device *adev, bool lock); adev 198 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev, adev 200 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h bool amdgpu_atombios_scratch_need_asic_init(struct amdgpu_device *adev); adev 203 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_get_max_vddc(struct amdgpu_device *adev, u8 voltage_type, adev 205 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_get_leakage_vddc_based_on_leakage_idx(struct amdgpu_device *adev, adev 208 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h void amdgpu_atombios_get_default_voltages(struct amdgpu_device *adev, adev 210 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_get_clock_dividers(struct amdgpu_device *adev, adev 215 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_get_svi2_info(struct amdgpu_device *adev, adev 219 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h void amdgpu_atombios_fini(struct amdgpu_device *adev); adev 220 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h int amdgpu_atombios_init(struct amdgpu_device *adev); adev 31 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c bool amdgpu_atomfirmware_gpu_supports_virtualization(struct amdgpu_device *adev) adev 37 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context, index, NULL, adev 40 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c (struct atom_firmware_info_v3_1 *)(adev->mode_info.atom_context->bios + adev 50 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev) adev 56 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context, index, NULL, adev 59 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c (struct atom_firmware_info_v3_1 *)(adev->mode_info.atom_context->bios + adev 62 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->bios_scratch_reg_offset = adev 67 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev) adev 69 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c struct atom_context *ctx = adev->mode_info.atom_context; adev 91 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->fw_vram_usage.start_offset = (start_addr & adev 93 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->fw_vram_usage.size = size << 10; adev 127 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev) adev 129 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 138 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c if (adev->flags & AMD_IS_APU) adev 148 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c if (adev->flags & AMD_IS_APU) { adev 180 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c static int convert_atom_mem_type_to_vram_type (struct amdgpu_device *adev, adev 185 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c if (adev->flags & AMD_IS_APU) { adev 226 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c int amdgpu_atomfirmware_get_vram_type(struct amdgpu_device *adev) adev 228 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 236 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c if (adev->flags & AMD_IS_APU) adev 245 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c if (adev->flags & AMD_IS_APU) { adev 251 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c return convert_atom_mem_type_to_vram_type(adev, mem_type); adev 261 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c return convert_atom_mem_type_to_vram_type(adev, mem_type); adev 264 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c return convert_atom_mem_type_to_vram_type(adev, mem_type); adev 278 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev) adev 280 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 312 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c bool amdgpu_atomfirmware_sram_ecc_supported(struct amdgpu_device *adev) adev 314 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 324 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context, adev 343 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev) adev 345 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 346 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c struct amdgpu_pll *spll = &adev->clock.spll; adev 347 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c struct amdgpu_pll *mpll = &adev->clock.mpll; adev 360 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->clock.default_sclk = adev 362 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->clock.default_mclk = adev 365 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->pm.current_sclk = adev->clock.default_sclk; adev 366 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->pm.current_mclk = adev->clock.default_mclk; adev 369 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->mode_info.firmware_flags = adev 428 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev) adev 430 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 443 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->gfx.config.max_shader_engines = gfx_info->v24.max_shader_engines; adev 444 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->gfx.config.max_cu_per_sh = gfx_info->v24.max_cu_per_sh; adev 445 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->gfx.config.max_sh_per_se = gfx_info->v24.max_sh_per_se; adev 446 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->gfx.config.max_backends_per_se = gfx_info->v24.max_backends_per_se; adev 447 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->gfx.config.max_texture_channel_caches = gfx_info->v24.max_texture_channel_caches; adev 448 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->gfx.config.max_gprs = le16_to_cpu(gfx_info->v24.gc_num_gprs); adev 449 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->gfx.config.max_gs_threads = gfx_info->v24.gc_num_max_gs_thds; adev 450 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->gfx.config.gs_vgt_table_depth = gfx_info->v24.gc_gs_table_depth; adev 451 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->gfx.config.gs_prim_buffer_depth = adev 453 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->gfx.config.double_offchip_lds_buf = adev 455 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->gfx.cu_info.wave_front_size = le16_to_cpu(gfx_info->v24.gc_wave_size); adev 456 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->gfx.cu_info.max_waves_per_simd = le16_to_cpu(gfx_info->v24.gc_max_waves_per_simd); adev 457 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->gfx.cu_info.max_scratch_slots_per_cu = gfx_info->v24.gc_max_scratch_slots_per_cu; adev 458 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c adev->gfx.cu_info.lds_size = le16_to_cpu(gfx_info->v24.gc_lds_size); adev 29 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h bool amdgpu_atomfirmware_gpu_supports_virtualization(struct amdgpu_device *adev); adev 30 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev); adev 31 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev); adev 32 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h int amdgpu_atomfirmware_get_vram_width(struct amdgpu_device *adev); adev 33 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h int amdgpu_atomfirmware_get_vram_type(struct amdgpu_device *adev); adev 34 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev); adev 35 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev); adev 36 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev); adev 37 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h bool amdgpu_atomfirmware_sram_ecc_supported(struct amdgpu_device *adev); adev 31 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c static int amdgpu_benchmark_do_move(struct amdgpu_device *adev, unsigned size, adev 41 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring; adev 73 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c static void amdgpu_benchmark_move(struct amdgpu_device *adev, unsigned size, adev 91 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c r = amdgpu_bo_create(adev, &bp, &sobj); adev 110 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c r = amdgpu_bo_create(adev, &bp, &dobj); adev 129 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c if (adev->mman.buffer_funcs) { adev 130 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c time = amdgpu_benchmark_do_move(adev, size, saddr, daddr, n); adev 162 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c void amdgpu_benchmark(struct amdgpu_device *adev, int test_number) adev 188 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c amdgpu_benchmark_move(adev, 1024*1024, AMDGPU_GEM_DOMAIN_GTT, adev 190 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c amdgpu_benchmark_move(adev, 1024*1024, AMDGPU_GEM_DOMAIN_VRAM, adev 195 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c amdgpu_benchmark_move(adev, 1024*1024, AMDGPU_GEM_DOMAIN_VRAM, adev 201 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c amdgpu_benchmark_move(adev, i * AMDGPU_GPU_PAGE_SIZE, adev 208 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c amdgpu_benchmark_move(adev, i * AMDGPU_GPU_PAGE_SIZE, adev 215 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c amdgpu_benchmark_move(adev, i * AMDGPU_GPU_PAGE_SIZE, adev 222 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c amdgpu_benchmark_move(adev, common_modes[i], adev 229 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c amdgpu_benchmark_move(adev, common_modes[i], adev 236 drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c amdgpu_benchmark_move(adev, common_modes[i], adev 90 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c static bool igp_read_bios_from_vram(struct amdgpu_device *adev) adev 96 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (!(adev->flags & AMD_IS_APU)) adev 97 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (amdgpu_device_need_post(adev)) adev 100 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios = NULL; adev 101 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c vram_base = pci_resource_start(adev->pdev, 0); adev 107 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios = kmalloc(size, GFP_KERNEL); adev 108 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (!adev->bios) { adev 112 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios_size = size; adev 113 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c memcpy_fromio(adev->bios, bios, size); adev 116 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (!check_atom_bios(adev->bios, size)) { adev 117 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c kfree(adev->bios); adev 124 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c bool amdgpu_read_bios(struct amdgpu_device *adev) adev 129 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios = NULL; adev 131 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c bios = pci_map_rom(adev->pdev, &size); adev 136 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios = kzalloc(size, GFP_KERNEL); adev 137 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (adev->bios == NULL) { adev 138 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c pci_unmap_rom(adev->pdev, bios); adev 141 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios_size = size; adev 142 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c memcpy_fromio(adev->bios, bios, size); adev 143 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c pci_unmap_rom(adev->pdev, bios); adev 145 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (!check_atom_bios(adev->bios, size)) { adev 146 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c kfree(adev->bios); adev 153 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c static bool amdgpu_read_bios_from_rom(struct amdgpu_device *adev) adev 158 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (!adev->asic_funcs->read_bios_from_rom) adev 162 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (amdgpu_asic_read_bios_from_rom(adev, &header[0], sizeof(header)) == false) adev 175 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios = kmalloc(len, GFP_KERNEL); adev 176 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (!adev->bios) { adev 180 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios_size = len; adev 183 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c amdgpu_asic_read_bios_from_rom(adev, adev->bios, len); adev 185 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (!check_atom_bios(adev->bios, len)) { adev 186 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c kfree(adev->bios); adev 193 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c static bool amdgpu_read_platform_bios(struct amdgpu_device *adev) adev 198 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios = NULL; adev 200 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c bios = pci_platform_rom(adev->pdev, &size); adev 205 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios = kzalloc(size, GFP_KERNEL); adev 206 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (adev->bios == NULL) adev 209 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c memcpy_fromio(adev->bios, bios, size); adev 211 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (!check_atom_bios(adev->bios, size)) { adev 212 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c kfree(adev->bios); adev 216 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios_size = size; adev 269 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c static bool amdgpu_atrm_get_bios(struct amdgpu_device *adev) adev 280 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (adev->flags & AMD_IS_APU) adev 312 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios = kmalloc(size, GFP_KERNEL); adev 313 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (!adev->bios) { adev 320 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios, adev 327 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (!check_atom_bios(adev->bios, size)) { adev 328 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c kfree(adev->bios); adev 331 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios_size = size; adev 335 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c static inline bool amdgpu_atrm_get_bios(struct amdgpu_device *adev) adev 341 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c static bool amdgpu_read_disabled_bios(struct amdgpu_device *adev) adev 343 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (adev->flags & AMD_IS_APU) adev 344 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c return igp_read_bios_from_vram(adev); adev 346 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c return amdgpu_asic_read_disabled_bios(adev); adev 350 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c static bool amdgpu_acpi_vfct_bios(struct amdgpu_device *adev) adev 385 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c vhdr->PCIBus == adev->pdev->bus->number && adev 386 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c vhdr->PCIDevice == PCI_SLOT(adev->pdev->devfn) && adev 387 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c vhdr->PCIFunction == PCI_FUNC(adev->pdev->devfn) && adev 388 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c vhdr->VendorID == adev->pdev->vendor && adev 389 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c vhdr->DeviceID == adev->pdev->device) { adev 390 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios = kmemdup(&vbios->VbiosContent, adev 394 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (!check_atom_bios(adev->bios, vhdr->ImageLength)) { adev 395 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c kfree(adev->bios); adev 398 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->bios_size = vhdr->ImageLength; adev 407 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c static inline bool amdgpu_acpi_vfct_bios(struct amdgpu_device *adev) adev 413 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c bool amdgpu_get_bios(struct amdgpu_device *adev) adev 415 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (amdgpu_atrm_get_bios(adev)) adev 418 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (amdgpu_acpi_vfct_bios(adev)) adev 421 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (igp_read_bios_from_vram(adev)) adev 424 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (amdgpu_read_bios(adev)) adev 427 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (amdgpu_read_bios_from_rom(adev)) adev 430 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (amdgpu_read_disabled_bios(adev)) adev 433 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c if (amdgpu_read_platform_bios(adev)) adev 440 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c adev->is_atom_fw = (adev->asic_type >= CHIP_VEGA10) ? true : false; adev 62 drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c int amdgpu_bo_list_create(struct amdgpu_device *adev, struct drm_file *filp, adev 268 drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c struct amdgpu_device *adev = dev->dev_private; adev 282 drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number, adev 303 drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number, adev 60 drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.h int amdgpu_bo_list_create(struct amdgpu_device *adev, adev 36 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c struct amdgpu_device *adev; adev 40 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c struct amdgpu_device *adev = \ adev 41 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((struct amdgpu_cgs_device *)cgs_device)->adev adev 142 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if (adev->asic_type >= CHIP_TOPAZ) adev 167 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c fw_version = adev->sdma.instance[0].fw_version; adev 170 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c fw_version = adev->sdma.instance[1].fw_version; adev 173 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c fw_version = adev->gfx.ce_fw_version; adev 176 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c fw_version = adev->gfx.pfp_fw_version; adev 179 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c fw_version = adev->gfx.me_fw_version; adev 182 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c fw_version = adev->gfx.mec_fw_version; adev 185 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c fw_version = adev->gfx.mec_fw_version; adev 188 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c fw_version = adev->gfx.mec_fw_version; adev 191 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c fw_version = adev->gfx.rlc_fw_version; adev 216 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ucode = &adev->firmware.ucode[id]; adev 250 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if (!adev->pm.fw) { adev 251 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c switch (adev->asic_type) { adev 256 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if ((adev->pdev->revision == 0x81) && adev 257 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->device == 0x6810) || adev 258 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->device == 0x6811))) { adev 266 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if (((adev->pdev->device == 0x6820) && adev 267 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->revision == 0x81) || adev 268 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0x83))) || adev 269 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->device == 0x6821) && adev 270 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->revision == 0x83) || adev 271 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0x87))) || adev 272 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->revision == 0x87) && adev 273 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->device == 0x6823) || adev 274 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->device == 0x682b)))) { adev 282 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if (((adev->pdev->revision == 0x81) && adev 283 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->device == 0x6600) || adev 284 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->device == 0x6604) || adev 285 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->device == 0x6605) || adev 286 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->device == 0x6610))) || adev 287 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->revision == 0x83) && adev 288 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->device == 0x6610))) { adev 296 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if (((adev->pdev->revision == 0x81) && adev 297 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->device == 0x6660)) || adev 298 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->revision == 0x83) && adev 299 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->device == 0x6660) || adev 300 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->device == 0x6663) || adev 301 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->device == 0x6665) || adev 302 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->device == 0x6667)))) { adev 305 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c } else if ((adev->pdev->revision == 0xc3) && adev 306 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->device == 0x6665)) { adev 314 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if ((adev->pdev->revision == 0x80) || adev 315 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0x81) || adev 316 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->device == 0x665f)) { adev 324 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if (adev->pdev->revision == 0x80) { adev 332 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if (((adev->pdev->device == 0x6900) && (adev->pdev->revision == 0x81)) || adev 333 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->device == 0x6900) && (adev->pdev->revision == 0x83)) || adev 334 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->device == 0x6907) && (adev->pdev->revision == 0x87)) || adev 335 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->device == 0x6900) && (adev->pdev->revision == 0xD1)) || adev 336 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->device == 0x6900) && (adev->pdev->revision == 0xD3))) { adev 343 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if (((adev->pdev->device == 0x6939) && (adev->pdev->revision == 0xf1)) || adev 344 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->device == 0x6938) && (adev->pdev->revision == 0xf1))) { adev 355 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if (((adev->pdev->device == 0x67ef) && adev 356 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->revision == 0xe0) || adev 357 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0xe5))) || adev 358 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->device == 0x67ff) && adev 359 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->revision == 0xcf) || adev 360 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0xef) || adev 361 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0xff)))) { adev 364 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c } else if ((adev->pdev->device == 0x67ef) && adev 365 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0xe2)) { adev 377 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if (((adev->pdev->device == 0x67df) && adev 378 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->revision == 0xe0) || adev 379 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0xe3) || adev 380 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0xe4) || adev 381 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0xe5) || adev 382 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0xe7) || adev 383 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0xef))) || adev 384 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->device == 0x6fdf) && adev 385 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->revision == 0xef) || adev 386 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0xff)))) { adev 389 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c } else if ((adev->pdev->device == 0x67df) && adev 390 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->revision == 0xe1) || adev 391 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0xf7))) { adev 402 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if (((adev->pdev->device == 0x6987) && adev 403 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->revision == 0xc0) || adev 404 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0xc3))) || adev 405 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->device == 0x6981) && adev 406 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->revision == 0x00) || adev 407 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0x01) || adev 408 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0x10)))) { adev 419 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if ((adev->pdev->device == 0x687f) && adev 420 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ((adev->pdev->revision == 0xc0) || adev 421 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0xc1) || adev 422 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c (adev->pdev->revision == 0xc3))) adev 438 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c err = request_firmware(&adev->pm.fw, fw_name, adev->dev); adev 444 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c err = amdgpu_ucode_validate(adev->pm.fw); adev 447 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c release_firmware(adev->pm.fw); adev 448 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c adev->pm.fw = NULL; adev 452 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 453 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ucode = &adev->firmware.ucode[AMDGPU_UCODE_ID_SMC]; adev 455 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c ucode->fw = adev->pm.fw; adev 457 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c adev->firmware.fw_size += adev 462 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data; adev 464 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c adev->pm.fw_version = le32_to_cpu(hdr->header.ucode_version); adev 467 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c src = (const uint8_t *)(adev->pm.fw->data + adev 470 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c info->version = adev->pm.fw_version; adev 486 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev) adev 497 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c cgs_device->adev = adev; adev 44 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c struct amdgpu_device *adev = dev->dev_private; adev 53 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_display_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); adev 74 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd) && adev 265 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector_get_hardcoded_edid(struct amdgpu_device *adev) adev 269 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (adev->mode_info.bios_hardcoded_edid) { adev 270 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c edid = kmalloc(adev->mode_info.bios_hardcoded_edid_size, GFP_KERNEL); adev 273 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c (unsigned char *)adev->mode_info.bios_hardcoded_edid, adev 274 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.bios_hardcoded_edid_size); adev 284 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c struct amdgpu_device *adev = dev->dev_private; adev 320 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector->edid = amdgpu_connector_get_hardcoded_edid(adev); adev 469 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c struct amdgpu_device *adev = dev->dev_private; adev 473 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (property == adev->mode_info.coherent_mode_property) { adev 495 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (property == adev->mode_info.audio_property) { adev 510 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (property == adev->mode_info.dither_property) { adev 525 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (property == adev->mode_info.underscan_property) { adev 539 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (property == adev->mode_info.underscan_hborder_property) { adev 553 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (property == adev->mode_info.underscan_vborder_property) { adev 567 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (property == adev->mode_info.load_detect_property) { adev 838 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c struct amdgpu_device *adev = dev->dev_private; adev 842 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if ((mode->clock / 10) > adev->clock.max_pixel_clock) adev 943 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c struct amdgpu_device *adev = dev->dev_private; adev 948 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) adev 974 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c struct amdgpu_device *adev = dev->dev_private; adev 1036 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (!amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) { adev 1156 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c struct amdgpu_device *adev = dev->dev_private; adev 1178 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if ((mode->clock / 10) > adev->clock.max_pixel_clock) adev 1310 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c struct amdgpu_device *adev = dev->dev_private; adev 1312 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if ((adev->clock.default_dispclk >= 53900) && adev 1324 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c struct amdgpu_device *adev = dev->dev_private; adev 1386 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) { adev 1493 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector_add(struct amdgpu_device *adev, adev 1502 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c struct drm_device *dev = adev->ddev; adev 1566 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector->router_bus = amdgpu_i2c_lookup(adev, &router->i2c_info); adev 1577 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); adev 1599 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.load_detect_property, adev 1617 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.underscan_property, adev 1620 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.underscan_hborder_property, adev 1623 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.underscan_vborder_property, adev 1631 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.dither_property, adev 1636 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.audio_property, adev 1648 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.load_detect_property, adev 1672 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); adev 1685 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.load_detect_property, adev 1697 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); adev 1710 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.load_detect_property, adev 1727 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); adev 1740 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.coherent_mode_property, adev 1743 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.underscan_property, adev 1746 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.underscan_hborder_property, adev 1749 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.underscan_vborder_property, adev 1757 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.audio_property, adev 1761 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.dither_property, adev 1766 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.load_detect_property, adev 1782 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); adev 1794 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.coherent_mode_property, adev 1797 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.underscan_property, adev 1800 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.underscan_hborder_property, adev 1803 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.underscan_vborder_property, adev 1810 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.audio_property, adev 1814 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.dither_property, adev 1829 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); adev 1844 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.coherent_mode_property, adev 1847 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.underscan_property, adev 1850 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.underscan_hborder_property, adev 1853 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.underscan_vborder_property, adev 1860 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.audio_property, adev 1864 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c adev->mode_info.dither_property, adev 1876 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); adev 1902 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus); adev 33 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.h amdgpu_connector_add(struct amdgpu_device *adev, adev 90 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_bo_list_create(p->adev, p->filp, info, data->bo_number, adev 229 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c ret = amdgpu_job_alloc(p->adev, num_ibs, &p->job, vm); adev 262 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c static u64 us_to_bytes(struct amdgpu_device *adev, s64 us) adev 264 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c if (us <= 0 || !adev->mm_stats.log2_max_MBps) adev 270 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c return us << adev->mm_stats.log2_max_MBps; adev 273 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c static s64 bytes_to_us(struct amdgpu_device *adev, u64 bytes) adev 275 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c if (!adev->mm_stats.log2_max_MBps) adev 278 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c return bytes >> adev->mm_stats.log2_max_MBps; adev 294 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c static void amdgpu_cs_get_threshold_for_moves(struct amdgpu_device *adev, adev 310 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c if (!adev->mm_stats.log2_max_MBps) { adev 316 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c total_vram = adev->gmc.real_vram_size - atomic64_read(&adev->vram_pin_size); adev 317 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c used_vram = amdgpu_vram_mgr_usage(&adev->mman.bdev.man[TTM_PL_VRAM]); adev 320 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c spin_lock(&adev->mm_stats.lock); adev 324 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c increment_us = time_us - adev->mm_stats.last_update_us; adev 325 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c adev->mm_stats.last_update_us = time_us; adev 326 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c adev->mm_stats.accum_us = min(adev->mm_stats.accum_us + increment_us, adev 347 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c if (!(adev->flags & AMD_IS_APU)) adev 348 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c min_us = bytes_to_us(adev, free_vram / 4); adev 352 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c adev->mm_stats.accum_us = max(min_us, adev->mm_stats.accum_us); adev 358 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c *max_bytes = us_to_bytes(adev, adev->mm_stats.accum_us); adev 361 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c if (!amdgpu_gmc_vram_full_visible(&adev->gmc)) { adev 362 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c u64 total_vis_vram = adev->gmc.visible_vram_size; adev 364 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c amdgpu_vram_mgr_vis_usage(&adev->mman.bdev.man[TTM_PL_VRAM]); adev 368 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c adev->mm_stats.accum_us_vis = min(adev->mm_stats.accum_us_vis + adev 372 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c adev->mm_stats.accum_us_vis = adev 373 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c max(bytes_to_us(adev, free_vis_vram / 2), adev 374 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c adev->mm_stats.accum_us_vis); adev 377 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c *max_vis_bytes = us_to_bytes(adev, adev->mm_stats.accum_us_vis); adev 382 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c spin_unlock(&adev->mm_stats.lock); adev 389 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes, adev 392 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c spin_lock(&adev->mm_stats.lock); adev 393 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c adev->mm_stats.accum_us -= bytes_to_us(adev, num_bytes); adev 394 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c adev->mm_stats.accum_us_vis -= bytes_to_us(adev, num_vis_bytes); adev 395 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c spin_unlock(&adev->mm_stats.lock); adev 401 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 418 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c if (!amdgpu_gmc_vram_full_visible(&adev->gmc) && adev 440 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c if (!amdgpu_gmc_vram_full_visible(&adev->gmc) && adev 468 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 493 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c !amdgpu_gmc_vram_full_visible(&adev->gmc) && adev 595 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_bo_list_create(p->adev, p->filp, NULL, 0, adev 607 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c p->mn = amdgpu_mn_get(p->adev, AMDGPU_MN_TYPE_GFX); adev 656 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c amdgpu_cs_get_threshold_for_moves(p->adev, &p->bytes_moved_threshold, adev 664 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_vm_validate_pt_bos(p->adev, &fpriv->vm, adev 679 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c amdgpu_cs_report_moved_bytes(p->adev, p->bytes_moved, adev 731 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_sync_resv(p->adev, &p->job->sync, resv, p->filp, adev 788 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c struct amdgpu_device *adev = p->adev; adev 860 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_vm_clear_freed(adev, vm, NULL); adev 864 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_vm_bo_update(adev, fpriv->prt_va, false); adev 868 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_sync_fence(adev, &p->job->sync, adev 873 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) { adev 878 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_vm_bo_update(adev, bo_va, false); adev 883 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_sync_fence(adev, &p->job->sync, f, false); adev 900 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_vm_bo_update(adev, bo_va, false); adev 905 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_sync_fence(adev, &p->job->sync, f, false); adev 910 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_vm_handle_moved(adev, vm); adev 914 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_vm_update_directories(adev, vm); adev 918 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_sync_fence(adev, &p->job->sync, vm->last_update, false); adev 933 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c amdgpu_vm_bo_invalidate(adev, bo, false); adev 940 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c static int amdgpu_cs_ib_fill(struct amdgpu_device *adev, adev 963 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c (amdgpu_mcbp || amdgpu_sriov_vf(adev))) { adev 992 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_ib_get(adev, vm, ring->funcs->parse_cs ? adev 1060 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_sync_fence(p->adev, &p->job->sync, fence, true); adev 1082 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_sync_fence(p->adev, &p->job->sync, fence, true); adev 1211 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c static int amdgpu_cs_dependencies(struct amdgpu_device *adev, adev 1334 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c amdgpu_vm_move_to_lru_tail(p->adev, &fpriv->vm); adev 1352 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c struct amdgpu_device *adev = dev->dev_private; adev 1358 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c if (!adev->accel_working) adev 1361 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c parser.adev = adev; adev 1370 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_cs_ib_fill(adev, &parser); adev 1374 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_cs_dependencies(adev, &parser); adev 1464 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c static struct dma_fence *amdgpu_cs_get_fence(struct amdgpu_device *adev, adev 1493 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c struct amdgpu_device *adev = dev->dev_private; adev 1500 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c fence = amdgpu_cs_get_fence(adev, filp, &info->in.fence); adev 1557 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c static int amdgpu_cs_wait_all_fences(struct amdgpu_device *adev, adev 1570 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c fence = amdgpu_cs_get_fence(adev, filp, &fences[i]); adev 1602 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c static int amdgpu_cs_wait_any_fence(struct amdgpu_device *adev, adev 1623 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c fence = amdgpu_cs_get_fence(adev, filp, &fences[i]); adev 1669 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c struct amdgpu_device *adev = dev->dev_private; adev 1690 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_cs_wait_all_fences(adev, filp, wait, fences); adev 1692 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c r = amdgpu_cs_wait_any_fence(adev, filp, wait, fences); adev 27 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev) adev 29 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c uint64_t addr = adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT; adev 37 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct amdgpu_bo **bo, adev 43 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c r = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE, adev 50 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c adev->virt.csa_cpu_addr = ptr; adev 65 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm, adev 89 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c *bo_va = amdgpu_vm_bo_add(adev, vm, bo); adev 96 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c r = amdgpu_vm_bo_map(adev, *bo_va, csa_addr, 0, size, adev 102 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c amdgpu_vm_bo_rmv(adev, *bo_va); adev 30 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.h uint32_t amdgpu_get_total_csa_size(struct amdgpu_device *adev); adev 31 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.h uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev); adev 32 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.h int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct amdgpu_bo **bo, adev 34 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.h int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm, adev 71 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c static int amdgpu_ctx_init(struct amdgpu_device *adev, adev 88 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c ctx->adev = adev; adev 117 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c ctx->reset_counter = atomic_read(&adev->gpu_reset_counter); adev 119 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c ctx->vram_lost_counter = atomic_read(&adev->vram_lost_counter); adev 131 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c rings[0] = &adev->gfx.gfx_ring[0]; adev 135 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c for (j = 0; j < adev->gfx.num_compute_rings; ++j) adev 136 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c rings[j] = &adev->gfx.compute_ring[j]; adev 137 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c num_rings = adev->gfx.num_compute_rings; adev 140 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c for (j = 0; j < adev->sdma.num_instances; ++j) adev 141 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c rings[j] = &adev->sdma.instance[j].ring; adev 142 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c num_rings = adev->sdma.num_instances; adev 145 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c rings[0] = &adev->uvd.inst[0].ring; adev 149 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c rings[0] = &adev->vce.ring[0]; adev 153 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c rings[0] = &adev->uvd.inst[0].ring_enc[0]; adev 157 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c for (j = 0; j < adev->vcn.num_vcn_inst; ++j) { adev 158 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c if (adev->vcn.harvest_config & (1 << j)) adev 160 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c rings[num_rings++] = &adev->vcn.inst[j].ring_dec; adev 164 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c for (j = 0; j < adev->vcn.num_vcn_inst; ++j) { adev 165 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c if (adev->vcn.harvest_config & (1 << j)) adev 167 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c for (k = 0; k < adev->vcn.num_enc_rings; ++k) adev 168 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c rings[num_rings++] = &adev->vcn.inst[j].ring_enc[k]; adev 172 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c for (j = 0; j < adev->vcn.num_vcn_inst; ++j) { adev 173 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c if (adev->vcn.harvest_config & (1 << j)) adev 175 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c rings[num_rings++] = &adev->vcn.inst[j].ring_jpeg; adev 181 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c if (!rings[j]->adev) adev 211 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c struct amdgpu_device *adev = ctx->adev; adev 214 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c if (!adev) adev 251 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c static int amdgpu_ctx_alloc(struct amdgpu_device *adev, adev 274 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c r = amdgpu_ctx_init(adev, priority, filp, ctx); adev 312 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c static int amdgpu_ctx_query(struct amdgpu_device *adev, adev 336 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c reset_counter = atomic_read(&adev->gpu_reset_counter); adev 348 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c static int amdgpu_ctx_query2(struct amdgpu_device *adev, adev 370 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c if (ctx->reset_counter != atomic_read(&adev->gpu_reset_counter)) adev 373 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c if (ctx->vram_lost_counter != atomic_read(&adev->vram_lost_counter)) adev 380 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c ras_counter = amdgpu_ras_query_error_count(adev, false); adev 388 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c ras_counter = amdgpu_ras_query_error_count(adev, true); adev 406 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c struct amdgpu_device *adev = dev->dev_private; adev 420 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c r = amdgpu_ctx_alloc(adev, fpriv, filp, priority, &id); adev 427 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c r = amdgpu_ctx_query(adev, fpriv, id, &args->out); adev 430 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c r = amdgpu_ctx_query2(adev, fpriv, id, &args->out); adev 608 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c mutex_lock(&ctx->adev->lock_reset); adev 610 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c mutex_unlock(&ctx->adev->lock_reset); adev 40 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h struct amdgpu_device *adev; adev 57 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h struct amdgpu_device *adev; adev 42 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c int amdgpu_debugfs_add_files(struct amdgpu_device *adev, adev 48 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c for (i = 0; i < adev->debugfs_count; i++) { adev 49 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c if (adev->debugfs[i].files == files) { adev 55 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c i = adev->debugfs_count + 1; adev 62 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->debugfs[adev->debugfs_count].files = files; adev 63 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->debugfs[adev->debugfs_count].num_files = nfiles; adev 64 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->debugfs_count = i; adev 67 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->ddev->primary->debugfs_root, adev 68 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->ddev->primary); adev 105 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 148 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c if ((sh_bank != 0xFFFFFFFF && sh_bank >= adev->gfx.config.max_sh_per_se) || adev 149 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c (se_bank != 0xFFFFFFFF && se_bank >= adev->gfx.config.max_shader_engines)) adev 151 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c mutex_lock(&adev->grbm_idx_mutex); adev 152 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c amdgpu_gfx_select_se_sh(adev, se_bank, adev 155 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c mutex_lock(&adev->srbm_mutex); adev 156 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c amdgpu_gfx_select_me_pipe_q(adev, me, pipe, queue, vmid); adev 160 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c mutex_lock(&adev->pm.mutex); adev 186 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c amdgpu_gfx_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 187 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c mutex_unlock(&adev->grbm_idx_mutex); adev 189 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c amdgpu_gfx_select_me_pipe_q(adev, 0, 0, 0, 0); adev 190 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c mutex_unlock(&adev->srbm_mutex); adev 194 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c mutex_unlock(&adev->pm.mutex); adev 233 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 272 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 312 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 351 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 391 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 430 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 472 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 486 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.max_shader_engines; adev 487 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.max_tile_pipes; adev 488 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.max_cu_per_sh; adev 489 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.max_sh_per_se; adev 490 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.max_backends_per_se; adev 491 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.max_texture_channel_caches; adev 492 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.max_gprs; adev 493 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.max_gs_threads; adev 494 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.max_hw_contexts; adev 495 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_frontend; adev 496 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_backend; adev 497 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.sc_hiz_tile_fifo_size; adev 498 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.sc_earlyz_tile_fifo_size; adev 499 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.num_tile_pipes; adev 500 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.backend_enable_mask; adev 501 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.mem_max_burst_length_bytes; adev 502 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.mem_row_size_in_kb; adev 503 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.shader_engine_tile_size; adev 504 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.num_gpus; adev 505 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.multi_gpu_tile_size; adev 506 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.mc_arb_ramcfg; adev 507 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.gb_addr_config; adev 508 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->gfx.config.num_rbs; adev 511 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->rev_id; adev 512 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->pg_flags; adev 513 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->cg_flags; adev 516 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->family; adev 517 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->external_rev_id; adev 520 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->pdev->device; adev 521 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->pdev->revision; adev 522 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->pdev->subsystem_device; adev 523 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c config[no_regs++] = adev->pdev->subsystem_vendor; adev 561 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 568 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c if (!adev->pm.dpm_enabled) adev 575 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c r = amdgpu_dpm_read_sensor(adev, idx, &values[0], &valuesize); adev 620 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = f->f_inode->i_private; adev 637 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c mutex_lock(&adev->grbm_idx_mutex); adev 638 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c amdgpu_gfx_select_se_sh(adev, se, sh, cu); adev 641 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c if (adev->gfx.funcs->read_wave_data) adev 642 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->gfx.funcs->read_wave_data(adev, simd, wave, data, &x); adev 644 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c amdgpu_gfx_select_se_sh(adev, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF); adev 645 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c mutex_unlock(&adev->grbm_idx_mutex); adev 692 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = f->f_inode->i_private; adev 715 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c mutex_lock(&adev->grbm_idx_mutex); adev 716 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c amdgpu_gfx_select_se_sh(adev, se, sh, cu); adev 719 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c if (adev->gfx.funcs->read_wave_vgprs) adev 720 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->gfx.funcs->read_wave_vgprs(adev, simd, wave, thread, offset, size>>2, data); adev 722 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c if (adev->gfx.funcs->read_wave_sgprs) adev 723 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->gfx.funcs->read_wave_sgprs(adev, simd, wave, offset, size>>2, data); adev 726 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c amdgpu_gfx_select_se_sh(adev, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF); adev 727 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c mutex_unlock(&adev->grbm_idx_mutex); adev 825 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c int amdgpu_debugfs_regs_init(struct amdgpu_device *adev) adev 827 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct drm_minor *minor = adev->ddev->primary; adev 834 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev, debugfs_regs[i]); adev 836 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c i_size_write(ent->d_inode, adev->rmmio_size); adev 837 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->debugfs_regs[i] = ent; adev 843 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c void amdgpu_debugfs_regs_cleanup(struct amdgpu_device *adev) adev 848 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c if (adev->debugfs_regs[i]) { adev 849 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c debugfs_remove(adev->debugfs_regs[i]); adev 850 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->debugfs_regs[i] = NULL; adev 859 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = dev->dev_private; adev 863 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c mutex_lock(&adev->lock_reset); adev 867 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_ring *ring = adev->rings[i]; adev 875 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c r = amdgpu_ib_ring_tests(adev); adev 883 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_ring *ring = adev->rings[i]; adev 890 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c mutex_unlock(&adev->lock_reset); adev 899 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = dev->dev_private; adev 901 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c seq_write(m, adev->bios, adev->bios_size); adev 909 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = dev->dev_private; adev 911 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c seq_printf(m, "(%d)\n", amdgpu_bo_evict_vram(adev)); adev 919 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = dev->dev_private; adev 921 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c seq_printf(m, "(%d)\n", ttm_bo_evict_mm(&adev->mman.bdev, TTM_PL_TT)); adev 1025 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_device *adev = (struct amdgpu_device *)data; adev 1030 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c ring = adev->rings[val]; adev 1045 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c mutex_lock(&adev->lock_reset); adev 1050 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c resched = ttm_bo_lock_delayed_workqueue(&adev->mman.bdev); adev 1086 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c mutex_unlock(&adev->lock_reset); adev 1088 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c ttm_bo_unlock_delayed_workqueue(&adev->mman.bdev, resched); adev 1099 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c int amdgpu_debugfs_init(struct amdgpu_device *adev) adev 1101 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->debugfs_preempt = adev 1103 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->ddev->primary->debugfs_root, adev 1104 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c (void *)adev, &fops_ib_preempt); adev 1105 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c if (!(adev->debugfs_preempt)) { adev 1110 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c return amdgpu_debugfs_add_files(adev, amdgpu_debugfs_list, adev 1114 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c void amdgpu_debugfs_preempt_cleanup(struct amdgpu_device *adev) adev 1116 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c if (adev->debugfs_preempt) adev 1117 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c debugfs_remove(adev->debugfs_preempt); adev 1121 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c int amdgpu_debugfs_init(struct amdgpu_device *adev) adev 1125 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c void amdgpu_debugfs_preempt_cleanup(struct amdgpu_device *adev) { } adev 1126 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c int amdgpu_debugfs_regs_init(struct amdgpu_device *adev) adev 1130 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c void amdgpu_debugfs_regs_cleanup(struct amdgpu_device *adev) { } adev 34 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.h int amdgpu_debugfs_regs_init(struct amdgpu_device *adev); adev 35 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.h void amdgpu_debugfs_regs_cleanup(struct amdgpu_device *adev); adev 36 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.h int amdgpu_debugfs_init(struct amdgpu_device *adev); adev 37 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.h void amdgpu_debugfs_preempt_cleanup(struct amdgpu_device *adev); adev 38 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.h int amdgpu_debugfs_add_files(struct amdgpu_device *adev, adev 41 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.h int amdgpu_debugfs_fence_init(struct amdgpu_device *adev); adev 42 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.h int amdgpu_debugfs_firmware_init(struct amdgpu_device *adev); adev 43 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.h int amdgpu_debugfs_gem_init(struct amdgpu_device *adev); adev 126 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_device *adev = ddev->dev_private; adev 127 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c uint64_t cnt = amdgpu_asic_get_pcie_replay_count(adev); adev 135 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_device_get_pcie_info(struct amdgpu_device *adev); adev 147 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_device *adev = dev->dev_private; adev 149 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->flags & AMD_IS_PX) adev 166 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c uint32_t amdgpu_mm_rreg(struct amdgpu_device *adev, uint32_t reg, adev 171 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!(acc_flags & AMDGPU_REGS_NO_KIQ) && amdgpu_sriov_runtime(adev)) adev 172 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c return amdgpu_virt_kiq_rreg(adev, reg); adev 174 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if ((reg * 4) < adev->rmmio_size && !(acc_flags & AMDGPU_REGS_IDX)) adev 175 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ret = readl(((void __iomem *)adev->rmmio) + (reg * 4)); adev 179 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c spin_lock_irqsave(&adev->mmio_idx_lock, flags); adev 180 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c writel((reg * 4), ((void __iomem *)adev->rmmio) + (mmMM_INDEX * 4)); adev 181 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ret = readl(((void __iomem *)adev->rmmio) + (mmMM_DATA * 4)); adev 182 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c spin_unlock_irqrestore(&adev->mmio_idx_lock, flags); adev 184 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c trace_amdgpu_mm_rreg(adev->pdev->device, reg, ret); adev 202 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset) { adev 203 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (offset < adev->rmmio_size) adev 204 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c return (readb(adev->rmmio + offset)); adev 223 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value) { adev 224 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (offset < adev->rmmio_size) adev 225 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c writeb(value, adev->rmmio + offset); adev 240 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_mm_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v, adev 243 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c trace_amdgpu_mm_wreg(adev->pdev->device, reg, v); adev 245 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->asic_type >= CHIP_VEGA10 && reg == 0) { adev 246 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->last_mm_index = v; adev 249 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!(acc_flags & AMDGPU_REGS_NO_KIQ) && amdgpu_sriov_runtime(adev)) adev 250 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c return amdgpu_virt_kiq_wreg(adev, reg, v); adev 252 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if ((reg * 4) < adev->rmmio_size && !(acc_flags & AMDGPU_REGS_IDX)) adev 253 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c writel(v, ((void __iomem *)adev->rmmio) + (reg * 4)); adev 257 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c spin_lock_irqsave(&adev->mmio_idx_lock, flags); adev 258 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c writel((reg * 4), ((void __iomem *)adev->rmmio) + (mmMM_INDEX * 4)); adev 259 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c writel(v, ((void __iomem *)adev->rmmio) + (mmMM_DATA * 4)); adev 260 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c spin_unlock_irqrestore(&adev->mmio_idx_lock, flags); adev 263 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->asic_type >= CHIP_VEGA10 && reg == 1 && adev->last_mm_index == 0x5702C) { adev 276 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c u32 amdgpu_io_rreg(struct amdgpu_device *adev, u32 reg) adev 278 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if ((reg * 4) < adev->rio_mem_size) adev 279 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c return ioread32(adev->rio_mem + (reg * 4)); adev 281 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c iowrite32((reg * 4), adev->rio_mem + (mmMM_INDEX * 4)); adev 282 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c return ioread32(adev->rio_mem + (mmMM_DATA * 4)); adev 295 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_io_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 297 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->asic_type >= CHIP_VEGA10 && reg == 0) { adev 298 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->last_mm_index = v; adev 301 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if ((reg * 4) < adev->rio_mem_size) adev 302 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c iowrite32(v, adev->rio_mem + (reg * 4)); adev 304 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c iowrite32((reg * 4), adev->rio_mem + (mmMM_INDEX * 4)); adev 305 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c iowrite32(v, adev->rio_mem + (mmMM_DATA * 4)); adev 308 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->asic_type >= CHIP_VEGA10 && reg == 1 && adev->last_mm_index == 0x5702C) { adev 322 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index) adev 324 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (index < adev->doorbell.num_doorbells) { adev 325 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c return readl(adev->doorbell.ptr + index); adev 342 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v) adev 344 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (index < adev->doorbell.num_doorbells) { adev 345 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c writel(v, adev->doorbell.ptr + index); adev 360 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index) adev 362 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (index < adev->doorbell.num_doorbells) { adev 363 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c return atomic64_read((atomic64_t *)(adev->doorbell.ptr + index)); adev 380 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v) adev 382 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (index < adev->doorbell.num_doorbells) { adev 383 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c atomic64_set((atomic64_t *)(adev->doorbell.ptr + index), v); adev 399 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static uint32_t amdgpu_invalid_rreg(struct amdgpu_device *adev, uint32_t reg) adev 416 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_invalid_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v) adev 433 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static uint64_t amdgpu_invalid_rreg64(struct amdgpu_device *adev, uint32_t reg) adev 450 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_invalid_wreg64(struct amdgpu_device *adev, uint32_t reg, uint64_t v) adev 468 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static uint32_t amdgpu_block_invalid_rreg(struct amdgpu_device *adev, adev 488 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_block_invalid_wreg(struct amdgpu_device *adev, adev 505 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_vram_scratch_init(struct amdgpu_device *adev) adev 507 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c return amdgpu_bo_create_kernel(adev, AMDGPU_GPU_PAGE_SIZE, adev 509 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c &adev->vram_scratch.robj, adev 510 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c &adev->vram_scratch.gpu_addr, adev 511 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c (void **)&adev->vram_scratch.ptr); adev 521 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_device_vram_scratch_fini(struct amdgpu_device *adev) adev 523 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_bo_free_kernel(&adev->vram_scratch.robj, NULL, NULL); adev 536 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_device_program_register_sequence(struct amdgpu_device *adev, adev 556 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->family >= AMDGPU_FAMILY_AI) adev 573 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_device_pci_config_reset(struct amdgpu_device *adev) adev 575 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c pci_write_config_dword(adev->pdev, 0x7c, AMDGPU_ASIC_RESET_DATA); adev 589 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_doorbell_init(struct amdgpu_device *adev) adev 593 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->asic_type < CHIP_BONAIRE) { adev 594 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->doorbell.base = 0; adev 595 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->doorbell.size = 0; adev 596 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->doorbell.num_doorbells = 0; adev 597 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->doorbell.ptr = NULL; adev 601 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (pci_resource_flags(adev->pdev, 2) & IORESOURCE_UNSET) adev 604 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_asic_init_doorbell_index(adev); adev 607 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->doorbell.base = pci_resource_start(adev->pdev, 2); adev 608 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->doorbell.size = pci_resource_len(adev->pdev, 2); adev 610 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->doorbell.num_doorbells = min_t(u32, adev->doorbell.size / sizeof(u32), adev 611 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->doorbell_index.max_assignment+1); adev 612 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->doorbell.num_doorbells == 0) adev 621 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->asic_type >= CHIP_VEGA10) adev 622 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->doorbell.num_doorbells += 0x400; adev 624 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->doorbell.ptr = ioremap(adev->doorbell.base, adev 625 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->doorbell.num_doorbells * adev 627 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->doorbell.ptr == NULL) adev 640 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_device_doorbell_fini(struct amdgpu_device *adev) adev 642 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c iounmap(adev->doorbell.ptr); adev 643 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->doorbell.ptr = NULL; adev 662 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_device_wb_fini(struct amdgpu_device *adev) adev 664 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->wb.wb_obj) { adev 665 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_bo_free_kernel(&adev->wb.wb_obj, adev 666 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c &adev->wb.gpu_addr, adev 667 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c (void **)&adev->wb.wb); adev 668 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->wb.wb_obj = NULL; adev 681 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_wb_init(struct amdgpu_device *adev) adev 685 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->wb.wb_obj == NULL) { adev 687 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_bo_create_kernel(adev, AMDGPU_MAX_WB * sizeof(uint32_t) * 8, adev 689 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c &adev->wb.wb_obj, &adev->wb.gpu_addr, adev 690 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c (void **)&adev->wb.wb); adev 692 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_warn(adev->dev, "(%d) create WB bo failed\n", r); adev 696 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->wb.num_wb = AMDGPU_MAX_WB; adev 697 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c memset(&adev->wb.used, 0, sizeof(adev->wb.used)); adev 700 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c memset((char *)adev->wb.wb, 0, AMDGPU_MAX_WB * sizeof(uint32_t) * 8); adev 715 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb) adev 717 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c unsigned long offset = find_first_zero_bit(adev->wb.used, adev->wb.num_wb); adev 719 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (offset < adev->wb.num_wb) { adev 720 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c __set_bit(offset, adev->wb.used); adev 736 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb) adev 739 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (wb < adev->wb.num_wb) adev 740 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c __clear_bit(wb, adev->wb.used); adev 752 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev) adev 754 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c u64 space_needed = roundup_pow_of_two(adev->gmc.real_vram_size); adev 763 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev)) adev 767 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c root = adev->pdev->bus; adev 782 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c pci_read_config_word(adev->pdev, PCI_COMMAND, &cmd); adev 783 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c pci_write_config_word(adev->pdev, PCI_COMMAND, adev 787 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_doorbell_fini(adev); adev 788 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->asic_type >= CHIP_BONAIRE) adev 789 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c pci_release_resource(adev->pdev, 2); adev 791 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c pci_release_resource(adev->pdev, 0); adev 793 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = pci_resize_resource(adev->pdev, 0, rbar_size); adev 799 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c pci_assign_unassigned_bus_resources(adev->pdev->bus); adev 804 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_doorbell_init(adev); adev 805 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (r || (pci_resource_flags(adev->pdev, 0) & IORESOURCE_UNSET)) adev 808 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c pci_write_config_word(adev->pdev, PCI_COMMAND, cmd); adev 825 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c bool amdgpu_device_need_post(struct amdgpu_device *adev) adev 829 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev)) adev 832 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_passthrough(adev)) { adev 838 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->asic_type == CHIP_FIJI) { adev 841 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c err = request_firmware(&adev->pm.fw, "amdgpu/fiji_smc.bin", adev->dev); adev 846 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c fw_ver = *((uint32_t *)adev->pm.fw->data + 69); adev 852 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->has_hw_reset) { adev 853 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->has_hw_reset = false; adev 858 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->asic_type >= CHIP_BONAIRE) adev 859 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c return amdgpu_atombios_scratch_need_asic_init(adev); adev 862 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c reg = amdgpu_asic_get_config_memsize(adev); adev 882 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_device *adev = cookie; adev 883 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_asic_set_vga_state(adev, state); adev 901 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_device_check_block_size(struct amdgpu_device *adev) adev 910 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_warn(adev->dev, "VM page table size (%d) too small\n", adev 924 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_device_check_vm_size(struct amdgpu_device *adev) adev 931 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_warn(adev->dev, "VM size (%d) too small, min is 1GB\n", adev 937 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_device_check_smu_prv_buffer_size(struct amdgpu_device *adev) adev 967 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.smu_prv_buffer_size = amdgpu_smu_memory_pool_size << 28; adev 974 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.smu_prv_buffer_size = 0; adev 985 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_check_arguments(struct amdgpu_device *adev) adev 990 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_warn(adev->dev, "sched jobs (%d) must be at least 4\n", adev 994 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_warn(adev->dev, "sched jobs (%d) must be a power of 2\n", adev 1001 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_warn(adev->dev, "gart size (%d) too small\n", adev 1008 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_warn(adev->dev, "gtt size (%d) too small\n", adev 1016 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_warn(adev->dev, "valid range is between 4 and 9\n"); adev 1020 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_check_smu_prv_buffer_size(adev); adev 1022 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_check_vm_size(adev); adev 1024 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_check_block_size(adev); adev 1026 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ret = amdgpu_device_get_job_timeout_settings(adev); adev 1028 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "invalid lockup_timeout parameter syntax\n"); adev 1032 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->firmware.load_type = amdgpu_ucode_get_load_type(adev, amdgpu_fw_load_type); adev 1113 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_device *adev = dev; adev 1116 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 1117 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid) adev 1119 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type != block_type) adev 1121 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].version->funcs->set_clockgating_state) adev 1123 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->set_clockgating_state( adev 1124 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c (void *)adev, state); adev 1127 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 1147 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_device *adev = dev; adev 1150 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 1151 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid) adev 1153 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type != block_type) adev 1155 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].version->funcs->set_powergating_state) adev 1157 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->set_powergating_state( adev 1158 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c (void *)adev, state); adev 1161 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 1177 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_device_ip_get_clockgating_state(struct amdgpu_device *adev, adev 1182 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 1183 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid) adev 1185 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->funcs->get_clockgating_state) adev 1186 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->get_clockgating_state((void *)adev, flags); adev 1199 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c int amdgpu_device_ip_wait_for_idle(struct amdgpu_device *adev, adev 1204 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 1205 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid) adev 1207 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type == block_type) { adev 1208 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->wait_for_idle((void *)adev); adev 1227 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c bool amdgpu_device_ip_is_idle(struct amdgpu_device *adev, adev 1232 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 1233 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid) adev 1235 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type == block_type) adev 1236 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c return adev->ip_blocks[i].version->funcs->is_idle((void *)adev); adev 1252 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_ip_get_ip_block(struct amdgpu_device *adev, adev 1257 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) adev 1258 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type == type) adev 1259 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c return &adev->ip_blocks[i]; adev 1275 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c int amdgpu_device_ip_block_version_cmp(struct amdgpu_device *adev, adev 1279 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_ip_block *ip_block = amdgpu_device_ip_get_ip_block(adev, type); adev 1298 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c int amdgpu_device_ip_block_add(struct amdgpu_device *adev, adev 1304 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c DRM_INFO("add ip block number %d <%s>\n", adev->num_ip_blocks, adev 1307 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[adev->num_ip_blocks++].version = ip_block_version; adev 1324 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_device_enable_virtual_display(struct amdgpu_device *adev) adev 1326 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->enable_virtual_display = false; adev 1329 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct drm_device *ddev = adev->ddev; adev 1342 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->enable_virtual_display = true; adev 1353 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->mode_info.num_crtc = num_crtc; adev 1355 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->mode_info.num_crtc = 1; adev 1363 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->enable_virtual_display, adev->mode_info.num_crtc); adev 1379 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev) adev 1386 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->firmware.gpu_info_fw = NULL; adev 1388 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c switch (adev->asic_type) { adev 1422 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->rev_id >= 8) adev 1424 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c else if (adev->pdev->device == 0x15d8) adev 1447 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c err = request_firmware(&adev->firmware.gpu_info_fw, fw_name, adev->dev); adev 1449 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, adev 1454 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c err = amdgpu_ucode_validate(adev->firmware.gpu_info_fw); adev 1456 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, adev 1462 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c hdr = (const struct gpu_info_firmware_header_v1_0 *)adev->firmware.gpu_info_fw->data; adev 1469 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c (const struct gpu_info_firmware_v1_0 *)(adev->firmware.gpu_info_fw->data + adev 1472 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.config.max_shader_engines = le32_to_cpu(gpu_info_fw->gc_num_se); adev 1473 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.config.max_cu_per_sh = le32_to_cpu(gpu_info_fw->gc_num_cu_per_sh); adev 1474 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.config.max_sh_per_se = le32_to_cpu(gpu_info_fw->gc_num_sh_per_se); adev 1475 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.config.max_backends_per_se = le32_to_cpu(gpu_info_fw->gc_num_rb_per_se); adev 1476 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.config.max_texture_channel_caches = adev 1478 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.config.max_gprs = le32_to_cpu(gpu_info_fw->gc_num_gprs); adev 1479 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.config.max_gs_threads = le32_to_cpu(gpu_info_fw->gc_num_max_gs_thds); adev 1480 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gpu_info_fw->gc_gs_table_depth); adev 1481 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gpu_info_fw->gc_gsprim_buff_depth); adev 1482 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.config.double_offchip_lds_buf = adev 1484 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.cu_info.wave_front_size = le32_to_cpu(gpu_info_fw->gc_wave_size); adev 1485 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.cu_info.max_waves_per_simd = adev 1487 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.cu_info.max_scratch_slots_per_cu = adev 1489 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.cu_info.lds_size = le32_to_cpu(gpu_info_fw->gc_lds_size); adev 1492 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c (const struct gpu_info_firmware_v1_1 *)(adev->firmware.gpu_info_fw->data + adev 1494 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.config.num_sc_per_sh = adev 1496 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.config.num_packer_per_sc = adev 1502 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c (const struct gpu_info_firmware_v1_2 *)(adev->firmware.gpu_info_fw->data + adev 1504 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->dm.soc_bounding_box = &gpu_info_fw->soc_bounding_box; adev 1510 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, adev 1529 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_early_init(struct amdgpu_device *adev) adev 1533 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_enable_virtual_display(adev); adev 1535 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c switch (adev->asic_type) { adev 1545 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->asic_type == CHIP_CARRIZO || adev->asic_type == CHIP_STONEY) adev 1546 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->family = AMDGPU_FAMILY_CZ; adev 1548 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->family = AMDGPU_FAMILY_VI; adev 1550 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = vi_set_ip_blocks(adev); adev 1560 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->family = AMDGPU_FAMILY_SI; adev 1561 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = si_set_ip_blocks(adev); adev 1572 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if ((adev->asic_type == CHIP_BONAIRE) || (adev->asic_type == CHIP_HAWAII)) adev 1573 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->family = AMDGPU_FAMILY_CI; adev 1575 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->family = AMDGPU_FAMILY_KV; adev 1577 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = cik_set_ip_blocks(adev); adev 1588 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->asic_type == CHIP_RAVEN || adev 1589 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->asic_type == CHIP_RENOIR) adev 1590 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->family = AMDGPU_FAMILY_RV; adev 1592 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->family = AMDGPU_FAMILY_AI; adev 1594 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = soc15_set_ip_blocks(adev); adev 1601 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->family = AMDGPU_FAMILY_NV; adev 1603 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = nv_set_ip_blocks(adev); adev 1612 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_parse_gpu_info_fw(adev); adev 1616 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_amdkfd_device_probe(adev); adev 1618 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev)) { adev 1619 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_virt_request_full_gpu(adev, true); adev 1624 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pp_feature = amdgpu_pp_feature_mask; adev 1625 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev)) adev 1626 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pp_feature &= ~PP_GFXOFF_MASK; adev 1628 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 1631 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c i, adev->ip_blocks[i].version->funcs->name); adev 1632 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.valid = false; adev 1634 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->funcs->early_init) { adev 1635 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->early_init((void *)adev); adev 1637 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.valid = false; adev 1640 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 1643 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.valid = true; adev 1646 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.valid = true; adev 1650 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON) { adev 1652 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_get_bios(adev)) adev 1655 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_atombios_init(adev); adev 1657 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "amdgpu_atombios_init failed\n"); adev 1658 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_ATOMBIOS_INIT_FAIL, 0, 0); adev 1664 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->cg_flags &= amdgpu_cg_mask; adev 1665 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pg_flags &= amdgpu_pg_mask; adev 1670 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_hw_init_phase1(struct amdgpu_device *adev) adev 1674 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 1675 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.sw) adev 1677 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].status.hw) adev 1679 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON || adev 1680 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c (amdgpu_sriov_vf(adev) && (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_PSP)) || adev 1681 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_IH) { adev 1682 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->hw_init(adev); adev 1685 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 1688 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.hw = true; adev 1695 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_hw_init_phase2(struct amdgpu_device *adev) adev 1699 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 1700 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.sw) adev 1702 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].status.hw) adev 1704 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->hw_init(adev); adev 1707 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 1710 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.hw = true; adev 1716 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_fw_loading(struct amdgpu_device *adev) adev 1722 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->asic_type >= CHIP_VEGA10) { adev 1723 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 1724 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_PSP) adev 1728 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].status.hw == true) adev 1731 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->in_gpu_reset || adev->in_suspend) { adev 1732 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->resume(adev); adev 1735 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 1739 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->hw_init(adev); adev 1742 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 1747 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.hw = true; adev 1752 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_pm_load_smu_firmware(adev, &smu_version); adev 1768 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_init(struct amdgpu_device *adev) adev 1772 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_ras_init(adev); adev 1776 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 1777 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid) adev 1779 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->sw_init((void *)adev); adev 1782 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 1785 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.sw = true; adev 1788 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) { adev 1789 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_vram_scratch_init(adev); adev 1794 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->hw_init((void *)adev); adev 1799 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_wb_init(adev); adev 1804 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.hw = true; adev 1807 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) { adev 1808 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_allocate_static_csa(adev, &adev->virt.csa_obj, adev 1819 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_ib_pool_init(adev); adev 1821 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "IB initialization failed (%d).\n", r); adev 1822 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_IB_INIT_FAIL, 0, r); adev 1826 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_ucode_create_bo(adev); /* create ucode bo when sw_init complete*/ adev 1830 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_hw_init_phase1(adev); adev 1834 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_fw_loading(adev); adev 1838 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_hw_init_phase2(adev); adev 1842 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->gmc.xgmi.num_physical_nodes > 1) adev 1843 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_xgmi_add_device(adev); adev 1844 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_amdkfd_device_init(adev); adev 1847 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev)) { adev 1849 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_virt_init_data_exchange(adev); adev 1850 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_virt_release_full_gpu(adev, true); adev 1865 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_device_fill_reset_magic(struct amdgpu_device *adev) adev 1867 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c memcpy(adev->reset_magic, adev->gart.ptr, AMDGPU_RESET_MAGIC_NUM); adev 1880 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static bool amdgpu_device_check_vram_lost(struct amdgpu_device *adev) adev 1882 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c return !!memcmp(adev->gart.ptr, adev->reset_magic, adev 1898 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_set_cg_state(struct amdgpu_device *adev, adev 1906 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (j = 0; j < adev->num_ip_blocks; j++) { adev 1907 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c i = state == AMD_CG_STATE_GATE ? j : adev->num_ip_blocks - j - 1; adev 1908 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.late_initialized) adev 1911 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_UVD && adev 1912 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_VCE && adev 1913 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_VCN && adev 1914 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->set_clockgating_state) { adev 1916 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->set_clockgating_state((void *)adev, adev 1920 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 1929 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_set_pg_state(struct amdgpu_device *adev, enum amd_powergating_state state) adev 1936 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (j = 0; j < adev->num_ip_blocks; j++) { adev 1937 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c i = state == AMD_PG_STATE_GATE ? j : adev->num_ip_blocks - j - 1; adev 1938 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.late_initialized) adev 1941 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_UVD && adev 1942 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_VCE && adev 1943 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_VCN && adev 1944 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->set_powergating_state) { adev 1946 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->set_powergating_state((void *)adev, adev 1950 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 1961 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_device *adev; adev 1976 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev = gpu_ins->adev; adev 1977 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!(adev->flags & AMD_IS_APU) && adev 1979 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->powerplay.pp_funcs && adev 1980 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->powerplay.pp_funcs->enable_mgpu_fan_boost) { adev 1981 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ret = amdgpu_dpm_enable_mgpu_fan_boost(adev); adev 2007 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_late_init(struct amdgpu_device *adev) adev 2011 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 2012 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.hw) adev 2014 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->funcs->late_init) { adev 2015 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->late_init((void *)adev); adev 2018 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 2022 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.late_initialized = true; adev 2025 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_set_cg_state(adev, AMD_CG_STATE_GATE); adev 2026 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_set_pg_state(adev, AMD_PG_STATE_GATE); adev 2028 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_fill_reset_magic(adev); adev 2035 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_xgmi_set_pstate(adev, 0); adev 2051 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_fini(struct amdgpu_device *adev) adev 2055 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_ras_pre_fini(adev); adev 2057 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->gmc.xgmi.num_physical_nodes > 1) adev 2058 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_xgmi_remove_device(adev); adev 2060 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_amdkfd_device_fini(adev); adev 2062 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE); adev 2063 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE); adev 2066 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 2067 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.hw) adev 2069 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SMC) { adev 2070 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->hw_fini((void *)adev); adev 2074 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 2076 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.hw = false; adev 2081 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = adev->num_ip_blocks - 1; i >= 0; i--) { adev 2082 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.hw) adev 2085 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->hw_fini((void *)adev); adev 2089 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 2092 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.hw = false; adev 2096 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = adev->num_ip_blocks - 1; i >= 0; i--) { adev 2097 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.sw) adev 2100 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) { adev 2101 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_ucode_free_bo(adev); adev 2102 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_free_static_csa(&adev->virt.csa_obj); adev 2103 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_wb_fini(adev); adev 2104 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_vram_scratch_fini(adev); adev 2105 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_ib_pool_fini(adev); adev 2108 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->sw_fini((void *)adev); adev 2112 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 2114 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.sw = false; adev 2115 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.valid = false; adev 2118 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = adev->num_ip_blocks - 1; i >= 0; i--) { adev 2119 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.late_initialized) adev 2121 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->funcs->late_fini) adev 2122 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->late_fini((void *)adev); adev 2123 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.late_initialized = false; adev 2126 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_ras_fini(adev); adev 2128 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev)) adev 2129 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_virt_release_full_gpu(adev, false)) adev 2142 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_device *adev = adev 2146 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_ib_ring_tests(adev); adev 2153 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_device *adev = adev 2156 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_lock(&adev->gfx.gfx_off_mutex); adev 2157 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->gfx.gfx_off_state && !adev->gfx.gfx_off_req_count) { adev 2158 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, true)) adev 2159 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.gfx_off_state = true; adev 2161 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_unlock(&adev->gfx.gfx_off_mutex); adev 2175 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev) adev 2179 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE); adev 2180 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE); adev 2182 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = adev->num_ip_blocks - 1; i >= 0; i--) { adev 2183 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid) adev 2186 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_DCE) { adev 2188 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->suspend(adev); adev 2192 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 2195 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.hw = false; adev 2213 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev) adev 2217 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = adev->num_ip_blocks - 1; i >= 0; i--) { adev 2218 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid) adev 2221 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_DCE) adev 2224 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->suspend(adev); adev 2228 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 2230 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.hw = false; adev 2232 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SMC) { adev 2233 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (is_support_sw_smu(adev)) { adev 2235 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c } else if (adev->powerplay.pp_funcs && adev 2236 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->powerplay.pp_funcs->set_mp1_state) { adev 2237 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->powerplay.pp_funcs->set_mp1_state( adev 2238 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->powerplay.pp_handle, adev 2239 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->mp1_state); adev 2242 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->mp1_state, r); adev 2248 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.hw = false; adev 2265 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c int amdgpu_device_ip_suspend(struct amdgpu_device *adev) adev 2269 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev)) adev 2270 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_virt_request_full_gpu(adev, false); adev 2272 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_suspend_phase1(adev); adev 2275 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_suspend_phase2(adev); adev 2277 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev)) adev 2278 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_virt_release_full_gpu(adev, false); adev 2283 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_reinit_early_sriov(struct amdgpu_device *adev) adev 2298 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (j = 0; j < adev->num_ip_blocks; j++) { adev 2299 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c block = &adev->ip_blocks[j]; adev 2306 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = block->version->funcs->hw_init(adev); adev 2317 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_reinit_late_sriov(struct amdgpu_device *adev) adev 2334 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (j = 0; j < adev->num_ip_blocks; j++) { adev 2335 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c block = &adev->ip_blocks[j]; adev 2342 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = block->version->funcs->hw_init(adev); adev 2365 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_resume_phase1(struct amdgpu_device *adev) adev 2369 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 2370 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid || adev->ip_blocks[i].status.hw) adev 2372 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON || adev 2373 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC || adev 2374 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_IH) { adev 2376 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->resume(adev); adev 2379 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 2382 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.hw = true; adev 2402 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_resume_phase2(struct amdgpu_device *adev) adev 2406 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 2407 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid || adev->ip_blocks[i].status.hw) adev 2409 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON || adev 2410 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC || adev 2411 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_IH || adev 2412 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_PSP) adev 2414 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->resume(adev); adev 2417 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->name, r); adev 2420 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.hw = true; adev 2438 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_resume(struct amdgpu_device *adev) adev 2442 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_resume_phase1(adev); adev 2446 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_fw_loading(adev); adev 2450 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_resume_phase2(adev); adev 2462 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_device_detect_sriov_bios(struct amdgpu_device *adev) adev 2464 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev)) { adev 2465 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->is_atom_fw) { adev 2466 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_atomfirmware_gpu_supports_virtualization(adev)) adev 2467 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->virt.caps |= AMDGPU_SRIOV_CAPS_SRIOV_VBIOS; adev 2469 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_atombios_has_gpu_virtualization_table(adev)) adev 2470 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->virt.caps |= AMDGPU_SRIOV_CAPS_SRIOV_VBIOS; adev 2473 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!(adev->virt.caps & AMDGPU_SRIOV_CAPS_SRIOV_VBIOS)) adev 2474 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_NO_VBIOS, 0, 0); adev 2539 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c bool amdgpu_device_has_dc_support(struct amdgpu_device *adev) adev 2541 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev)) adev 2544 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c return amdgpu_device_asic_has_dc_support(adev->asic_type); adev 2550 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_device *adev = adev 2553 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->asic_reset_res = amdgpu_asic_reset(adev); adev 2554 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->asic_reset_res) adev 2556 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->asic_reset_res, adev->ddev->unique); adev 2572 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c int amdgpu_device_init(struct amdgpu_device *adev, adev 2581 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->shutdown = false; adev 2582 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->dev = &pdev->dev; adev 2583 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ddev = ddev; adev 2584 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pdev = pdev; adev 2585 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->flags = flags; adev 2586 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->asic_type = flags & AMD_ASIC_MASK; adev 2587 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->usec_timeout = AMDGPU_MAX_USEC_TIMEOUT; adev 2589 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->usec_timeout *= 2; adev 2590 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gmc.gart_size = 512 * 1024 * 1024; adev 2591 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->accel_working = false; adev 2592 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->num_rings = 0; adev 2593 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->mman.buffer_funcs = NULL; adev 2594 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->mman.buffer_funcs_ring = NULL; adev 2595 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->vm_manager.vm_pte_funcs = NULL; adev 2596 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->vm_manager.vm_pte_num_rqs = 0; adev 2597 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gmc.gmc_funcs = NULL; adev 2598 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->fence_context = dma_fence_context_alloc(AMDGPU_MAX_RINGS); adev 2599 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c bitmap_zero(adev->gfx.pipe_reserve_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); adev 2601 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->smc_rreg = &amdgpu_invalid_rreg; adev 2602 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->smc_wreg = &amdgpu_invalid_wreg; adev 2603 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pcie_rreg = &amdgpu_invalid_rreg; adev 2604 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pcie_wreg = &amdgpu_invalid_wreg; adev 2605 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pciep_rreg = &amdgpu_invalid_rreg; adev 2606 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pciep_wreg = &amdgpu_invalid_wreg; adev 2607 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pcie_rreg64 = &amdgpu_invalid_rreg64; adev 2608 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pcie_wreg64 = &amdgpu_invalid_wreg64; adev 2609 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->uvd_ctx_rreg = &amdgpu_invalid_rreg; adev 2610 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->uvd_ctx_wreg = &amdgpu_invalid_wreg; adev 2611 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->didt_rreg = &amdgpu_invalid_rreg; adev 2612 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->didt_wreg = &amdgpu_invalid_wreg; adev 2613 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gc_cac_rreg = &amdgpu_invalid_rreg; adev 2614 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gc_cac_wreg = &amdgpu_invalid_wreg; adev 2615 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->audio_endpt_rreg = &amdgpu_block_invalid_rreg; adev 2616 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->audio_endpt_wreg = &amdgpu_block_invalid_wreg; adev 2619 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_asic_name[adev->asic_type], pdev->vendor, pdev->device, adev 2624 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c atomic_set(&adev->irq.ih.lock, 0); adev 2625 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_init(&adev->firmware.mutex); adev 2626 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_init(&adev->pm.mutex); adev 2627 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_init(&adev->gfx.gpu_clock_mutex); adev 2628 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_init(&adev->srbm_mutex); adev 2629 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_init(&adev->gfx.pipe_reserve_mutex); adev 2630 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_init(&adev->gfx.gfx_off_mutex); adev 2631 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_init(&adev->grbm_idx_mutex); adev 2632 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_init(&adev->mn_lock); adev 2633 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_init(&adev->virt.vf_errors.lock); adev 2634 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c hash_init(adev->mn_hash); adev 2635 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_init(&adev->lock_reset); adev 2636 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_init(&adev->virt.dpm_mutex); adev 2637 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_init(&adev->psp.mutex); adev 2639 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_check_arguments(adev); adev 2643 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c spin_lock_init(&adev->mmio_idx_lock); adev 2644 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c spin_lock_init(&adev->smc_idx_lock); adev 2645 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c spin_lock_init(&adev->pcie_idx_lock); adev 2646 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c spin_lock_init(&adev->uvd_ctx_idx_lock); adev 2647 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c spin_lock_init(&adev->didt_idx_lock); adev 2648 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c spin_lock_init(&adev->gc_cac_idx_lock); adev 2649 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c spin_lock_init(&adev->se_cac_idx_lock); adev 2650 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c spin_lock_init(&adev->audio_endpt_idx_lock); adev 2651 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c spin_lock_init(&adev->mm_stats.lock); adev 2653 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c INIT_LIST_HEAD(&adev->shadow_list); adev 2654 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_init(&adev->shadow_list_lock); adev 2656 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c INIT_LIST_HEAD(&adev->ring_lru_list); adev 2657 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c spin_lock_init(&adev->ring_lru_list_lock); adev 2659 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c INIT_DELAYED_WORK(&adev->delayed_init_work, adev 2661 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c INIT_DELAYED_WORK(&adev->gfx.gfx_off_delay_work, adev 2664 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c INIT_WORK(&adev->xgmi_reset_work, amdgpu_device_xgmi_reset_func); adev 2666 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->gfx.gfx_off_req_count = 1; adev 2667 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.ac_power = power_supply_is_system_supplied() > 0 ? true : false; adev 2671 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->asic_type >= CHIP_BONAIRE) { adev 2672 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->rmmio_base = pci_resource_start(adev->pdev, 5); adev 2673 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->rmmio_size = pci_resource_len(adev->pdev, 5); adev 2675 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->rmmio_base = pci_resource_start(adev->pdev, 2); adev 2676 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->rmmio_size = pci_resource_len(adev->pdev, 2); adev 2679 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->rmmio = ioremap(adev->rmmio_base, adev->rmmio_size); adev 2680 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->rmmio == NULL) { adev 2683 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)adev->rmmio_base); adev 2684 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c DRM_INFO("register mmio size: %u\n", (unsigned)adev->rmmio_size); adev 2688 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (pci_resource_flags(adev->pdev, i) & IORESOURCE_IO) { adev 2689 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->rio_mem_size = pci_resource_len(adev->pdev, i); adev 2690 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->rio_mem = pci_iomap(adev->pdev, i, adev->rio_mem_size); adev 2694 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->rio_mem == NULL) adev 2698 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = pci_enable_atomic_ops_to_root(adev->pdev, adev 2702 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->have_atomics_support = false; adev 2705 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->have_atomics_support = true; adev 2708 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_get_pcie_info(adev); adev 2713 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_mes && adev->asic_type >= CHIP_NAVI10) adev 2714 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->enable_mes = true; adev 2716 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_discovery && adev->asic_type >= CHIP_NAVI10) { adev 2717 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_discovery_init(adev); adev 2719 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "amdgpu_discovery_init failed\n"); adev 2725 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_early_init(adev); adev 2730 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_doorbell_init(adev); adev 2735 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c vga_client_register(adev->pdev, adev, NULL, amdgpu_device_vga_set_decode); adev 2739 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!pci_is_thunderbolt_attached(adev->pdev)) adev 2740 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c vga_switcheroo_register_client(adev->pdev, adev 2743 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c vga_switcheroo_init_domain_pm_ops(adev->dev, &adev->vga_pm_domain); adev 2747 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c emu_soc_asic_init(adev); adev 2752 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_detect_sriov_bios(adev); adev 2757 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_sriov_vf(adev) && amdgpu_asic_need_reset_on_init(adev)) { adev 2758 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_asic_reset(adev); adev 2760 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "asic reset on init failed\n"); adev 2766 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_device_need_post(adev)) { adev 2767 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->bios) { adev 2768 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "no vBIOS found\n"); adev 2773 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_atom_asic_init(adev->mode_info.atom_context); adev 2775 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "gpu post error!\n"); adev 2780 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->is_atom_fw) { adev 2782 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_atomfirmware_get_clock_info(adev); adev 2784 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "amdgpu_atomfirmware_get_clock_info failed\n"); adev 2785 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_ATOMBIOS_GET_CLOCK_FAIL, 0, 0); adev 2790 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_atombios_get_clock_info(adev); adev 2792 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "amdgpu_atombios_get_clock_info failed\n"); adev 2793 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_ATOMBIOS_GET_CLOCK_FAIL, 0, 0); adev 2797 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_device_has_dc_support(adev)) adev 2798 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_atombios_i2c_init(adev); adev 2803 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_fence_driver_init(adev); adev 2805 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); adev 2806 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); adev 2811 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c drm_mode_config_init(adev->ddev); adev 2813 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_init(adev); adev 2816 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev) && adev 2817 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c !amdgpu_sriov_runtime(adev) && adev 2818 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_virt_mmio_blocked(adev) && adev 2819 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c !amdgpu_virt_wait_reset(adev)) { adev 2820 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "VF exclusive mode timeout\n"); adev 2822 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->virt.caps &= ~AMDGPU_SRIOV_CAPS_RUNTIME; adev 2823 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->virt.ops = NULL; adev 2827 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "amdgpu_device_ip_init failed\n"); adev 2828 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_AMDGPU_INIT_FAIL, 0, 0); adev 2829 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_virt_request_full_gpu(adev, false)) adev 2830 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_virt_release_full_gpu(adev, false); adev 2834 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->accel_working = true; adev 2836 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_vm_check_compute_bug(adev); adev 2844 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->mm_stats.log2_max_MBps = ilog2(max(1u, max_MBps)); adev 2846 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_fbdev_init(adev); adev 2848 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev) && amdgim_is_hwperf(adev)) adev 2849 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_pm_virt_sysfs_init(adev); adev 2851 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_pm_sysfs_init(adev); adev 2855 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_ucode_sysfs_init(adev); adev 2859 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_debugfs_gem_init(adev); adev 2863 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_debugfs_regs_init(adev); adev 2867 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_debugfs_firmware_init(adev); adev 2871 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_debugfs_init(adev); adev 2876 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->accel_working) adev 2877 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_test_moves(adev); adev 2882 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->accel_working) adev 2883 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_benchmark(adev, amdgpu_benchmarking); adev 2893 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_register_gpu_instance(adev); adev 2898 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_late_init(adev); adev 2900 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "amdgpu_device_ip_late_init failed\n"); adev 2901 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_AMDGPU_LATE_INIT_FAIL, 0, r); adev 2906 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_ras_resume(adev); adev 2908 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c queue_delayed_work(system_wq, &adev->delayed_init_work, adev 2911 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = device_create_file(adev->dev, &dev_attr_pcie_replay_count); adev 2913 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "Could not create pcie_replay_count"); adev 2918 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_pmu_init(adev); adev 2920 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_err(adev->dev, "amdgpu_pmu_init failed\n"); adev 2925 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_vf_error_trans_all(adev); adev 2927 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c vga_switcheroo_fini_domain_pm_ops(adev->dev); adev 2940 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c void amdgpu_device_fini(struct amdgpu_device *adev) adev 2945 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->shutdown = true; adev 2947 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_irq_disable_all(adev); adev 2948 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->mode_info.mode_config_initialized){ adev 2949 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_device_has_dc_support(adev)) adev 2950 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c drm_helper_force_disable_all(adev->ddev); adev 2952 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c drm_atomic_helper_shutdown(adev->ddev); adev 2954 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_fence_driver_fini(adev); adev 2955 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_pm_sysfs_fini(adev); adev 2956 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_fbdev_fini(adev); adev 2957 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_fini(adev); adev 2958 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->firmware.gpu_info_fw) { adev 2959 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c release_firmware(adev->firmware.gpu_info_fw); adev 2960 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->firmware.gpu_info_fw = NULL; adev 2962 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->accel_working = false; adev 2963 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c cancel_delayed_work_sync(&adev->delayed_init_work); adev 2965 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_device_has_dc_support(adev)) adev 2966 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_i2c_fini(adev); adev 2969 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_atombios_fini(adev); adev 2971 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c kfree(adev->bios); adev 2972 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->bios = NULL; adev 2973 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!pci_is_thunderbolt_attached(adev->pdev)) adev 2974 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c vga_switcheroo_unregister_client(adev->pdev); adev 2975 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->flags & AMD_IS_PX) adev 2976 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c vga_switcheroo_fini_domain_pm_ops(adev->dev); adev 2977 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c vga_client_register(adev->pdev, NULL, NULL, NULL); adev 2978 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->rio_mem) adev 2979 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c pci_iounmap(adev->pdev, adev->rio_mem); adev 2980 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->rio_mem = NULL; adev 2981 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c iounmap(adev->rmmio); adev 2982 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->rmmio = NULL; adev 2983 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_doorbell_fini(adev); adev 2984 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev) && amdgim_is_hwperf(adev)) adev 2985 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_pm_virt_sysfs_fini(adev); adev 2987 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_debugfs_regs_cleanup(adev); adev 2988 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c device_remove_file(adev->dev, &dev_attr_pcie_replay_count); adev 2989 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_ucode_sysfs_fini(adev); adev 2991 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_pmu_fini(adev); adev 2992 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_debugfs_preempt_cleanup(adev); adev 2993 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_discovery && adev->asic_type >= CHIP_NAVI10) adev 2994 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_discovery_fini(adev); adev 3014 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_device *adev; adev 3023 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev = dev->dev_private; adev 3028 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->in_suspend = true; adev 3032 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_fbdev_set_suspend(adev, 1); adev 3034 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c cancel_delayed_work_sync(&adev->delayed_init_work); adev 3036 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_device_has_dc_support(adev)) { adev 3049 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_crtc->cursor_bo && !adev->enable_virtual_display) { adev 3063 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_fbdev_robj_is_fb(adev, robj)) { adev 3073 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_ras_suspend(adev); adev 3075 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_suspend_phase1(adev); adev 3077 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_amdkfd_suspend(adev); adev 3080 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_bo_evict_vram(adev); adev 3082 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_fence_driver_suspend(adev); adev 3084 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_suspend_phase2(adev); adev 3090 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_bo_evict_vram(adev); adev 3098 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_asic_reset(adev); adev 3120 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_device *adev = dev->dev_private; adev 3136 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_device_need_post(adev)) { adev 3137 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_atom_asic_init(adev->mode_info.atom_context); adev 3142 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_resume(adev); adev 3147 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_fence_driver_resume(adev); adev 3150 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_late_init(adev); adev 3154 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c queue_delayed_work(system_wq, &adev->delayed_init_work, adev 3157 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_device_has_dc_support(adev)) { adev 3162 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_crtc->cursor_bo && !adev->enable_virtual_display) { adev 3175 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_amdkfd_resume(adev); adev 3180 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c flush_delayed_work(&adev->delayed_init_work); adev 3184 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_device_has_dc_support(adev)) { adev 3195 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_fbdev_set_suspend(adev, 0); adev 3200 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_ras_resume(adev); adev 3214 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_device_has_dc_support(adev)) adev 3221 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->in_suspend = false; adev 3236 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static bool amdgpu_device_ip_check_soft_reset(struct amdgpu_device *adev) adev 3241 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev)) adev 3244 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_asic_need_full_reset(adev)) adev 3247 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 3248 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid) adev 3250 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].version->funcs->check_soft_reset) adev 3251 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].status.hang = adev 3252 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->check_soft_reset(adev); adev 3253 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].status.hang) { adev 3254 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c DRM_INFO("IP block:%s is hung!\n", adev->ip_blocks[i].version->funcs->name); adev 3272 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_pre_soft_reset(struct amdgpu_device *adev) adev 3276 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 3277 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid) adev 3279 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].status.hang && adev 3280 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->pre_soft_reset) { adev 3281 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->pre_soft_reset(adev); adev 3299 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static bool amdgpu_device_ip_need_full_reset(struct amdgpu_device *adev) adev 3303 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_asic_need_full_reset(adev)) adev 3306 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 3307 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid) adev 3309 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if ((adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) || adev 3310 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SMC) || adev 3311 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_ACP) || adev 3312 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_DCE) || adev 3313 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_PSP) { adev 3314 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].status.hang) { adev 3334 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_soft_reset(struct amdgpu_device *adev) adev 3338 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 3339 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid) adev 3341 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].status.hang && adev 3342 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->soft_reset) { adev 3343 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->soft_reset(adev); adev 3363 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_ip_post_soft_reset(struct amdgpu_device *adev) adev 3367 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c for (i = 0; i < adev->num_ip_blocks; i++) { adev 3368 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!adev->ip_blocks[i].status.valid) adev 3370 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->ip_blocks[i].status.hang && adev 3371 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->ip_blocks[i].version->funcs->post_soft_reset) adev 3372 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = adev->ip_blocks[i].version->funcs->post_soft_reset(adev); adev 3392 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_recover_vram(struct amdgpu_device *adev) adev 3398 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_runtime(adev)) adev 3404 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_lock(&adev->shadow_list_lock); adev 3405 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c list_for_each_entry(shadow, &adev->shadow_list, shadow_list) { adev 3432 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_unlock(&adev->shadow_list_lock); adev 3457 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_reset_sriov(struct amdgpu_device *adev, adev 3463 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_virt_request_full_gpu(adev, true); adev 3465 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_virt_reset_gpu(adev); adev 3470 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_reinit_early_sriov(adev); adev 3475 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_gtt_mgr_recover(&adev->mman.bdev.man[TTM_PL_TT]); adev 3477 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_fw_loading(adev); adev 3482 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_reinit_late_sriov(adev); adev 3486 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_irq_gpu_reset_resume_helper(adev); adev 3487 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_ib_ring_tests(adev); adev 3488 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_amdkfd_post_reset(adev); adev 3491 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_virt_init_data_exchange(adev); adev 3492 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_virt_release_full_gpu(adev, true); adev 3493 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!r && adev->virt.gim_feature & AMDGIM_FEATURE_GIM_FLR_VRAMLOST) { adev 3494 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_inc_vram_lost(adev); adev 3495 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_recover_vram(adev); adev 3509 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev) adev 3511 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_device_ip_check_soft_reset(adev)) { adev 3519 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev)) adev 3523 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c switch (adev->asic_type) { adev 3551 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev, adev 3560 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c struct amdgpu_ring *ring = adev->rings[i]; adev 3573 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_sriov_vf(adev)) { adev 3576 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c need_full_reset = amdgpu_device_ip_need_full_reset(adev); adev 3579 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_ip_pre_soft_reset(adev); adev 3580 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_soft_reset(adev); adev 3581 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_ip_post_soft_reset(adev); adev 3582 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (r || amdgpu_device_ip_check_soft_reset(adev)) { adev 3589 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_ip_suspend(adev); adev 3723 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static bool amdgpu_device_lock_adev(struct amdgpu_device *adev, bool trylock) adev 3726 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!mutex_trylock(&adev->lock_reset)) adev 3729 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_lock(&adev->lock_reset); adev 3731 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c atomic_inc(&adev->gpu_reset_counter); adev 3732 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->in_gpu_reset = 1; adev 3733 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c switch (amdgpu_asic_reset_method(adev)) { adev 3735 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->mp1_state = PP_MP1_STATE_SHUTDOWN; adev 3738 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->mp1_state = PP_MP1_STATE_RESET; adev 3741 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->mp1_state = PP_MP1_STATE_NONE; adev 3745 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_sriov_vf(adev)) adev 3746 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_amdkfd_pre_reset(adev); adev 3751 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_device_unlock_adev(struct amdgpu_device *adev) adev 3754 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_sriov_vf(adev)) adev 3755 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_amdkfd_post_reset(adev); adev 3756 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_vf_error_trans_all(adev); adev 3757 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->mp1_state = PP_MP1_STATE_NONE; adev 3758 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->in_gpu_reset = 0; adev 3759 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c mutex_unlock(&adev->lock_reset); adev 3774 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c int amdgpu_device_gpu_recover(struct amdgpu_device *adev, adev 3786 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_info(adev->dev, "GPU reset begin!\n"); adev 3788 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c cancel_delayed_work_sync(&adev->delayed_init_work); adev 3790 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c hive = amdgpu_get_xgmi_hive(adev, false); adev 3807 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_device_lock_adev(adev, !hive)) { adev 3814 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->gmc.xgmi.num_physical_nodes > 1) { adev 3816 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_unlock_adev(adev); adev 3827 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c list_add_tail(&adev->gmc.xgmi.head, &device_list); adev 3865 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (!amdgpu_device_ip_need_full_reset(adev)) adev 3869 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_info(adev->dev, "Guilty job already signaled, skipping HW reset"); adev 3875 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_pre_asic_reset(adev, job, &need_full_reset); adev 3879 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r, adev->ddev->unique); adev 3880 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->asic_reset_res = r; adev 3886 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (tmp_adev == adev) adev 3903 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (amdgpu_sriov_vf(adev)) { adev 3904 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c r = amdgpu_device_reset_sriov(adev, job ? false : true); adev 3906 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->asic_reset_res = r; adev 3938 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_info(tmp_adev->dev, "GPU reset(%d) failed\n", atomic_read(&adev->gpu_reset_counter)); adev 3941 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_info(tmp_adev->dev, "GPU reset(%d) succeeded!\n", atomic_read(&adev->gpu_reset_counter)); adev 3951 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c dev_info(adev->dev, "GPU reset end with ret = %d\n", r); adev 3964 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c static void amdgpu_device_get_pcie_info(struct amdgpu_device *adev) adev 3971 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_gen_mask = amdgpu_pcie_gen_cap; adev 3974 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_mlw_mask = amdgpu_pcie_lane_cap; adev 3977 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (pci_is_root_bus(adev->pdev->bus)) { adev 3978 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->pm.pcie_gen_mask == 0) adev 3979 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_gen_mask = AMDGPU_DEFAULT_PCIE_GEN_MASK; adev 3980 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->pm.pcie_mlw_mask == 0) adev 3981 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_mlw_mask = AMDGPU_DEFAULT_PCIE_MLW_MASK; adev 3985 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->pm.pcie_gen_mask && adev->pm.pcie_mlw_mask) adev 3988 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c pcie_bandwidth_available(adev->pdev, NULL, adev 3991 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->pm.pcie_gen_mask == 0) { adev 3993 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c pdev = adev->pdev; adev 3996 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_gen_mask |= (CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN1 | adev 4001 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_gen_mask |= (CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN1 | adev 4006 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_gen_mask |= (CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN1 | adev 4010 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_gen_mask |= (CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN1 | adev 4013 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_gen_mask |= CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN1; adev 4017 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_gen_mask |= (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1 | adev 4021 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_gen_mask |= (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1 | adev 4026 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_gen_mask |= (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1 | adev 4030 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_gen_mask |= (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1 | adev 4033 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_gen_mask |= CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1; adev 4037 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c if (adev->pm.pcie_mlw_mask == 0) { adev 4039 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_mlw_mask |= AMDGPU_DEFAULT_PCIE_MLW_MASK; adev 4043 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X32 | adev 4052 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X16 | adev 4060 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X12 | adev 4067 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | adev 4073 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 | adev 4078 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | adev 4082 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->pm.pcie_mlw_mask = CAIL_PCIE_LINK_WIDTH_SUPPORT_X1; adev 135 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c static int amdgpu_discovery_read_binary(struct amdgpu_device *adev, uint8_t *binary) adev 143 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c spin_lock_irqsave(&adev->mmio_idx_lock, flags); adev 147 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c spin_unlock_irqrestore(&adev->mmio_idx_lock, flags); adev 171 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c int amdgpu_discovery_init(struct amdgpu_device *adev) adev 182 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->discovery = kzalloc(DISCOVERY_TMR_SIZE, GFP_KERNEL); adev 183 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c if (!adev->discovery) adev 186 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c r = amdgpu_discovery_read_binary(adev, adev->discovery); adev 192 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c bhdr = (struct binary_header *)adev->discovery; adev 205 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c if (!amdgpu_discovery_verify_checksum(adev->discovery + offset, adev 215 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c ihdr = (struct ip_discovery_header *)(adev->discovery + offset); adev 223 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c if (!amdgpu_discovery_verify_checksum(adev->discovery + offset, adev 233 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c ghdr = (struct gpu_info_header *)(adev->discovery + offset); adev 235 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c if (!amdgpu_discovery_verify_checksum(adev->discovery + offset, adev 245 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c kfree(adev->discovery); adev 246 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->discovery = NULL; adev 251 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c void amdgpu_discovery_fini(struct amdgpu_device *adev) adev 253 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c kfree(adev->discovery); adev 254 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->discovery = NULL; adev 257 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev) adev 271 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c if (!adev->discovery) { adev 276 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c bhdr = (struct binary_header *)adev->discovery; adev 277 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c ihdr = (struct ip_discovery_header *)(adev->discovery + adev 285 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c dhdr = (struct die_header *)(adev->discovery + die_offset); adev 299 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c ip = (struct ip *)(adev->discovery + ip_offset); adev 322 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->reg_offset[hw_ip][ip->number_instance] = adev 335 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c int amdgpu_discovery_get_ip_version(struct amdgpu_device *adev, int hw_id, adev 348 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c if (!adev->discovery) { adev 353 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c bhdr = (struct binary_header *)adev->discovery; adev 354 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c ihdr = (struct ip_discovery_header *)(adev->discovery + adev 360 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c dhdr = (struct die_header *)(adev->discovery + die_offset); adev 365 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c ip = (struct ip *)(adev->discovery + ip_offset); adev 381 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev) adev 386 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c if (!adev->discovery) { adev 391 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c bhdr = (struct binary_header *)adev->discovery; adev 392 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c gc_info = (struct gc_info_v1_0 *)(adev->discovery + adev 395 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->gc_num_se); adev 396 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.config.max_cu_per_sh = 2 * (le32_to_cpu(gc_info->gc_num_wgp0_per_sa) + adev 398 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->gc_num_sa_per_se); adev 399 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->gc_num_rb_per_se); adev 400 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.config.max_texture_channel_caches = le32_to_cpu(gc_info->gc_num_gl2c); adev 401 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.config.max_gprs = le32_to_cpu(gc_info->gc_num_gprs); adev 402 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.config.max_gs_threads = le32_to_cpu(gc_info->gc_num_max_gs_thds); adev 403 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gc_info->gc_gs_table_depth); adev 404 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gc_info->gc_gsprim_buff_depth); adev 405 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.config.double_offchip_lds_buf = le32_to_cpu(gc_info->gc_double_offchip_lds_buffer); adev 406 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->gc_wave_size); adev 407 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->gc_max_waves_per_simd); adev 408 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->gc_max_scratch_slots_per_cu); adev 409 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->gc_lds_size); adev 410 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.config.num_sc_per_sh = le32_to_cpu(gc_info->gc_num_sc_per_se) / adev 412 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c adev->gfx.config.num_packer_per_sc = le32_to_cpu(gc_info->gc_num_packer_per_sc); adev 29 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h int amdgpu_discovery_init(struct amdgpu_device *adev); adev 30 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h void amdgpu_discovery_fini(struct amdgpu_device *adev); adev 31 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev); adev 32 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h int amdgpu_discovery_get_ip_version(struct amdgpu_device *adev, int hw_id, adev 34 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev); adev 77 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c struct amdgpu_device *adev = work->adev; adev 78 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[work->crtc_id]; adev 96 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c (amdgpu_display_get_crtc_scanoutpos(adev->ddev, work->crtc_id, 0, adev 102 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c amdgpu_get_vblank_counter_kms(adev->ddev, amdgpu_crtc->crtc_id)) > 0) { adev 111 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base, work->async); adev 155 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c struct amdgpu_device *adev = dev->dev_private; adev 172 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c work->adev = adev; adev 193 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (!adev->enable_virtual_display) { adev 195 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c amdgpu_display_supported_domains(adev, new_abo->flags)); adev 219 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (!adev->enable_virtual_display) adev 251 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (!adev->enable_virtual_display) adev 273 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c struct amdgpu_device *adev; adev 295 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev = dev->dev_private; adev 298 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (active && !adev->have_disp_power_ref) { adev 299 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev->have_disp_power_ref = true; adev 304 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (!active && adev->have_disp_power_ref) { adev 306 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev->have_disp_power_ref = false; adev 499 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev, adev 513 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (adev->asic_type >= CHIP_CARRIZO && adev 514 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev->asic_type < CHIP_RAVEN && adev 515 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c (adev->flags & AMD_IS_APU) && adev 518 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c amdgpu_device_asic_has_dc_support(adev->asic_type)) adev 602 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c int amdgpu_display_modeset_create_props(struct amdgpu_device *adev) adev 606 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev->mode_info.coherent_mode_property = adev 607 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c drm_property_create_range(adev->ddev, 0 , "coherent", 0, 1); adev 608 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (!adev->mode_info.coherent_mode_property) adev 611 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev->mode_info.load_detect_property = adev 612 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c drm_property_create_range(adev->ddev, 0, "load detection", 0, 1); adev 613 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (!adev->mode_info.load_detect_property) adev 616 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c drm_mode_create_scaling_mode_property(adev->ddev); adev 619 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev->mode_info.underscan_property = adev 620 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c drm_property_create_enum(adev->ddev, 0, adev 624 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev->mode_info.underscan_hborder_property = adev 625 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c drm_property_create_range(adev->ddev, 0, adev 627 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (!adev->mode_info.underscan_hborder_property) adev 630 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev->mode_info.underscan_vborder_property = adev 631 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c drm_property_create_range(adev->ddev, 0, adev 633 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (!adev->mode_info.underscan_vborder_property) adev 637 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev->mode_info.audio_property = adev 638 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c drm_property_create_enum(adev->ddev, 0, adev 643 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev->mode_info.dither_property = adev 644 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c drm_property_create_enum(adev->ddev, 0, adev 648 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (amdgpu_device_has_dc_support(adev)) { adev 649 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev->mode_info.abm_level_property = adev 650 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c drm_property_create_range(adev->ddev, 0, adev 652 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (!adev->mode_info.abm_level_property) adev 659 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c void amdgpu_display_update_priority(struct amdgpu_device *adev) adev 663 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev->mode_info.disp_priority = 0; adev 665 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c adev->mode_info.disp_priority = amdgpu_disp_priority; adev 803 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c struct amdgpu_device *adev = dev->dev_private; adev 811 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (amdgpu_display_page_flip_get_scanoutpos(adev, pipe, &vbl, &position) == 0) adev 854 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c vbl_start -= adev->mode_info.crtcs[pipe]->lb_vblank_lead_lines; adev 894 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c int amdgpu_display_crtc_idx_to_irq_type(struct amdgpu_device *adev, int crtc) adev 896 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if (crtc < 0 || crtc >= adev->mode_info.num_crtc) adev 26 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h #define amdgpu_display_vblank_get_counter(adev, crtc) (adev)->mode_info.funcs->vblank_get_counter((adev), (crtc)) adev 27 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h #define amdgpu_display_backlight_set_level(adev, e, l) (adev)->mode_info.funcs->backlight_set_level((e), (l)) adev 28 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h #define amdgpu_display_backlight_get_level(adev, e) (adev)->mode_info.funcs->backlight_get_level((e)) adev 29 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h #define amdgpu_display_hpd_sense(adev, h) (adev)->mode_info.funcs->hpd_sense((adev), (h)) adev 30 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h #define amdgpu_display_hpd_set_polarity(adev, h) (adev)->mode_info.funcs->hpd_set_polarity((adev), (h)) adev 31 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h #define amdgpu_display_hpd_get_gpio_reg(adev) (adev)->mode_info.funcs->hpd_get_gpio_reg((adev)) adev 32 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h #define amdgpu_display_bandwidth_update(adev) (adev)->mode_info.funcs->bandwidth_update((adev)) adev 33 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h #define amdgpu_display_page_flip(adev, crtc, base, async) (adev)->mode_info.funcs->page_flip((adev), (crtc), (base), (async)) adev 34 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h #define amdgpu_display_page_flip_get_scanoutpos(adev, crtc, vbl, pos) (adev)->mode_info.funcs->page_flip_get_scanoutpos((adev), (crtc), (vbl), (pos)) adev 35 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h #define amdgpu_display_add_encoder(adev, e, s, c) (adev)->mode_info.funcs->add_encoder((adev), (e), (s), (c)) adev 36 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h #define amdgpu_display_add_connector(adev, ci, sd, ct, ib, coi, h, r) (adev)->mode_info.funcs->add_connector((adev), (ci), (sd), (ct), (ib), (coi), (h), (r)) adev 40 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h void amdgpu_display_update_priority(struct amdgpu_device *adev); adev 41 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev, adev 108 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 115 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c if (adev == NULL) adev 133 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c ret = ttm_bo_mmap(vma->vm_file, vma, &adev->mman.bdev); adev 198 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 210 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c if (attach->dev->driver != adev->dev->driver) { adev 229 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c if (attach->dev->driver != adev->dev->driver) adev 254 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 262 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c if (attach->dev->driver != adev->dev->driver && bo->prime_shared_count) adev 286 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 288 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c u32 domain = amdgpu_display_supported_domains(adev, bo->flags); adev 371 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c struct amdgpu_device *adev = dev->dev_private; adev 384 drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c ret = amdgpu_bo_create(adev, &bp, &bo); adev 283 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index); adev 284 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v); adev 285 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index); adev 286 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v); adev 288 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h #define RDOORBELL32(index) amdgpu_mm_rdoorbell(adev, (index)) adev 289 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h #define WDOORBELL32(index, v) amdgpu_mm_wdoorbell(adev, (index), (v)) adev 290 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h #define RDOORBELL64(index) amdgpu_mm_rdoorbell64(adev, (index)) adev 291 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h #define WDOORBELL64(index, v) amdgpu_mm_wdoorbell64(adev, (index), (v)) adev 105 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev, adev 109 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (rps == adev->pm.dpm.current_ps) adev 111 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (rps == adev->pm.dpm.requested_ps) adev 113 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (rps == adev->pm.dpm.boot_ps) adev 118 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c void amdgpu_dpm_get_active_displays(struct amdgpu_device *adev) adev 120 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c struct drm_device *ddev = adev->ddev; adev 124 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.new_active_crtcs = 0; adev 125 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.new_active_crtc_count = 0; adev 126 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) { adev 131 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id); adev 132 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.new_active_crtc_count++; adev 139 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev) adev 141 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c struct drm_device *dev = adev->ddev; adev 147 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) { adev 166 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c u32 amdgpu_dpm_get_vrefresh(struct amdgpu_device *adev) adev 168 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c struct drm_device *dev = adev->ddev; adev 173 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) { adev 251 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c int amdgpu_get_platform_caps(struct amdgpu_device *adev) adev 253 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 264 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); adev 265 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); adev 266 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); adev 281 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c int amdgpu_parse_extended_power_table(struct amdgpu_device *adev) adev 283 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 303 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst; adev 304 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin); adev 305 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed); adev 306 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh); adev 307 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin); adev 308 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.pwm_med = le16_to_cpu(fan_info->fan.usPWMMed); adev 309 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.pwm_high = le16_to_cpu(fan_info->fan.usPWMHigh); adev 311 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.t_max = le16_to_cpu(fan_info->fan2.usTMax); adev 313 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.t_max = 10900; adev 314 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.cycle_delay = 100000; adev 316 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.control_mode = fan_info->fan3.ucFanControlMode; adev 317 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.default_max_fan_pwm = adev 319 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.default_fan_output_sensitivity = 4836; adev 320 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.fan_output_sensitivity = adev 323 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.fan.ucode_fan_control = true; adev 334 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk, adev 337 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_free_extended_power_table(adev); adev 345 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk, adev 348 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_free_extended_power_table(adev); adev 356 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk, adev 359 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_free_extended_power_table(adev); adev 367 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.mvdd_dependency_on_mclk, adev 370 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_free_extended_power_table(adev); adev 380 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk = adev 383 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk = adev 386 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc = adev 388 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddci = adev 399 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries = adev 403 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (!adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) { adev 404 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_free_extended_power_table(adev); adev 410 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].sclk = adev 412 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk = adev 414 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage = adev 419 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.phase_shedding_limits_table.count = adev 427 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit); adev 428 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit); adev 429 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.near_tdp_limit_adjusted = adev->pm.dpm.near_tdp_limit; adev 430 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.tdp_od_limit = le16_to_cpu(power_info->pplib5.usTDPODLimit); adev 431 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (adev->pm.dpm.tdp_od_limit) adev 432 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.power_control = true; adev 434 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.power_control = false; adev 435 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.tdp_adjustment = 0; adev 436 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold); adev 437 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage); adev 438 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.load_line_slope = le16_to_cpu(power_info->pplib5.usLoadLineSlope); adev 446 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries = kzalloc(size, GFP_KERNEL); adev 447 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (!adev->pm.dpm.dyn_state.cac_leakage_table.entries) { adev 448 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_free_extended_power_table(adev); adev 453 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) { adev 454 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1 = adev 456 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2 = adev 458 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3 = adev 461 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc = adev 463 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage = adev 469 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.count = cac_table->ucNumEntries; adev 500 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries = adev 502 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (!adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries) { adev 503 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_free_extended_power_table(adev); adev 506 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count = adev 514 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk = adev 516 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk = adev 518 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v = adev 523 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.num_of_vce_states = adev 526 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) { adev 530 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.vce_states[i].evclk = adev 532 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.vce_states[i].ecclk = adev 534 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.vce_states[i].clk_idx = adev 536 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.vce_states[i].pstate = adev 555 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries = adev 557 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (!adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries) { adev 558 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_free_extended_power_table(adev); adev 561 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count = adev 568 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].vclk = adev 570 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].dclk = adev 572 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v = adev 587 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries = adev 589 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (!adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries) { adev 590 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_free_extended_power_table(adev); adev 593 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count = adev 597 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].clk = adev 599 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v = adev 610 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.ppm_table = adev 612 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (!adev->pm.dpm.dyn_state.ppm_table) { adev 613 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_free_extended_power_table(adev); adev 616 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.ppm_table->ppm_design = ppm->ucPpmDesign; adev 617 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.ppm_table->cpu_core_number = adev 619 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.ppm_table->platform_tdp = adev 621 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdp = adev 623 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.ppm_table->platform_tdc = adev 625 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdc = adev 627 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.ppm_table->apu_tdp = adev 629 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.ppm_table->dgpu_tdp = adev 631 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.ppm_table->dgpu_ulv_power = adev 633 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.ppm_table->tj_max = adev 645 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries = adev 647 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (!adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries) { adev 648 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_free_extended_power_table(adev); adev 651 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count = adev 655 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].clk = adev 657 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v = adev 668 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_tdp_table = adev 670 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (!adev->pm.dpm.dyn_state.cac_tdp_table) { adev 671 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_free_extended_power_table(adev); adev 678 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = adev 685 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = 255; adev 688 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_tdp_table->tdp = le16_to_cpu(pt->usTDP); adev 689 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_tdp_table->configurable_tdp = adev 691 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_tdp_table->tdc = le16_to_cpu(pt->usTDC); adev 692 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_tdp_table->battery_power_limit = adev 694 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_tdp_table->small_power_limit = adev 696 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_tdp_table->low_cac_leakage = adev 698 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.cac_tdp_table->high_cac_leakage = adev 707 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c &adev->pm.dpm.dyn_state.vddgfx_dependency_on_sclk, adev 710 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c kfree(adev->pm.dpm.dyn_state.vddgfx_dependency_on_sclk.entries); adev 719 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c void amdgpu_free_extended_power_table(struct amdgpu_device *adev) adev 721 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c struct amdgpu_dpm_dynamic_state *dyn_state = &adev->pm.dpm.dyn_state; adev 761 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c void amdgpu_add_thermal_controller(struct amdgpu_device *adev) adev 763 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 781 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.no_fan = true; adev 782 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.fan_pulses_per_revolution = adev 784 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (adev->pm.fan_pulses_per_revolution) { adev 785 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.fan_min_rpm = controller->ucFanMinRPM; adev 786 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.fan_max_rpm = controller->ucFanMaxRPM; adev 792 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.int_thermal_type = THERMAL_TYPE_RV6XX; adev 797 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.int_thermal_type = THERMAL_TYPE_RV770; adev 802 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.int_thermal_type = THERMAL_TYPE_EVERGREEN; adev 807 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.int_thermal_type = THERMAL_TYPE_SUMO; adev 812 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.int_thermal_type = THERMAL_TYPE_NI; adev 817 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.int_thermal_type = THERMAL_TYPE_SI; adev 822 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.int_thermal_type = THERMAL_TYPE_CI; adev 827 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.int_thermal_type = THERMAL_TYPE_KV; adev 832 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.int_thermal_type = THERMAL_TYPE_EXTERNAL_GPIO; adev 838 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.int_thermal_type = THERMAL_TYPE_ADT7473_WITH_INTERNAL; adev 844 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.int_thermal_type = THERMAL_TYPE_EMC2103_WITH_INTERNAL; adev 851 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.int_thermal_type = THERMAL_TYPE_EXTERNAL; adev 852 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c i2c_bus = amdgpu_atombios_lookup_i2c_gpio(adev, controller->ucI2cLine); adev 853 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.i2c_bus = amdgpu_i2c_lookup(adev, &i2c_bus); adev 854 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (adev->pm.i2c_bus) { adev 859 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c i2c_new_device(&adev->pm.i2c_bus->adapter, &info); adev 871 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c enum amdgpu_pcie_gen amdgpu_get_pcie_gen_support(struct amdgpu_device *adev, adev 899 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 901 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (idx < adev->pm.dpm.num_of_vce_states) adev 902 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c return &adev->pm.dpm.vce_states[idx]; adev 907 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c int amdgpu_dpm_get_sclk(struct amdgpu_device *adev, bool low) adev 911 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (is_support_sw_smu(adev)) { adev 912 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c ret = smu_get_dpm_freq_range(&adev->smu, SMU_GFXCLK, adev 920 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c return (adev)->powerplay.pp_funcs->get_sclk((adev)->powerplay.pp_handle, (low)); adev 924 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c int amdgpu_dpm_get_mclk(struct amdgpu_device *adev, bool low) adev 928 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (is_support_sw_smu(adev)) { adev 929 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c ret = smu_get_dpm_freq_range(&adev->smu, SMU_UCLK, adev 937 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c return (adev)->powerplay.pp_funcs->get_mclk((adev)->powerplay.pp_handle, (low)); adev 941 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev, uint32_t block_type, bool gate) adev 944 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c bool swsmu = is_support_sw_smu(adev); adev 953 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c ret = smu_dpm_set_power_gate(&adev->smu, block_type, gate); adev 955 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c ret = ((adev)->powerplay.pp_funcs->set_powergating_by_smu( adev 956 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c (adev)->powerplay.pp_handle, block_type, gate)); adev 960 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c ret = ((adev)->powerplay.pp_funcs->set_powergating_by_smu( adev 961 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c (adev)->powerplay.pp_handle, block_type, gate)); adev 256 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_pre_set_power_state(adev) \ adev 257 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->pre_set_power_state((adev)->powerplay.pp_handle)) adev 259 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_set_power_state(adev) \ adev 260 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->set_power_state((adev)->powerplay.pp_handle)) adev 262 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_post_set_power_state(adev) \ adev 263 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->post_set_power_state((adev)->powerplay.pp_handle)) adev 265 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_display_configuration_changed(adev) \ adev 266 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->display_configuration_changed((adev)->powerplay.pp_handle)) adev 268 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_print_power_state(adev, ps) \ adev 269 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->print_power_state((adev)->powerplay.pp_handle, (ps))) adev 271 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_vblank_too_short(adev) \ adev 272 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->vblank_too_short((adev)->powerplay.pp_handle)) adev 274 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_enable_bapm(adev, e) \ adev 275 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->enable_bapm((adev)->powerplay.pp_handle, (e))) adev 277 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_set_fan_control_mode(adev, m) \ adev 278 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->set_fan_control_mode((adev)->powerplay.pp_handle, (m))) adev 280 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_get_fan_control_mode(adev) \ adev 281 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->get_fan_control_mode((adev)->powerplay.pp_handle)) adev 283 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_set_fan_speed_percent(adev, s) \ adev 284 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->set_fan_speed_percent((adev)->powerplay.pp_handle, (s))) adev 286 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_get_fan_speed_percent(adev, s) \ adev 287 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->get_fan_speed_percent((adev)->powerplay.pp_handle, (s))) adev 289 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_get_fan_speed_rpm(adev, s) \ adev 290 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->get_fan_speed_rpm)((adev)->powerplay.pp_handle, (s)) adev 292 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_set_fan_speed_rpm(adev, s) \ adev 293 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->set_fan_speed_rpm)((adev)->powerplay.pp_handle, (s)) adev 295 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_force_performance_level(adev, l) \ adev 296 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->force_performance_level((adev)->powerplay.pp_handle, (l))) adev 298 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_get_current_power_state(adev) \ adev 299 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->get_current_power_state((adev)->powerplay.pp_handle)) adev 301 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_smu_get_current_power_state(adev) \ adev 302 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->smu.ppt_funcs->get_current_power_state(&((adev)->smu))) adev 304 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_smu_set_power_state(adev) \ adev 305 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->smu.ppt_funcs->set_power_state(&((adev)->smu))) adev 307 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_get_pp_num_states(adev, data) \ adev 308 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->get_pp_num_states((adev)->powerplay.pp_handle, data)) adev 310 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_get_pp_table(adev, table) \ adev 311 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->get_pp_table((adev)->powerplay.pp_handle, table)) adev 313 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_set_pp_table(adev, buf, size) \ adev 314 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->set_pp_table((adev)->powerplay.pp_handle, buf, size)) adev 316 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_print_clock_levels(adev, type, buf) \ adev 317 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->print_clock_levels((adev)->powerplay.pp_handle, type, buf)) adev 319 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_force_clock_level(adev, type, level) \ adev 320 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->force_clock_level((adev)->powerplay.pp_handle, type, level)) adev 322 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_get_sclk_od(adev) \ adev 323 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->get_sclk_od((adev)->powerplay.pp_handle)) adev 325 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_set_sclk_od(adev, value) \ adev 326 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->set_sclk_od((adev)->powerplay.pp_handle, value)) adev 328 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_get_mclk_od(adev) \ adev 329 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->get_mclk_od((adev)->powerplay.pp_handle)) adev 331 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_set_mclk_od(adev, value) \ adev 332 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->set_mclk_od((adev)->powerplay.pp_handle, value)) adev 334 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_dispatch_task(adev, task_id, user_state) \ adev 335 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->dispatch_tasks)((adev)->powerplay.pp_handle, (task_id), (user_state)) adev 337 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_check_state_equal(adev, cps, rps, equal) \ adev 338 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->check_state_equal((adev)->powerplay.pp_handle, (cps), (rps), (equal))) adev 340 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_get_vce_clock_state(adev, i) \ adev 341 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->get_vce_clock_state((adev)->powerplay.pp_handle, (i))) adev 343 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_get_performance_level(adev) \ adev 344 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->get_performance_level((adev)->powerplay.pp_handle)) adev 346 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_reset_power_profile_state(adev, request) \ adev 347 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->reset_power_profile_state(\ adev 348 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h (adev)->powerplay.pp_handle, request)) adev 350 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_switch_power_profile(adev, type, en) \ adev 351 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->switch_power_profile(\ adev 352 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h (adev)->powerplay.pp_handle, type, en)) adev 354 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_set_clockgating_by_smu(adev, msg_id) \ adev 355 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->set_clockgating_by_smu(\ adev 356 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h (adev)->powerplay.pp_handle, msg_id)) adev 358 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_get_power_profile_mode(adev, buf) \ adev 359 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->get_power_profile_mode(\ adev 360 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h (adev)->powerplay.pp_handle, buf)) adev 362 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_set_power_profile_mode(adev, parameter, size) \ adev 363 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->set_power_profile_mode(\ adev 364 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h (adev)->powerplay.pp_handle, parameter, size)) adev 366 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_odn_edit_dpm_table(adev, type, parameter, size) \ adev 367 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->odn_edit_dpm_table(\ adev 368 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h (adev)->powerplay.pp_handle, type, parameter, size)) adev 370 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_enable_mgpu_fan_boost(adev) \ adev 371 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->enable_mgpu_fan_boost(\ adev 372 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h (adev)->powerplay.pp_handle)) adev 374 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_get_ppfeature_status(adev, buf) \ adev 375 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->get_ppfeature_status(\ adev 376 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h (adev)->powerplay.pp_handle, (buf))) adev 378 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h #define amdgpu_dpm_set_ppfeature_status(adev, ppfeatures) \ adev 379 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ((adev)->powerplay.pp_funcs->set_ppfeature_status(\ adev 380 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h (adev)->powerplay.pp_handle, (ppfeatures))) adev 494 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev, adev 496 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev); adev 497 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h u32 amdgpu_dpm_get_vrefresh(struct amdgpu_device *adev); adev 498 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h void amdgpu_dpm_get_active_displays(struct amdgpu_device *adev); adev 499 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h int amdgpu_dpm_read_sensor(struct amdgpu_device *adev, enum amd_pp_sensors sensor, adev 504 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h int amdgpu_get_platform_caps(struct amdgpu_device *adev); adev 506 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h int amdgpu_parse_extended_power_table(struct amdgpu_device *adev); adev 507 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h void amdgpu_free_extended_power_table(struct amdgpu_device *adev); adev 509 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h void amdgpu_add_thermal_controller(struct amdgpu_device *adev); adev 511 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h enum amdgpu_pcie_gen amdgpu_get_pcie_gen_support(struct amdgpu_device *adev, adev 519 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev, adev 522 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h extern int amdgpu_dpm_get_sclk(struct amdgpu_device *adev, bool low); adev 524 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h extern int amdgpu_dpm_get_mclk(struct amdgpu_device *adev, bool low); adev 1143 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c struct amdgpu_device *adev = dev->dev_private; adev 1150 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c adev->mp1_state = PP_MP1_STATE_UNLOAD; adev 1151 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c amdgpu_device_ip_suspend(adev); adev 1152 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c adev->mp1_state = PP_MP1_STATE_NONE; adev 1352 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c int amdgpu_device_get_job_timeout_settings(struct amdgpu_device *adev) adev 1364 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c adev->gfx_timeout = msecs_to_jiffies(10000); adev 1365 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c adev->sdma_timeout = adev->video_timeout = adev->gfx_timeout; adev 1366 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c adev->compute_timeout = MAX_SCHEDULE_TIMEOUT; adev 1386 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c adev->gfx_timeout = timeout; adev 1389 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c adev->compute_timeout = timeout; adev 1392 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c adev->sdma_timeout = timeout; adev 1395 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c adev->video_timeout = timeout; adev 1406 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c adev->sdma_timeout = adev->video_timeout = adev->gfx_timeout; adev 38 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 53 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c adev->mode_info.bl_encoder = amdgpu_encoder; adev 83 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int cpp, bool tiled) adev 125 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c struct amdgpu_device *adev = rfbdev->adev; adev 138 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c info = drm_get_format_info(adev->ddev, mode_cmd); adev 142 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp, adev 144 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c domain = amdgpu_display_supported_domains(adev, flags); adev 148 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain, flags, adev 167 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c dev_err(adev->dev, "FB failed to set tiling flags\n"); adev 179 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c dev_err(adev->dev, "%p bind failed\n", abo); adev 201 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c struct amdgpu_device *adev = rfbdev->adev; adev 234 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c ret = amdgpu_display_framebuffer_init(adev->ddev, &rfbdev->rfb, adev 248 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c tmp = amdgpu_bo_gpu_offset(abo) - adev->gmc.vram_start; adev 249 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c info->fix.smem_start = adev->gmc.aper_base + tmp; adev 257 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base; adev 258 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c info->apertures->ranges[0].size = adev->gmc.aper_size; adev 268 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c DRM_INFO("vram apper at 0x%lX\n", (unsigned long)adev->gmc.aper_base); adev 273 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c vga_switcheroo_client_fb_set(adev->ddev->pdev, info); adev 310 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c int amdgpu_fbdev_init(struct amdgpu_device *adev) adev 317 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c if (!adev->mode_info.mode_config_initialized) adev 321 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c if (list_empty(&adev->ddev->mode_config.connector_list)) adev 325 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c if (adev->gmc.real_vram_size <= (32*1024*1024)) adev 332 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c rfbdev->adev = adev; adev 333 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c adev->mode_info.rfbdev = rfbdev; adev 335 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c drm_fb_helper_prepare(adev->ddev, &rfbdev->helper, adev 338 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c ret = drm_fb_helper_init(adev->ddev, &rfbdev->helper, adev 348 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c if (!amdgpu_device_has_dc_support(adev)) adev 349 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c drm_helper_disable_unused_functions(adev->ddev); adev 355 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c void amdgpu_fbdev_fini(struct amdgpu_device *adev) adev 357 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c if (!adev->mode_info.rfbdev) adev 360 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c amdgpu_fbdev_destroy(adev->ddev, adev->mode_info.rfbdev); adev 361 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c kfree(adev->mode_info.rfbdev); adev 362 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c adev->mode_info.rfbdev = NULL; adev 365 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state) adev 367 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c if (adev->mode_info.rfbdev) adev 368 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c drm_fb_helper_set_suspend_unlocked(&adev->mode_info.rfbdev->helper, adev 372 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c int amdgpu_fbdev_total_size(struct amdgpu_device *adev) adev 377 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c if (!adev->mode_info.rfbdev) adev 380 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c robj = gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.base.obj[0]); adev 385 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj) adev 387 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c if (!adev->mode_info.rfbdev) adev 389 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c if (robj == gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.base.obj[0])) adev 139 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c struct amdgpu_device *adev = ring->adev; adev 153 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c adev->fence_context + ring->idx, adev 394 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c struct amdgpu_device *adev = ring->adev; adev 398 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.cpu_addr = &adev->wb.wb[ring->fence_offs]; adev 399 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.gpu_addr = adev->wb.gpu_addr + (ring->fence_offs * 4); adev 402 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c index = ALIGN(adev->uvd.fw->size, 8); adev 403 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.cpu_addr = adev->uvd.inst[ring->me].cpu_addr + index; adev 404 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.gpu_addr = adev->uvd.inst[ring->me].gpu_addr + index; adev 407 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c amdgpu_irq_get(adev, irq_src, irq_type); adev 413 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c DRM_DEV_DEBUG(adev->dev, "fence driver on ring %s use gpu addr " adev 432 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c struct amdgpu_device *adev = ring->adev; adev 436 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c if (!adev) adev 462 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c timeout = adev->gfx_timeout; adev 473 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c if (!amdgpu_sriov_vf(ring->adev)) adev 474 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c timeout = adev->compute_timeout; adev 476 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c timeout = adev->gfx_timeout; adev 479 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c timeout = adev->sdma_timeout; adev 482 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c timeout = adev->video_timeout; adev 511 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c int amdgpu_fence_driver_init(struct amdgpu_device *adev) adev 513 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c if (amdgpu_debugfs_fence_init(adev)) adev 514 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c dev_err(adev->dev, "fence debugfs file creation failed\n"); adev 527 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c void amdgpu_fence_driver_fini(struct amdgpu_device *adev) adev 533 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c struct amdgpu_ring *ring = adev->rings[i]; adev 542 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c amdgpu_irq_put(adev, ring->fence_drv.irq_src, adev 562 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c void amdgpu_fence_driver_suspend(struct amdgpu_device *adev) adev 567 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c struct amdgpu_ring *ring = adev->rings[i]; adev 579 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c amdgpu_irq_put(adev, ring->fence_drv.irq_src, adev 596 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c void amdgpu_fence_driver_resume(struct amdgpu_device *adev) adev 601 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c struct amdgpu_ring *ring = adev->rings[i]; adev 606 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c amdgpu_irq_get(adev, ring->fence_drv.irq_src, adev 701 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c struct amdgpu_device *adev = dev->dev_private; adev 705 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c struct amdgpu_ring *ring = adev->rings[i]; adev 750 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c struct amdgpu_device *adev = dev->dev_private; adev 753 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c amdgpu_device_gpu_recover(adev, NULL); adev 768 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c int amdgpu_debugfs_fence_init(struct amdgpu_device *adev) adev 771 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c if (amdgpu_sriov_vf(adev)) adev 772 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c return amdgpu_debugfs_add_files(adev, amdgpu_debugfs_fence_list_sriov, 1); adev 773 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c return amdgpu_debugfs_add_files(adev, amdgpu_debugfs_fence_list, 2); adev 72 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c static int amdgpu_gart_dummy_page_init(struct amdgpu_device *adev) adev 74 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c struct page *dummy_page = adev->mman.bdev.glob->dummy_read_page; adev 76 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c if (adev->dummy_page_addr) adev 78 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c adev->dummy_page_addr = pci_map_page(adev->pdev, dummy_page, 0, adev 80 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c if (pci_dma_mapping_error(adev->pdev, adev->dummy_page_addr)) { adev 81 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c dev_err(&adev->pdev->dev, "Failed to DMA MAP the dummy page\n"); adev 82 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c adev->dummy_page_addr = 0; adev 95 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c static void amdgpu_gart_dummy_page_fini(struct amdgpu_device *adev) adev 97 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c if (!adev->dummy_page_addr) adev 99 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c pci_unmap_page(adev->pdev, adev->dummy_page_addr, adev 101 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c adev->dummy_page_addr = 0; adev 114 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev) adev 118 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c if (adev->gart.bo == NULL) { adev 122 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c bp.size = adev->gart.table_size; adev 129 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c r = amdgpu_bo_create(adev, &bp, &adev->gart.bo); adev 147 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev) adev 151 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c r = amdgpu_bo_reserve(adev->gart.bo, false); adev 154 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c r = amdgpu_bo_pin(adev->gart.bo, AMDGPU_GEM_DOMAIN_VRAM); adev 156 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c amdgpu_bo_unreserve(adev->gart.bo); adev 159 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c r = amdgpu_bo_kmap(adev->gart.bo, &adev->gart.ptr); adev 161 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c amdgpu_bo_unpin(adev->gart.bo); adev 162 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c amdgpu_bo_unreserve(adev->gart.bo); adev 174 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev) adev 178 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c if (adev->gart.bo == NULL) { adev 181 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c r = amdgpu_bo_reserve(adev->gart.bo, true); adev 183 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c amdgpu_bo_kunmap(adev->gart.bo); adev 184 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c amdgpu_bo_unpin(adev->gart.bo); adev 185 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c amdgpu_bo_unreserve(adev->gart.bo); adev 186 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c adev->gart.ptr = NULL; adev 199 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c void amdgpu_gart_table_vram_free(struct amdgpu_device *adev) adev 201 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c if (adev->gart.bo == NULL) { adev 204 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c amdgpu_bo_unref(&adev->gart.bo); adev 221 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset, adev 231 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c if (!adev->gart.ready) { adev 240 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c adev->gart.pages[p] = NULL; adev 242 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c page_base = adev->dummy_page_addr; adev 243 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c if (!adev->gart.ptr) adev 247 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c amdgpu_gmc_set_pte_pde(adev, adev->gart.ptr, adev 253 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c amdgpu_asic_flush_hdp(adev, NULL); adev 254 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c for (i = 0; i < adev->num_vmhubs; i++) adev 255 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c amdgpu_gmc_flush_gpu_tlb(adev, 0, i, 0); adev 273 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset, adev 280 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c if (!adev->gart.ready) { adev 290 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c amdgpu_gmc_set_pte_pde(adev, dst, t, page_base, flags); adev 310 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset, adev 319 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c if (!adev->gart.ready) { adev 328 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c adev->gart.pages[p] = pagelist ? pagelist[i] : NULL; adev 331 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c if (!adev->gart.ptr) adev 334 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c r = amdgpu_gart_map(adev, offset, pages, dma_addr, flags, adev 335 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c adev->gart.ptr); adev 340 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c amdgpu_asic_flush_hdp(adev, NULL); adev 341 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c for (i = 0; i < adev->num_vmhubs; i++) adev 342 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c amdgpu_gmc_flush_gpu_tlb(adev, 0, i, 0); adev 354 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c int amdgpu_gart_init(struct amdgpu_device *adev) adev 358 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c if (adev->dummy_page_addr) adev 366 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c r = amdgpu_gart_dummy_page_init(adev); adev 370 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c adev->gart.num_cpu_pages = adev->gmc.gart_size / PAGE_SIZE; adev 371 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c adev->gart.num_gpu_pages = adev->gmc.gart_size / AMDGPU_GPU_PAGE_SIZE; adev 373 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c adev->gart.num_cpu_pages, adev->gart.num_gpu_pages); adev 377 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c adev->gart.pages = vzalloc(array_size(sizeof(void *), adev 378 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c adev->gart.num_cpu_pages)); adev 379 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c if (adev->gart.pages == NULL) adev 393 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c void amdgpu_gart_fini(struct amdgpu_device *adev) adev 396 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c vfree(adev->gart.pages); adev 397 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c adev->gart.pages = NULL; adev 399 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c amdgpu_gart_dummy_page_fini(adev); adev 58 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev); adev 59 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h void amdgpu_gart_table_vram_free(struct amdgpu_device *adev); adev 60 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h int amdgpu_gart_table_vram_pin(struct amdgpu_device *adev); adev 61 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h void amdgpu_gart_table_vram_unpin(struct amdgpu_device *adev); adev 62 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h int amdgpu_gart_init(struct amdgpu_device *adev); adev 63 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h void amdgpu_gart_fini(struct amdgpu_device *adev); adev 64 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset, adev 66 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset, adev 69 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset, adev 50 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size, adev 71 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c r = amdgpu_bo_create(adev, &bp, &bo); adev 93 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c void amdgpu_gem_force_release(struct amdgpu_device *adev) adev 95 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c struct drm_device *ddev = adev->ddev; adev 125 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c struct amdgpu_device *adev = amdgpu_ttm_adev(abo->tbo.bdev); adev 146 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c bo_va = amdgpu_vm_bo_add(adev, vm, abo); adev 158 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 180 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c dev_err(adev->dev, "leaking bo va because " adev 186 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c amdgpu_vm_bo_rmv(adev, bo_va); adev 191 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c r = amdgpu_vm_clear_freed(adev, vm, &fence); adev 193 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c dev_err(adev->dev, "failed to clear page " adev 212 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c struct amdgpu_device *adev = dev->dev_private; adev 258 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c r = amdgpu_gem_object_create(adev, size, args->in.alignment, adev 287 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c struct amdgpu_device *adev = dev->dev_private; adev 313 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c r = amdgpu_gem_object_create(adev, args->size, 0, AMDGPU_GEM_DOMAIN_CPU, adev 509 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev, adev 519 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c r = amdgpu_vm_clear_freed(adev, vm, NULL); adev 525 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c r = amdgpu_vm_bo_update(adev, bo_va, false); adev 530 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c r = amdgpu_vm_update_directories(adev, vm); adev 548 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c struct amdgpu_device *adev = dev->dev_private; adev 634 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c va_flags = amdgpu_gmc_get_pte_flags(adev, args->flags); adev 635 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c r = amdgpu_vm_bo_map(adev, bo_va, args->va_address, adev 640 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c r = amdgpu_vm_bo_unmap(adev, bo_va, args->va_address); adev 644 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c r = amdgpu_vm_bo_clear_mappings(adev, &fpriv->vm, adev 649 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c va_flags = amdgpu_gmc_get_pte_flags(adev, args->flags); adev 650 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c r = amdgpu_vm_bo_replace_map(adev, bo_va, args->va_address, adev 658 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c amdgpu_gem_va_update_vm(adev, &fpriv->vm, bo_va, adev 672 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c struct amdgpu_device *adev = dev->dev_private; adev 731 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c amdgpu_vm_bo_invalidate(adev, robj, true); adev 749 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c struct amdgpu_device *adev = dev->dev_private; adev 762 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c if (adev->mman.buffer_funcs_enabled) adev 765 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c args->pitch = amdgpu_align_pitch(adev, args->width, adev 769 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c domain = amdgpu_bo_get_preferred_pin_domain(adev, adev 770 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c amdgpu_display_supported_domains(adev, flags)); adev 771 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c r = amdgpu_gem_object_create(adev, args->size, 0, domain, flags, adev 887 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c int amdgpu_debugfs_gem_init(struct amdgpu_device *adev) adev 890 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c return amdgpu_debugfs_add_files(adev, amdgpu_debugfs_gem_list, 1); adev 46 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h void amdgpu_gem_force_release(struct amdgpu_device *adev); adev 47 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size, adev 37 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c int amdgpu_gfx_mec_queue_to_bit(struct amdgpu_device *adev, int mec, adev 42 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c bit += mec * adev->gfx.mec.num_pipe_per_mec adev 43 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c * adev->gfx.mec.num_queue_per_pipe; adev 44 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c bit += pipe * adev->gfx.mec.num_queue_per_pipe; adev 50 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c void amdgpu_gfx_bit_to_mec_queue(struct amdgpu_device *adev, int bit, adev 53 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c *queue = bit % adev->gfx.mec.num_queue_per_pipe; adev 54 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c *pipe = (bit / adev->gfx.mec.num_queue_per_pipe) adev 55 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c % adev->gfx.mec.num_pipe_per_mec; adev 56 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c *mec = (bit / adev->gfx.mec.num_queue_per_pipe) adev 57 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c / adev->gfx.mec.num_pipe_per_mec; adev 61 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c bool amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev, adev 64 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c return test_bit(amdgpu_gfx_mec_queue_to_bit(adev, mec, pipe, queue), adev 65 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.mec.queue_bitmap); adev 68 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c int amdgpu_gfx_me_queue_to_bit(struct amdgpu_device *adev, adev 73 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c bit += me * adev->gfx.me.num_pipe_per_me adev 74 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c * adev->gfx.me.num_queue_per_pipe; adev 75 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c bit += pipe * adev->gfx.me.num_queue_per_pipe; adev 81 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c void amdgpu_gfx_bit_to_me_queue(struct amdgpu_device *adev, int bit, adev 84 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c *queue = bit % adev->gfx.me.num_queue_per_pipe; adev 85 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c *pipe = (bit / adev->gfx.me.num_queue_per_pipe) adev 86 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c % adev->gfx.me.num_pipe_per_me; adev 87 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c *me = (bit / adev->gfx.me.num_queue_per_pipe) adev 88 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c / adev->gfx.me.num_pipe_per_me; adev 91 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev, adev 94 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c return test_bit(amdgpu_gfx_me_queue_to_bit(adev, me, pipe, queue), adev 95 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.me.queue_bitmap); adev 107 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c int amdgpu_gfx_scratch_get(struct amdgpu_device *adev, uint32_t *reg) adev 111 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c i = ffs(adev->gfx.scratch.free_mask); adev 112 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (i != 0 && i <= adev->gfx.scratch.num_reg) { adev 114 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.scratch.free_mask &= ~(1u << i); adev 115 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c *reg = adev->gfx.scratch.reg_base + i; adev 129 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c void amdgpu_gfx_scratch_free(struct amdgpu_device *adev, uint32_t reg) adev 131 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.scratch.free_mask |= 1u << (reg - adev->gfx.scratch.reg_base); adev 178 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c static bool amdgpu_gfx_is_multipipe_capable(struct amdgpu_device *adev) adev 188 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (adev->asic_type == CHIP_POLARIS11) adev 191 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c return adev->gfx.mec.num_mec > 1; adev 194 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev) adev 197 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c bool multipipe_policy = amdgpu_gfx_is_multipipe_capable(adev); adev 201 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c queue = i % adev->gfx.mec.num_queue_per_pipe; adev 202 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c pipe = (i / adev->gfx.mec.num_queue_per_pipe) adev 203 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c % adev->gfx.mec.num_pipe_per_mec; adev 204 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c mec = (i / adev->gfx.mec.num_queue_per_pipe) adev 205 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c / adev->gfx.mec.num_pipe_per_mec; adev 208 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (mec >= adev->gfx.mec.num_mec) adev 214 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c set_bit(i, adev->gfx.mec.queue_bitmap); adev 218 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c set_bit(i, adev->gfx.mec.queue_bitmap); adev 223 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.num_compute_rings = adev 224 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c bitmap_weight(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); adev 228 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (WARN_ON(adev->gfx.num_compute_rings > AMDGPU_MAX_COMPUTE_RINGS)) adev 229 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.num_compute_rings = AMDGPU_MAX_COMPUTE_RINGS; adev 232 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c void amdgpu_gfx_graphics_queue_acquire(struct amdgpu_device *adev) adev 237 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c queue = i % adev->gfx.me.num_queue_per_pipe; adev 238 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c pipe = (i / adev->gfx.me.num_queue_per_pipe) adev 239 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c % adev->gfx.me.num_pipe_per_me; adev 240 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c me = (i / adev->gfx.me.num_queue_per_pipe) adev 241 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c / adev->gfx.me.num_pipe_per_me; adev 243 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (me >= adev->gfx.me.num_me) adev 248 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c set_bit(i, adev->gfx.me.queue_bitmap); adev 252 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.num_gfx_rings = adev 253 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c bitmap_weight(adev->gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES); adev 256 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c static int amdgpu_gfx_kiq_acquire(struct amdgpu_device *adev, adev 262 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c queue_bit = adev->gfx.mec.num_mec adev 263 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c * adev->gfx.mec.num_pipe_per_mec adev 264 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c * adev->gfx.mec.num_queue_per_pipe; adev 267 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (test_bit(queue_bit, adev->gfx.mec.queue_bitmap)) adev 270 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c amdgpu_gfx_bit_to_mec_queue(adev, queue_bit, &mec, &pipe, &queue); adev 287 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c dev_err(adev->dev, "Failed to find a queue for KIQ\n"); adev 291 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c int amdgpu_gfx_kiq_init_ring(struct amdgpu_device *adev, adev 295 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c struct amdgpu_kiq *kiq = &adev->gfx.kiq; adev 300 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c r = amdgpu_device_wb_get(adev, &adev->virt.reg_val_offs); adev 304 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c ring->adev = NULL; adev 307 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c ring->doorbell_index = adev->doorbell_index.kiq; adev 309 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c r = amdgpu_gfx_kiq_acquire(adev, ring); adev 315 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c r = amdgpu_ring_init(adev, ring, 1024, adev 318 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c dev_warn(adev->dev, "(%d) failed to init kiq ring\n", r); adev 326 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c amdgpu_device_wb_free(ring->adev, ring->adev->virt.reg_val_offs); adev 330 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c void amdgpu_gfx_kiq_fini(struct amdgpu_device *adev) adev 332 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c struct amdgpu_kiq *kiq = &adev->gfx.kiq; adev 337 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c int amdgpu_gfx_kiq_init(struct amdgpu_device *adev, adev 342 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c struct amdgpu_kiq *kiq = &adev->gfx.kiq; adev 344 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c r = amdgpu_bo_create_kernel(adev, hpd_size, PAGE_SIZE, adev 348 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c dev_warn(adev->dev, "failed to create KIQ bo (%d).\n", r); adev 356 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c dev_warn(adev->dev, "(%d) reserve kiq eop bo failed\n", r); adev 364 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev, adev 371 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c ring = &adev->gfx.kiq.ring; adev 378 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE, adev 382 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c dev_warn(adev->dev, "failed to create ring mqd ob (%d)", r); adev 387 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS] = kmalloc(mqd_size, GFP_KERNEL); adev 388 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (!adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS]) adev 389 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c dev_warn(adev->dev, "no memory to create MQD backup for ring %s\n", ring->name); adev 392 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (adev->asic_type >= CHIP_NAVI10 && amdgpu_async_gfx_ring) { adev 394 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) { adev 395 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c ring = &adev->gfx.gfx_ring[i]; adev 397 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE, adev 401 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c dev_warn(adev->dev, "failed to create ring mqd bo (%d)", r); adev 406 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.me.mqd_backup[i] = kmalloc(mqd_size, GFP_KERNEL); adev 407 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (!adev->gfx.me.mqd_backup[i]) adev 408 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c dev_warn(adev->dev, "no memory to create MQD backup for ring %s\n", ring->name); adev 414 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 415 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c ring = &adev->gfx.compute_ring[i]; adev 417 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE, adev 421 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c dev_warn(adev->dev, "failed to create ring mqd bo (%d)", r); adev 426 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.mec.mqd_backup[i] = kmalloc(mqd_size, GFP_KERNEL); adev 427 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (!adev->gfx.mec.mqd_backup[i]) adev 428 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c dev_warn(adev->dev, "no memory to create MQD backup for ring %s\n", ring->name); adev 435 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c void amdgpu_gfx_mqd_sw_fini(struct amdgpu_device *adev) adev 440 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (adev->asic_type >= CHIP_NAVI10 && amdgpu_async_gfx_ring) { adev 441 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) { adev 442 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c ring = &adev->gfx.gfx_ring[i]; adev 443 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c kfree(adev->gfx.me.mqd_backup[i]); adev 450 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 451 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c ring = &adev->gfx.compute_ring[i]; adev 452 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c kfree(adev->gfx.mec.mqd_backup[i]); adev 458 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c ring = &adev->gfx.kiq.ring; adev 459 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (adev->asic_type >= CHIP_NAVI10 && amdgpu_async_gfx_ring) adev 460 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c kfree(adev->gfx.me.mqd_backup[AMDGPU_MAX_GFX_RINGS]); adev 461 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c kfree(adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS]); adev 467 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c int amdgpu_gfx_disable_kcq(struct amdgpu_device *adev) adev 469 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c struct amdgpu_kiq *kiq = &adev->gfx.kiq; adev 477 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.num_compute_rings)) adev 480 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 481 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c kiq->pmf->kiq_unmap_queues(kiq_ring, &adev->gfx.compute_ring[i], adev 487 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev) adev 489 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c struct amdgpu_kiq *kiq = &adev->gfx.kiq; adev 490 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; adev 498 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (!test_bit(i, adev->gfx.mec.queue_bitmap)) adev 516 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.num_compute_rings + adev 524 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 525 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c kiq->pmf->kiq_map_queues(kiq_ring, &adev->gfx.compute_ring[i]); adev 545 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable) adev 547 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (!(adev->pm.pp_feature & PP_GFXOFF_MASK)) adev 550 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (!is_support_sw_smu(adev) && adev 551 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c (!adev->powerplay.pp_funcs || adev 552 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c !adev->powerplay.pp_funcs->set_powergating_by_smu)) adev 556 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c mutex_lock(&adev->gfx.gfx_off_mutex); adev 559 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.gfx_off_req_count++; adev 560 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c else if (adev->gfx.gfx_off_req_count > 0) adev 561 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.gfx_off_req_count--; adev 563 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (enable && !adev->gfx.gfx_off_state && !adev->gfx.gfx_off_req_count) { adev 564 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c schedule_delayed_work(&adev->gfx.gfx_off_delay_work, GFX_OFF_DELAY_ENABLE); adev 565 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c } else if (!enable && adev->gfx.gfx_off_state) { adev 566 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c if (!amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, false)) adev 567 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c adev->gfx.gfx_off_state = false; adev 570 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c mutex_unlock(&adev->gfx.gfx_off_mutex); adev 187 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h uint64_t (*get_gpu_clock_counter)(struct amdgpu_device *adev); adev 188 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h void (*select_se_sh)(struct amdgpu_device *adev, u32 se_num, adev 190 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h void (*read_wave_data)(struct amdgpu_device *adev, uint32_t simd, adev 192 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h void (*read_wave_vgprs)(struct amdgpu_device *adev, uint32_t simd, adev 195 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h void (*read_wave_sgprs)(struct amdgpu_device *adev, uint32_t simd, adev 198 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h void (*select_me_pipe_q)(struct amdgpu_device *adev, u32 me, u32 pipe, adev 200 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h int (*ras_error_inject)(struct amdgpu_device *adev, void *inject_if); adev 201 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h int (*query_ras_error_count) (struct amdgpu_device *adev, void *ras_error_status); adev 332 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h #define amdgpu_gfx_get_gpu_clock_counter(adev) (adev)->gfx.funcs->get_gpu_clock_counter((adev)) adev 333 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h #define amdgpu_gfx_select_se_sh(adev, se, sh, instance) (adev)->gfx.funcs->select_se_sh((adev), (se), (sh), (instance)) adev 334 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h #define amdgpu_gfx_select_me_pipe_q(adev, me, pipe, q, vmid) (adev)->gfx.funcs->select_me_pipe_q((adev), (me), (pipe), (q), (vmid)) adev 349 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h int amdgpu_gfx_scratch_get(struct amdgpu_device *adev, uint32_t *reg); adev 350 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h void amdgpu_gfx_scratch_free(struct amdgpu_device *adev, uint32_t reg); adev 355 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h int amdgpu_gfx_kiq_init_ring(struct amdgpu_device *adev, adev 362 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h void amdgpu_gfx_kiq_fini(struct amdgpu_device *adev); adev 363 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h int amdgpu_gfx_kiq_init(struct amdgpu_device *adev, adev 366 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev, adev 368 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h void amdgpu_gfx_mqd_sw_fini(struct amdgpu_device *adev); adev 369 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h int amdgpu_gfx_disable_kcq(struct amdgpu_device *adev); adev 370 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev); adev 372 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev); adev 373 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h void amdgpu_gfx_graphics_queue_acquire(struct amdgpu_device *adev); adev 375 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h int amdgpu_gfx_mec_queue_to_bit(struct amdgpu_device *adev, int mec, adev 377 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h void amdgpu_gfx_bit_to_mec_queue(struct amdgpu_device *adev, int bit, adev 379 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h bool amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev, int mec, adev 381 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h int amdgpu_gfx_me_queue_to_bit(struct amdgpu_device *adev, int me, adev 383 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h void amdgpu_gfx_bit_to_me_queue(struct amdgpu_device *adev, int bit, adev 385 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev, int me, adev 387 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable); adev 44 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 60 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c amdgpu_gmc_get_vm_pde(adev, level, addr, flags); adev 69 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 73 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c if (adev->asic_type >= CHIP_VEGA10) { adev 95 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c int amdgpu_gmc_set_pte_pde(struct amdgpu_device *adev, void *cpu_pt_addr, adev 121 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev); adev 128 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c if (ttm->dma_address[0] + PAGE_SIZE >= adev->gmc.agp_size) adev 131 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c return adev->gmc.agp_start + ttm->dma_address[0]; adev 144 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c void amdgpu_gmc_vram_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc, adev 158 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c dev_info(adev->dev, "VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used)\n", adev 174 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc) adev 179 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c u64 max_mc_address = min(adev->gmc.mc_mask, AMDGPU_GMC_HOLE_START - 1); adev 181 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c mc->gart_size += adev->pm.smu_prv_buffer_size; adev 190 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c dev_warn(adev->dev, "limiting GART\n"); adev 202 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c dev_info(adev->dev, "GART: %lluM 0x%016llX - 0x%016llX\n", adev 217 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c void amdgpu_gmc_agp_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc) adev 223 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c if (amdgpu_sriov_vf(adev)) { adev 250 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c dev_info(adev->dev, "AGP: %lluM 0x%016llX - 0x%016llX\n", adev 266 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c bool amdgpu_gmc_filter_faults(struct amdgpu_device *adev, uint64_t addr, adev 269 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c struct amdgpu_gmc *gmc = &adev->gmc; adev 93 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h void (*flush_gpu_tlb)(struct amdgpu_device *adev, uint32_t vmid, adev 102 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h void (*set_prt)(struct amdgpu_device *adev, bool enable); adev 104 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h uint64_t (*get_vm_pte_flags)(struct amdgpu_device *adev, adev 107 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h void (*get_vm_pde)(struct amdgpu_device *adev, int level, adev 186 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h #define amdgpu_gmc_flush_gpu_tlb(adev, vmid, vmhub, type) ((adev)->gmc.gmc_funcs->flush_gpu_tlb((adev), (vmid), (vmhub), (type))) adev 187 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h #define amdgpu_gmc_emit_flush_gpu_tlb(r, vmid, addr) (r)->adev->gmc.gmc_funcs->emit_flush_gpu_tlb((r), (vmid), (addr)) adev 188 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h #define amdgpu_gmc_emit_pasid_mapping(r, vmid, pasid) (r)->adev->gmc.gmc_funcs->emit_pasid_mapping((r), (vmid), (pasid)) adev 189 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h #define amdgpu_gmc_get_vm_pde(adev, level, dst, flags) (adev)->gmc.gmc_funcs->get_vm_pde((adev), (level), (dst), (flags)) adev 190 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h #define amdgpu_gmc_get_pte_flags(adev, flags) (adev)->gmc.gmc_funcs->get_vm_pte_flags((adev),(flags)) adev 222 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h int amdgpu_gmc_set_pte_pde(struct amdgpu_device *adev, void *cpu_pt_addr, adev 227 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h void amdgpu_gmc_vram_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc, adev 229 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h void amdgpu_gmc_gart_location(struct amdgpu_device *adev, adev 231 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h void amdgpu_gmc_agp_location(struct amdgpu_device *adev, adev 233 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h bool amdgpu_gmc_filter_faults(struct amdgpu_device *adev, uint64_t addr, adev 50 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c struct amdgpu_device *adev = ddev->dev_private; adev 53 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c (adev->mman.bdev.man[TTM_PL_TT].size) * PAGE_SIZE); adev 68 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c struct amdgpu_device *adev = ddev->dev_private; adev 71 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c amdgpu_gtt_mgr_usage(&adev->mman.bdev.man[TTM_PL_TT])); adev 90 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev); adev 100 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c size = (adev->gmc.gart_size >> PAGE_SHIFT) - start; adev 106 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c ret = device_create_file(adev->dev, &dev_attr_mem_info_gtt_total); adev 111 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c ret = device_create_file(adev->dev, &dev_attr_mem_info_gtt_used); adev 130 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev); adev 138 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c device_remove_file(adev->dev, &dev_attr_mem_info_gtt_total); adev 139 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c device_remove_file(adev->dev, &dev_attr_mem_info_gtt_used); adev 173 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev); adev 191 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c lpfn = adev->gart.num_cpu_pages; adev 43 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c struct amdgpu_device *adev = i2c->dev->dev_private; adev 85 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c struct amdgpu_device *adev = i2c->dev->dev_private; adev 104 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c struct amdgpu_device *adev = i2c->dev->dev_private; adev 119 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c struct amdgpu_device *adev = i2c->dev->dev_private; adev 133 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c struct amdgpu_device *adev = i2c->dev->dev_private; adev 146 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c struct amdgpu_device *adev = i2c->dev->dev_private; adev 230 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c void amdgpu_i2c_init(struct amdgpu_device *adev) adev 235 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c amdgpu_atombios_i2c_init(adev); adev 239 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c void amdgpu_i2c_fini(struct amdgpu_device *adev) adev 244 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c if (adev->i2c_bus[i]) { adev 245 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c amdgpu_i2c_destroy(adev->i2c_bus[i]); adev 246 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c adev->i2c_bus[i] = NULL; adev 252 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c void amdgpu_i2c_add(struct amdgpu_device *adev, adev 256 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c struct drm_device *dev = adev->ddev; adev 260 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c if (!adev->i2c_bus[i]) { adev 261 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c adev->i2c_bus[i] = amdgpu_i2c_create(dev, rec, name); adev 269 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c amdgpu_i2c_lookup(struct amdgpu_device *adev, adev 275 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c if (adev->i2c_bus[i] && adev 276 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c (adev->i2c_bus[i]->rec.i2c_id == i2c_bus->i2c_id)) { adev 277 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c return adev->i2c_bus[i]; adev 31 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.h void amdgpu_i2c_init(struct amdgpu_device *adev); adev 32 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.h void amdgpu_i2c_fini(struct amdgpu_device *adev); adev 33 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.h void amdgpu_i2c_add(struct amdgpu_device *adev, adev 37 drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.h amdgpu_i2c_lookup(struct amdgpu_device *adev, adev 51 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c static int amdgpu_debugfs_sa_init(struct amdgpu_device *adev); adev 64 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm, adev 70 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c r = amdgpu_sa_bo_new(&adev->ring_tmp_bo, adev 73 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c dev_err(adev->dev, "failed to get a new IB (%d)\n", r); adev 95 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib, adev 98 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c amdgpu_sa_bo_free(adev, &ib->sa_bo, f); adev 126 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c struct amdgpu_device *adev = ring->adev; adev 154 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c dev_err(adev->dev, "couldn't schedule ib on ring <%s>\n", ring->name); adev 159 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c dev_err(adev->dev, "VM IB without ID\n"); adev 168 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c dev_err(adev->dev, "scheduling IB failed (%d).\n", r); adev 175 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c (amdgpu_sriov_vf(adev) && need_ctx_switch) || adev 200 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c if (!(adev->flags & AMD_IS_APU)) adev 206 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c amdgpu_asic_flush_hdp(adev, ring); adev 227 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c !amdgpu_sriov_vf(adev)) /* for SRIOV preemption, Preamble CE ib must be inserted anyway */ adev 238 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c if (!(adev->flags & AMD_IS_APU)) adev 240 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c amdgpu_asic_invalidate_hdp(adev, ring); adev 253 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c dev_err(adev->dev, "failed to emit fence (%d)\n", r); adev 255 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c amdgpu_vmid_reset(adev, ring->funcs->vmhub, job->vmid); adev 282 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c int amdgpu_ib_pool_init(struct amdgpu_device *adev) adev 286 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c if (adev->ib_pool_ready) { adev 289 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c r = amdgpu_sa_bo_manager_init(adev, &adev->ring_tmp_bo, adev 297 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c adev->ib_pool_ready = true; adev 298 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c if (amdgpu_debugfs_sa_init(adev)) { adev 299 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c dev_err(adev->dev, "failed to register debugfs file for SA\n"); adev 312 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c void amdgpu_ib_pool_fini(struct amdgpu_device *adev) adev 314 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c if (adev->ib_pool_ready) { adev 315 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c amdgpu_sa_bo_manager_fini(adev, &adev->ring_tmp_bo); adev 316 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c adev->ib_pool_ready = false; adev 330 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c int amdgpu_ib_ring_tests(struct amdgpu_device *adev) adev 337 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c if (amdgpu_sriov_vf(adev)) { adev 347 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c if (amdgpu_sriov_runtime(adev)) { adev 353 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c } else if (adev->gmc.xgmi.hive_id) { adev 357 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c for (i = 0; i < adev->num_rings; ++i) { adev 358 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c struct amdgpu_ring *ring = adev->rings[i]; adev 380 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c DRM_DEV_DEBUG(adev->dev, "ib test on %s succeeded\n", adev 386 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c DRM_DEV_ERROR(adev->dev, "IB test failed on %s (%d).\n", adev 389 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c if (ring == &adev->gfx.gfx_ring[0]) { adev 391 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c adev->accel_working = false; adev 410 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c struct amdgpu_device *adev = dev->dev_private; adev 412 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c amdgpu_sa_bo_dump_debug_info(&adev->ring_tmp_bo, m); adev 424 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c static int amdgpu_debugfs_sa_init(struct amdgpu_device *adev) adev 427 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c return amdgpu_debugfs_add_files(adev, amdgpu_debugfs_sa_list, 1); adev 178 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c bool amdgpu_vmid_had_gpu_reset(struct amdgpu_device *adev, adev 182 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c atomic_read(&adev->gpu_reset_counter); adev 201 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c struct amdgpu_device *adev = ring->adev; adev 203 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; adev 209 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c return amdgpu_sync_fence(adev, sync, ring->vmid_wait, false); adev 226 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c u64 fence_context = adev->vm_manager.fence_context + ring->idx; adev 227 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c unsigned seqno = ++adev->vm_manager.seqno[ring->idx]; adev 244 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c r = amdgpu_sync_fence(adev, sync, &array->base, false); adev 272 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c struct amdgpu_device *adev = ring->adev; adev 274 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c uint64_t fence_context = adev->fence_context + ring->idx; adev 297 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c r = amdgpu_sync_fence(adev, sync, tmp, false); adev 306 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c r = amdgpu_sync_fence(ring->adev, &(*id)->active, fence, false); adev 337 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c struct amdgpu_device *adev = ring->adev; adev 339 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; adev 340 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c uint64_t fence_context = adev->fence_context + ring->idx; adev 370 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c if (needs_flush && (adev->asic_type < CHIP_VEGA10 || adev 371 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c adev->asic_type == CHIP_NAVI10 || adev 372 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c adev->asic_type == CHIP_NAVI14)) adev 378 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c r = amdgpu_sync_fence(ring->adev, &(*id)->active, fence, false); adev 410 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c struct amdgpu_device *adev = ring->adev; adev 412 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; adev 438 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c r = amdgpu_sync_fence(ring->adev, &id->active, adev 467 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c int amdgpu_vmid_alloc_reserved(struct amdgpu_device *adev, adev 475 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c id_mgr = &adev->vm_manager.id_mgr[vmhub]; adev 498 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c void amdgpu_vmid_free_reserved(struct amdgpu_device *adev, adev 502 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; adev 522 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c void amdgpu_vmid_reset(struct amdgpu_device *adev, unsigned vmhub, adev 525 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; adev 546 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c void amdgpu_vmid_reset_all(struct amdgpu_device *adev) adev 552 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c &adev->vm_manager.id_mgr[i]; adev 555 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c amdgpu_vmid_reset(adev, i, j); adev 566 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c void amdgpu_vmid_mgr_init(struct amdgpu_device *adev) adev 572 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c &adev->vm_manager.id_mgr[i]; adev 580 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c amdgpu_vmid_reset(adev, i, j); adev 594 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c void amdgpu_vmid_mgr_fini(struct amdgpu_device *adev) adev 600 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c &adev->vm_manager.id_mgr[i]; adev 78 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.h bool amdgpu_vmid_had_gpu_reset(struct amdgpu_device *adev, adev 80 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.h int amdgpu_vmid_alloc_reserved(struct amdgpu_device *adev, adev 83 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.h void amdgpu_vmid_free_reserved(struct amdgpu_device *adev, adev 89 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.h void amdgpu_vmid_reset(struct amdgpu_device *adev, unsigned vmhub, adev 91 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.h void amdgpu_vmid_reset_all(struct amdgpu_device *adev); adev 93 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.h void amdgpu_vmid_mgr_init(struct amdgpu_device *adev); adev 94 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.h void amdgpu_vmid_mgr_fini(struct amdgpu_device *adev); adev 41 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c int amdgpu_ih_ring_init(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih, adev 64 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c ih->ring = dma_alloc_coherent(adev->dev, ih->ring_size + 8, adev 78 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c r = amdgpu_device_wb_get(adev, &wptr_offs); adev 82 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c r = amdgpu_device_wb_get(adev, &rptr_offs); adev 84 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c amdgpu_device_wb_free(adev, wptr_offs); adev 88 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c r = amdgpu_bo_create_kernel(adev, ih->ring_size, PAGE_SIZE, adev 93 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c amdgpu_device_wb_free(adev, rptr_offs); adev 94 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c amdgpu_device_wb_free(adev, wptr_offs); adev 98 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c ih->wptr_addr = adev->wb.gpu_addr + wptr_offs * 4; adev 99 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c ih->wptr_cpu = &adev->wb.wb[wptr_offs]; adev 100 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c ih->rptr_addr = adev->wb.gpu_addr + rptr_offs * 4; adev 101 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c ih->rptr_cpu = &adev->wb.wb[rptr_offs]; adev 115 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c void amdgpu_ih_ring_fini(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) adev 124 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c dma_free_coherent(adev->dev, ih->ring_size + 8, adev 130 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c amdgpu_device_wb_free(adev, (ih->wptr_addr - ih->gpu_addr) / 4); adev 131 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c amdgpu_device_wb_free(adev, (ih->rptr_addr - ih->gpu_addr) / 4); adev 144 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) adev 149 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c if (!ih->enabled || adev->shutdown) adev 152 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c wptr = amdgpu_ih_get_wptr(adev, ih); adev 165 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c amdgpu_irq_dispatch(adev, ih); adev 169 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c amdgpu_ih_set_rptr(adev, ih); adev 173 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c wptr = amdgpu_ih_get_wptr(adev, ih); adev 61 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h u32 (*get_wptr)(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih); adev 62 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h void (*decode_iv)(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih, adev 64 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h void (*set_rptr)(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih); adev 67 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h #define amdgpu_ih_get_wptr(adev, ih) (adev)->irq.ih_funcs->get_wptr((adev), (ih)) adev 68 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h #define amdgpu_ih_decode_iv(adev, iv) \ adev 69 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h (adev)->irq.ih_funcs->decode_iv((adev), (ih), (iv)) adev 70 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h #define amdgpu_ih_set_rptr(adev, ih) (adev)->irq.ih_funcs->set_rptr((adev), (ih)) adev 72 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h int amdgpu_ih_ring_init(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih, adev 74 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h void amdgpu_ih_ring_fini(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih); adev 75 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih); adev 85 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c struct amdgpu_device *adev = container_of(work, struct amdgpu_device, adev 87 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c struct drm_device *dev = adev->ddev; adev 106 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c void amdgpu_irq_disable_all(struct amdgpu_device *adev) adev 112 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c spin_lock_irqsave(&adev->irq.lock, irqflags); adev 114 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (!adev->irq.client[i].sources) adev 118 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c struct amdgpu_irq_src *src = adev->irq.client[i].sources[j]; adev 125 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c r = src->funcs->set(adev, src, k, adev 133 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c spin_unlock_irqrestore(&adev->irq.lock, irqflags); adev 150 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c struct amdgpu_device *adev = dev->dev_private; adev 153 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c ret = amdgpu_ih_process(adev, &adev->irq.ih); adev 168 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c struct amdgpu_device *adev = container_of(work, struct amdgpu_device, adev 171 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c amdgpu_ih_process(adev, &adev->irq.ih1); adev 183 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c struct amdgpu_device *adev = container_of(work, struct amdgpu_device, adev 186 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c amdgpu_ih_process(adev, &adev->irq.ih2); adev 200 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c static bool amdgpu_msi_ok(struct amdgpu_device *adev) adev 221 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c int amdgpu_irq_init(struct amdgpu_device *adev) adev 225 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c spin_lock_init(&adev->irq.lock); adev 228 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c adev->irq.msi_enabled = false; adev 230 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (amdgpu_msi_ok(adev)) { adev 231 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c int ret = pci_enable_msi(adev->pdev); adev 233 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c adev->irq.msi_enabled = true; adev 234 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c dev_dbg(adev->dev, "amdgpu: using MSI.\n"); adev 238 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (!amdgpu_device_has_dc_support(adev)) { adev 239 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (!adev->enable_virtual_display) adev 242 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c adev->ddev->vblank_disable_immediate = true; adev 244 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c r = drm_vblank_init(adev->ddev, adev->mode_info.num_crtc); adev 249 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c INIT_WORK(&adev->hotplug_work, adev 253 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c INIT_WORK(&adev->irq.ih1_work, amdgpu_irq_handle_ih1); adev 254 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c INIT_WORK(&adev->irq.ih2_work, amdgpu_irq_handle_ih2); adev 256 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c adev->irq.installed = true; adev 257 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c r = drm_irq_install(adev->ddev, adev->ddev->pdev->irq); adev 259 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c adev->irq.installed = false; adev 260 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (!amdgpu_device_has_dc_support(adev)) adev 261 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c flush_work(&adev->hotplug_work); adev 264 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c adev->ddev->max_vblank_count = 0x00ffffff; adev 279 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c void amdgpu_irq_fini(struct amdgpu_device *adev) adev 283 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (adev->irq.installed) { adev 284 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c drm_irq_uninstall(adev->ddev); adev 285 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c adev->irq.installed = false; adev 286 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (adev->irq.msi_enabled) adev 287 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c pci_disable_msi(adev->pdev); adev 288 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (!amdgpu_device_has_dc_support(adev)) adev 289 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c flush_work(&adev->hotplug_work); adev 293 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (!adev->irq.client[i].sources) adev 297 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c struct amdgpu_irq_src *src = adev->irq.client[i].sources[j]; adev 307 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c adev->irq.client[i].sources[j] = NULL; adev 310 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c kfree(adev->irq.client[i].sources); adev 311 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c adev->irq.client[i].sources = NULL; adev 328 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c int amdgpu_irq_add_id(struct amdgpu_device *adev, adev 341 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (!adev->irq.client[client_id].sources) { adev 342 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c adev->irq.client[client_id].sources = adev 346 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (!adev->irq.client[client_id].sources) adev 350 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (adev->irq.client[client_id].sources[src_id] != NULL) adev 364 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c adev->irq.client[client_id].sources[src_id] = source; adev 376 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c void amdgpu_irq_dispatch(struct amdgpu_device *adev, adev 387 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c amdgpu_ih_decode_iv(adev, &entry); adev 389 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c trace_amdgpu_iv(ih - &adev->irq.ih, &entry); adev 400 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c } else if (adev->irq.virq[src_id]) { adev 401 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c generic_handle_irq(irq_find_mapping(adev->irq.domain, src_id)); adev 403 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c } else if (!adev->irq.client[client_id].sources) { adev 407 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c } else if ((src = adev->irq.client[client_id].sources[src_id])) { adev 408 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c r = src->funcs->process(adev, src, &entry); adev 420 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c amdgpu_amdkfd_interrupt(adev, entry.iv_entry); adev 432 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c int amdgpu_irq_update(struct amdgpu_device *adev, adev 439 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c spin_lock_irqsave(&adev->irq.lock, irqflags); adev 443 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (amdgpu_irq_enabled(adev, src, type)) adev 448 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c r = src->funcs->set(adev, src, type, state); adev 449 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c spin_unlock_irqrestore(&adev->irq.lock, irqflags); adev 461 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev) adev 466 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (!adev->irq.client[i].sources) adev 470 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c struct amdgpu_irq_src *src = adev->irq.client[i].sources[j]; adev 475 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c amdgpu_irq_update(adev, src, k); adev 492 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src, adev 495 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (!adev->ddev->irq_enabled) adev 505 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c return amdgpu_irq_update(adev, src, type); adev 522 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src, adev 525 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (!adev->ddev->irq_enabled) adev 535 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c return amdgpu_irq_update(adev, src, type); adev 553 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct amdgpu_irq_src *src, adev 556 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (!adev->ddev->irq_enabled) adev 626 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c int amdgpu_irq_add_domain(struct amdgpu_device *adev) adev 628 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c adev->irq.domain = irq_domain_add_linear(NULL, AMDGPU_MAX_IRQ_SRC_ID, adev 629 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c &amdgpu_hw_irqdomain_ops, adev); adev 630 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (!adev->irq.domain) { adev 646 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c void amdgpu_irq_remove_domain(struct amdgpu_device *adev) adev 648 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c if (adev->irq.domain) { adev 649 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c irq_domain_remove(adev->irq.domain); adev 650 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c adev->irq.domain = NULL; adev 667 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c unsigned amdgpu_irq_create_mapping(struct amdgpu_device *adev, unsigned src_id) adev 669 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c adev->irq.virq[src_id] = irq_create_mapping(adev->irq.domain, src_id); adev 671 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c return adev->irq.virq[src_id]; adev 73 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h int (*set)(struct amdgpu_device *adev, struct amdgpu_irq_src *source, adev 76 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h int (*process)(struct amdgpu_device *adev, adev 102 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h void amdgpu_irq_disable_all(struct amdgpu_device *adev); adev 105 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h int amdgpu_irq_init(struct amdgpu_device *adev); adev 106 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h void amdgpu_irq_fini(struct amdgpu_device *adev); adev 107 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h int amdgpu_irq_add_id(struct amdgpu_device *adev, adev 110 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h void amdgpu_irq_dispatch(struct amdgpu_device *adev, adev 112 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h int amdgpu_irq_update(struct amdgpu_device *adev, struct amdgpu_irq_src *src, adev 114 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src, adev 116 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src, adev 118 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct amdgpu_irq_src *src, adev 120 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev); adev 122 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h int amdgpu_irq_add_domain(struct amdgpu_device *adev); adev 123 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h void amdgpu_irq_remove_domain(struct amdgpu_device *adev); adev 124 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h unsigned amdgpu_irq_create_mapping(struct amdgpu_device *adev, unsigned src_id); adev 45 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c amdgpu_vm_get_task_info(ring->adev, job->pasid, &ti); adev 52 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c if (amdgpu_device_should_recover_gpu(ring->adev)) adev 53 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c amdgpu_device_gpu_recover(ring->adev, job); adev 58 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs, adev 76 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c (*job)->base.sched = &adev->rings[0]->sched; adev 83 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c (*job)->vram_lost_counter = atomic_read(&adev->vram_lost_counter); adev 89 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, unsigned size, adev 94 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c r = amdgpu_job_alloc(adev, 1, job, NULL); adev 98 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c r = amdgpu_ib_get(adev, NULL, size, &(*job)->ibs[0]); adev 115 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c amdgpu_ib_free(ring->adev, &job->ibs[i], f); adev 196 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c r = amdgpu_sync_fence(ring->adev, &job->sched_sync, adev 230 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c if (job->vram_lost_counter != atomic_read(&ring->adev->vram_lost_counter)) adev 68 drivers/gpu/drm/amd/amdgpu/amdgpu_job.h int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs, adev 70 drivers/gpu/drm/amd/amdgpu/amdgpu_job.h int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, unsigned size, adev 47 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) adev 56 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (gpu_instance->adev == adev) { adev 60 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->flags & AMD_IS_APU) adev 81 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct amdgpu_device *adev = dev->dev_private; adev 83 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev == NULL) adev 86 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_unregister_gpu_instance(adev); adev 88 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->rmmio == NULL) adev 91 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_sriov_vf(adev)) adev 92 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_virt_request_full_gpu(adev, false); adev 99 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_acpi_fini(adev); adev 101 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_device_fini(adev); adev 104 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c kfree(adev); adev 108 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c void amdgpu_register_gpu_instance(struct amdgpu_device *adev) adev 121 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c gpu_instance->adev = adev; adev 125 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->flags & AMD_IS_APU) adev 144 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct amdgpu_device *adev; adev 147 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c adev = kzalloc(sizeof(struct amdgpu_device), GFP_KERNEL); adev 148 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev == NULL) { adev 151 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev->dev_private = (void *)adev; adev 167 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c r = amdgpu_device_init(adev, dev, dev->pdev, flags); adev 177 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c acpi_status = amdgpu_acpi_init(adev); adev 196 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->rmmio && amdgpu_device_is_px(dev)) adev 206 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct amdgpu_device *adev) adev 210 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->vce.fw_version; adev 211 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->vce.fb_version; adev 214 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->uvd.fw_version; adev 218 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->vcn.fw_version; adev 222 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->gmc.fw_version; adev 226 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->gfx.me_fw_version; adev 227 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->gfx.me_feature_version; adev 230 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->gfx.pfp_fw_version; adev 231 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->gfx.pfp_feature_version; adev 234 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->gfx.ce_fw_version; adev 235 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->gfx.ce_feature_version; adev 238 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->gfx.rlc_fw_version; adev 239 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->gfx.rlc_feature_version; adev 242 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->gfx.rlc_srlc_fw_version; adev 243 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->gfx.rlc_srlc_feature_version; adev 246 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->gfx.rlc_srlg_fw_version; adev 247 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->gfx.rlc_srlg_feature_version; adev 250 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->gfx.rlc_srls_fw_version; adev 251 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->gfx.rlc_srls_feature_version; adev 255 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->gfx.mec_fw_version; adev 256 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->gfx.mec_feature_version; adev 258 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->gfx.mec2_fw_version; adev 259 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->gfx.mec2_feature_version; adev 264 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->pm.fw_version; adev 271 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->psp.ta_fw_version; adev 272 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->psp.ta_xgmi_ucode_version; adev 274 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->psp.ta_fw_version; adev 275 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->psp.ta_ras_ucode_version; adev 279 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (query_fw->index >= adev->sdma.num_instances) adev 281 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->sdma.instance[query_fw->index].fw_version; adev 282 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->sdma.instance[query_fw->index].feature_version; adev 285 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->psp.sos_fw_version; adev 286 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->psp.sos_feature_version; adev 289 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->psp.asd_fw_version; adev 290 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->feature = adev->psp.asd_feature_version; adev 293 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fw_info->ver = adev->dm.dmcu_fw_version; adev 302 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c static int amdgpu_hw_ip_info(struct amdgpu_device *adev, adev 318 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 319 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->gfx.gfx_ring[i].sched.ready) adev 326 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 327 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->gfx.compute_ring[i].sched.ready) adev 334 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (i = 0; i < adev->sdma.num_instances; i++) adev 335 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->sdma.instance[i].ring.sched.ready) adev 342 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (i = 0; i < adev->uvd.num_uvd_inst; i++) { adev 343 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->uvd.harvest_config & (1 << i)) adev 346 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->uvd.inst[i].ring.sched.ready) adev 354 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (i = 0; i < adev->vce.num_rings; i++) adev 355 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->vce.ring[i].sched.ready) adev 362 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (i = 0; i < adev->uvd.num_uvd_inst; i++) { adev 363 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->uvd.harvest_config & (1 << i)) adev 366 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (j = 0; j < adev->uvd.num_enc_rings; j++) adev 367 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->uvd.inst[i].ring_enc[j].sched.ready) adev 375 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (i = 0; i < adev->vcn.num_vcn_inst; i++) { adev 376 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->uvd.harvest_config & (1 << i)) adev 379 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->vcn.inst[i].ring_dec.sched.ready) adev 387 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (i = 0; i < adev->vcn.num_vcn_inst; i++) { adev 388 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->uvd.harvest_config & (1 << i)) adev 391 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (j = 0; j < adev->vcn.num_enc_rings; j++) adev 392 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->vcn.inst[i].ring_enc[j].sched.ready) adev 400 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (i = 0; i < adev->vcn.num_vcn_inst; i++) { adev 401 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->uvd.harvest_config & (1 << i)) adev 404 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->vcn.inst[i].ring_jpeg.sched.ready) adev 414 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (i = 0; i < adev->num_ip_blocks; i++) adev 415 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->ip_blocks[i].version->type == type && adev 416 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c adev->ip_blocks[i].status.valid) adev 419 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (i == adev->num_ip_blocks) adev 425 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c result->hw_ip_version_major = adev->ip_blocks[i].version->major; adev 426 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c result->hw_ip_version_minor = adev->ip_blocks[i].version->minor; adev 451 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct amdgpu_device *adev = dev->dev_private; adev 453 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct amdgpu_mode_info *minfo = &adev->mode_info; adev 467 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ui32 = adev->accel_working; adev 470 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (i = 0, found = 0; i < adev->mode_info.num_crtc; i++) { adev 488 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_hw_ip_info(adev, info, &ip); adev 527 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (i = 0; i < adev->num_ip_blocks; i++) adev 528 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->ip_blocks[i].version->type == type && adev 529 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c adev->ip_blocks[i].status.valid && adev 536 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ui64 = amdgpu_gfx_get_gpu_clock_counter(adev); adev 546 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &info->query_fw, adev); adev 554 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ui64 = atomic64_read(&adev->num_bytes_moved); adev 557 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ui64 = atomic64_read(&adev->num_evictions); adev 560 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ui64 = atomic64_read(&adev->num_vram_cpu_page_faults); adev 563 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ui64 = amdgpu_vram_mgr_usage(&adev->mman.bdev.man[TTM_PL_VRAM]); adev 566 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ui64 = amdgpu_vram_mgr_vis_usage(&adev->mman.bdev.man[TTM_PL_VRAM]); adev 569 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ui64 = amdgpu_gtt_mgr_usage(&adev->mman.bdev.man[TTM_PL_TT]); adev 575 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c gds_info.compute_partition_size = adev->gds.gds_size; adev 576 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c gds_info.gds_total_size = adev->gds.gds_size; adev 577 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c gds_info.gws_per_compute_partition = adev->gds.gws_size; adev 578 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c gds_info.oa_per_compute_partition = adev->gds.oa_size; adev 585 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c vram_gtt.vram_size = adev->gmc.real_vram_size - adev 586 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c atomic64_read(&adev->vram_pin_size); adev 587 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c vram_gtt.vram_cpu_accessible_size = adev->gmc.visible_vram_size - adev 588 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c atomic64_read(&adev->visible_pin_size); adev 589 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c vram_gtt.gtt_size = adev->mman.bdev.man[TTM_PL_TT].size; adev 591 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c vram_gtt.gtt_size -= atomic64_read(&adev->gart_pin_size); adev 599 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c mem.vram.total_heap_size = adev->gmc.real_vram_size; adev 600 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c mem.vram.usable_heap_size = adev->gmc.real_vram_size - adev 601 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c atomic64_read(&adev->vram_pin_size); adev 603 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_vram_mgr_usage(&adev->mman.bdev.man[TTM_PL_VRAM]); adev 607 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c adev->gmc.visible_vram_size; adev 608 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c mem.cpu_accessible_vram.usable_heap_size = adev->gmc.visible_vram_size - adev 609 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c atomic64_read(&adev->visible_pin_size); adev 611 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_vram_mgr_vis_usage(&adev->mman.bdev.man[TTM_PL_VRAM]); adev 615 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c mem.gtt.total_heap_size = adev->mman.bdev.man[TTM_PL_TT].size; adev 618 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c atomic64_read(&adev->gart_pin_size); adev 620 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_gtt_mgr_usage(&adev->mman.bdev.man[TTM_PL_TT]); adev 652 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_gfx_off_ctrl(adev, false); adev 654 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_asic_read_register(adev, se_num, sh_num, adev 660 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_gfx_off_ctrl(adev, true); adev 664 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_gfx_off_ctrl(adev, true); adev 674 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.chip_rev = adev->rev_id; adev 675 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.external_rev = adev->external_rev_id; adev 677 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.family = adev->family; adev 678 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.num_shader_engines = adev->gfx.config.max_shader_engines; adev 679 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se; adev 681 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.gpu_counter_freq = amdgpu_asic_get_xclk(adev) * 10; adev 682 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->pm.dpm_enabled) { adev 683 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.max_engine_clock = amdgpu_dpm_get_sclk(adev, false) * 10; adev 684 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.max_memory_clock = amdgpu_dpm_get_mclk(adev, false) * 10; adev 685 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c } else if (amdgpu_sriov_vf(adev) && amdgim_is_hwperf(adev) && adev 686 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c adev->virt.ops->get_pp_clk) { adev 687 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.max_engine_clock = amdgpu_virt_get_sclk(adev, false) * 10; adev 688 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.max_memory_clock = amdgpu_virt_get_mclk(adev, false) * 10; adev 690 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.max_engine_clock = adev->clock.default_sclk * 10; adev 691 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.max_memory_clock = adev->clock.default_mclk * 10; adev 693 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.enabled_rb_pipes_mask = adev->gfx.config.backend_enable_mask; adev 694 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.num_rb_pipes = adev->gfx.config.max_backends_per_se * adev 695 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c adev->gfx.config.max_shader_engines; adev 696 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.num_hw_gfx_contexts = adev->gfx.config.max_hw_contexts; adev 699 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->flags & AMD_IS_APU) adev 701 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) adev 704 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE; adev 708 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->vce.fw_version && adev 709 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c adev->vce.fw_version < AMDGPU_VCE_FW_53_45) adev 721 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE; adev 723 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.cu_active_number = adev->gfx.cu_info.number; adev 724 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.cu_ao_mask = adev->gfx.cu_info.ao_cu_mask; adev 725 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.ce_ram_size = adev->gfx.ce_ram_size; adev 726 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c memcpy(&dev_info.cu_ao_bitmap[0], &adev->gfx.cu_info.ao_cu_bitmap[0], adev 727 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c sizeof(adev->gfx.cu_info.ao_cu_bitmap)); adev 728 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c memcpy(&dev_info.cu_bitmap[0], &adev->gfx.cu_info.bitmap[0], adev 729 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c sizeof(adev->gfx.cu_info.bitmap)); adev 730 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.vram_type = adev->gmc.vram_type; adev 731 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.vram_bit_width = adev->gmc.vram_width; adev 732 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.vce_harvest_config = adev->vce.harvest_config; adev 734 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c adev->gfx.config.double_offchip_lds_buf; adev 737 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.prim_buf_gpu_addr = adev->gfx.ngg.buf[NGG_PRIM].gpu_addr; adev 738 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.prim_buf_size = adev->gfx.ngg.buf[NGG_PRIM].size; adev 739 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.pos_buf_gpu_addr = adev->gfx.ngg.buf[NGG_POS].gpu_addr; adev 740 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.pos_buf_size = adev->gfx.ngg.buf[NGG_POS].size; adev 741 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.cntl_sb_buf_gpu_addr = adev->gfx.ngg.buf[NGG_CNTL].gpu_addr; adev 742 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.cntl_sb_buf_size = adev->gfx.ngg.buf[NGG_CNTL].size; adev 743 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.param_buf_gpu_addr = adev->gfx.ngg.buf[NGG_PARAM].gpu_addr; adev 744 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.param_buf_size = adev->gfx.ngg.buf[NGG_PARAM].size; adev 746 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.wave_front_size = adev->gfx.cu_info.wave_front_size; adev 747 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.num_shader_visible_vgprs = adev->gfx.config.max_gprs; adev 748 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.num_cu_per_sh = adev->gfx.config.max_cu_per_sh; adev 749 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.num_tcc_blocks = adev->gfx.config.max_texture_channel_caches; adev 750 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.gs_vgt_table_depth = adev->gfx.config.gs_vgt_table_depth; adev 751 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.gs_prim_buffer_depth = adev->gfx.config.gs_prim_buffer_depth; adev 752 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.max_gs_waves_per_vgt = adev->gfx.config.max_gs_threads; adev 754 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->family >= AMDGPU_FAMILY_NV) adev 756 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c adev->gfx.config.pa_sc_tile_steering_override; adev 758 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_info.tcc_disabled_mask = adev->gfx.config.tcc_disabled_mask; adev 769 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c vce_state = amdgpu_dpm_get_vce_clock_state(adev, i); adev 782 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c uint32_t bios_size = adev->bios_size; adev 796 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c bios = adev->bios + bios_offset; adev 813 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->asic_type < CHIP_POLARIS10) { adev 814 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c handle.uvd_max_handles = adev->uvd.max_handles; adev 815 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c handle.uvd_used_handles = amdgpu_uvd_used_handles(adev); adev 829 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (!adev->pm.dpm_enabled) adev 835 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_dpm_read_sensor(adev, adev 844 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_dpm_read_sensor(adev, adev 853 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_dpm_read_sensor(adev, adev 861 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_dpm_read_sensor(adev, adev 869 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_dpm_read_sensor(adev, adev 878 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_dpm_read_sensor(adev, adev 886 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_dpm_read_sensor(adev, adev 894 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_dpm_read_sensor(adev, adev 903 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_dpm_read_sensor(adev, adev 918 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ui32 = atomic_read(&adev->vram_lost_counter); adev 921 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); adev 967 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct amdgpu_device *adev = dev->dev_private; adev 972 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c flush_delayed_work(&adev->delayed_init_work); adev 988 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c dev_warn(adev->dev, "No more PASIDs available!"); adev 991 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c r = amdgpu_vm_init(adev, &fpriv->vm, AMDGPU_VM_CONTEXT_GFX, pasid); adev 995 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c fpriv->prt_va = amdgpu_vm_bo_add(adev, &fpriv->vm, NULL); adev 1001 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) { adev 1002 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c uint64_t csa_addr = amdgpu_csa_vaddr(adev) & AMDGPU_GMC_HOLE_MASK; adev 1004 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c r = amdgpu_map_static_csa(adev, &fpriv->vm, adev->virt.csa_obj, adev 1019 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_vm_fini(adev, &fpriv->vm); adev 1045 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct amdgpu_device *adev = dev->dev_private; adev 1057 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_UVD) != NULL) adev 1058 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_uvd_free_handles(adev, file_priv); adev 1059 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_VCE) != NULL) adev 1060 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_vce_free_handles(adev, file_priv); adev 1062 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_vm_bo_rmv(adev, fpriv->prt_va); adev 1064 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) { adev 1066 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c BUG_ON(amdgpu_bo_reserve(adev->virt.csa_obj, true)); adev 1067 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_vm_bo_rmv(adev, fpriv->csa_va); adev 1069 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_bo_unreserve(adev->virt.csa_obj); adev 1076 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_vm_fini(adev, &fpriv->vm); adev 1109 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct amdgpu_device *adev = dev->dev_private; adev 1113 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (pipe >= adev->mode_info.num_crtc) { adev 1126 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->mode_info.crtcs[pipe]) { adev 1131 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c count = amdgpu_display_vblank_get_counter(adev, pipe); adev 1139 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c &adev->mode_info.crtcs[pipe]->base.hwmode); adev 1140 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c } while (count != amdgpu_display_vblank_get_counter(adev, pipe)); adev 1158 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c count = amdgpu_display_vblank_get_counter(adev, pipe); adev 1176 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct amdgpu_device *adev = dev->dev_private; adev 1177 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c int idx = amdgpu_display_crtc_idx_to_irq_type(adev, pipe); adev 1179 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c return amdgpu_irq_get(adev, &adev->crtc_irq, idx); adev 1192 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct amdgpu_device *adev = dev->dev_private; adev 1193 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c int idx = amdgpu_display_crtc_idx_to_irq_type(adev, pipe); adev 1195 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c amdgpu_irq_put(adev, &adev->crtc_irq, idx); adev 1228 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct amdgpu_device *adev = dev->dev_private; adev 1231 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c struct atom_context *ctx = adev->mode_info.atom_context; adev 1236 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1244 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1252 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1260 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1268 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1276 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1284 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1292 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1300 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1308 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1317 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1324 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c if (adev->asic_type == CHIP_KAVERI || adev 1325 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c (adev->asic_type > CHIP_TOPAZ && adev->asic_type != CHIP_STONEY)) { adev 1327 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1336 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1345 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1354 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1363 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1371 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1373 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1382 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1390 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c ret = amdgpu_firmware_info(&fw_info, &query_fw, adev); adev 1407 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c int amdgpu_debugfs_firmware_init(struct amdgpu_device *adev) adev 1410 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c return amdgpu_debugfs_add_files(adev, amdgpu_firmware_info_list, adev 30 drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h struct amdgpu_adev *adev; adev 25 drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h void (*ras_init)(struct amdgpu_device *adev); adev 26 drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h void (*query_ras_error_count)(struct amdgpu_device *adev, adev 76 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c struct amdgpu_device *adev = amn->adev; adev 80 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c mutex_lock(&adev->mn_lock); adev 92 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c mutex_unlock(&adev->mn_lock); adev 315 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev, adev 323 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c mutex_lock(&adev->mn_lock); adev 325 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c mutex_unlock(&adev->mn_lock); adev 329 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c hash_for_each_possible(adev->mn_hash, amn, node, key) adev 339 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c amn->adev = adev; adev 350 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c hash_add(adev->mn_hash, &amn->node, AMDGPU_MN_KEY(mm, type)); adev 354 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c mutex_unlock(&adev->mn_lock); adev 360 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c mutex_unlock(&adev->mn_lock); adev 378 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 386 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c amn = amdgpu_mn_get(adev, type); adev 436 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 440 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c mutex_lock(&adev->mn_lock); adev 444 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c mutex_unlock(&adev->mn_lock); adev 465 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c mutex_unlock(&adev->mn_lock); adev 54 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.h struct amdgpu_device *adev; adev 77 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.h struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev, adev 85 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.h static inline struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev, adev 266 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h void (*bandwidth_update)(struct amdgpu_device *adev); adev 268 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h u32 (*vblank_get_counter)(struct amdgpu_device *adev, int crtc); adev 275 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h bool (*hpd_sense)(struct amdgpu_device *adev, enum amdgpu_hpd_id hpd); adev 276 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h void (*hpd_set_polarity)(struct amdgpu_device *adev, adev 278 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h u32 (*hpd_get_gpio_reg)(struct amdgpu_device *adev); adev 280 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h void (*page_flip)(struct amdgpu_device *adev, adev 282 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h int (*page_flip_get_scanoutpos)(struct amdgpu_device *adev, int crtc, adev 285 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h void (*add_encoder)(struct amdgpu_device *adev, adev 289 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h void (*add_connector)(struct amdgpu_device *adev, adev 312 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h struct amdgpu_device *adev; adev 613 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h int amdgpu_display_crtc_idx_to_irq_type(struct amdgpu_device *adev, int crtc); adev 616 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h int amdgpu_fbdev_init(struct amdgpu_device *adev); adev 617 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h void amdgpu_fbdev_fini(struct amdgpu_device *adev); adev 618 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state); adev 619 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h int amdgpu_fbdev_total_size(struct amdgpu_device *adev); adev 620 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj); adev 622 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int bpp, bool tiled); adev 626 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h int amdgpu_display_modeset_create_props(struct amdgpu_device *adev); adev 64 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 67 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c atomic64_sub(amdgpu_bo_size(bo), &adev->vram_pin_size); adev 69 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c &adev->visible_pin_size); adev 71 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c atomic64_sub(amdgpu_bo_size(bo), &adev->gart_pin_size); adev 77 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c struct amdgpu_device *adev = amdgpu_ttm_adev(tbo->bdev); adev 90 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c mutex_lock(&adev->shadow_list_lock); adev 92 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c mutex_unlock(&adev->shadow_list_lock); adev 127 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c struct amdgpu_device *adev = amdgpu_ttm_adev(abo->tbo.bdev); adev 134 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c unsigned visible_pfn = adev->gmc.visible_vram_size >> PAGE_SHIFT; adev 231 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c int amdgpu_bo_create_reserved(struct amdgpu_device *adev, adev 256 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c r = amdgpu_bo_create(adev, &bp, bo_ptr); adev 258 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c dev_err(adev->dev, "(%d) failed to allocate kernel bo\n", adev 267 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c dev_err(adev->dev, "(%d) failed to reserve kernel bo\n", r); adev 273 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c dev_err(adev->dev, "(%d) kernel bo pin failed\n", r); adev 279 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c dev_err(adev->dev, "%p bind failed\n", *bo_ptr); adev 289 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c dev_err(adev->dev, "(%d) kernel bo map failed\n", r); adev 326 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c int amdgpu_bo_create_kernel(struct amdgpu_device *adev, adev 333 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c r = amdgpu_bo_create_reserved(adev, size, align, domain, bo_ptr, adev 360 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev, adev 371 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c r = amdgpu_bo_create_reserved(adev, size, PAGE_SIZE, domain, bo_ptr, adev 438 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c static bool amdgpu_bo_validate_size(struct amdgpu_device *adev, adev 448 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c man = &adev->mman.bdev.man[TTM_PL_TT]; adev 457 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c man = &adev->mman.bdev.man[TTM_PL_VRAM]; adev 509 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c static int amdgpu_bo_do_create(struct amdgpu_device *adev, adev 540 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c if (!amdgpu_bo_validate_size(adev, size, bp->domain)) adev 545 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c acc_size = ttm_bo_dma_acc_size(&adev->mman.bdev, size, adev 551 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c drm_gem_private_object_init(adev->ddev, &bo->tbo.base, size); adev 566 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c bo->tbo.bdev = &adev->mman.bdev; adev 575 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c r = ttm_bo_init_reserved(&adev->mman.bdev, &bo->tbo, size, bp->type, adev 581 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c if (!amdgpu_gmc_vram_full_visible(&adev->gmc) && adev 583 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c bo->tbo.mem.start < adev->gmc.visible_vram_size >> PAGE_SHIFT) adev 584 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c amdgpu_cs_report_moved_bytes(adev, ctx.bytes_moved, adev 587 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c amdgpu_cs_report_moved_bytes(adev, ctx.bytes_moved, 0); adev 621 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c static int amdgpu_bo_create_shadow(struct amdgpu_device *adev, adev 639 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c r = amdgpu_bo_do_create(adev, &bp, &bo->shadow); adev 642 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c mutex_lock(&adev->shadow_list_lock); adev 643 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c list_add_tail(&bo->shadow->shadow_list, &adev->shadow_list); adev 644 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c mutex_unlock(&adev->shadow_list_lock); adev 664 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c int amdgpu_bo_create(struct amdgpu_device *adev, adev 672 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c r = amdgpu_bo_do_create(adev, bp, bo_ptr); adev 676 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c if ((flags & AMDGPU_GEM_CREATE_SHADOW) && !(adev->flags & AMD_IS_APU)) { adev 681 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c r = amdgpu_bo_create_shadow(adev, bp->size, *bo_ptr); adev 743 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c struct amdgpu_device *adev = amdgpu_ttm_adev(shadow->tbo.bdev); adev 744 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring; adev 885 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 906 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c domain = amdgpu_bo_get_preferred_pin_domain(adev, domain); adev 946 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c dev_err(adev->dev, "%p pin failed\n", bo); adev 954 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c atomic64_add(amdgpu_bo_size(bo), &adev->vram_pin_size); adev 956 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c &adev->visible_pin_size); adev 958 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c atomic64_add(amdgpu_bo_size(bo), &adev->gart_pin_size); adev 994 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 999 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c dev_warn(adev->dev, "%p unpin not necessary\n", bo); adev 1014 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c dev_err(adev->dev, "%p validate failed for unpin\n", bo); adev 1029 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c int amdgpu_bo_evict_vram(struct amdgpu_device *adev) adev 1033 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c if (adev->flags & AMD_IS_APU) { adev 1038 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c return ttm_bo_evict_mm(&adev->mman.bdev, TTM_PL_VRAM); adev 1063 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c int amdgpu_bo_init(struct amdgpu_device *adev) adev 1066 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c arch_io_reserve_memtype_wc(adev->gmc.aper_base, adev 1067 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c adev->gmc.aper_size); adev 1070 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c adev->gmc.vram_mtrr = arch_phys_wc_add(adev->gmc.aper_base, adev 1071 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c adev->gmc.aper_size); adev 1073 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c adev->gmc.mc_vram_size >> 20, adev 1074 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c (unsigned long long)adev->gmc.aper_size >> 20); adev 1076 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c adev->gmc.vram_width, amdgpu_vram_names[adev->gmc.vram_type]); adev 1077 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c return amdgpu_ttm_init(adev); adev 1090 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c int amdgpu_bo_late_init(struct amdgpu_device *adev) adev 1092 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c amdgpu_ttm_late_init(adev); adev 1103 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c void amdgpu_bo_fini(struct amdgpu_device *adev) adev 1105 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c amdgpu_ttm_fini(adev); adev 1106 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c arch_phys_wc_del(adev->gmc.vram_mtrr); adev 1107 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c arch_io_free_memtype_wc(adev->gmc.aper_base, adev->gmc.aper_size); adev 1139 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 1141 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c if (adev->family <= AMDGPU_FAMILY_CZ && adev 1259 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev); adev 1267 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c amdgpu_vm_bo_invalidate(adev, abo, evict); adev 1273 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c atomic64_inc(&adev->num_evictions); adev 1332 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev); adev 1351 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c if ((offset + size) <= adev->gmc.visible_vram_size) adev 1359 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c atomic64_inc(&adev->num_vram_cpu_page_faults); adev 1374 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c (offset + size) > adev->gmc.visible_vram_size) adev 1411 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 1416 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c amdgpu_sync_resv(adev, &sync, bo->tbo.base.resv, owner, false); adev 1453 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev, adev 1458 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD) adev 154 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 160 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h dev_err(adev->dev, "%p reserve failed\n", bo); adev 202 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 203 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h unsigned fpfn = adev->gmc.visible_vram_size >> PAGE_SHIFT; adev 229 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h int amdgpu_bo_create(struct amdgpu_device *adev, adev 232 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h int amdgpu_bo_create_reserved(struct amdgpu_device *adev, adev 236 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h int amdgpu_bo_create_kernel(struct amdgpu_device *adev, adev 240 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev, adev 254 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h int amdgpu_bo_evict_vram(struct amdgpu_device *adev); adev 255 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h int amdgpu_bo_init(struct amdgpu_device *adev); adev 256 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h int amdgpu_bo_late_init(struct amdgpu_device *adev); adev 257 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h void amdgpu_bo_fini(struct amdgpu_device *adev); adev 279 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev, adev 296 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev, adev 299 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev, adev 301 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev, adev 306 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h void amdgpu_sa_bo_free(struct amdgpu_device *adev, adev 43 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c static int amdgpu_debugfs_pm_init(struct amdgpu_device *adev); adev 85 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev) adev 87 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->pm.dpm_enabled) { adev 88 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_lock(&adev->pm.mutex); adev 90 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.ac_power = true; adev 92 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.ac_power = false; adev 93 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs && adev 94 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->powerplay.pp_funcs->enable_bapm) adev 95 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_enable_bapm(adev, adev->pm.ac_power); adev 96 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_unlock(&adev->pm.mutex); adev 100 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c int amdgpu_dpm_read_sensor(struct amdgpu_device *adev, enum amd_pp_sensors sensor, adev 108 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 109 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_read_sensor(&adev->smu, sensor, data, size); adev 111 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->read_sensor) adev 112 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = adev->powerplay.pp_funcs->read_sensor((adev)->powerplay.pp_handle, adev 160 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 163 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 164 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->smu.ppt_funcs->get_current_power_state) adev 165 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c pm = amdgpu_smu_get_current_power_state(adev); adev 167 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c pm = adev->pm.dpm.user_state; adev 168 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->get_current_power_state) { adev 169 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c pm = amdgpu_dpm_get_current_power_state(adev); adev 171 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c pm = adev->pm.dpm.user_state; adev 185 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 199 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 200 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_lock(&adev->pm.mutex); adev 201 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.dpm.user_state = state; adev 202 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_unlock(&adev->pm.mutex); adev 203 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->dispatch_tasks) { adev 204 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_ENABLE_USER_STATE, &state); adev 206 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_lock(&adev->pm.mutex); adev 207 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.dpm.user_state = state; adev 208 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_unlock(&adev->pm.mutex); adev 211 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!(adev->flags & AMD_IS_PX) || adev 213 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_pm_compute_clocks(adev); adev 284 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 287 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (amdgpu_sriov_vf(adev)) adev 290 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 294 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 295 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c level = smu_get_performance_level(&adev->smu); adev 296 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->get_performance_level) adev 297 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c level = amdgpu_dpm_get_performance_level(adev); adev 299 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c level = adev->pm.dpm.forced_level; adev 319 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 325 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 353 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (amdgpu_sriov_vf(adev)) { adev 354 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (amdgim_is_hwperf(adev) && adev 355 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->virt.ops->force_dpm_level) { adev 356 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_lock(&adev->pm.mutex); adev 357 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->virt.ops->force_dpm_level(adev, level); adev 358 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_unlock(&adev->pm.mutex); adev 365 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 366 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c current_level = smu_get_performance_level(&adev->smu); adev 367 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->get_performance_level) adev 368 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c current_level = amdgpu_dpm_get_performance_level(adev); adev 383 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 384 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_force_performance_level(&adev->smu, level); adev 387 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->force_performance_level) { adev 388 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_lock(&adev->pm.mutex); adev 389 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->pm.dpm.thermal_active) { adev 391 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_unlock(&adev->pm.mutex); adev 394 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = amdgpu_dpm_force_performance_level(adev, level); adev 398 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.dpm.forced_level = level; adev 399 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_unlock(&adev->pm.mutex); adev 411 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 415 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 416 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_get_power_num_states(&adev->smu, &data); adev 419 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->get_pp_num_states) adev 420 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_get_pp_num_states(adev, &data); adev 438 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 440 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct smu_context *smu = &adev->smu; adev 444 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 449 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->get_current_power_state adev 450 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c && adev->powerplay.pp_funcs->get_pp_num_states) { adev 451 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c pm = amdgpu_dpm_get_current_power_state(adev); adev 452 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_get_pp_num_states(adev, &data); adev 471 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 473 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->pp_force_state_enabled) adev 485 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 491 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pp_force_state_enabled = false; adev 492 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (is_support_sw_smu(adev)) adev 493 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pp_force_state_enabled = false; adev 494 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->dispatch_tasks && adev 495 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->powerplay.pp_funcs->get_pp_num_states) { adev 505 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_get_pp_num_states(adev, &data); adev 510 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_dispatch_task(adev, adev 512 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pp_force_state_enabled = true; adev 535 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 539 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 540 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c size = smu_sys_get_pp_table(&adev->smu, (void **)&table); adev 544 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->get_pp_table) adev 545 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c size = amdgpu_dpm_get_pp_table(adev, &table); adev 563 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 566 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 567 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_sys_set_pp_table(&adev->smu, (void *)buf, count); adev 570 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->set_pp_table) adev 571 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_set_pp_table(adev, buf, count); adev 648 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 693 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 694 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_od_edit_dpm_table(&adev->smu, type, adev 700 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs->odn_edit_dpm_table) { adev 701 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = amdgpu_dpm_odn_edit_dpm_table(adev, type, adev 708 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs->dispatch_tasks) { adev 709 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_dispatch_task(adev, adev 727 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 730 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 731 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c size = smu_print_clk_levels(&adev->smu, SMU_OD_SCLK, buf); adev 732 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c size += smu_print_clk_levels(&adev->smu, SMU_OD_MCLK, buf+size); adev 733 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c size += smu_print_clk_levels(&adev->smu, SMU_OD_VDDC_CURVE, buf+size); adev 734 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c size += smu_print_clk_levels(&adev->smu, SMU_OD_RANGE, buf+size); adev 736 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->print_clock_levels) { adev 737 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c size = amdgpu_dpm_print_clock_levels(adev, OD_SCLK, buf); adev 738 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c size += amdgpu_dpm_print_clock_levels(adev, OD_MCLK, buf+size); adev 739 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c size += amdgpu_dpm_print_clock_levels(adev, OD_VDDC_CURVE, buf+size); adev 740 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c size += amdgpu_dpm_print_clock_levels(adev, OD_RANGE, buf+size); adev 770 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 780 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 781 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_sys_set_pp_feature_mask(&adev->smu, featuremask); adev 784 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->set_ppfeature_status) { adev 785 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = amdgpu_dpm_set_ppfeature_status(adev, featuremask); adev 798 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 800 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 801 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return smu_sys_get_pp_feature_mask(&adev->smu, buf); adev 802 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->get_ppfeature_status) adev 803 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return amdgpu_dpm_get_ppfeature_status(adev, buf); adev 838 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 840 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (amdgpu_sriov_vf(adev) && amdgim_is_hwperf(adev) && adev 841 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->virt.ops->get_pp_clk) adev 842 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return adev->virt.ops->get_pp_clk(adev, PP_SCLK, buf); adev 844 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 845 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return smu_print_clk_levels(&adev->smu, SMU_SCLK, buf); adev 846 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->print_clock_levels) adev 847 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return amdgpu_dpm_print_clock_levels(adev, PP_SCLK, buf); adev 894 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 898 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (amdgpu_sriov_vf(adev)) adev 905 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 906 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_force_clk_levels(&adev->smu, SMU_SCLK, mask); adev 907 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->force_clock_level) adev 908 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = amdgpu_dpm_force_clock_level(adev, PP_SCLK, mask); adev 921 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 923 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (amdgpu_sriov_vf(adev) && amdgim_is_hwperf(adev) && adev 924 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->virt.ops->get_pp_clk) adev 925 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return adev->virt.ops->get_pp_clk(adev, PP_MCLK, buf); adev 927 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 928 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return smu_print_clk_levels(&adev->smu, SMU_MCLK, buf); adev 929 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->print_clock_levels) adev 930 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return amdgpu_dpm_print_clock_levels(adev, PP_MCLK, buf); adev 941 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 945 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (amdgpu_sriov_vf(adev)) adev 952 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 953 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_force_clk_levels(&adev->smu, SMU_MCLK, mask); adev 954 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->force_clock_level) adev 955 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = amdgpu_dpm_force_clock_level(adev, PP_MCLK, mask); adev 968 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 970 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 971 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return smu_print_clk_levels(&adev->smu, SMU_SOCCLK, buf); adev 972 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->print_clock_levels) adev 973 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return amdgpu_dpm_print_clock_levels(adev, PP_SOCCLK, buf); adev 984 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 992 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 993 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_force_clk_levels(&adev->smu, SMU_SOCCLK, mask); adev 994 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->force_clock_level) adev 995 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = amdgpu_dpm_force_clock_level(adev, PP_SOCCLK, mask); adev 1008 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1010 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 1011 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return smu_print_clk_levels(&adev->smu, SMU_FCLK, buf); adev 1012 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->print_clock_levels) adev 1013 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return amdgpu_dpm_print_clock_levels(adev, PP_FCLK, buf); adev 1024 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1032 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 1033 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_force_clk_levels(&adev->smu, SMU_FCLK, mask); adev 1034 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->force_clock_level) adev 1035 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = amdgpu_dpm_force_clock_level(adev, PP_FCLK, mask); adev 1048 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1050 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 1051 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return smu_print_clk_levels(&adev->smu, SMU_DCEFCLK, buf); adev 1052 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->print_clock_levels) adev 1053 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return amdgpu_dpm_print_clock_levels(adev, PP_DCEFCLK, buf); adev 1064 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1072 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 1073 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_force_clk_levels(&adev->smu, SMU_DCEFCLK, mask); adev 1074 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->force_clock_level) adev 1075 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = amdgpu_dpm_force_clock_level(adev, PP_DCEFCLK, mask); adev 1088 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1090 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 1091 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return smu_print_clk_levels(&adev->smu, SMU_PCIE, buf); adev 1092 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->print_clock_levels) adev 1093 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return amdgpu_dpm_print_clock_levels(adev, PP_PCIE, buf); adev 1104 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1112 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 1113 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_force_clk_levels(&adev->smu, SMU_PCIE, mask); adev 1114 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->force_clock_level) adev 1115 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = amdgpu_dpm_force_clock_level(adev, PP_PCIE, mask); adev 1128 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1131 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 1132 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c value = smu_get_od_percentage(&(adev->smu), SMU_OD_SCLK); adev 1133 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->get_sclk_od) adev 1134 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c value = amdgpu_dpm_get_sclk_od(adev); adev 1145 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1156 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 1157 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c value = smu_set_od_percentage(&(adev->smu), SMU_OD_SCLK, (uint32_t)value); adev 1159 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs->set_sclk_od) adev 1160 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_set_sclk_od(adev, (uint32_t)value); adev 1162 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs->dispatch_tasks) { adev 1163 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL); adev 1165 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps; adev 1166 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_pm_compute_clocks(adev); adev 1179 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1182 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 1183 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c value = smu_get_od_percentage(&(adev->smu), SMU_OD_MCLK); adev 1184 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->get_mclk_od) adev 1185 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c value = amdgpu_dpm_get_mclk_od(adev); adev 1196 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1207 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 1208 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c value = smu_set_od_percentage(&(adev->smu), SMU_OD_MCLK, (uint32_t)value); adev 1210 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs->set_mclk_od) adev 1211 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_set_mclk_od(adev, (uint32_t)value); adev 1213 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs->dispatch_tasks) { adev 1214 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL); adev 1216 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps; adev 1217 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_pm_compute_clocks(adev); adev 1250 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1252 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 1253 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return smu_get_power_profile_mode(&adev->smu, buf); adev 1254 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->get_power_profile_mode) adev 1255 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return amdgpu_dpm_get_power_profile_mode(adev, buf); adev 1268 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1304 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 1305 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_set_power_profile_mode(&adev->smu, parameter, parameter_size); adev 1306 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c else if (adev->powerplay.pp_funcs->set_power_profile_mode) adev 1307 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = amdgpu_dpm_set_power_profile_mode(adev, parameter, parameter_size); adev 1327 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1331 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_LOAD, adev 1353 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1357 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MEM_LOAD, adev 1383 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1386 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_asic_get_pcie_usage(adev, &count0, &count1); adev 1388 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c count0, count1, pcie_get_mps(adev->pdev)); adev 1406 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = ddev->dev_private; adev 1408 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->unique_id) adev 1409 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return snprintf(buf, PAGE_SIZE, "%016llx\n", adev->unique_id); adev 1470 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1471 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct drm_device *ddev = adev->ddev; adev 1476 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 1486 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_HOTSPOT_TEMP, adev 1493 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_EDGE_TEMP, adev 1500 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MEM_TEMP, adev 1514 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1519 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c temp = adev->pm.dpm.thermal.min_temp; adev 1521 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c temp = adev->pm.dpm.thermal.max_temp; adev 1530 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1535 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c temp = adev->pm.dpm.thermal.min_hotspot_temp; adev 1537 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c temp = adev->pm.dpm.thermal.max_hotspot_crit_temp; adev 1546 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1551 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c temp = adev->pm.dpm.thermal.min_mem_temp; adev 1553 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c temp = adev->pm.dpm.thermal.max_mem_crit_temp; adev 1574 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1583 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c temp = adev->pm.dpm.thermal.max_hotspot_emergency_temp; adev 1586 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c temp = adev->pm.dpm.thermal.max_edge_emergency_temp; adev 1589 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c temp = adev->pm.dpm.thermal.max_mem_emergency_temp; adev 1600 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1602 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 1603 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c pwm_mode = smu_get_fan_control_mode(&adev->smu); adev 1605 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!adev->powerplay.pp_funcs->get_fan_control_mode) adev 1608 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c pwm_mode = amdgpu_dpm_get_fan_control_mode(adev); adev 1619 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1624 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 1625 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON)) adev 1632 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 1633 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c smu_set_fan_control_mode(&adev->smu, value); adev 1635 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!adev->powerplay.pp_funcs->set_fan_control_mode) adev 1638 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_set_fan_control_mode(adev, value); adev 1662 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1668 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 1669 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON)) adev 1671 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 1672 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c pwm_mode = smu_get_fan_control_mode(&adev->smu); adev 1674 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c pwm_mode = amdgpu_dpm_get_fan_control_mode(adev); adev 1686 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 1687 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c err = smu_set_fan_speed_percent(&adev->smu, value); adev 1690 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->set_fan_speed_percent) { adev 1691 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c err = amdgpu_dpm_set_fan_speed_percent(adev, value); adev 1703 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1708 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 1709 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON)) adev 1712 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 1713 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c err = smu_get_fan_speed_percent(&adev->smu, &speed); adev 1716 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->get_fan_speed_percent) { adev 1717 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c err = amdgpu_dpm_get_fan_speed_percent(adev, &speed); adev 1731 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1736 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 1737 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON)) adev 1740 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 1741 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c err = smu_get_fan_speed_rpm(&adev->smu, &speed); adev 1744 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->get_fan_speed_rpm) { adev 1745 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c err = amdgpu_dpm_get_fan_speed_rpm(adev, &speed); adev 1757 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1762 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MIN_FAN_RPM, adev 1774 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1779 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MAX_FAN_RPM, adev 1791 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1796 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 1797 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON)) adev 1800 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 1801 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c err = smu_get_fan_speed_rpm(&adev->smu, &rpm); adev 1804 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->get_fan_speed_rpm) { adev 1805 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c err = amdgpu_dpm_get_fan_speed_rpm(adev, &rpm); adev 1817 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1822 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) adev 1823 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c pwm_mode = smu_get_fan_control_mode(&adev->smu); adev 1825 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c pwm_mode = amdgpu_dpm_get_fan_control_mode(adev); adev 1831 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 1832 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON)) adev 1839 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 1840 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c err = smu_set_fan_speed_rpm(&adev->smu, value); adev 1843 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->set_fan_speed_rpm) { adev 1844 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c err = amdgpu_dpm_set_fan_speed_rpm(adev, value); adev 1856 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1859 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 1860 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c pwm_mode = smu_get_fan_control_mode(&adev->smu); adev 1862 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!adev->powerplay.pp_funcs->get_fan_control_mode) adev 1865 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c pwm_mode = amdgpu_dpm_get_fan_control_mode(adev); adev 1875 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1881 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 1882 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON)) adev 1897 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 1898 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c smu_set_fan_control_mode(&adev->smu, pwm_mode); adev 1900 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!adev->powerplay.pp_funcs->set_fan_control_mode) adev 1902 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_set_fan_control_mode(adev, pwm_mode); adev 1912 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1913 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct drm_device *ddev = adev->ddev; adev 1918 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 1923 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDGFX, adev 1942 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1943 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct drm_device *ddev = adev->ddev; adev 1948 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!(adev->flags & AMD_IS_APU)) adev 1952 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 1957 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDNB, adev 1976 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 1977 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct drm_device *ddev = adev->ddev; adev 1983 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 1988 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_POWER, adev 2010 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 2013 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 2014 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c smu_get_power_limit(&adev->smu, &limit, true); adev 2016 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_power_limit) { adev 2017 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->powerplay.pp_funcs->get_power_limit(adev->powerplay.pp_handle, &limit, true); adev 2028 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 2031 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 2032 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c smu_get_power_limit(&adev->smu, &limit, false); adev 2034 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_power_limit) { adev 2035 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->powerplay.pp_funcs->get_power_limit(adev->powerplay.pp_handle, &limit, false); adev 2048 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 2058 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 2059 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c err = smu_set_power_limit(&adev->smu, value); adev 2060 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->set_power_limit) { adev 2061 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c err = adev->powerplay.pp_funcs->set_power_limit(adev->powerplay.pp_handle, value); adev 2076 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 2077 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct drm_device *ddev = adev->ddev; adev 2082 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 2087 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_SCLK, adev 2106 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 2107 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct drm_device *ddev = adev->ddev; adev 2112 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 2117 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_MCLK, adev 2295 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev_get_drvdata(dev); adev 2299 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->pm.no_fan && (attr == &sensor_dev_attr_pwm1.dev_attr.attr || adev 2311 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_APU) && adev 2324 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!adev->pm.dpm_enabled && adev 2338 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!is_support_sw_smu(adev)) { adev 2340 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((!adev->powerplay.pp_funcs->get_fan_speed_percent && adev 2342 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (!adev->powerplay.pp_funcs->get_fan_control_mode && adev 2346 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((!adev->powerplay.pp_funcs->set_fan_speed_percent && adev 2348 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (!adev->powerplay.pp_funcs->set_fan_control_mode && adev 2353 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (((adev->flags & AMD_IS_APU) || adev 2354 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->family == AMDGPU_FAMILY_SI || /* not implemented yet */ adev 2355 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->family == AMDGPU_FAMILY_KV) && /* not implemented yet */ adev 2362 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!is_support_sw_smu(adev)) { adev 2364 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((!adev->powerplay.pp_funcs->set_fan_speed_percent && adev 2365 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c !adev->powerplay.pp_funcs->get_fan_speed_percent) && adev 2366 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (!adev->powerplay.pp_funcs->set_fan_speed_rpm && adev 2367 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c !adev->powerplay.pp_funcs->get_fan_speed_rpm) && adev 2372 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((!adev->powerplay.pp_funcs->set_fan_speed_rpm && adev 2373 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c !adev->powerplay.pp_funcs->get_fan_speed_rpm) && adev 2379 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->family == AMDGPU_FAMILY_SI || /* not implemented yet */ adev 2380 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->family == AMDGPU_FAMILY_KV) && /* not implemented yet */ adev 2386 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!(adev->flags & AMD_IS_APU) && adev 2392 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_APU) && adev 2398 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (((adev->flags & AMD_IS_APU) || adev 2399 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->asic_type < CHIP_VEGA10) && adev 2428 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = adev 2435 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!adev->pm.dpm_enabled) adev 2438 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_TEMP, adev 2440 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (temp < adev->pm.dpm.thermal.min_temp) adev 2442 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c dpm_state = adev->pm.dpm.user_state; adev 2444 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->pm.dpm.thermal.high_to_low) adev 2446 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c dpm_state = adev->pm.dpm.user_state; adev 2448 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_lock(&adev->pm.mutex); adev 2450 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.dpm.thermal_active = true; adev 2452 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.dpm.thermal_active = false; adev 2453 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.dpm.state = dpm_state; adev 2454 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_unlock(&adev->pm.mutex); adev 2456 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_pm_compute_clocks(adev); adev 2459 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c static struct amdgpu_ps *amdgpu_dpm_pick_power_state(struct amdgpu_device *adev, adev 2465 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c bool single_display = (adev->pm.dpm.new_active_crtc_count < 2) ? adev 2469 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (single_display && adev->powerplay.pp_funcs->vblank_too_short) { adev 2470 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (amdgpu_dpm_vblank_too_short(adev)) adev 2485 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c for (i = 0; i < adev->pm.dpm.num_ps; i++) { adev 2486 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ps = &adev->pm.dpm.ps[i]; adev 2519 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->pm.dpm.uvd_ps) adev 2520 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return adev->pm.dpm.uvd_ps; adev 2540 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return adev->pm.dpm.boot_ps; adev 2569 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->pm.dpm.uvd_ps) { adev 2570 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return adev->pm.dpm.uvd_ps; adev 2593 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c static void amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev) adev 2601 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!adev->pm.dpm_enabled) adev 2604 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->pm.dpm.user_state != adev->pm.dpm.state) { adev 2606 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((!adev->pm.dpm.thermal_active) && adev 2607 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (!adev->pm.dpm.uvd_active)) adev 2608 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.dpm.state = adev->pm.dpm.user_state; adev 2610 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c dpm_state = adev->pm.dpm.state; adev 2612 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ps = amdgpu_dpm_pick_power_state(adev, dpm_state); adev 2614 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.dpm.requested_ps = ps; adev 2618 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (amdgpu_dpm == 1 && adev->powerplay.pp_funcs->print_power_state) { adev 2620 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_print_power_state(adev, adev->pm.dpm.current_ps); adev 2622 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_print_power_state(adev, adev->pm.dpm.requested_ps); adev 2626 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ps->vce_active = adev->pm.dpm.vce_active; adev 2627 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs->display_configuration_changed) adev 2628 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_display_configuration_changed(adev); adev 2630 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = amdgpu_dpm_pre_set_power_state(adev); adev 2634 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs->check_state_equal) { adev 2635 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (0 != amdgpu_dpm_check_state_equal(adev, adev->pm.dpm.current_ps, adev->pm.dpm.requested_ps, &equal)) adev 2642 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_set_power_state(adev); adev 2643 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_post_set_power_state(adev); adev 2645 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.dpm.current_active_crtcs = adev->pm.dpm.new_active_crtcs; adev 2646 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.dpm.current_active_crtc_count = adev->pm.dpm.new_active_crtc_count; adev 2648 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs->force_performance_level) { adev 2649 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->pm.dpm.thermal_active) { adev 2650 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c enum amd_dpm_forced_level level = adev->pm.dpm.forced_level; adev 2652 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_force_performance_level(adev, AMD_DPM_FORCED_LEVEL_LOW); adev 2654 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.dpm.forced_level = level; adev 2657 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_force_performance_level(adev, adev->pm.dpm.forced_level); adev 2662 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable) adev 2665 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 2666 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_dpm_set_power_gate(&adev->smu, AMD_IP_BLOCK_TYPE_UVD, enable); adev 2670 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->set_powergating_by_smu) { adev 2672 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_lock(&adev->pm.mutex); adev 2673 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_UVD, !enable); adev 2674 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_unlock(&adev->pm.mutex); adev 2677 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->asic_type == CHIP_STONEY && adev 2678 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->uvd.decode_image_width >= WIDTH_4K) { adev 2679 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; adev 2689 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable) adev 2692 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 2693 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = smu_dpm_set_power_gate(&adev->smu, AMD_IP_BLOCK_TYPE_VCE, enable); adev 2697 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (adev->powerplay.pp_funcs->set_powergating_by_smu) { adev 2699 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_lock(&adev->pm.mutex); adev 2700 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_VCE, !enable); adev 2701 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_unlock(&adev->pm.mutex); adev 2705 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c void amdgpu_pm_print_power_states(struct amdgpu_device *adev) adev 2709 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs->print_power_state == NULL) adev 2712 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c for (i = 0; i < adev->pm.dpm.num_ps; i++) adev 2713 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_print_power_state(adev, &adev->pm.dpm.ps[i]); adev 2717 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c int amdgpu_pm_virt_sysfs_init(struct amdgpu_device *adev) adev 2721 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!(amdgpu_sriov_vf(adev) && amdgim_is_hwperf(adev))) adev 2724 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pp_dpm_sclk); adev 2730 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pp_dpm_mclk); adev 2736 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_power_dpm_force_performance_level); adev 2745 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c void amdgpu_pm_virt_sysfs_fini(struct amdgpu_device *adev) adev 2747 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!(amdgpu_sriov_vf(adev) && amdgim_is_hwperf(adev))) adev 2750 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_power_dpm_force_performance_level); adev 2751 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_dpm_sclk); adev 2752 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_dpm_mclk); adev 2755 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c int amdgpu_pm_load_smu_firmware(struct amdgpu_device *adev, uint32_t *smu_version) adev 2759 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->load_firmware) { adev 2760 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c r = adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle); adev 2765 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c *smu_version = adev->pm.fw_version; adev 2770 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c int amdgpu_pm_sysfs_init(struct amdgpu_device *adev) adev 2772 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; adev 2775 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->pm.sysfs_initialized) adev 2778 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->pm.dpm_enabled == 0) adev 2781 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.int_hwmon_dev = hwmon_device_register_with_groups(adev->dev, adev 2782 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c DRIVER_NAME, adev, adev 2784 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (IS_ERR(adev->pm.int_hwmon_dev)) { adev 2785 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = PTR_ERR(adev->pm.int_hwmon_dev); adev 2786 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c dev_err(adev->dev, adev 2791 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_power_dpm_state); adev 2796 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_power_dpm_force_performance_level); adev 2803 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pp_num_states); adev 2808 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pp_cur_state); adev 2813 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pp_force_state); adev 2818 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pp_table); adev 2824 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pp_dpm_sclk); adev 2829 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pp_dpm_mclk); adev 2834 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->asic_type >= CHIP_VEGA10) { adev 2835 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pp_dpm_socclk); adev 2840 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->asic_type != CHIP_ARCTURUS) { adev 2841 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pp_dpm_dcefclk); adev 2848 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->asic_type >= CHIP_VEGA20) { adev 2849 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pp_dpm_fclk); adev 2855 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->asic_type != CHIP_ARCTURUS) { adev 2856 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pp_dpm_pcie); adev 2862 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pp_sclk_od); adev 2867 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pp_mclk_od); adev 2872 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, adev 2879 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((is_support_sw_smu(adev) && adev->smu.od_enabled) || adev 2880 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (!is_support_sw_smu(adev) && hwmgr->od_enabled)) { adev 2881 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, adev 2889 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, adev 2897 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!(adev->flags & AMD_IS_APU) && adev 2898 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (adev->asic_type != CHIP_VEGA10)) { adev 2899 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, adev 2908 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!(adev->flags & AMD_IS_APU)) { adev 2909 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_pcie_bw); adev 2915 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->unique_id) adev 2916 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, &dev_attr_unique_id); adev 2921 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = amdgpu_debugfs_pm_init(adev); adev 2927 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->asic_type >= CHIP_VEGA10) && adev 2928 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c !(adev->flags & AMD_IS_APU)) { adev 2929 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ret = device_create_file(adev->dev, adev 2938 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.sysfs_initialized = true; adev 2943 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev) adev 2945 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; adev 2947 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->pm.dpm_enabled == 0) adev 2950 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->pm.int_hwmon_dev) adev 2951 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c hwmon_device_unregister(adev->pm.int_hwmon_dev); adev 2952 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_power_dpm_state); adev 2953 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_power_dpm_force_performance_level); adev 2955 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_num_states); adev 2956 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_cur_state); adev 2957 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_force_state); adev 2958 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_table); adev 2960 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_dpm_sclk); adev 2961 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_dpm_mclk); adev 2962 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->asic_type >= CHIP_VEGA10) { adev 2963 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_dpm_socclk); adev 2964 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->asic_type != CHIP_ARCTURUS) adev 2965 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_dpm_dcefclk); adev 2967 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->asic_type != CHIP_ARCTURUS) adev 2968 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_dpm_pcie); adev 2969 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->asic_type >= CHIP_VEGA20) adev 2970 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_dpm_fclk); adev 2971 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_sclk_od); adev 2972 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_mclk_od); adev 2973 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, adev 2975 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((is_support_sw_smu(adev) && adev->smu.od_enabled) || adev 2976 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (!is_support_sw_smu(adev) && hwmgr->od_enabled)) adev 2977 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, adev 2979 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_gpu_busy_percent); adev 2980 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!(adev->flags & AMD_IS_APU) && adev 2981 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c (adev->asic_type != CHIP_VEGA10)) adev 2982 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_mem_busy_percent); adev 2983 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!(adev->flags & AMD_IS_APU)) adev 2984 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pcie_bw); adev 2985 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->unique_id) adev 2986 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_unique_id); adev 2987 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->asic_type >= CHIP_VEGA10) && adev 2988 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c !(adev->flags & AMD_IS_APU)) adev 2989 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c device_remove_file(adev->dev, &dev_attr_pp_features); adev 2992 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c void amdgpu_pm_compute_clocks(struct amdgpu_device *adev) adev 2996 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!adev->pm.dpm_enabled) adev 2999 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->mode_info.num_crtc) adev 3000 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_display_bandwidth_update(adev); adev 3003 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_ring *ring = adev->rings[i]; adev 3008 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (is_support_sw_smu(adev)) { adev 3009 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct smu_dpm_context *smu_dpm = &adev->smu.smu_dpm; adev 3010 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c smu_handle_task(&adev->smu, adev 3014 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs->dispatch_tasks) { adev 3015 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_device_has_dc_support(adev)) { adev 3016 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_lock(&adev->pm.mutex); adev 3017 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_get_active_displays(adev); adev 3018 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.pm_display_cfg.num_display = adev->pm.dpm.new_active_crtc_count; adev 3019 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.pm_display_cfg.vrefresh = amdgpu_dpm_get_vrefresh(adev); adev 3020 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.pm_display_cfg.min_vblank_time = amdgpu_dpm_get_vblank_time(adev); adev 3022 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->pm.pm_display_cfg.vrefresh > 120) adev 3023 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->pm.pm_display_cfg.min_vblank_time = 0; adev 3024 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs->display_configuration_change) adev 3025 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->powerplay.pp_funcs->display_configuration_change( adev 3026 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->powerplay.pp_handle, adev 3027 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c &adev->pm.pm_display_cfg); adev 3028 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_unlock(&adev->pm.mutex); adev 3030 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL); adev 3032 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_lock(&adev->pm.mutex); adev 3033 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_get_active_displays(adev); adev 3034 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_dpm_change_power_state_locked(adev); adev 3035 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_unlock(&adev->pm.mutex); adev 3045 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device *adev) adev 3055 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_MCLK, (void *)&value, &size)) adev 3057 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_SCLK, (void *)&value, &size)) adev 3059 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_STABLE_PSTATE_SCLK, (void *)&value, &size)) adev 3061 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_STABLE_PSTATE_MCLK, (void *)&value, &size)) adev 3063 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDGFX, (void *)&value, &size)) adev 3065 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDNB, (void *)&value, &size)) adev 3068 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_POWER, (void *)&query, &size)) adev 3074 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_TEMP, (void *)&value, &size)) adev 3078 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_LOAD, (void *)&value, &size)) adev 3081 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MEM_LOAD, (void *)&value, &size)) adev 3087 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK, (void *)&value64, &size)) adev 3090 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->asic_type > CHIP_VEGA20) { adev 3092 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCN_POWER_STATE, (void *)&value, &size)) { adev 3097 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_DCLK, (void *)&value, &size)) adev 3099 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_VCLK, (void *)&value, &size)) adev 3106 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_POWER, (void *)&value, &size)) { adev 3111 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_DCLK, (void *)&value, &size)) adev 3113 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_VCLK, (void *)&value, &size)) adev 3120 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_POWER, (void *)&value, &size)) { adev 3125 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_ECCLK, (void *)&value, &size)) adev 3147 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct amdgpu_device *adev = dev->dev_private; adev 3148 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c struct drm_device *ddev = adev->ddev; adev 3151 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c amdgpu_device_ip_get_clockgating_state(adev, &flags); adev 3156 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (!adev->pm.dpm_enabled) { adev 3160 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if ((adev->flags & AMD_IS_PX) && adev 3163 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c } else if (!is_support_sw_smu(adev) && adev->powerplay.pp_funcs->debugfs_print_current_performance_level) { adev 3164 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_lock(&adev->pm.mutex); adev 3165 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c if (adev->powerplay.pp_funcs->debugfs_print_current_performance_level) adev 3166 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c adev->powerplay.pp_funcs->debugfs_print_current_performance_level(adev, m); adev 3169 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c mutex_unlock(&adev->pm.mutex); adev 3171 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return amdgpu_debugfs_pm_info_pp(m, adev); adev 3182 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c static int amdgpu_debugfs_pm_init(struct amdgpu_device *adev) adev 3185 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c return amdgpu_debugfs_add_files(adev, amdgpu_pm_info_list, ARRAY_SIZE(amdgpu_pm_info_list)); adev 33 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev); adev 34 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h int amdgpu_pm_sysfs_init(struct amdgpu_device *adev); adev 35 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h int amdgpu_pm_virt_sysfs_init(struct amdgpu_device *adev); adev 36 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev); adev 37 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h void amdgpu_pm_virt_sysfs_fini(struct amdgpu_device *adev); adev 38 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h void amdgpu_pm_print_power_states(struct amdgpu_device *adev); adev 39 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h int amdgpu_pm_load_smu_firmware(struct amdgpu_device *adev, uint32_t *smu_version); adev 40 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h void amdgpu_pm_compute_clocks(struct amdgpu_device *adev); adev 42 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable); adev 43 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable); adev 37 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c struct amdgpu_device *adev; adev 77 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c pe->adev->df_funcs->pmc_start(pe->adev, hwc->conf, 1); adev 79 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c pe->adev->df_funcs->pmc_start(pe->adev, hwc->conf, 0); adev 104 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c pe->adev->df_funcs->pmc_get_count(pe->adev, hwc->conf, adev 129 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c pe->adev->df_funcs->pmc_stop(pe->adev, hwc->conf, 0); adev 159 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c retval = pe->adev->df_funcs->pmc_start(pe->adev, hwc->conf, 1); adev 187 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c pe->adev->df_funcs->pmc_stop(pe->adev, hwc->conf, 1); adev 199 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c static int init_pmu_by_type(struct amdgpu_device *adev, adev 214 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c pmu_entry->adev = adev; adev 228 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c pmu_file_prefix, adev->ddev->primary->index); adev 247 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c int amdgpu_pmu_init(struct amdgpu_device *adev) adev 251 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c switch (adev->asic_type) { adev 254 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c ret = init_pmu_by_type(adev, df_v3_6_attr_groups, adev 269 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c void amdgpu_pmu_fini(struct amdgpu_device *adev) adev 274 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c if (pe->adev == adev) { adev 34 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.h int amdgpu_pmu_init(struct amdgpu_device *adev); adev 35 drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.h void amdgpu_pmu_fini(struct amdgpu_device *adev); adev 37 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c static void psp_set_funcs(struct amdgpu_device *adev); adev 41 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 42 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct psp_context *psp = &adev->psp; adev 44 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c psp_set_funcs(adev); adev 46 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c switch (adev->asic_type) { adev 74 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c psp->adev = adev; adev 81 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 82 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct psp_context *psp = &adev->psp; adev 96 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 98 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c release_firmware(adev->psp.sos_fw); adev 99 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c adev->psp.sos_fw = NULL; adev 100 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c release_firmware(adev->psp.asd_fw); adev 101 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c adev->psp.asd_fw = NULL; adev 102 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (adev->psp.ta_fw) { adev 103 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c release_firmware(adev->psp.ta_fw); adev 104 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c adev->psp.ta_fw = NULL; adev 114 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct amdgpu_device *adev = psp->adev; adev 116 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c for (i = 0; i < adev->usec_timeout; i++) { adev 266 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; adev 267 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_SIZE, adev 324 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ret = amdgpu_bo_create_kernel(psp->adev, PSP_ASD_SHARED_MEM_SIZE, adev 342 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (amdgpu_sriov_vf(psp->adev)) adev 413 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ret = amdgpu_bo_create_kernel(psp->adev, PSP_XGMI_SHARED_MEM_SIZE, adev 430 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (amdgpu_sriov_vf(psp->adev)) adev 472 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (amdgpu_sriov_vf(psp->adev)) adev 507 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (amdgpu_sriov_vf(psp->adev)) adev 551 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (!psp->adev->psp.ta_fw) adev 598 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ret = amdgpu_bo_create_kernel(psp->adev, PSP_RAS_SHARED_MEM_SIZE, adev 615 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (amdgpu_sriov_vf(psp->adev)) adev 657 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (amdgpu_sriov_vf(psp->adev)) adev 692 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (amdgpu_sriov_vf(psp->adev)) adev 777 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct amdgpu_device *adev = psp->adev; adev 780 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (!amdgpu_sriov_vf(adev) || !adev->in_gpu_reset) { adev 833 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (adev->gmc.xgmi.num_physical_nodes > 1) { adev 839 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c dev_err(psp->adev->dev, adev 843 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (psp->adev->psp.ta_fw) { adev 846 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c dev_err(psp->adev->dev, adev 952 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct amdgpu_device *adev = psp->adev; adev 965 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c adev->sdma.instance[ucode->ucode_id - AMDGPU_UCODE_ID_SDMA0].fw->data; adev 969 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c hdr = (struct common_firmware_header *)adev->gfx.ce_fw->data; adev 973 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c hdr = (struct common_firmware_header *)adev->gfx.pfp_fw->data; adev 977 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c hdr = (struct common_firmware_header *)adev->gfx.me_fw->data; adev 981 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c hdr = (struct common_firmware_header *)adev->gfx.mec_fw->data; adev 985 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c hdr = (struct common_firmware_header *)adev->gfx.rlc_fw->data; adev 989 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c hdr = (struct common_firmware_header *)adev->pm.fw->data; adev 1036 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct amdgpu_device* adev = psp->adev; adev 1039 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ucode = &adev->firmware.ucode[AMDGPU_UCODE_ID_SMC]; adev 1049 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c for (i = 0; i < adev->firmware.max_ucodes; i++) { adev 1050 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ucode = &adev->firmware.ucode[i]; adev 1058 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (amdgpu_sriov_vf(adev) && adev 1077 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (adev->asic_type == CHIP_RENOIR && adev 1097 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (!amdgpu_psp_check_fw_loading_status(adev, i)) adev 1105 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c static int psp_load_fw(struct amdgpu_device *adev) adev 1108 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct psp_context *psp = &adev->psp; adev 1110 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (amdgpu_sriov_vf(adev) && adev->in_gpu_reset) { adev 1120 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (!amdgpu_sriov_vf(psp->adev)) { adev 1121 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG, adev 1130 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ret = amdgpu_bo_create_kernel(adev, PSP_FENCE_BUFFER_SIZE, PAGE_SIZE, adev 1138 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ret = amdgpu_bo_create_kernel(adev, PSP_CMD_BUFFER_SIZE, PAGE_SIZE, adev 1176 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1178 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c mutex_lock(&adev->firmware.mutex); adev 1183 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ret = amdgpu_ucode_init_bo(adev); adev 1187 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ret = psp_load_fw(adev); adev 1193 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c mutex_unlock(&adev->firmware.mutex); adev 1197 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c adev->firmware.load_type = AMDGPU_FW_LOAD_DIRECT; adev 1198 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c mutex_unlock(&adev->firmware.mutex); adev 1204 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1205 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct psp_context *psp = &adev->psp; adev 1209 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (adev->gmc.xgmi.num_physical_nodes > 1 && adev 1213 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (psp->adev->psp.ta_fw) adev 1218 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; adev 1238 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1239 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct psp_context *psp = &adev->psp; adev 1241 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (adev->gmc.xgmi.num_physical_nodes > 1 && adev 1250 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (psp->adev->psp.ta_fw) { adev 1270 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1271 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c struct psp_context *psp = &adev->psp; adev 1275 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c mutex_lock(&adev->firmware.mutex); adev 1285 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c mutex_unlock(&adev->firmware.mutex); adev 1291 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c mutex_unlock(&adev->firmware.mutex); adev 1295 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c int psp_gpu_reset(struct amdgpu_device *adev) adev 1299 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) adev 1302 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c mutex_lock(&adev->psp.mutex); adev 1303 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ret = psp_mode1_reset(&adev->psp); adev 1304 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c mutex_unlock(&adev->psp.mutex); adev 1314 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (amdgpu_sriov_vf(psp->adev)) adev 1329 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c int psp_update_vcn_sram(struct amdgpu_device *adev, int inst_idx, adev 1339 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c return psp_execute_np_fw_load(&adev->psp, &ucode); adev 1342 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c static bool psp_check_fw_loading_status(struct amdgpu_device *adev, adev 1347 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (!adev->firmware.fw_size) adev 1350 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ucode = &adev->firmware.ucode[ucode_type]; adev 1354 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c return psp_compare_sram_data(&adev->psp, ucode, ucode_type); adev 1391 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c static void psp_set_funcs(struct amdgpu_device *adev) adev 1393 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c if (NULL == adev->firmware.funcs) adev 1394 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c adev->firmware.funcs = &psp_funcs; adev 147 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h struct amdgpu_device *adev; adev 215 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h bool (*check_fw_loading_status)(struct amdgpu_device *adev, adev 255 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h #define amdgpu_psp_check_fw_loading_status(adev, i) (adev)->firmware.funcs->check_fw_loading_status((adev), (i)) adev 273 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h int psp_gpu_reset(struct amdgpu_device *adev); adev 274 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h int psp_update_vcn_sram(struct amdgpu_device *adev, int inst_idx, adev 78 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (amdgpu_ras_error_query(obj->adev, &info)) adev 248 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private; adev 256 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (!amdgpu_ras_is_supported(adev, data.head.block)) adev 261 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ret = amdgpu_ras_feature_enable(adev, &data.head, 0); adev 264 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ret = amdgpu_ras_feature_enable(adev, &data.head, 1); adev 267 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if ((data.inject.address >= adev->gmc.mc_vram_size) || adev 274 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ret = amdgpu_ras_error_inject(adev, &data.inject); adev 302 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (amdgpu_ras_error_query(obj->adev, &info)) adev 325 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static struct ras_manager *amdgpu_ras_create_obj(struct amdgpu_device *adev, adev 328 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 343 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c obj->adev = adev; adev 351 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static struct ras_manager *amdgpu_ras_find_obj(struct amdgpu_device *adev, adev 354 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 386 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_is_feature_allowed(struct amdgpu_device *adev, adev 389 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 394 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_is_feature_enabled(struct amdgpu_device *adev, adev 397 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 406 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int __amdgpu_ras_feature_enable(struct amdgpu_device *adev, adev 409 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 410 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct ras_manager *obj = amdgpu_ras_find_obj(adev, head); adev 418 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (!amdgpu_ras_is_feature_allowed(adev, head)) adev 420 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (!(!!enable ^ !!amdgpu_ras_is_feature_enabled(adev, head))) adev 425 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c obj = amdgpu_ras_create_obj(adev, head); adev 434 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (obj && amdgpu_ras_is_feature_enabled(adev, head)) { adev 444 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_feature_enable(struct amdgpu_device *adev, adev 447 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 467 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c WARN_ON(enable && !amdgpu_ras_is_feature_allowed(adev, head)); adev 469 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (!(!!enable ^ !!amdgpu_ras_is_feature_enabled(adev, head))) adev 472 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ret = psp_ras_enable_features(&adev->psp, &info, enable); adev 484 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c __amdgpu_ras_feature_enable(adev, head, enable); adev 490 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_feature_enable_on_boot(struct amdgpu_device *adev, adev 493 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 507 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ret = amdgpu_ras_feature_enable(adev, head, 1); adev 513 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ret = __amdgpu_ras_feature_enable(adev, head, 1); adev 520 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ret = __amdgpu_ras_feature_enable(adev, head, 1); adev 524 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ret = amdgpu_ras_feature_enable(adev, head, 0); adev 527 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ret = amdgpu_ras_feature_enable(adev, head, enable); adev 532 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_disable_all_features(struct amdgpu_device *adev, adev 535 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 543 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (__amdgpu_ras_feature_enable(adev, &obj->head, 0)) adev 546 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (amdgpu_ras_feature_enable(adev, &obj->head, 0)) adev 554 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_enable_all_features(struct amdgpu_device *adev, adev 557 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 575 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (__amdgpu_ras_feature_enable(adev, &head, 1)) adev 578 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (amdgpu_ras_feature_enable(adev, &head, 1)) adev 588 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_error_query(struct amdgpu_device *adev, adev 591 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head); adev 599 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (adev->umc.funcs->query_ras_error_count) adev 600 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c adev->umc.funcs->query_ras_error_count(adev, &err_data); adev 604 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (adev->umc.funcs->query_ras_error_address) adev 605 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c adev->umc.funcs->query_ras_error_address(adev, &err_data); adev 608 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (adev->gfx.funcs->query_ras_error_count) adev 609 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c adev->gfx.funcs->query_ras_error_count(adev, &err_data); adev 612 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (adev->mmhub_funcs->query_ras_error_count) adev 613 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c adev->mmhub_funcs->query_ras_error_count(adev, &err_data); adev 626 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c dev_info(adev->dev, "%ld correctable errors detected in %s block\n", adev 629 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c dev_info(adev->dev, "%ld uncorrectable errors detected in %s block\n", adev 636 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_error_inject(struct amdgpu_device *adev, adev 639 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head); adev 654 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (adev->gfx.funcs->ras_error_inject) adev 655 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ret = adev->gfx.funcs->ras_error_inject(adev, info); adev 661 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ret = psp_ras_trigger_error(&adev->psp, &block_info); adev 677 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_error_cure(struct amdgpu_device *adev, adev 685 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c unsigned long amdgpu_ras_query_error_count(struct amdgpu_device *adev, adev 688 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 700 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (amdgpu_ras_error_query(adev, &info)) adev 714 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_badpages_read(struct amdgpu_device *adev, adev 759 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_device *adev = con->adev; adev 770 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (amdgpu_ras_badpages_read(adev, &bps, &bps_count)) adev 794 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_sysfs_create_feature_node(struct amdgpu_device *adev) adev 796 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 832 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c return sysfs_create_group(&adev->dev->kobj, &group); adev 835 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_sysfs_remove_feature_node(struct amdgpu_device *adev) adev 837 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 852 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c sysfs_remove_group(&adev->dev->kobj, &group); adev 857 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_sysfs_create(struct amdgpu_device *adev, adev 860 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct ras_manager *obj = amdgpu_ras_find_obj(adev, &head->head); adev 880 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (sysfs_add_file_to_group(&adev->dev->kobj, adev 892 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_sysfs_remove(struct amdgpu_device *adev, adev 895 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct ras_manager *obj = amdgpu_ras_find_obj(adev, head); adev 900 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c sysfs_remove_file_from_group(&adev->dev->kobj, adev 909 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_sysfs_remove_all(struct amdgpu_device *adev) adev 911 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 915 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_sysfs_remove(adev, &obj->head); adev 918 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_sysfs_remove_feature_node(adev); adev 925 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static void amdgpu_ras_debugfs_create_ctrl_node(struct amdgpu_device *adev) adev 927 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 928 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct drm_minor *minor = adev->ddev->primary; adev 932 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c adev, &amdgpu_ras_debugfs_ctrl_ops); adev 935 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c void amdgpu_ras_debugfs_create(struct amdgpu_device *adev, adev 938 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 939 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct ras_manager *obj = amdgpu_ras_find_obj(adev, &head->head); adev 955 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c void amdgpu_ras_debugfs_remove(struct amdgpu_device *adev, adev 958 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct ras_manager *obj = amdgpu_ras_find_obj(adev, head); adev 968 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static void amdgpu_ras_debugfs_remove_all(struct amdgpu_device *adev) adev 970 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 974 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_debugfs_remove(adev, &obj->head); adev 986 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_fs_init(struct amdgpu_device *adev) adev 988 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_sysfs_create_feature_node(adev); adev 989 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_debugfs_create_ctrl_node(adev); adev 994 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_fs_fini(struct amdgpu_device *adev) adev 996 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_debugfs_remove_all(adev); adev 997 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_sysfs_remove_all(adev); adev 1023 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ret = data->cb(obj->adev, &err_data, &entry); adev 1050 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_interrupt_dispatch(struct amdgpu_device *adev, adev 1053 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head); adev 1075 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_interrupt_remove_handler(struct amdgpu_device *adev, adev 1078 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head); adev 1097 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_interrupt_add_handler(struct amdgpu_device *adev, adev 1100 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head); adev 1105 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c obj = amdgpu_ras_create_obj(adev, &info->head); adev 1138 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_interrupt_remove_all(struct amdgpu_device *adev) adev 1140 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 1147 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_interrupt_remove_handler(adev, &info); adev 1159 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_badpages_read(struct amdgpu_device *adev, adev 1162 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 1207 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_device_gpu_recover(ras->adev, 0); adev 1212 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_realloc_eh_data_space(struct amdgpu_device *adev, adev 1235 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_add_bad_pages(struct amdgpu_device *adev, adev 1238 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 1252 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (amdgpu_ras_realloc_eh_data_space(adev, data, pages)) { adev 1268 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_reserve_bad_pages(struct amdgpu_device *adev) adev 1270 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 1287 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (amdgpu_bo_create_kernel_at(adev, bp << PAGE_SHIFT, PAGE_SIZE, adev 1302 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_release_bad_pages(struct amdgpu_device *adev) adev 1304 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 1330 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_save_bad_pages(struct amdgpu_device *adev) adev 1338 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_load_bad_pages(struct amdgpu_device *adev) adev 1346 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_recovery_init(struct amdgpu_device *adev) adev 1348 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 1359 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c con->adev = adev; adev 1361 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_load_bad_pages(adev); adev 1362 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_reserve_bad_pages(adev); adev 1367 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_recovery_fini(struct amdgpu_device *adev) adev 1369 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 1373 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_save_bad_pages(adev); adev 1374 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_release_bad_pages(adev); adev 1387 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_request_reset_on_boot(struct amdgpu_device *adev, adev 1390 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); adev 1408 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static void amdgpu_ras_check_supported(struct amdgpu_device *adev, adev 1414 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (amdgpu_sriov_vf(adev) || adev 1415 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c adev->asic_type != CHIP_VEGA20) adev 1418 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (adev->is_atom_fw && adev 1419 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c (amdgpu_atomfirmware_mem_ecc_supported(adev) || adev 1420 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_atomfirmware_sram_ecc_supported(adev))) adev 1427 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_init(struct amdgpu_device *adev) adev 1429 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 1442 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_set_context(adev, con); adev 1444 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_check_supported(adev, &con->hw_supported, adev 1447 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_set_context(adev, NULL); adev 1457 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (amdgpu_ras_recovery_init(adev)) adev 1462 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (amdgpu_ras_fs_init(adev)) adev 1466 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (adev->umc.funcs->ras_init) adev 1467 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c adev->umc.funcs->ras_init(adev); adev 1474 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_recovery_fini(adev); adev 1476 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_set_context(adev, NULL); adev 1485 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c void amdgpu_ras_resume(struct amdgpu_device *adev) adev 1487 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 1499 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_enable_all_features(adev, 1); adev 1506 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (!amdgpu_ras_is_supported(adev, obj->head.block)) { adev 1507 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_feature_enable(adev, &obj->head, 0); adev 1523 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_disable_all_features(adev, 1); adev 1524 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_reset_gpu(adev, 0); adev 1528 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c void amdgpu_ras_suspend(struct amdgpu_device *adev) adev 1530 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 1535 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_disable_all_features(adev, 0); adev 1538 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_disable_all_features(adev, 1); adev 1542 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_pre_fini(struct amdgpu_device *adev) adev 1544 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 1550 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_disable_all_features(adev, 0); adev 1551 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_recovery_fini(adev); adev 1555 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int amdgpu_ras_fini(struct amdgpu_device *adev) adev 1557 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c struct amdgpu_ras *con = amdgpu_ras_get_context(adev); adev 1562 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_fs_fini(adev); adev 1563 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_interrupt_remove_all(adev); adev 1568 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_disable_all_features(adev, 1); adev 1570 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c amdgpu_ras_set_context(adev, NULL); adev 331 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h struct amdgpu_device *adev; adev 367 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h typedef int (*ras_ih_cb)(struct amdgpu_device *adev, adev 393 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h struct amdgpu_device *adev; adev 470 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h #define amdgpu_ras_get_context(adev) ((adev)->psp.ras.ras) adev 471 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h #define amdgpu_ras_set_context(adev, ras_con) ((adev)->psp.ras.ras = (ras_con)) adev 474 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h static inline int amdgpu_ras_is_supported(struct amdgpu_device *adev, adev 477 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); adev 484 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_request_reset_on_boot(struct amdgpu_device *adev, adev 487 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h void amdgpu_ras_resume(struct amdgpu_device *adev); adev 488 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h void amdgpu_ras_suspend(struct amdgpu_device *adev); adev 490 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h unsigned long amdgpu_ras_query_error_count(struct amdgpu_device *adev, adev 494 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_add_bad_pages(struct amdgpu_device *adev, adev 497 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_reserve_bad_pages(struct amdgpu_device *adev); adev 499 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h static inline int amdgpu_ras_reset_gpu(struct amdgpu_device *adev, adev 502 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); adev 566 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_init(struct amdgpu_device *adev); adev 567 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_fini(struct amdgpu_device *adev); adev 568 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_pre_fini(struct amdgpu_device *adev); adev 570 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_feature_enable(struct amdgpu_device *adev, adev 573 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_feature_enable_on_boot(struct amdgpu_device *adev, adev 576 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_sysfs_create(struct amdgpu_device *adev, adev 579 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_sysfs_remove(struct amdgpu_device *adev, adev 582 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h void amdgpu_ras_debugfs_create(struct amdgpu_device *adev, adev 585 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h void amdgpu_ras_debugfs_remove(struct amdgpu_device *adev, adev 588 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_error_query(struct amdgpu_device *adev, adev 591 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_error_inject(struct amdgpu_device *adev, adev 594 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_interrupt_add_handler(struct amdgpu_device *adev, adev 597 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_interrupt_remove_handler(struct amdgpu_device *adev, adev 600 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h int amdgpu_ras_interrupt_dispatch(struct amdgpu_device *adev, adev 55 drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c #define to_amdgpu_device(x) (container_of(x, struct amdgpu_ras, eeprom_control))->adev adev 108 drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 120 drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c switch (adev->asic_type) { adev 157 drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c adev->psp.ras.ras->eeprom_control.tbl_byte_sum = adev 158 drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c __calc_hdr_byte_sum(&adev->psp.ras.ras->eeprom_control); adev 163 drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c adev->psp.ras.ras->eeprom_control.next_addr = EEPROM_RECORD_START; adev 170 drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 172 drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c switch (adev->asic_type) { adev 347 drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 349 drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c if (adev->asic_type != CHIP_VEGA20) adev 51 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c static int amdgpu_debugfs_ring_init(struct amdgpu_device *adev, adev 237 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring, adev 252 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c else if (ring == &adev->sdma.instance[0].page) adev 255 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c if (ring->adev == NULL) { adev 256 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c if (adev->num_rings >= AMDGPU_MAX_RINGS) adev 259 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c ring->adev = adev; adev 260 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c ring->idx = adev->num_rings++; adev 261 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c adev->rings[ring->idx] = ring; adev 267 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c r = amdgpu_device_wb_get(adev, &ring->rptr_offs); adev 269 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c dev_err(adev->dev, "(%d) ring rptr_offs wb alloc failed\n", r); adev 273 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c r = amdgpu_device_wb_get(adev, &ring->wptr_offs); adev 275 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c dev_err(adev->dev, "(%d) ring wptr_offs wb alloc failed\n", r); adev 279 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c r = amdgpu_device_wb_get(adev, &ring->fence_offs); adev 281 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c dev_err(adev->dev, "(%d) ring fence_offs wb alloc failed\n", r); adev 285 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c r = amdgpu_device_wb_get(adev, &ring->trail_fence_offs); adev 287 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c dev_err(adev->dev, adev 292 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c adev->wb.gpu_addr + (ring->trail_fence_offs * 4); adev 293 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c ring->trail_fence_cpu_addr = &adev->wb.wb[ring->trail_fence_offs]; adev 295 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c r = amdgpu_device_wb_get(adev, &ring->cond_exe_offs); adev 297 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c dev_err(adev->dev, "(%d) ring cond_exec_polling wb alloc failed\n", r); adev 300 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c ring->cond_exe_gpu_addr = adev->wb.gpu_addr + (ring->cond_exe_offs * 4); adev 301 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c ring->cond_exe_cpu_addr = &adev->wb.wb[ring->cond_exe_offs]; adev 307 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c dev_err(adev->dev, "failed initializing fences (%d).\n", r); adev 318 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c r = amdgpu_bo_create_kernel(adev, ring->ring_size + ring->funcs->extra_dw, PAGE_SIZE, adev 324 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c dev_err(adev->dev, "(%d) ring create failed\n", r); adev 337 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c if (amdgpu_debugfs_ring_init(adev, ring)) { adev 357 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c if (!(ring->adev) || !(ring->adev->rings[ring->idx])) adev 360 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c amdgpu_device_wb_free(ring->adev, ring->rptr_offs); adev 361 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c amdgpu_device_wb_free(ring->adev, ring->wptr_offs); adev 363 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c amdgpu_device_wb_free(ring->adev, ring->cond_exe_offs); adev 364 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c amdgpu_device_wb_free(ring->adev, ring->fence_offs); adev 376 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c ring->adev->rings[ring->idx] = NULL; adev 413 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c if (amdgpu_sriov_vf(ring->adev) || !ring->funcs->soft_recovery || !fence) adev 416 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c atomic_inc(&ring->adev->gpu_reset_counter); adev 488 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c static int amdgpu_debugfs_ring_init(struct amdgpu_device *adev, adev 492 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c struct drm_minor *minor = adev->ddev->primary; adev 528 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c struct amdgpu_device *adev = ring->adev; adev 533 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c DRM_DEV_ERROR(adev->dev, "ring %s test failed (%d)\n", adev 536 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c DRM_DEV_DEBUG(adev->dev, "ring test on %s succeeded\n", adev 86 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h int amdgpu_fence_driver_init(struct amdgpu_device *adev); adev 87 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h void amdgpu_fence_driver_fini(struct amdgpu_device *adev); adev 95 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h void amdgpu_fence_driver_suspend(struct amdgpu_device *adev); adev 96 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h void amdgpu_fence_driver_resume(struct amdgpu_device *adev); adev 179 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h struct amdgpu_device *adev; adev 265 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring, adev 37 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c void amdgpu_gfx_rlc_enter_safe_mode(struct amdgpu_device *adev) adev 39 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c if (adev->gfx.rlc.in_safe_mode) adev 43 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c if (!adev->gfx.rlc.funcs->is_rlc_enabled(adev)) adev 46 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c if (adev->cg_flags & adev 49 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c adev->gfx.rlc.funcs->set_safe_mode(adev); adev 50 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c adev->gfx.rlc.in_safe_mode = true; adev 61 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c void amdgpu_gfx_rlc_exit_safe_mode(struct amdgpu_device *adev) adev 63 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c if (!(adev->gfx.rlc.in_safe_mode)) adev 67 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c if (!adev->gfx.rlc.funcs->is_rlc_enabled(adev)) adev 70 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c if (adev->cg_flags & adev 73 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c adev->gfx.rlc.funcs->unset_safe_mode(adev); adev 74 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c adev->gfx.rlc.in_safe_mode = false; adev 87 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c int amdgpu_gfx_rlc_init_sr(struct amdgpu_device *adev, u32 dws) adev 95 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE, adev 97 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c &adev->gfx.rlc.save_restore_obj, adev 98 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c &adev->gfx.rlc.save_restore_gpu_addr, adev 99 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (void **)&adev->gfx.rlc.sr_ptr); adev 101 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c dev_warn(adev->dev, "(%d) create RLC sr bo failed\n", r); adev 102 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c amdgpu_gfx_rlc_fini(adev); adev 107 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c src_ptr = adev->gfx.rlc.reg_list; adev 108 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c dst_ptr = adev->gfx.rlc.sr_ptr; adev 109 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c for (i = 0; i < adev->gfx.rlc.reg_list_size; i++) adev 111 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c amdgpu_bo_kunmap(adev->gfx.rlc.save_restore_obj); adev 112 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c amdgpu_bo_unreserve(adev->gfx.rlc.save_restore_obj); adev 125 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev) adev 132 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c adev->gfx.rlc.clear_state_size = dws = adev->gfx.rlc.funcs->get_csb_size(adev); adev 133 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE, adev 135 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c &adev->gfx.rlc.clear_state_obj, adev 136 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c &adev->gfx.rlc.clear_state_gpu_addr, adev 137 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (void **)&adev->gfx.rlc.cs_ptr); adev 139 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c dev_err(adev->dev, "(%d) failed to create rlc csb bo\n", r); adev 140 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c amdgpu_gfx_rlc_fini(adev); adev 145 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c dst_ptr = adev->gfx.rlc.cs_ptr; adev 146 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c adev->gfx.rlc.funcs->get_csb_buffer(adev, dst_ptr); adev 147 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj); adev 148 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj); adev 149 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); adev 162 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c int amdgpu_gfx_rlc_init_cpt(struct amdgpu_device *adev) adev 166 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c r = amdgpu_bo_create_reserved(adev, adev->gfx.rlc.cp_table_size, adev 168 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c &adev->gfx.rlc.cp_table_obj, adev 169 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c &adev->gfx.rlc.cp_table_gpu_addr, adev 170 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (void **)&adev->gfx.rlc.cp_table_ptr); adev 172 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c dev_err(adev->dev, "(%d) failed to create cp table bo\n", r); adev 173 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c amdgpu_gfx_rlc_fini(adev); adev 178 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c amdgpu_gfx_rlc_setup_cp_table(adev); adev 179 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c amdgpu_bo_kunmap(adev->gfx.rlc.cp_table_obj); adev 180 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj); adev 192 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c void amdgpu_gfx_rlc_setup_cp_table(struct amdgpu_device *adev) adev 200 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c max_me = adev->gfx.rlc.funcs->get_cp_table_num(adev); adev 203 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c dst_ptr = adev->gfx.rlc.cp_table_ptr; adev 207 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; adev 209 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (adev->gfx.ce_fw->data + adev 215 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; adev 217 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (adev->gfx.pfp_fw->data + adev 223 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; adev 225 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (adev->gfx.me_fw->data + adev 231 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; adev 233 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (adev->gfx.mec_fw->data + adev 239 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec2_fw->data; adev 241 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (adev->gfx.mec2_fw->data + adev 264 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c void amdgpu_gfx_rlc_fini(struct amdgpu_device *adev) adev 267 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c if (adev->gfx.rlc.save_restore_obj) { adev 268 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c amdgpu_bo_free_kernel(&adev->gfx.rlc.save_restore_obj, adev 269 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c &adev->gfx.rlc.save_restore_gpu_addr, adev 270 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (void **)&adev->gfx.rlc.sr_ptr); adev 274 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, adev 275 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c &adev->gfx.rlc.clear_state_gpu_addr, adev 276 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (void **)&adev->gfx.rlc.cs_ptr); adev 279 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, adev 280 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c &adev->gfx.rlc.cp_table_gpu_addr, adev 281 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c (void **)&adev->gfx.rlc.cp_table_ptr); adev 118 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h bool (*is_rlc_enabled)(struct amdgpu_device *adev); adev 119 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h void (*set_safe_mode)(struct amdgpu_device *adev); adev 120 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h void (*unset_safe_mode)(struct amdgpu_device *adev); adev 121 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h int (*init)(struct amdgpu_device *adev); adev 122 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h u32 (*get_csb_size)(struct amdgpu_device *adev); adev 123 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h void (*get_csb_buffer)(struct amdgpu_device *adev, volatile u32 *buffer); adev 124 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h int (*get_cp_table_num)(struct amdgpu_device *adev); adev 125 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h int (*resume)(struct amdgpu_device *adev); adev 126 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h void (*stop)(struct amdgpu_device *adev); adev 127 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h void (*reset)(struct amdgpu_device *adev); adev 128 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h void (*start)(struct amdgpu_device *adev); adev 188 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h void amdgpu_gfx_rlc_enter_safe_mode(struct amdgpu_device *adev); adev 189 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h void amdgpu_gfx_rlc_exit_safe_mode(struct amdgpu_device *adev); adev 190 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h int amdgpu_gfx_rlc_init_sr(struct amdgpu_device *adev, u32 dws); adev 191 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev); adev 192 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h int amdgpu_gfx_rlc_init_cpt(struct amdgpu_device *adev); adev 193 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h void amdgpu_gfx_rlc_setup_cp_table(struct amdgpu_device *adev); adev 194 drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h void amdgpu_gfx_rlc_fini(struct amdgpu_device *adev); adev 50 drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev, adev 66 drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c r = amdgpu_bo_create_kernel(adev, size, align, domain, &sa_manager->bo, adev 69 drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c dev_err(adev->dev, "(%d) failed to allocate bo for manager\n", r); adev 77 drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev, adev 83 drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c dev_err(adev->dev, "no bo for sa manager\n"); adev 91 drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c dev_err(adev->dev, "sa_manager is not empty, clearing anyway\n"); adev 346 drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c void amdgpu_sa_bo_free(struct amdgpu_device *adev, struct amdgpu_sa_bo **sa_bo, adev 55 drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c static int amdgpu_sched_process_priority_override(struct amdgpu_device *adev, adev 81 drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c static int amdgpu_sched_context_priority_override(struct amdgpu_device *adev, adev 118 drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c struct amdgpu_device *adev = dev->dev_private; adev 128 drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c r = amdgpu_sched_process_priority_override(adev, adev 133 drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c r = amdgpu_sched_context_priority_override(adev, adev 37 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c struct amdgpu_device *adev = ring->adev; adev 40 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) adev 41 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c if (ring == &adev->sdma.instance[i].ring || adev 42 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c ring == &adev->sdma.instance[i].page) adev 43 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c return &adev->sdma.instance[i]; adev 50 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c struct amdgpu_device *adev = ring->adev; adev 53 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 54 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c if (ring == &adev->sdma.instance[i].ring || adev 55 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c ring == &adev->sdma.instance[i].page) { adev 67 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c struct amdgpu_device *adev = ring->adev; adev 80 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c csa_mc_addr = amdgpu_csa_vaddr(adev) + adev 100 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h #define amdgpu_emit_copy_buffer(adev, ib, s, d, b) (adev)->mman.buffer_funcs->emit_copy_buffer((ib), (s), (d), (b)) adev 101 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h #define amdgpu_emit_fill_buffer(adev, ib, s, d, b) (adev)->mman.buffer_funcs->emit_fill_buffer((ib), (s), (d), (b)) adev 64 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c static bool amdgpu_sync_same_dev(struct amdgpu_device *adev, adev 73 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c return ring->adev == adev; adev 157 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync, adev 164 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c if (amdgpu_sync_same_dev(adev, f) && adev 191 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c int amdgpu_sync_resv(struct amdgpu_device *adev, adev 207 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c r = amdgpu_sync_fence(adev, sync, f, false); adev 224 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c if (amdgpu_sync_same_dev(adev, f)) { adev 242 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c r = amdgpu_sync_fence(adev, sync, f, false); adev 43 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync, adev 45 drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h int amdgpu_sync_resv(struct amdgpu_device *adev, adev 32 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c static void amdgpu_do_test_moves(struct amdgpu_device *adev) adev 34 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring; adev 47 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c n = adev->gmc.gart_size - AMDGPU_IB_POOL_SIZE*64*1024; adev 49 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c if (adev->rings[i]) adev 50 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c n -= adev->rings[i]->ring_size; adev 51 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c if (adev->wb.wb_obj) adev 53 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c if (adev->irq.ih.ring_obj) adev 54 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c n -= adev->irq.ih.ring_size; adev 71 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c r = amdgpu_bo_create(adev, &bp, &vram_obj); adev 92 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c r = amdgpu_bo_create(adev, &bp, gtt_obj + i); adev 159 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c (gart_addr - adev->gmc.gart_start + adev 162 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c (vram_addr - adev->gmc.vram_start + adev 205 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c (vram_addr - adev->gmc.vram_start + adev 208 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c (gart_addr - adev->gmc.gart_start + adev 218 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c gart_addr - adev->gmc.gart_start); adev 250 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c void amdgpu_test_moves(struct amdgpu_device *adev) adev 252 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c if (adev->mman.buffer_funcs) adev 253 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c amdgpu_do_test_moves(adev); adev 66 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c static int amdgpu_ttm_debugfs_init(struct amdgpu_device *adev); adev 67 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c static void amdgpu_ttm_debugfs_fini(struct amdgpu_device *adev); adev 88 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev; adev 90 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev = amdgpu_ttm_adev(bdev); adev 102 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c man->gpu_offset = adev->gmc.gart_start; adev 110 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c man->gpu_offset = adev->gmc.vram_start; adev 144 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev); adev 178 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (!adev->mman.buffer_funcs_enabled) { adev 181 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c } else if (!amdgpu_gmc_vram_full_visible(&adev->gmc) && adev 192 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c abo->placements[0].fpfn = adev->gmc.visible_vram_size >> PAGE_SHIFT; adev 303 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, adev 310 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring; adev 319 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (!adev->mman.buffer_funcs_enabled) { adev 336 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c mutex_lock(&adev->mman.gtt_window_lock); adev 412 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c mutex_unlock(&adev->mman.gtt_window_lock); adev 430 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev); adev 442 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_ttm_copy_mem_to_mem(adev, &src, &dst, adev 488 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev; adev 495 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev = amdgpu_ttm_adev(bo->bdev); adev 547 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev; adev 554 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev = amdgpu_ttm_adev(bo->bdev); adev 593 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c static bool amdgpu_mem_visible(struct amdgpu_device *adev, adev 609 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c <= adev->gmc.visible_vram_size; adev 621 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev; adev 631 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev = amdgpu_ttm_adev(bo->bdev); adev 656 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (!adev->mman.buffer_funcs_enabled) { adev 675 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (!amdgpu_mem_visible(adev, old_mem) || adev 676 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c !amdgpu_mem_visible(adev, new_mem)) { adev 696 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &adev->num_bytes_moved); adev 708 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = amdgpu_ttm_adev(bdev); adev 727 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if ((mem->bus.offset + mem->bus.size) > adev->gmc.visible_vram_size) adev 733 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (adev->mman.aper_base_kaddr && adev 735 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c mem->bus.addr = (u8 *)adev->mman.aper_base_kaddr + adev 738 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c mem->bus.base = adev->gmc.aper_base; adev 940 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = amdgpu_ttm_adev(ttm->bdev); adev 958 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c nents = dma_map_sg(adev->dev, ttm->sg->sgl, ttm->sg->nents, direction); adev 978 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = amdgpu_ttm_adev(ttm->bdev); adev 990 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c dma_unmap_sg(adev->dev, ttm->sg->sgl, ttm->sg->nents, direction); adev 1002 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c int amdgpu_ttm_gart_bind(struct amdgpu_device *adev, adev 1014 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_gart_bind(adev, gtt->offset, page_idx, adev 1023 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_gart_bind(adev, adev 1029 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_gart_bind(adev, gtt->offset, ttm->num_pages, adev 1050 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = amdgpu_ttm_adev(ttm->bdev); adev 1078 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c flags = amdgpu_ttm_tt_pte_flags(adev, ttm, bo_mem); adev 1082 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_gart_bind(adev, gtt->offset, ttm->num_pages, adev 1096 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev); adev 1121 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c placements.lpfn = adev->gmc.gart_size >> PAGE_SHIFT; adev 1130 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c flags = amdgpu_ttm_tt_pte_flags(adev, bo->ttm, &tmp); adev 1134 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_ttm_gart_bind(adev, bo, flags); adev 1158 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = amdgpu_ttm_adev(tbo->bdev); adev 1165 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c flags = amdgpu_ttm_tt_pte_flags(adev, tbo->ttm, &tbo->mem); adev 1166 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_ttm_gart_bind(adev, tbo, flags); adev 1179 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = amdgpu_ttm_adev(ttm->bdev); adev 1191 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_gart_unbind(adev, gtt->offset, ttm->num_pages); adev 1225 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev; adev 1228 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev = amdgpu_ttm_adev(bo->bdev); adev 1253 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = amdgpu_ttm_adev(ttm->bdev); adev 1277 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (adev->need_swiotlb && swiotlb_nr_tbl()) { adev 1278 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c return ttm_dma_populate(>t->ttm, adev->dev, ctx); adev 1284 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c return ttm_populate_and_map_pages(adev->dev, >t->ttm, ctx); adev 1295 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev; adev 1309 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev = amdgpu_ttm_adev(ttm->bdev); adev 1312 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (adev->need_swiotlb && swiotlb_nr_tbl()) { adev 1313 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c ttm_dma_unpopulate(>t->ttm, adev->dev); adev 1319 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c ttm_unmap_and_unpopulate_pages(adev->dev, >t->ttm); adev 1451 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm, adev 1456 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c flags |= adev->gart.gart_pte_flags; adev 1544 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = amdgpu_ttm_adev(abo->tbo.bdev); adev 1557 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c while (len && pos < adev->gmc.mc_vram_size) { adev 1568 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c spin_lock_irqsave(&adev->mmio_idx_lock, flags); adev 1578 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c spin_unlock_irqrestore(&adev->mmio_idx_lock, flags); adev 1627 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c static void amdgpu_ttm_fw_reserve_vram_fini(struct amdgpu_device *adev) adev 1629 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c amdgpu_bo_free_kernel(&adev->fw_vram_usage.reserved_bo, adev 1630 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c NULL, &adev->fw_vram_usage.va); adev 1640 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c static int amdgpu_ttm_fw_reserve_vram_init(struct amdgpu_device *adev) adev 1642 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c uint64_t vram_size = adev->gmc.visible_vram_size; adev 1645 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->fw_vram_usage.va = NULL; adev 1646 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->fw_vram_usage.reserved_bo = NULL; adev 1648 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (adev->fw_vram_usage.size == 0 || adev 1649 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->fw_vram_usage.size > vram_size) adev 1652 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c return amdgpu_bo_create_kernel_at(adev, adev 1653 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->fw_vram_usage.start_offset, adev 1654 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->fw_vram_usage.size, adev 1656 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c &adev->fw_vram_usage.reserved_bo, adev 1657 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c &adev->fw_vram_usage.va); adev 1670 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c int amdgpu_ttm_init(struct amdgpu_device *adev) adev 1677 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c mutex_init(&adev->mman.gtt_window_lock); adev 1680 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = ttm_bo_device_init(&adev->mman.bdev, adev 1682 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->ddev->anon_inode->i_mapping, adev 1683 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c dma_addressing_limited(adev->dev)); adev 1688 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->mman.initialized = true; adev 1691 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->mman.bdev.no_retry = true; adev 1694 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = ttm_bo_init_mm(&adev->mman.bdev, TTM_PL_VRAM, adev 1695 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->gmc.real_vram_size >> PAGE_SHIFT); adev 1704 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c vis_vram_limit <= adev->gmc.visible_vram_size) adev 1705 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->gmc.visible_vram_size = vis_vram_limit; adev 1708 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c amdgpu_ttm_set_buffer_funcs_status(adev, false); adev 1710 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base, adev 1711 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->gmc.visible_vram_size); adev 1718 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_ttm_fw_reserve_vram_init(adev); adev 1727 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_bo_create_kernel(adev, adev->gmc.stolen_size, PAGE_SIZE, adev 1729 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c &adev->stolen_vga_memory, adev 1738 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_bo_create_kernel_at(adev, adev 1739 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->gmc.real_vram_size - DISCOVERY_TMR_SIZE, adev 1742 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c &adev->discovery_memory, adev 1748 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c (unsigned) (adev->gmc.real_vram_size / (1024 * 1024))); adev 1757 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->gmc.mc_vram_size), adev 1764 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = ttm_bo_init_mm(&adev->mman.bdev, TTM_PL_TT, gtt_size >> PAGE_SHIFT); adev 1773 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GDS, adev 1774 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->gds.gds_size); adev 1780 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GWS, adev 1781 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->gds.gws_size); adev 1787 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_OA, adev 1788 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->gds.oa_size); adev 1795 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_ttm_debugfs_init(adev); adev 1806 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c void amdgpu_ttm_late_init(struct amdgpu_device *adev) adev 1810 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c amdgpu_bo_free_kernel(&adev->stolen_vga_memory, NULL, &stolen_vga_buf); adev 1813 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c amdgpu_bo_free_kernel(&adev->discovery_memory, NULL, NULL); adev 1819 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c void amdgpu_ttm_fini(struct amdgpu_device *adev) adev 1821 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (!adev->mman.initialized) adev 1824 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c amdgpu_ttm_debugfs_fini(adev); adev 1825 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c amdgpu_ttm_fw_reserve_vram_fini(adev); adev 1826 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (adev->mman.aper_base_kaddr) adev 1827 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c iounmap(adev->mman.aper_base_kaddr); adev 1828 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->mman.aper_base_kaddr = NULL; adev 1830 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c ttm_bo_clean_mm(&adev->mman.bdev, TTM_PL_VRAM); adev 1831 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c ttm_bo_clean_mm(&adev->mman.bdev, TTM_PL_TT); adev 1832 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_GDS); adev 1833 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_GWS); adev 1834 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c ttm_bo_clean_mm(&adev->mman.bdev, AMDGPU_PL_OA); adev 1835 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c ttm_bo_device_release(&adev->mman.bdev); adev 1836 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->mman.initialized = false; adev 1849 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable) adev 1851 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct ttm_mem_type_manager *man = &adev->mman.bdev.man[TTM_PL_VRAM]; adev 1855 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (!adev->mman.initialized || adev->in_gpu_reset || adev 1856 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->mman.buffer_funcs_enabled == enable) adev 1863 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c ring = adev->mman.buffer_funcs_ring; adev 1865 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = drm_sched_entity_init(&adev->mman.entity, &rq, 1, NULL); adev 1872 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c drm_sched_entity_destroy(&adev->mman.entity); adev 1879 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c size = adev->gmc.real_vram_size; adev 1881 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c size = adev->gmc.visible_vram_size; adev 1883 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->mman.buffer_funcs_enabled = enable; adev 1889 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = file_priv->minor->dev->dev_private; adev 1891 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (adev == NULL) adev 1894 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c return ttm_bo_mmap(filp, vma, &adev->mman.bdev); adev 1904 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = ring->adev; adev 1914 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c BUG_ON(adev->mman.buffer_funcs->copy_max_bytes < adev 1917 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c *addr = adev->gmc.gart_start; adev 1921 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c num_dw = adev->mman.buffer_funcs->copy_num_dw; adev 1927 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_job_alloc_with_ib(adev, num_dw * 4 + num_bytes, &job); adev 1934 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c dst_addr = amdgpu_bo_gpu_offset(adev->gart.bo); adev 1936 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c amdgpu_emit_copy_buffer(adev, &job->ibs[0], src_addr, adev 1943 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c flags = amdgpu_ttm_tt_pte_flags(adev, ttm, mem); adev 1944 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_gart_map(adev, 0, num_pages, dma_address, flags, adev 1949 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_job_submit(job, &adev->mman.entity, adev 1969 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = ring->adev; adev 1982 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c max_bytes = adev->mman.buffer_funcs->copy_max_bytes; adev 1984 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c num_dw = num_loops * adev->mman.buffer_funcs->copy_num_dw; adev 1990 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_job_alloc_with_ib(adev, num_dw * 4, &job); adev 1995 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gart.bo); adev 1999 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_sync_resv(adev, &job->sync, resv, adev 2011 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c amdgpu_emit_copy_buffer(adev, &job->ibs[0], src_offset, adev 2024 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_job_submit(job, &adev->mman.entity, adev 2042 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 2043 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c uint32_t max_bytes = adev->mman.buffer_funcs->fill_max_bytes; adev 2044 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring; adev 2053 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (!adev->mman.buffer_funcs_enabled) { adev 2074 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c num_dw = num_loops * adev->mman.buffer_funcs->fill_num_dw; adev 2079 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_job_alloc_with_ib(adev, num_dw * 4, &job); adev 2084 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_sync_resv(adev, &job->sync, resv, adev 2104 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c amdgpu_emit_fill_buffer(adev, &job->ibs[0], src_data, adev 2117 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c r = amdgpu_job_submit(job, &adev->mman.entity, adev 2136 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = dev->dev_private; adev 2137 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct ttm_mem_type_manager *man = &adev->mman.bdev.man[ttm_pl]; adev 2164 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 2171 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (*pos >= adev->gmc.mc_vram_size) adev 2178 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (*pos >= adev->gmc.mc_vram_size) adev 2181 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c spin_lock_irqsave(&adev->mmio_idx_lock, flags); adev 2185 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c spin_unlock_irqrestore(&adev->mmio_idx_lock, flags); adev 2208 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 2215 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (*pos >= adev->gmc.mc_vram_size) adev 2222 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (*pos >= adev->gmc.mc_vram_size) adev 2229 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c spin_lock_irqsave(&adev->mmio_idx_lock, flags); adev 2233 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c spin_unlock_irqrestore(&adev->mmio_idx_lock, flags); adev 2259 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 2270 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (p >= adev->gart.num_cpu_pages) adev 2273 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c page = adev->gart.pages[p]; adev 2279 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c kunmap(adev->gart.pages[p]); adev 2313 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 2319 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c dom = iommu_get_domain_for_dev(adev->dev); adev 2342 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (p->mapping != adev->mman.bdev.dev_mapping) adev 2369 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 2374 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c dom = iommu_get_domain_for_dev(adev->dev); adev 2393 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (p->mapping != adev->mman.bdev.dev_mapping) adev 2431 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c static int amdgpu_ttm_debugfs_init(struct amdgpu_device *adev) adev 2436 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c struct drm_minor *minor = adev->ddev->primary; adev 2443 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev, adev 2448 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c i_size_write(ent->d_inode, adev->gmc.mc_vram_size); adev 2450 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c i_size_write(ent->d_inode, adev->gmc.gart_size); adev 2451 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c adev->mman.debugfs_entries[count] = ent; adev 2457 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c if (!(adev->need_swiotlb && swiotlb_nr_tbl())) adev 2461 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c return amdgpu_debugfs_add_files(adev, amdgpu_ttm_debugfs_list, count); adev 2467 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c static void amdgpu_ttm_debugfs_fini(struct amdgpu_device *adev) adev 2473 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c debugfs_remove(adev->mman.debugfs_entries[i]); adev 80 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h int amdgpu_ttm_init(struct amdgpu_device *adev); adev 81 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h void amdgpu_ttm_late_init(struct amdgpu_device *adev); adev 82 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h void amdgpu_ttm_fini(struct amdgpu_device *adev); adev 83 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, adev 91 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, adev 133 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm, adev 330 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type) adev 332 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c switch (adev->asic_type) { adev 387 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c struct amdgpu_device *adev = ddev->dev_private; \ adev 389 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c return snprintf(buf, PAGE_SIZE, "0x%08x\n", adev->field); \ adev 434 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c int amdgpu_ucode_sysfs_init(struct amdgpu_device *adev) adev 436 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c return sysfs_create_group(&adev->dev->kobj, &fw_attr_group); adev 439 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c void amdgpu_ucode_sysfs_fini(struct amdgpu_device *adev) adev 441 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c sysfs_remove_group(&adev->dev->kobj, &fw_attr_group); adev 444 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, adev 465 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP || adev 511 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c ucode->ucode_size = adev->gfx.rlc.save_restore_list_cntl_size_bytes; adev 512 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_cntl, adev 515 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c ucode->ucode_size = adev->gfx.rlc.save_restore_list_gpm_size_bytes; adev 516 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_gpm, adev 519 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c ucode->ucode_size = adev->gfx.rlc.save_restore_list_srm_size_bytes; adev 520 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_srm, adev 551 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c int amdgpu_ucode_create_bo(struct amdgpu_device *adev) adev 553 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_DIRECT) { adev 554 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c amdgpu_bo_create_kernel(adev, adev->firmware.fw_size, PAGE_SIZE, adev 555 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c amdgpu_sriov_vf(adev) ? AMDGPU_GEM_DOMAIN_VRAM : AMDGPU_GEM_DOMAIN_GTT, adev 556 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c &adev->firmware.fw_buf, adev 557 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c &adev->firmware.fw_buf_mc, adev 558 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c &adev->firmware.fw_buf_ptr); adev 559 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c if (!adev->firmware.fw_buf) { adev 560 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c dev_err(adev->dev, "failed to create kernel buffer for firmware.fw_buf\n"); adev 562 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c } else if (amdgpu_sriov_vf(adev)) { adev 563 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c memset(adev->firmware.fw_buf_ptr, 0, adev->firmware.fw_size); adev 569 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c void amdgpu_ucode_free_bo(struct amdgpu_device *adev) adev 571 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_DIRECT) adev 572 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c amdgpu_bo_free_kernel(&adev->firmware.fw_buf, adev 573 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c &adev->firmware.fw_buf_mc, adev 574 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c &adev->firmware.fw_buf_ptr); adev 577 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c int amdgpu_ucode_init_bo(struct amdgpu_device *adev) adev 584 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c if (!amdgpu_sriov_vf(adev) && (adev->in_gpu_reset || adev->in_suspend)) adev 590 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) { adev 591 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c if (amdgpu_sriov_vf(adev)) adev 592 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c adev->firmware.max_ucodes = AMDGPU_UCODE_ID_MAXIMUM - 3; adev 594 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c adev->firmware.max_ucodes = AMDGPU_UCODE_ID_MAXIMUM - 4; adev 596 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c adev->firmware.max_ucodes = AMDGPU_UCODE_ID_MAXIMUM; adev 599 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c for (i = 0; i < adev->firmware.max_ucodes; i++) { adev 600 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c ucode = &adev->firmware.ucode[i]; adev 602 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c amdgpu_ucode_init_single_fw(adev, ucode, adev->firmware.fw_buf_mc + fw_offset, adev 603 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c adev->firmware.fw_buf_ptr + fw_offset); adev 605 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) { adev 608 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c amdgpu_ucode_patch_jt(ucode, adev->firmware.fw_buf_mc + fw_offset, adev 609 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c adev->firmware.fw_buf_ptr + fw_offset); adev 377 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h int amdgpu_ucode_init_bo(struct amdgpu_device *adev); adev 378 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h int amdgpu_ucode_create_bo(struct amdgpu_device *adev); adev 379 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h int amdgpu_ucode_sysfs_init(struct amdgpu_device *adev); adev 380 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h void amdgpu_ucode_free_bo(struct amdgpu_device *adev); adev 381 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h void amdgpu_ucode_sysfs_fini(struct amdgpu_device *adev); adev 384 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type); adev 40 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h for (umc_inst = 0; umc_inst < adev->umc.umc_inst_num; umc_inst++) { \ adev 42 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h adev->umc.funcs->enable_umc_index_mode(adev, umc_inst); \ adev 44 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h channel_inst < adev->umc.channel_inst_num; \ adev 47 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h umc_reg_offset = adev->umc.channel_offs * channel_inst; \ adev 49 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h channel_index = adev->umc.channel_idx_tbl[ \ adev 50 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h umc_inst * adev->umc.channel_inst_num + channel_inst]; \ adev 51 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h (func)(adev, err_data, umc_reg_offset, channel_index); \ adev 54 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h adev->umc.funcs->disable_umc_index_mode(adev); adev 57 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h void (*ras_init)(struct amdgpu_device *adev); adev 58 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h void (*query_ras_error_count)(struct amdgpu_device *adev, adev 60 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h void (*query_ras_error_address)(struct amdgpu_device *adev, adev 62 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h void (*enable_umc_index_mode)(struct amdgpu_device *adev, adev 64 drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h void (*disable_umc_index_mode)(struct amdgpu_device *adev); adev 123 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c int amdgpu_uvd_sw_init(struct amdgpu_device *adev) adev 131 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c INIT_DELAYED_WORK(&adev->uvd.idle_work, amdgpu_uvd_idle_work_handler); adev 133 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c switch (adev->asic_type) { adev 188 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c r = request_firmware(&adev->uvd.fw, fw_name, adev->dev); adev 190 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c dev_err(adev->dev, "amdgpu_uvd: Can't load firmware \"%s\"\n", adev 195 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c r = amdgpu_ucode_validate(adev->uvd.fw); adev 197 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c dev_err(adev->dev, "amdgpu_uvd: Can't validate firmware \"%s\"\n", adev 199 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c release_firmware(adev->uvd.fw); adev 200 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.fw = NULL; adev 205 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.max_handles = AMDGPU_DEFAULT_UVD_HANDLES; adev 207 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c hdr = (const struct common_firmware_header *)adev->uvd.fw->data; adev 210 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->asic_type < CHIP_VEGA20) { adev 226 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.max_handles = AMDGPU_MAX_UVD_HANDLES; adev 228 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.fw_version = ((version_major << 24) | (version_minor << 16) | adev 231 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if ((adev->asic_type == CHIP_POLARIS10 || adev 232 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->asic_type == CHIP_POLARIS11) && adev 233 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c (adev->uvd.fw_version < FW_1_66_16)) adev 245 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.max_handles = AMDGPU_MAX_UVD_HANDLES; adev 247 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.fw_version = le32_to_cpu(hdr->ucode_version); adev 251 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c + AMDGPU_UVD_SESSION_SIZE * adev->uvd.max_handles; adev 252 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) adev 255 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c for (j = 0; j < adev->uvd.num_uvd_inst; j++) { adev 256 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->uvd.harvest_config & (1 << j)) adev 258 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c r = amdgpu_bo_create_kernel(adev, bo_size, PAGE_SIZE, adev 259 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c AMDGPU_GEM_DOMAIN_VRAM, &adev->uvd.inst[j].vcpu_bo, adev 260 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c &adev->uvd.inst[j].gpu_addr, &adev->uvd.inst[j].cpu_addr); adev 262 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c dev_err(adev->dev, "(%d) failed to allocate UVD bo\n", r); adev 267 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c for (i = 0; i < adev->uvd.max_handles; ++i) { adev 268 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c atomic_set(&adev->uvd.handles[i], 0); adev 269 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.filp[i] = NULL; adev 273 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (!amdgpu_device_ip_block_version_cmp(adev, AMD_IP_BLOCK_TYPE_UVD, 5, 0)) adev 274 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.address_64_bit = true; adev 276 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c switch (adev->asic_type) { adev 278 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.use_ctx_buf = adev->uvd.fw_version >= FW_1_65_10; adev 281 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.use_ctx_buf = adev->uvd.fw_version >= FW_1_87_11; adev 284 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.use_ctx_buf = adev->uvd.fw_version >= FW_1_87_12; adev 287 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.use_ctx_buf = adev->uvd.fw_version >= FW_1_37_15; adev 290 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.use_ctx_buf = adev->asic_type >= CHIP_POLARIS10; adev 296 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c int amdgpu_uvd_sw_fini(struct amdgpu_device *adev) adev 300 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c drm_sched_entity_destroy(&adev->uvd.entity); adev 302 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c for (j = 0; j < adev->uvd.num_uvd_inst; ++j) { adev 303 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->uvd.harvest_config & (1 << j)) adev 305 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c kvfree(adev->uvd.inst[j].saved_bo); adev 307 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c amdgpu_bo_free_kernel(&adev->uvd.inst[j].vcpu_bo, adev 308 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c &adev->uvd.inst[j].gpu_addr, adev 309 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c (void **)&adev->uvd.inst[j].cpu_addr); adev 311 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c amdgpu_ring_fini(&adev->uvd.inst[j].ring); adev 314 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]); adev 316 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c release_firmware(adev->uvd.fw); adev 327 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c int amdgpu_uvd_entity_init(struct amdgpu_device *adev) adev 333 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c ring = &adev->uvd.inst[0].ring; adev 335 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c r = drm_sched_entity_init(&adev->uvd.entity, &rq, 1, NULL); adev 344 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c int amdgpu_uvd_suspend(struct amdgpu_device *adev) adev 350 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c cancel_delayed_work_sync(&adev->uvd.idle_work); adev 353 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->asic_type < CHIP_POLARIS10) { adev 354 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c for (i = 0; i < adev->uvd.max_handles; ++i) adev 355 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (atomic_read(&adev->uvd.handles[i])) adev 358 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (i == adev->uvd.max_handles) adev 362 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c for (j = 0; j < adev->uvd.num_uvd_inst; ++j) { adev 363 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->uvd.harvest_config & (1 << j)) adev 365 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->uvd.inst[j].vcpu_bo == NULL) adev 368 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c size = amdgpu_bo_size(adev->uvd.inst[j].vcpu_bo); adev 369 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c ptr = adev->uvd.inst[j].cpu_addr; adev 371 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.inst[j].saved_bo = kvmalloc(size, GFP_KERNEL); adev 372 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (!adev->uvd.inst[j].saved_bo) adev 375 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c memcpy_fromio(adev->uvd.inst[j].saved_bo, ptr, size); adev 380 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c int amdgpu_uvd_resume(struct amdgpu_device *adev) adev 386 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c for (i = 0; i < adev->uvd.num_uvd_inst; i++) { adev 387 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->uvd.harvest_config & (1 << i)) adev 389 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->uvd.inst[i].vcpu_bo == NULL) adev 392 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c size = amdgpu_bo_size(adev->uvd.inst[i].vcpu_bo); adev 393 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c ptr = adev->uvd.inst[i].cpu_addr; adev 395 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->uvd.inst[i].saved_bo != NULL) { adev 396 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c memcpy_toio(ptr, adev->uvd.inst[i].saved_bo, size); adev 397 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c kvfree(adev->uvd.inst[i].saved_bo); adev 398 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.inst[i].saved_bo = NULL; adev 403 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c hdr = (const struct common_firmware_header *)adev->uvd.fw->data; adev 404 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) { adev 406 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c memcpy_toio(adev->uvd.inst[i].cpu_addr, adev->uvd.fw->data + offset, adev 413 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c amdgpu_fence_driver_force_completion(&adev->uvd.inst[i].ring); adev 419 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c void amdgpu_uvd_free_handles(struct amdgpu_device *adev, struct drm_file *filp) adev 421 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c struct amdgpu_ring *ring = &adev->uvd.inst[0].ring; adev 424 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c for (i = 0; i < adev->uvd.max_handles; ++i) { adev 425 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c uint32_t handle = atomic_read(&adev->uvd.handles[i]); adev 427 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (handle != 0 && adev->uvd.filp[i] == filp) { adev 440 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.filp[i] = NULL; adev 441 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c atomic_set(&adev->uvd.handles[i], 0); adev 490 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (!ctx->parser->adev->uvd.address_64_bit) { adev 514 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c static int amdgpu_uvd_cs_msg_decode(struct amdgpu_device *adev, uint32_t *msg, adev 648 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (!adev->uvd.use_ctx_buf){ adev 696 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.decode_image_width = width; adev 713 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c struct amdgpu_device *adev = ctx->parser->adev; adev 746 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c for (i = 0; i < adev->uvd.max_handles; ++i) { adev 747 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (atomic_read(&adev->uvd.handles[i]) == handle) { adev 753 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (!atomic_cmpxchg(&adev->uvd.handles[i], 0, handle)) { adev 754 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c adev->uvd.filp[i] = ctx->parser->filp; adev 764 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c r = amdgpu_uvd_cs_msg_decode(adev, msg, ctx->buf_sizes); adev 770 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c for (i = 0; i < adev->uvd.max_handles; ++i) { adev 771 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (atomic_read(&adev->uvd.handles[i]) == handle) { adev 772 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->uvd.filp[i] != ctx->parser->filp) { adev 785 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c for (i = 0; i < adev->uvd.max_handles; ++i) adev 786 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c atomic_cmpxchg(&adev->uvd.handles[i], handle, 0); adev 854 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (!ctx->parser->adev->uvd.address_64_bit) { adev 862 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c (start >> 28) != (ctx->parser->adev->uvd.inst->gpu_addr >> 28)) { adev 999 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (!parser->adev->uvd.address_64_bit) { adev 1022 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c struct amdgpu_device *adev = ring->adev; adev 1036 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (!ring->adev->uvd.address_64_bit) { adev 1046 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c r = amdgpu_job_alloc_with_ib(adev, 64, &job); adev 1050 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->asic_type >= CHIP_VEGA10) { adev 1052 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c offset[1] = adev->reg_offset[UVD_HWIP][0][1]; adev 1053 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c offset[2] = adev->reg_offset[UVD_HWIP][1][1]; adev 1088 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c r = amdgpu_sync_resv(adev, &job->sync, bo->tbo.base.resv, adev 1093 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c r = amdgpu_job_submit(job, &adev->uvd.entity, adev 1124 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c struct amdgpu_device *adev = ring->adev; adev 1129 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE, adev 1156 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c struct amdgpu_device *adev = ring->adev; adev 1161 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE, adev 1180 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c struct amdgpu_device *adev = adev 1184 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c for (i = 0; i < adev->uvd.num_uvd_inst; ++i) { adev 1185 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->uvd.harvest_config & (1 << i)) adev 1187 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c fences += amdgpu_fence_count_emitted(&adev->uvd.inst[i].ring); adev 1188 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c for (j = 0; j < adev->uvd.num_enc_rings; ++j) { adev 1189 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c fences += amdgpu_fence_count_emitted(&adev->uvd.inst[i].ring_enc[j]); adev 1194 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->pm.dpm_enabled) { adev 1195 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c amdgpu_dpm_enable_uvd(adev, false); adev 1197 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c amdgpu_asic_set_uvd_clocks(adev, 0, 0); adev 1199 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD, adev 1201 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_UVD, adev 1205 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c schedule_delayed_work(&adev->uvd.idle_work, UVD_IDLE_TIMEOUT); adev 1211 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c struct amdgpu_device *adev = ring->adev; adev 1214 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (amdgpu_sriov_vf(adev)) adev 1217 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c set_clocks = !cancel_delayed_work_sync(&adev->uvd.idle_work); adev 1219 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (adev->pm.dpm_enabled) { adev 1220 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c amdgpu_dpm_enable_uvd(adev, true); adev 1222 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c amdgpu_asic_set_uvd_clocks(adev, 53300, 40000); adev 1223 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_UVD, adev 1225 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD, adev 1233 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (!amdgpu_sriov_vf(ring->adev)) adev 1234 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c schedule_delayed_work(&ring->adev->uvd.idle_work, UVD_IDLE_TIMEOUT); adev 1276 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c uint32_t amdgpu_uvd_used_handles(struct amdgpu_device *adev) adev 1281 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c for (i = 0; i < adev->uvd.max_handles; ++i) { adev 1287 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c if (atomic_read(&adev->uvd.handles[i])) adev 36 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h #define AMDGPU_UVD_FIRMWARE_SIZE(adev) \ adev 37 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h (AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu(((const struct common_firmware_header *)(adev)->uvd.fw->data)->ucode_size_bytes) + \ adev 72 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h int amdgpu_uvd_sw_init(struct amdgpu_device *adev); adev 73 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h int amdgpu_uvd_sw_fini(struct amdgpu_device *adev); adev 74 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h int amdgpu_uvd_entity_init(struct amdgpu_device *adev); adev 75 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h int amdgpu_uvd_suspend(struct amdgpu_device *adev); adev 76 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h int amdgpu_uvd_resume(struct amdgpu_device *adev); adev 81 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h void amdgpu_uvd_free_handles(struct amdgpu_device *adev, adev 87 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h uint32_t amdgpu_uvd_used_handles(struct amdgpu_device *adev); adev 91 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c int amdgpu_vce_sw_init(struct amdgpu_device *adev, unsigned long size) adev 98 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c switch (adev->asic_type) { adev 154 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = request_firmware(&adev->vce.fw, fw_name, adev->dev); adev 156 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c dev_err(adev->dev, "amdgpu_vce: Can't load firmware \"%s\"\n", adev 161 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = amdgpu_ucode_validate(adev->vce.fw); adev 163 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c dev_err(adev->dev, "amdgpu_vce: Can't validate firmware \"%s\"\n", adev 165 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c release_firmware(adev->vce.fw); adev 166 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c adev->vce.fw = NULL; adev 170 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c hdr = (const struct common_firmware_header *)adev->vce.fw->data; adev 178 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c adev->vce.fw_version = ((version_major << 24) | (version_minor << 16) | adev 181 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE, adev 182 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c AMDGPU_GEM_DOMAIN_VRAM, &adev->vce.vcpu_bo, adev 183 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c &adev->vce.gpu_addr, &adev->vce.cpu_addr); adev 185 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c dev_err(adev->dev, "(%d) failed to allocate VCE bo\n", r); adev 190 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c atomic_set(&adev->vce.handles[i], 0); adev 191 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c adev->vce.filp[i] = NULL; adev 194 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c INIT_DELAYED_WORK(&adev->vce.idle_work, amdgpu_vce_idle_work_handler); adev 195 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c mutex_init(&adev->vce.idle_mutex); adev 207 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c int amdgpu_vce_sw_fini(struct amdgpu_device *adev) adev 211 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (adev->vce.vcpu_bo == NULL) adev 214 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c drm_sched_entity_destroy(&adev->vce.entity); adev 216 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_bo_free_kernel(&adev->vce.vcpu_bo, &adev->vce.gpu_addr, adev 217 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c (void **)&adev->vce.cpu_addr); adev 219 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c for (i = 0; i < adev->vce.num_rings; i++) adev 220 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_ring_fini(&adev->vce.ring[i]); adev 222 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c release_firmware(adev->vce.fw); adev 223 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c mutex_destroy(&adev->vce.idle_mutex); adev 234 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c int amdgpu_vce_entity_init(struct amdgpu_device *adev) adev 240 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c ring = &adev->vce.ring[0]; adev 242 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = drm_sched_entity_init(&adev->vce.entity, &rq, 1, NULL); adev 257 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c int amdgpu_vce_suspend(struct amdgpu_device *adev) adev 261 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c cancel_delayed_work_sync(&adev->vce.idle_work); adev 263 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (adev->vce.vcpu_bo == NULL) adev 267 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (atomic_read(&adev->vce.handles[i])) adev 283 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c int amdgpu_vce_resume(struct amdgpu_device *adev) adev 290 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (adev->vce.vcpu_bo == NULL) adev 293 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = amdgpu_bo_reserve(adev->vce.vcpu_bo, false); adev 295 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c dev_err(adev->dev, "(%d) failed to reserve VCE bo\n", r); adev 299 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = amdgpu_bo_kmap(adev->vce.vcpu_bo, &cpu_addr); adev 301 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_bo_unreserve(adev->vce.vcpu_bo); adev 302 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c dev_err(adev->dev, "(%d) VCE map failed\n", r); adev 306 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c hdr = (const struct common_firmware_header *)adev->vce.fw->data; adev 308 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c memcpy_toio(cpu_addr, adev->vce.fw->data + offset, adev 309 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c adev->vce.fw->size - offset); adev 311 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_bo_kunmap(adev->vce.vcpu_bo); adev 313 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_bo_unreserve(adev->vce.vcpu_bo); adev 327 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c struct amdgpu_device *adev = adev 331 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c for (i = 0; i < adev->vce.num_rings; i++) adev 332 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c count += amdgpu_fence_count_emitted(&adev->vce.ring[i]); adev 335 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (adev->pm.dpm_enabled) { adev 336 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_dpm_enable_vce(adev, false); adev 338 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_asic_set_vce_clocks(adev, 0, 0); adev 339 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE, adev 341 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE, adev 345 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c schedule_delayed_work(&adev->vce.idle_work, VCE_IDLE_TIMEOUT); adev 358 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c struct amdgpu_device *adev = ring->adev; adev 361 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (amdgpu_sriov_vf(adev)) adev 364 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c mutex_lock(&adev->vce.idle_mutex); adev 365 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c set_clocks = !cancel_delayed_work_sync(&adev->vce.idle_work); adev 367 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (adev->pm.dpm_enabled) { adev 368 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_dpm_enable_vce(adev, true); adev 370 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_asic_set_vce_clocks(adev, 53300, 40000); adev 371 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCE, adev 373 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE, adev 378 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c mutex_unlock(&adev->vce.idle_mutex); adev 390 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (!amdgpu_sriov_vf(ring->adev)) adev 391 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c schedule_delayed_work(&ring->adev->vce.idle_work, VCE_IDLE_TIMEOUT); adev 402 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp) adev 404 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c struct amdgpu_ring *ring = &adev->vce.ring[0]; adev 407 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c uint32_t handle = atomic_read(&adev->vce.handles[i]); adev 409 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (!handle || adev->vce.filp[i] != filp) adev 416 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c adev->vce.filp[i] = NULL; adev 417 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c atomic_set(&adev->vce.handles[i], 0); adev 442 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job); adev 456 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if ((ring->adev->vce.fw_version >> 24) >= 52) adev 471 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if ((ring->adev->vce.fw_version >> 24) >= 52) { adev 520 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job); adev 550 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = amdgpu_job_submit(job, &ring->adev->vce.entity, adev 680 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (atomic_read(&p->adev->vce.handles[i]) == handle) { adev 681 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (p->adev->vce.filp[i] != p->filp) { adev 691 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (!atomic_cmpxchg(&p->adev->vce.handles[i], 0, handle)) { adev 692 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c p->adev->vce.filp[i] = p->filp; adev 693 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c p->adev->vce.img_size[i] = 0; adev 804 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c size = &p->adev->vce.img_size[session_idx]; adev 840 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c switch (p->adev->asic_type) { adev 934 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c atomic_set(&p->adev->vce.handles[i], 0); adev 1016 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c amdgpu_ib_free(p->adev, ib, NULL); adev 1024 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c atomic_set(&p->adev->vce.handles[i], 0); adev 1075 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c struct amdgpu_device *adev = ring->adev; adev 1078 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c int r, timeout = adev->usec_timeout; adev 1081 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (amdgpu_sriov_vf(adev)) adev 1118 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c if (ring != &ring->adev->vce.ring[0]) adev 1121 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c r = amdgpu_bo_create_reserved(ring->adev, 512, PAGE_SIZE, adev 56 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h int amdgpu_vce_sw_init(struct amdgpu_device *adev, unsigned long size); adev 57 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h int amdgpu_vce_sw_fini(struct amdgpu_device *adev); adev 58 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h int amdgpu_vce_entity_init(struct amdgpu_device *adev); adev 59 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h int amdgpu_vce_suspend(struct amdgpu_device *adev); adev 60 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h int amdgpu_vce_resume(struct amdgpu_device *adev); adev 66 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp); adev 66 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c int amdgpu_vcn_sw_init(struct amdgpu_device *adev) adev 74 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c INIT_DELAYED_WORK(&adev->vcn.idle_work, amdgpu_vcn_idle_work_handler); adev 76 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c switch (adev->asic_type) { adev 78 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->rev_id >= 8) adev 80 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c else if (adev->pdev->device == 0x15d8) adev 90 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) && adev 91 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)) adev 92 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c adev->vcn.indirect_sram = true; adev 96 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) && adev 97 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)) adev 98 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c adev->vcn.indirect_sram = true; adev 102 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) && adev 103 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)) adev 104 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c adev->vcn.indirect_sram = true; adev 108 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) && adev 109 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)) adev 110 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c adev->vcn.indirect_sram = true; adev 116 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c r = request_firmware(&adev->vcn.fw, fw_name, adev->dev); adev 118 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c dev_err(adev->dev, "amdgpu_vcn: Can't load firmware \"%s\"\n", adev 123 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c r = amdgpu_ucode_validate(adev->vcn.fw); adev 125 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c dev_err(adev->dev, "amdgpu_vcn: Can't validate firmware \"%s\"\n", adev 127 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c release_firmware(adev->vcn.fw); adev 128 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c adev->vcn.fw = NULL; adev 132 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c hdr = (const struct common_firmware_header *)adev->vcn.fw->data; adev 133 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version); adev 163 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) adev 166 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c for (i = 0; i < adev->vcn.num_vcn_inst; i++) { adev 167 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->vcn.harvest_config & (1 << i)) adev 170 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c r = amdgpu_bo_create_kernel(adev, bo_size, PAGE_SIZE, adev 171 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c AMDGPU_GEM_DOMAIN_VRAM, &adev->vcn.inst[i].vcpu_bo, adev 172 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c &adev->vcn.inst[i].gpu_addr, &adev->vcn.inst[i].cpu_addr); adev 174 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c dev_err(adev->dev, "(%d) failed to allocate vcn bo\n", r); adev 179 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->vcn.indirect_sram) { adev 180 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c r = amdgpu_bo_create_kernel(adev, 64 * 2 * 4, PAGE_SIZE, adev 181 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c AMDGPU_GEM_DOMAIN_VRAM, &adev->vcn.dpg_sram_bo, adev 182 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c &adev->vcn.dpg_sram_gpu_addr, &adev->vcn.dpg_sram_cpu_addr); adev 184 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c dev_err(adev->dev, "(%d) failed to allocate DPG bo\n", r); adev 192 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c int amdgpu_vcn_sw_fini(struct amdgpu_device *adev) adev 196 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->vcn.indirect_sram) { adev 197 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c amdgpu_bo_free_kernel(&adev->vcn.dpg_sram_bo, adev 198 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c &adev->vcn.dpg_sram_gpu_addr, adev 199 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c (void **)&adev->vcn.dpg_sram_cpu_addr); adev 202 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c for (j = 0; j < adev->vcn.num_vcn_inst; ++j) { adev 203 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->vcn.harvest_config & (1 << j)) adev 205 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c kvfree(adev->vcn.inst[j].saved_bo); adev 207 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c amdgpu_bo_free_kernel(&adev->vcn.inst[j].vcpu_bo, adev 208 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c &adev->vcn.inst[j].gpu_addr, adev 209 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c (void **)&adev->vcn.inst[j].cpu_addr); adev 211 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c amdgpu_ring_fini(&adev->vcn.inst[j].ring_dec); adev 213 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) adev 214 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c amdgpu_ring_fini(&adev->vcn.inst[j].ring_enc[i]); adev 216 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c amdgpu_ring_fini(&adev->vcn.inst[j].ring_jpeg); adev 219 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c release_firmware(adev->vcn.fw); adev 224 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c int amdgpu_vcn_suspend(struct amdgpu_device *adev) adev 230 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c cancel_delayed_work_sync(&adev->vcn.idle_work); adev 232 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 233 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->vcn.harvest_config & (1 << i)) adev 235 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->vcn.inst[i].vcpu_bo == NULL) adev 238 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c size = amdgpu_bo_size(adev->vcn.inst[i].vcpu_bo); adev 239 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c ptr = adev->vcn.inst[i].cpu_addr; adev 241 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c adev->vcn.inst[i].saved_bo = kvmalloc(size, GFP_KERNEL); adev 242 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (!adev->vcn.inst[i].saved_bo) adev 245 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c memcpy_fromio(adev->vcn.inst[i].saved_bo, ptr, size); adev 250 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c int amdgpu_vcn_resume(struct amdgpu_device *adev) adev 256 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 257 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->vcn.harvest_config & (1 << i)) adev 259 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->vcn.inst[i].vcpu_bo == NULL) adev 262 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c size = amdgpu_bo_size(adev->vcn.inst[i].vcpu_bo); adev 263 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c ptr = adev->vcn.inst[i].cpu_addr; adev 265 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->vcn.inst[i].saved_bo != NULL) { adev 266 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c memcpy_toio(ptr, adev->vcn.inst[i].saved_bo, size); adev 267 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c kvfree(adev->vcn.inst[i].saved_bo); adev 268 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c adev->vcn.inst[i].saved_bo = NULL; adev 273 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c hdr = (const struct common_firmware_header *)adev->vcn.fw->data; adev 274 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) { adev 276 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c memcpy_toio(adev->vcn.inst[i].cpu_addr, adev->vcn.fw->data + offset, adev 289 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c struct amdgpu_device *adev = adev 294 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c for (j = 0; j < adev->vcn.num_vcn_inst; ++j) { adev 295 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->vcn.harvest_config & (1 << j)) adev 297 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) { adev 298 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_enc[i]); adev 301 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) { adev 309 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_jpeg)) adev 314 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c adev->vcn.pause_dpg_mode(adev, &new_state); adev 317 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_jpeg); adev 318 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_dec); adev 323 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c amdgpu_gfx_off_ctrl(adev, true); adev 324 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->asic_type < CHIP_ARCTURUS && adev->pm.dpm_enabled) adev 325 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c amdgpu_dpm_enable_uvd(adev, false); adev 327 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCN, adev 330 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c schedule_delayed_work(&adev->vcn.idle_work, VCN_IDLE_TIMEOUT); adev 336 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c struct amdgpu_device *adev = ring->adev; adev 337 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c bool set_clocks = !cancel_delayed_work_sync(&adev->vcn.idle_work); adev 340 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c amdgpu_gfx_off_ctrl(adev, false); adev 341 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->asic_type < CHIP_ARCTURUS && adev->pm.dpm_enabled) adev 342 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c amdgpu_dpm_enable_uvd(adev, true); adev 344 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCN, adev 348 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) { adev 353 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) { adev 354 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c fences += amdgpu_fence_count_emitted(&adev->vcn.inst[ring->me].ring_enc[i]); adev 361 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (amdgpu_fence_count_emitted(&adev->vcn.inst[ring->me].ring_jpeg)) adev 371 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c adev->vcn.pause_dpg_mode(adev, &new_state); adev 377 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c schedule_delayed_work(&ring->adev->vcn.idle_work, VCN_IDLE_TIMEOUT); adev 382 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c struct amdgpu_device *adev = ring->adev; adev 387 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD); adev 391 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.scratch9, 0)); adev 394 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c for (i = 0; i < adev->usec_timeout; i++) { adev 395 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c tmp = RREG32(adev->vcn.inst[ring->me].external.scratch9); adev 401 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (i >= adev->usec_timeout) adev 411 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c struct amdgpu_device *adev = ring->adev; adev 418 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c r = amdgpu_job_alloc_with_ib(adev, 64, &job); adev 424 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c ib->ptr[0] = PACKET0(adev->vcn.internal.data0, 0); adev 426 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c ib->ptr[2] = PACKET0(adev->vcn.internal.data1, 0); adev 428 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c ib->ptr[4] = PACKET0(adev->vcn.internal.cmd, 0); adev 431 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c ib->ptr[i] = PACKET0(adev->vcn.internal.nop, 0); adev 462 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c struct amdgpu_device *adev = ring->adev; adev 467 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE, adev 496 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c struct amdgpu_device *adev = ring->adev; adev 501 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE, adev 545 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c struct amdgpu_device *adev = ring->adev; adev 559 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c for (i = 0; i < adev->usec_timeout; i++) { adev 565 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (i >= adev->usec_timeout) adev 582 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job); adev 635 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job); adev 683 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c r = amdgpu_bo_create_reserved(ring->adev, 128 * 1024, PAGE_SIZE, adev 712 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c struct amdgpu_device *adev = ring->adev; adev 717 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c WREG32(adev->vcn.inst[ring->me].external.jpeg_pitch, 0xCAFEDEAD); adev 722 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.jpeg_pitch, 0)); adev 726 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c for (i = 0; i < adev->usec_timeout; i++) { adev 727 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c tmp = RREG32(adev->vcn.inst[ring->me].external.jpeg_pitch); adev 733 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (i >= adev->usec_timeout) adev 742 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c struct amdgpu_device *adev = ring->adev; adev 749 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job); adev 755 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c ib->ptr[0] = PACKETJ(adev->vcn.internal.jpeg_pitch, 0, 0, PACKETJ_TYPE0); adev 780 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c struct amdgpu_device *adev = ring->adev; adev 800 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c for (i = 0; i < adev->usec_timeout; i++) { adev 801 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c tmp = RREG32(adev->vcn.inst[ring->me].external.jpeg_pitch); adev 807 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c if (i >= adev->usec_timeout) adev 63 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h ((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) \ adev 75 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h ((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) \ adev 85 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h addr = (adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \ adev 121 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h *adev->vcn.dpg_sram_curr_addr++ = offset; \ adev 122 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h *adev->vcn.dpg_sram_curr_addr++ = value; \ adev 195 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h int (*pause_dpg_mode)(struct amdgpu_device *adev, adev 199 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h int amdgpu_vcn_sw_init(struct amdgpu_device *adev); adev 200 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h int amdgpu_vcn_sw_fini(struct amdgpu_device *adev); adev 201 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h int amdgpu_vcn_suspend(struct amdgpu_device *adev); adev 202 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h int amdgpu_vcn_resume(struct amdgpu_device *adev); adev 28 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c void amdgpu_vf_error_put(struct amdgpu_device *adev, adev 36 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c if (!amdgpu_sriov_vf(adev)) adev 41 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c mutex_lock(&adev->virt.vf_errors.lock); adev 42 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c index = adev->virt.vf_errors.write_count % AMDGPU_VF_ERROR_ENTRY_SIZE; adev 43 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c adev->virt.vf_errors.code [index] = error_code; adev 44 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c adev->virt.vf_errors.flags [index] = error_flags; adev 45 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c adev->virt.vf_errors.data [index] = error_data; adev 46 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c adev->virt.vf_errors.write_count ++; adev 47 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c mutex_unlock(&adev->virt.vf_errors.lock); adev 51 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c void amdgpu_vf_error_trans_all(struct amdgpu_device *adev) adev 57 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c if ((NULL == adev) || (!amdgpu_sriov_vf(adev)) || adev 58 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c (!adev->virt.ops) || (!adev->virt.ops->trans_msg)) { adev 69 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c mutex_lock(&adev->virt.vf_errors.lock); adev 71 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c if (adev->virt.vf_errors.write_count - adev->virt.vf_errors.read_count > AMDGPU_VF_ERROR_ENTRY_SIZE) { adev 72 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c adev->virt.vf_errors.read_count = adev->virt.vf_errors.write_count - AMDGPU_VF_ERROR_ENTRY_SIZE; adev 75 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c while (adev->virt.vf_errors.read_count < adev->virt.vf_errors.write_count) { adev 76 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c index =adev->virt.vf_errors.read_count % AMDGPU_VF_ERROR_ENTRY_SIZE; adev 77 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c data1 = AMDGIM_ERROR_CODE_FLAGS_TO_MAILBOX(adev->virt.vf_errors.code[index], adev 78 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c adev->virt.vf_errors.flags[index]); adev 79 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c data2 = adev->virt.vf_errors.data[index] & 0xFFFFFFFF; adev 80 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c data3 = (adev->virt.vf_errors.data[index] >> 32) & 0xFFFFFFFF; adev 82 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3); adev 83 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c adev->virt.vf_errors.read_count ++; adev 85 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c mutex_unlock(&adev->virt.vf_errors.lock); adev 59 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.h void amdgpu_vf_error_put(struct amdgpu_device *adev, adev 63 drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.h void amdgpu_vf_error_trans_all (struct amdgpu_device *adev); adev 30 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev) adev 38 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c void amdgpu_virt_init_setting(struct amdgpu_device *adev) adev 41 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->mode_info.num_crtc = 1; adev 42 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->enable_virtual_display = true; adev 43 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->ddev->driver->driver_features &= ~DRIVER_ATOMIC; adev 44 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->cg_flags = 0; adev 45 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->pg_flags = 0; adev 48 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg) adev 53 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c struct amdgpu_kiq *kiq = &adev->gfx.kiq; adev 75 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c if (r < 1 && (adev->in_gpu_reset || in_interrupt())) adev 87 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c return adev->wb.wb[adev->virt.reg_val_offs]; adev 94 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v) adev 99 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c struct amdgpu_kiq *kiq = &adev->gfx.kiq; adev 121 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c if (r < 1 && (adev->in_gpu_reset || in_interrupt())) adev 140 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c void amdgpu_virt_kiq_reg_write_reg_wait(struct amdgpu_device *adev, adev 144 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c struct amdgpu_kiq *kiq = &adev->gfx.kiq; adev 187 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c int amdgpu_virt_request_full_gpu(struct amdgpu_device *adev, bool init) adev 189 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c struct amdgpu_virt *virt = &adev->virt; adev 193 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c r = virt->ops->req_full_gpu(adev, init); adev 197 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.caps &= ~AMDGPU_SRIOV_CAPS_RUNTIME; adev 210 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c int amdgpu_virt_release_full_gpu(struct amdgpu_device *adev, bool init) adev 212 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c struct amdgpu_virt *virt = &adev->virt; adev 216 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c r = virt->ops->rel_full_gpu(adev, init); adev 220 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.caps |= AMDGPU_SRIOV_CAPS_RUNTIME; adev 231 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c int amdgpu_virt_reset_gpu(struct amdgpu_device *adev) adev 233 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c struct amdgpu_virt *virt = &adev->virt; adev 237 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c r = virt->ops->reset_gpu(adev); adev 241 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.caps &= ~AMDGPU_SRIOV_CAPS_RUNTIME; adev 253 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c int amdgpu_virt_wait_reset(struct amdgpu_device *adev) adev 255 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c struct amdgpu_virt *virt = &adev->virt; adev 260 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c return virt->ops->wait_reset(adev); adev 269 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c int amdgpu_virt_alloc_mm_table(struct amdgpu_device *adev) adev 273 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c if (!amdgpu_sriov_vf(adev) || adev->virt.mm_table.gpu_addr) adev 276 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c r = amdgpu_bo_create_kernel(adev, PAGE_SIZE, PAGE_SIZE, adev 278 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c &adev->virt.mm_table.bo, adev 279 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c &adev->virt.mm_table.gpu_addr, adev 280 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c (void *)&adev->virt.mm_table.cpu_addr); adev 286 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c memset((void *)adev->virt.mm_table.cpu_addr, 0, PAGE_SIZE); adev 288 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.mm_table.gpu_addr, adev 289 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.mm_table.cpu_addr); adev 298 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c void amdgpu_virt_free_mm_table(struct amdgpu_device *adev) adev 300 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c if (!amdgpu_sriov_vf(adev) || !adev->virt.mm_table.gpu_addr) adev 303 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c amdgpu_bo_free_kernel(&adev->virt.mm_table.bo, adev 304 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c &adev->virt.mm_table.gpu_addr, adev 305 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c (void *)&adev->virt.mm_table.cpu_addr); adev 306 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.mm_table.gpu_addr = 0; adev 330 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c void amdgpu_virt_init_data_exchange(struct amdgpu_device *adev) adev 337 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.fw_reserve.p_pf2vf = NULL; adev 338 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.fw_reserve.p_vf2pf = NULL; adev 340 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c if (adev->fw_vram_usage.va != NULL) { adev 341 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.fw_reserve.p_pf2vf = adev 343 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->fw_vram_usage.va + AMDGIM_DATAEXCHANGE_OFFSET); adev 344 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c AMDGPU_FW_VRAM_PF2VF_READ(adev, header.size, &pf2vf_size); adev 345 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c AMDGPU_FW_VRAM_PF2VF_READ(adev, checksum, &checksum); adev 346 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c AMDGPU_FW_VRAM_PF2VF_READ(adev, feature_flags, &adev->virt.gim_feature); adev 351 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.fw_reserve.p_pf2vf, pf2vf_size, adev 352 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.fw_reserve.checksum_key, checksum); adev 354 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.fw_reserve.p_vf2pf = adev 355 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c ((void *)adev->virt.fw_reserve.p_pf2vf + adev 357 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c memset((void *)adev->virt.fw_reserve.p_vf2pf, 0, adev 359 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c AMDGPU_FW_VRAM_VF2PF_WRITE(adev, header.version, adev 361 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c AMDGPU_FW_VRAM_VF2PF_WRITE(adev, header.size, adev 363 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c AMDGPU_FW_VRAM_VF2PF_READ(adev, driver_version, adev 371 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c AMDGPU_FW_VRAM_VF2PF_WRITE(adev, driver_cert, adev 373 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c AMDGPU_FW_VRAM_VF2PF_WRITE(adev, checksum, adev 375 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.fw_reserve.p_vf2pf, adev 377 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.fw_reserve.checksum_key, 0)); adev 400 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c uint32_t amdgpu_virt_get_sclk(struct amdgpu_device *adev, bool lowest) adev 409 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.ops->get_pp_clk(adev, PP_SCLK, buf); adev 417 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c uint32_t amdgpu_virt_get_mclk(struct amdgpu_device *adev, bool lowest) adev 426 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c adev->virt.ops->get_pp_clk(adev, PP_MCLK, buf); adev 55 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h int (*req_full_gpu)(struct amdgpu_device *adev, bool init); adev 56 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h int (*rel_full_gpu)(struct amdgpu_device *adev, bool init); adev 57 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h int (*reset_gpu)(struct amdgpu_device *adev); adev 58 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h int (*wait_reset)(struct amdgpu_device *adev); adev 59 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h void (*trans_msg)(struct amdgpu_device *adev, u32 req, u32 data1, u32 data2, u32 data3); adev 60 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h int (*get_pp_clk)(struct amdgpu_device *adev, u32 type, char *buf); adev 61 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h int (*force_dpm_level)(struct amdgpu_device *adev, u32 level); adev 223 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h #define AMDGPU_FW_VRAM_VF2PF_WRITE(adev, field, val) \ adev 225 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h ((amdgim_vf2pf_info *)adev->virt.fw_reserve.p_vf2pf)->field = (val); \ adev 228 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h #define AMDGPU_FW_VRAM_VF2PF_READ(adev, field, val) \ adev 230 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h (*val) = ((amdgim_vf2pf_info *)adev->virt.fw_reserve.p_vf2pf)->field; \ adev 233 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h #define AMDGPU_FW_VRAM_PF2VF_READ(adev, field, val) \ adev 235 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h if (!adev->virt.fw_reserve.p_pf2vf) \ adev 238 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h if (adev->virt.fw_reserve.p_pf2vf->version == 1) \ adev 239 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h *(val) = ((struct amdgim_pf2vf_info_v1 *)adev->virt.fw_reserve.p_pf2vf)->field; \ adev 240 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h if (adev->virt.fw_reserve.p_pf2vf->version == 2) \ adev 241 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h *(val) = ((struct amdgim_pf2vf_info_v2 *)adev->virt.fw_reserve.p_pf2vf)->field; \ adev 265 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h #define amdgpu_sriov_enabled(adev) \ adev 266 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h ((adev)->virt.caps & AMDGPU_SRIOV_CAPS_ENABLE_IOV) adev 268 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h #define amdgpu_sriov_vf(adev) \ adev 269 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h ((adev)->virt.caps & AMDGPU_SRIOV_CAPS_IS_VF) adev 271 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h #define amdgpu_sriov_bios(adev) \ adev 272 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h ((adev)->virt.caps & AMDGPU_SRIOV_CAPS_SRIOV_VBIOS) adev 274 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h #define amdgpu_sriov_runtime(adev) \ adev 275 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h ((adev)->virt.caps & AMDGPU_SRIOV_CAPS_RUNTIME) adev 277 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h #define amdgpu_passthrough(adev) \ adev 278 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h ((adev)->virt.caps & AMDGPU_PASSTHROUGH_MODE) adev 289 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h #define amdgim_is_hwperf(adev) \ adev 290 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h ((adev)->virt.gim_feature & AMDGIM_FEATURE_HW_PERF_SIMULATION) adev 292 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev); adev 293 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h void amdgpu_virt_init_setting(struct amdgpu_device *adev); adev 294 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg); adev 295 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v); adev 296 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h void amdgpu_virt_kiq_reg_write_reg_wait(struct amdgpu_device *adev, adev 299 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h int amdgpu_virt_request_full_gpu(struct amdgpu_device *adev, bool init); adev 300 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h int amdgpu_virt_release_full_gpu(struct amdgpu_device *adev, bool init); adev 301 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h int amdgpu_virt_reset_gpu(struct amdgpu_device *adev); adev 302 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h int amdgpu_virt_wait_reset(struct amdgpu_device *adev); adev 303 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h int amdgpu_virt_alloc_mm_table(struct amdgpu_device *adev); adev 304 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h void amdgpu_virt_free_mm_table(struct amdgpu_device *adev); adev 308 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h void amdgpu_virt_init_data_exchange(struct amdgpu_device *adev); adev 309 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h uint32_t amdgpu_virt_get_sclk(struct amdgpu_device *adev, bool lowest); adev 310 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h uint32_t amdgpu_virt_get_mclk(struct amdgpu_device *adev, bool lowest); adev 77 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c struct amdgpu_device *adev; adev 94 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static unsigned amdgpu_vm_level_shift(struct amdgpu_device *adev, adev 104 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.block_size; adev 110 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c dev_err(adev->dev, "the level%d isn't supported.\n", level); adev 125 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static unsigned amdgpu_vm_num_entries(struct amdgpu_device *adev, adev 128 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c unsigned shift = amdgpu_vm_level_shift(adev, adev 129 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.root_level); adev 131 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (level == adev->vm_manager.root_level) adev 133 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c return round_up(adev->vm_manager.max_pfn, 1ULL << shift) >> shift; adev 139 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c return AMDGPU_VM_PTE_COUNT(adev); adev 150 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static unsigned amdgpu_vm_num_ats_entries(struct amdgpu_device *adev) adev 154 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c shift = amdgpu_vm_level_shift(adev, adev->vm_manager.root_level); adev 167 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static uint32_t amdgpu_vm_entries_mask(struct amdgpu_device *adev, adev 170 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (level <= adev->vm_manager.root_level) adev 175 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c return AMDGPU_VM_PTE_COUNT(adev) - 1; adev 187 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static unsigned amdgpu_vm_bo_size(struct amdgpu_device *adev, unsigned level) adev 189 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c return AMDGPU_GPU_PAGE_ALIGN(amdgpu_vm_num_entries(adev, level) * 8); adev 364 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static void amdgpu_vm_pt_start(struct amdgpu_device *adev, adev 371 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c cursor->level = adev->vm_manager.root_level; adev 384 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static bool amdgpu_vm_pt_descendant(struct amdgpu_device *adev, adev 393 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c mask = amdgpu_vm_entries_mask(adev, cursor->level); adev 394 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c shift = amdgpu_vm_level_shift(adev, cursor->level); adev 413 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static bool amdgpu_vm_pt_sibling(struct amdgpu_device *adev, adev 423 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c shift = amdgpu_vm_level_shift(adev, cursor->level - 1); adev 424 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c num_entries = amdgpu_vm_num_entries(adev, cursor->level - 1); adev 463 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static void amdgpu_vm_pt_next(struct amdgpu_device *adev, adev 467 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (amdgpu_vm_pt_descendant(adev, cursor)) adev 471 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c while (!amdgpu_vm_pt_sibling(adev, cursor)) { adev 489 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static void amdgpu_vm_pt_first_dfs(struct amdgpu_device *adev, adev 497 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_pt_start(adev, vm, 0, cursor); adev 498 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c while (amdgpu_vm_pt_descendant(adev, cursor)); adev 524 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static void amdgpu_vm_pt_next_dfs(struct amdgpu_device *adev, adev 532 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c else if (amdgpu_vm_pt_sibling(adev, cursor)) adev 533 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c while (amdgpu_vm_pt_descendant(adev, cursor)); adev 541 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c #define for_each_amdgpu_vm_pt_dfs_safe(adev, vm, start, cursor, entry) \ adev 542 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c for (amdgpu_vm_pt_first_dfs((adev), (vm), (start), &(cursor)), \ adev 543 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c (entry) = (cursor).entry, amdgpu_vm_pt_next_dfs((adev), &(cursor));\ adev 545 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c (entry) = (cursor).entry, amdgpu_vm_pt_next_dfs((adev), &(cursor))) adev 600 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, adev 603 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c struct ttm_bo_global *glob = adev->mman.bdev.glob; adev 645 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm, adev 702 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static int amdgpu_vm_clear_bo(struct amdgpu_device *adev, adev 707 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c unsigned level = adev->vm_manager.root_level; adev 728 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ats_entries = amdgpu_vm_num_ats_entries(adev); adev 736 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ats_entries = amdgpu_vm_num_ats_entries(adev); adev 761 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c params.adev = adev; adev 776 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_gmc_get_vm_pde(adev, level, &value, &flags); adev 790 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (adev->asic_type >= CHIP_VEGA10) { adev 794 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_gmc_get_vm_pde(adev, level, adev 818 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static void amdgpu_vm_bo_param(struct amdgpu_device *adev, struct amdgpu_vm *vm, adev 823 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c bp->size = amdgpu_vm_bo_size(adev, level); adev 826 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c bp->domain = amdgpu_bo_get_preferred_pin_domain(adev, bp->domain); adev 851 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev, adev 863 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c num_entries = amdgpu_vm_num_entries(adev, cursor->level); adev 874 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_bo_param(adev, vm, cursor->level, &bp); adev 876 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = amdgpu_bo_create(adev, &bp, &pt); adev 886 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = amdgpu_vm_clear_bo(adev, vm, pt); adev 924 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static void amdgpu_vm_free_pts(struct amdgpu_device *adev, adev 933 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c for_each_amdgpu_vm_pt_dfs_safe(adev, vm, start, cursor, entry) adev 945 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c void amdgpu_vm_check_compute_bug(struct amdgpu_device *adev) adev 954 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ip_block = amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_GFX); adev 961 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (adev->gfx.mec_fw_version < 673) adev 965 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c for (i = 0; i < adev->num_rings; i++) { adev 966 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ring = adev->rings[i]; adev 987 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c struct amdgpu_device *adev = ring->adev; adev 989 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; adev 1005 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (amdgpu_vmid_had_gpu_reset(adev, id)) adev 1025 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c struct amdgpu_device *adev = ring->adev; adev 1027 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; adev 1042 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (amdgpu_vmid_had_gpu_reset(adev, id)) { adev 1057 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c pasid_mapping_needed &= adev->gmc.gmc_funcs->emit_pasid_mapping && adev 1088 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c atomic_read(&adev->gpu_reset_counter); adev 1202 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c level += params->adev->vm_manager.root_level; adev 1216 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static void amdgpu_vm_invalidate_pds(struct amdgpu_device *adev, adev 1222 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c for_each_amdgpu_vm_pt_dfs_safe(adev, vm, NULL, cursor, entry) adev 1238 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c int amdgpu_vm_update_directories(struct amdgpu_device *adev, adev 1248 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c params.adev = adev; adev 1273 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_invalidate_pds(adev, vm); adev 1291 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_gmc_get_vm_pde(params->adev, level, &addr, &flags); adev 1293 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c } else if (params->adev->asic_type >= CHIP_VEGA10 && adev 1344 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (params->adev->asic_type < CHIP_VEGA10) adev 1345 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c max_frag = params->adev->vm_manager.fragment_size; adev 1384 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c struct amdgpu_device *adev = params->adev; adev 1394 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_pt_start(adev, params->vm, start, &cursor); adev 1400 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = amdgpu_vm_alloc_pts(params->adev, params->vm, &cursor); adev 1407 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (cursor.level == adev->vm_manager.root_level) { adev 1408 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (!amdgpu_vm_pt_descendant(adev, &cursor)) adev 1413 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c shift = amdgpu_vm_level_shift(adev, cursor.level); adev 1414 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c parent_shift = amdgpu_vm_level_shift(adev, cursor.level - 1); adev 1415 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (adev->asic_type < CHIP_VEGA10 && adev 1419 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (!amdgpu_vm_pt_descendant(adev, &cursor)) adev 1428 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (!amdgpu_vm_pt_descendant(adev, &cursor)) adev 1432 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c cursor.level - 1 != adev->vm_manager.root_level) { adev 1444 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c mask = amdgpu_vm_entries_mask(adev, cursor.level); adev 1471 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (amdgpu_vm_pt_descendant(adev, &cursor)) { adev 1474 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_free_pts(adev, params->vm, &cursor); adev 1475 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_pt_next(adev, &cursor); adev 1480 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_pt_next(adev, &cursor); adev 1505 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, adev 1518 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c params.adev = adev; adev 1556 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev, adev 1566 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c unsigned min_linear_pages = 1 << adev->vm_manager.fragment_size; adev 1581 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (adev->asic_type >= CHIP_NAVI10) { adev 1590 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c (adev->asic_type >= CHIP_VEGA10)) { adev 1592 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (adev->asic_type >= CHIP_NAVI10) { adev 1651 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = amdgpu_vm_bo_update_mapping(adev, exclusive, dma_addr, vm, adev 1681 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c int amdgpu_vm_bo_update(struct amdgpu_device *adev, adev 1693 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c struct amdgpu_device *bo_adev = adev; adev 1713 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c flags = amdgpu_ttm_tt_pte_flags(adev, bo->tbo.ttm, mem); adev 1733 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = amdgpu_vm_bo_split_mapping(adev, exclusive, pages_addr, vm, adev 1743 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_asic_flush_hdp(adev, NULL); adev 1777 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static void amdgpu_vm_update_prt_state(struct amdgpu_device *adev) adev 1782 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_lock_irqsave(&adev->vm_manager.prt_lock, flags); adev 1783 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c enable = !!atomic_read(&adev->vm_manager.num_prt_users); adev 1784 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->gmc.gmc_funcs->set_prt(adev, enable); adev 1785 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_unlock_irqrestore(&adev->vm_manager.prt_lock, flags); adev 1793 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static void amdgpu_vm_prt_get(struct amdgpu_device *adev) adev 1795 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (!adev->gmc.gmc_funcs->set_prt) adev 1798 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (atomic_inc_return(&adev->vm_manager.num_prt_users) == 1) adev 1799 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_update_prt_state(adev); adev 1807 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static void amdgpu_vm_prt_put(struct amdgpu_device *adev) adev 1809 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (atomic_dec_return(&adev->vm_manager.num_prt_users) == 0) adev 1810 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_update_prt_state(adev); adev 1823 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_prt_put(cb->adev); adev 1833 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static void amdgpu_vm_add_prt_cb(struct amdgpu_device *adev, adev 1838 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (!adev->gmc.gmc_funcs->set_prt) adev 1847 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_prt_put(adev); adev 1849 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c cb->adev = adev; adev 1866 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static void amdgpu_vm_free_mapping(struct amdgpu_device *adev, adev 1872 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_add_prt_cb(adev, fence); adev 1884 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static void amdgpu_vm_prt_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm) adev 1903 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_prt_get(adev); adev 1904 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_add_prt_cb(adev, excl); adev 1907 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_prt_get(adev); adev 1908 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_add_prt_cb(adev, shared[i]); adev 1929 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c int amdgpu_vm_clear_freed(struct amdgpu_device *adev, adev 1947 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = amdgpu_vm_bo_update_mapping(adev, NULL, NULL, vm, adev 1950 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_free_mapping(adev, vm, mapping, f); adev 1981 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c int amdgpu_vm_handle_moved(struct amdgpu_device *adev, adev 1991 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = amdgpu_vm_bo_update(adev, bo_va, false); adev 2010 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = amdgpu_vm_bo_update(adev, bo_va, clear); adev 2038 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c struct amdgpu_bo_va *amdgpu_vm_bo_add(struct amdgpu_device *adev, adev 2054 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (bo && amdgpu_xgmi_same_hive(adev, amdgpu_ttm_adev(bo->tbo.bdev)) && adev 2057 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c mutex_lock(&adev->vm_manager.lock_pstate); adev 2059 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (++adev->vm_manager.xgmi_map_counter == 1) adev 2060 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_xgmi_set_pstate(adev, 1); adev 2061 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c mutex_unlock(&adev->vm_manager.lock_pstate); adev 2077 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static void amdgpu_vm_bo_insert_map(struct amdgpu_device *adev, adev 2089 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_prt_get(adev); adev 2115 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c int amdgpu_vm_bo_map(struct amdgpu_device *adev, adev 2142 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c dev_err(adev->dev, "bo %p va 0x%010Lx-0x%010Lx conflict with " adev 2157 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_bo_insert_map(adev, bo_va, mapping); adev 2180 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c int amdgpu_vm_bo_replace_map(struct amdgpu_device *adev, adev 2206 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = amdgpu_vm_bo_clear_mappings(adev, bo_va->base.vm, saddr, size); adev 2220 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_bo_insert_map(adev, bo_va, mapping); adev 2239 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c int amdgpu_vm_bo_unmap(struct amdgpu_device *adev, adev 2274 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_free_mapping(adev, vm, mapping, adev 2293 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c int amdgpu_vm_bo_clear_mappings(struct amdgpu_device *adev, adev 2367 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_prt_get(adev); adev 2376 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_prt_get(adev); adev 2442 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c void amdgpu_vm_bo_rmv(struct amdgpu_device *adev, adev 2478 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_free_mapping(adev, vm, mapping, adev 2485 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c mutex_lock(&adev->vm_manager.lock_pstate); adev 2486 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (--adev->vm_manager.xgmi_map_counter == 0) adev 2487 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_xgmi_set_pstate(adev, 0); adev 2488 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c mutex_unlock(&adev->vm_manager.lock_pstate); adev 2503 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev, adev 2564 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t min_vm_size, adev 2576 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c dev_warn(adev->dev, "VM size (%d) too large, max is %u GB\n", adev 2606 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.max_pfn = (uint64_t)vm_size << 18; adev 2608 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c tmp = roundup_pow_of_two(adev->vm_manager.max_pfn); adev 2612 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.num_level = min(max_level, (unsigned)tmp); adev 2613 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c switch (adev->vm_manager.num_level) { adev 2615 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.root_level = AMDGPU_VM_PDB2; adev 2618 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.root_level = AMDGPU_VM_PDB1; adev 2621 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.root_level = AMDGPU_VM_PDB0; adev 2624 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c dev_err(adev->dev, "VMPT only supports 2~4+1 levels\n"); adev 2628 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.block_size = adev 2631 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c - 9 * adev->vm_manager.num_level); adev 2632 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c else if (adev->vm_manager.num_level > 1) adev 2633 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.block_size = 9; adev 2635 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.block_size = amdgpu_vm_get_block_size(tmp); adev 2638 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.fragment_size = fragment_size_default; adev 2640 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.fragment_size = amdgpu_vm_fragment_size; adev 2643 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c vm_size, adev->vm_manager.num_level + 1, adev 2644 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.block_size, adev 2645 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.fragment_size); adev 2673 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, adev 2692 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = drm_sched_entity_init(&vm->entity, adev->vm_manager.vm_pte_rqs, adev 2693 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.vm_pte_num_rqs, NULL); adev 2700 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode & adev 2703 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (adev->asic_type == CHIP_RAVEN) adev 2706 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode & adev 2711 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c WARN_ONCE((vm->use_cpu_for_update && !amdgpu_gmc_vram_full_visible(&adev->gmc)), adev 2720 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_bo_param(adev, vm, adev->vm_manager.root_level, &bp); adev 2723 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = amdgpu_bo_create(adev, &bp, &root); adev 2737 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = amdgpu_vm_clear_bo(adev, vm, root); adev 2746 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags); adev 2747 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = idr_alloc(&adev->vm_manager.pasid_idr, vm, pasid, pasid + 1, adev 2749 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags); adev 2787 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c static int amdgpu_vm_check_clean_reserved(struct amdgpu_device *adev, adev 2790 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c enum amdgpu_vm_level root = adev->vm_manager.root_level; adev 2791 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c unsigned int entries = amdgpu_vm_num_entries(adev, root); adev 2825 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm, unsigned int pasid) adev 2827 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c bool pte_support_ats = (adev->asic_type == CHIP_RAVEN); adev 2835 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = amdgpu_vm_check_clean_reserved(adev, vm); adev 2842 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags); adev 2843 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = idr_alloc(&adev->vm_manager.pasid_idr, vm, pasid, pasid + 1, adev 2845 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags); adev 2857 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = amdgpu_vm_clear_bo(adev, vm, vm->root.base.bo); adev 2863 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode & adev 2867 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c WARN_ONCE((vm->use_cpu_for_update && !amdgpu_gmc_vram_full_visible(&adev->gmc)), adev 2880 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags); adev 2881 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c idr_remove(&adev->vm_manager.pasid_idr, vm->pasid); adev 2882 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags); adev 2903 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags); adev 2904 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c idr_remove(&adev->vm_manager.pasid_idr, pasid); adev 2905 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags); adev 2920 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c void amdgpu_vm_release_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm) adev 2925 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags); adev 2926 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c idr_remove(&adev->vm_manager.pasid_idr, vm->pasid); adev 2927 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags); adev 2941 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm) adev 2944 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c bool prt_fini_needed = !!adev->gmc.gmc_funcs->set_prt; adev 2948 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_amdkfd_gpuvm_destroy_cb(adev, vm); adev 2953 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags); adev 2954 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c idr_remove(&adev->vm_manager.pasid_idr, vm->pasid); adev 2955 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags); adev 2961 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c dev_err(adev->dev, "still active bo inside vm\n"); adev 2973 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_prt_fini(adev, vm); adev 2978 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_free_mapping(adev, vm, mapping, NULL); adev 2984 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c dev_err(adev->dev, "Leaking page tables because BO reservation failed\n"); adev 2986 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vm_free_pts(adev, vm, NULL); adev 2993 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vmid_free_reserved(adev, vm, i); adev 3003 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c void amdgpu_vm_manager_init(struct amdgpu_device *adev) adev 3007 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vmid_mgr_init(adev); adev 3009 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.fence_context = adev 3012 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.seqno[i] = 0; adev 3014 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_lock_init(&adev->vm_manager.prt_lock); adev 3015 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c atomic_set(&adev->vm_manager.num_prt_users, 0); adev 3022 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c if (amdgpu_gmc_vram_full_visible(&adev->gmc)) adev 3023 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.vm_update_mode = adev 3026 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.vm_update_mode = 0; adev 3028 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.vm_update_mode = amdgpu_vm_update_mode; adev 3030 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.vm_update_mode = 0; adev 3033 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c idr_init(&adev->vm_manager.pasid_idr); adev 3034 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_lock_init(&adev->vm_manager.pasid_lock); adev 3036 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.xgmi_map_counter = 0; adev 3037 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c mutex_init(&adev->vm_manager.lock_pstate); adev 3047 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c void amdgpu_vm_manager_fini(struct amdgpu_device *adev) adev 3049 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c WARN_ON(!idr_is_empty(&adev->vm_manager.pasid_idr)); adev 3050 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c idr_destroy(&adev->vm_manager.pasid_idr); adev 3052 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vmid_mgr_fini(adev); adev 3068 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c struct amdgpu_device *adev = dev->dev_private; adev 3075 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c r = amdgpu_vmid_alloc_reserved(adev, &fpriv->vm, AMDGPU_GFXHUB_0); adev 3080 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c amdgpu_vmid_free_reserved(adev, &fpriv->vm, AMDGPU_GFXHUB_0); adev 3096 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c void amdgpu_vm_get_task_info(struct amdgpu_device *adev, unsigned int pasid, adev 3102 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags); adev 3104 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c vm = idr_find(&adev->vm_manager.pasid_idr, pasid); adev 3108 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags); adev 50 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h #define AMDGPU_VM_PTE_COUNT(adev) (1 << (adev)->vm_manager.block_size) adev 194 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h struct amdgpu_device *adev; adev 336 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h #define amdgpu_vm_copy_pte(adev, ib, pe, src, count) ((adev)->vm_manager.vm_pte_funcs->copy_pte((ib), (pe), (src), (count))) adev 337 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h #define amdgpu_vm_write_pte(adev, ib, pe, value, count, incr) ((adev)->vm_manager.vm_pte_funcs->write_pte((ib), (pe), (value), (count), (incr))) adev 338 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h #define amdgpu_vm_set_pte_pde(adev, ib, pe, addr, count, incr, flags) ((adev)->vm_manager.vm_pte_funcs->set_pte_pde((ib), (pe), (addr), (count), (incr), (flags))) adev 343 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h void amdgpu_vm_manager_init(struct amdgpu_device *adev); adev 344 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h void amdgpu_vm_manager_fini(struct amdgpu_device *adev); adev 347 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, adev 349 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm, unsigned int pasid); adev 350 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h void amdgpu_vm_release_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm); adev 351 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm); adev 356 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm, adev 360 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h int amdgpu_vm_update_directories(struct amdgpu_device *adev, adev 362 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h int amdgpu_vm_clear_freed(struct amdgpu_device *adev, adev 365 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h int amdgpu_vm_handle_moved(struct amdgpu_device *adev, adev 367 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h int amdgpu_vm_bo_update(struct amdgpu_device *adev, adev 370 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev, adev 375 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h struct amdgpu_bo_va *amdgpu_vm_bo_add(struct amdgpu_device *adev, adev 378 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h int amdgpu_vm_bo_map(struct amdgpu_device *adev, adev 382 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h int amdgpu_vm_bo_replace_map(struct amdgpu_device *adev, adev 386 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h int amdgpu_vm_bo_unmap(struct amdgpu_device *adev, adev 389 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h int amdgpu_vm_bo_clear_mappings(struct amdgpu_device *adev, adev 395 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h void amdgpu_vm_bo_rmv(struct amdgpu_device *adev, adev 397 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t min_vm_size, adev 403 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h void amdgpu_vm_check_compute_bug(struct amdgpu_device *adev); adev 405 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h void amdgpu_vm_get_task_info(struct amdgpu_device *adev, unsigned int pasid, adev 410 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, adev 98 drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c amdgpu_gmc_set_pte_pde(p->adev, (void *)(uintptr_t)pe, adev 118 drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c amdgpu_asic_flush_hdp(p->adev, NULL); adev 67 drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c r = amdgpu_job_alloc_with_ib(p->adev, ndw * 4, &p->job); adev 71 drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c r = amdgpu_sync_fence(p->adev, &p->job->sync, exclusive, false); adev 75 drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c r = amdgpu_sync_resv(p->adev, &p->job->sync, root->tbo.base.resv, adev 146 drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c amdgpu_vm_copy_pte(p->adev, ib, pe, src, count); adev 173 drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c amdgpu_vm_write_pte(p->adev, ib, pe, addr | flags, adev 176 drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c amdgpu_vm_set_pte_pde(p->adev, ib, pe, addr, adev 220 drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c r = amdgpu_job_alloc_with_ib(p->adev, ndw * 4, &p->job); adev 238 drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c ndw -= p->adev->vm_manager.vm_pte_funcs->copy_pte_num_dw * adev 46 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c struct amdgpu_device *adev = ddev->dev_private; adev 48 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c return snprintf(buf, PAGE_SIZE, "%llu\n", adev->gmc.real_vram_size); adev 63 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c struct amdgpu_device *adev = ddev->dev_private; adev 65 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c return snprintf(buf, PAGE_SIZE, "%llu\n", adev->gmc.visible_vram_size); adev 80 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c struct amdgpu_device *adev = ddev->dev_private; adev 83 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c amdgpu_vram_mgr_usage(&adev->mman.bdev.man[TTM_PL_VRAM])); adev 98 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c struct amdgpu_device *adev = ddev->dev_private; adev 101 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c amdgpu_vram_mgr_vis_usage(&adev->mman.bdev.man[TTM_PL_VRAM])); adev 124 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev); adev 137 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c ret = device_create_file(adev->dev, &dev_attr_mem_info_vram_total); adev 142 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c ret = device_create_file(adev->dev, &dev_attr_mem_info_vis_vram_total); adev 147 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c ret = device_create_file(adev->dev, &dev_attr_mem_info_vram_used); adev 152 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c ret = device_create_file(adev->dev, &dev_attr_mem_info_vis_vram_used); adev 171 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev); adev 179 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c device_remove_file(adev->dev, &dev_attr_mem_info_vram_total); adev 180 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c device_remove_file(adev->dev, &dev_attr_mem_info_vis_vram_total); adev 181 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c device_remove_file(adev->dev, &dev_attr_mem_info_vram_used); adev 182 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c device_remove_file(adev->dev, &dev_attr_mem_info_vis_vram_used); adev 194 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev, adev 200 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c if (start >= adev->gmc.visible_vram_size) adev 203 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c return (end > adev->gmc.visible_vram_size ? adev 204 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c adev->gmc.visible_vram_size : end) - start; adev 217 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); adev 223 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c if (amdgpu_gmc_vram_full_visible(&adev->gmc)) adev 226 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c if (mem->start >= adev->gmc.visible_vram_size >> PAGE_SHIFT) adev 230 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c usage += amdgpu_vram_mgr_vis_size(adev, nodes); adev 272 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev); adev 288 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c if (atomic64_add_return(mem_bytes, &mgr->usage) > adev->gmc.mc_vram_size) { adev 333 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c vis_usage += amdgpu_vram_mgr_vis_size(adev, &nodes[i]); adev 352 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c vis_usage += amdgpu_vram_mgr_vis_size(adev, &nodes[i]); adev 387 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev); adev 401 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c vis_usage += amdgpu_vram_mgr_vis_size(adev, nodes); adev 80 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c static int amdgpu_xgmi_sysfs_create(struct amdgpu_device *adev, adev 88 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c hive->kobj = kobject_create_and_add("xgmi_hive_info", &adev->dev->kobj); adev 90 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c dev_err(adev->dev, "XGMI: Failed to allocate sysfs entry!\n"); adev 105 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c dev_err(adev->dev, "XGMI: Failed to create device file xgmi_hive_id\n"); adev 114 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c static void amdgpu_xgmi_sysfs_destroy(struct amdgpu_device *adev, adev 128 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c struct amdgpu_device *adev = ddev->dev_private; adev 130 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c return snprintf(buf, PAGE_SIZE, "%llu\n", adev->gmc.xgmi.node_id); adev 140 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c struct amdgpu_device *adev = ddev->dev_private; adev 148 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c fica_out = adev->df_funcs->get_fica(adev, ficaa_pie_ctl_in); adev 152 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c fica_out = adev->df_funcs->get_fica(adev, ficaa_pie_status_in); adev 157 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c adev->df_funcs->set_fica(adev, ficaa_pie_status_in, 0, 0); adev 166 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c static int amdgpu_xgmi_sysfs_add_dev_info(struct amdgpu_device *adev, adev 173 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c ret = device_create_file(adev->dev, &dev_attr_xgmi_device_id); adev 175 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c dev_err(adev->dev, "XGMI: Failed to create device file xgmi_device_id\n"); adev 180 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c ret = device_create_file(adev->dev, &dev_attr_xgmi_error); adev 186 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c if (adev != hive->adev) { adev 187 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c ret = sysfs_create_link(&adev->dev->kobj, hive->kobj, adev 190 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c dev_err(adev->dev, "XGMI: Failed to create link to hive info"); adev 197 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c ret = sysfs_create_link(hive->kobj, &adev->dev->kobj, node); adev 199 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c dev_err(adev->dev, "XGMI: Failed to create link from hive info"); adev 207 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c sysfs_remove_link(&adev->dev->kobj, adev->ddev->unique); adev 210 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c device_remove_file(adev->dev, &dev_attr_xgmi_device_id); adev 216 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c static void amdgpu_xgmi_sysfs_rem_dev_info(struct amdgpu_device *adev, adev 219 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c device_remove_file(adev->dev, &dev_attr_xgmi_device_id); adev 220 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c sysfs_remove_link(&adev->dev->kobj, adev->ddev->unique); adev 221 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c sysfs_remove_link(hive->kobj, adev->ddev->unique); adev 226 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev, int lock) adev 231 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c if (!adev->gmc.xgmi.hive_id) adev 238 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c if (tmp->hive_id == adev->gmc.xgmi.hive_id) { adev 253 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c if (amdgpu_xgmi_sysfs_create(adev, tmp)) { adev 258 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c tmp->adev = adev; adev 259 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c tmp->hive_id = adev->gmc.xgmi.hive_id; adev 272 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate) adev 275 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev, 0); adev 283 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c dev_dbg(adev->dev, "Set xgmi pstate %d.\n", pstate); adev 285 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c if (is_support_sw_smu_xgmi(adev)) adev 286 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c ret = smu_set_xgmi_pstate(&adev->smu, pstate); adev 288 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c dev_err(adev->dev, adev 290 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c adev->gmc.xgmi.node_id, adev 291 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c adev->gmc.xgmi.hive_id, ret); adev 296 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c int amdgpu_xgmi_update_topology(struct amdgpu_hive_info *hive, struct amdgpu_device *adev) adev 301 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c ret = psp_xgmi_set_topology_info(&adev->psp, adev 303 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c &adev->psp.xgmi_context.top_info); adev 305 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c dev_err(adev->dev, adev 307 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c adev->gmc.xgmi.node_id, adev 308 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c adev->gmc.xgmi.hive_id, ret); adev 314 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c int amdgpu_xgmi_get_hops_count(struct amdgpu_device *adev, adev 317 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c struct psp_xgmi_topology_info *top = &adev->psp.xgmi_context.top_info; adev 326 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c int amdgpu_xgmi_add_device(struct amdgpu_device *adev) adev 335 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c if (!adev->gmc.xgmi.supported) adev 338 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_PSP)) { adev 339 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c ret = psp_xgmi_get_hive_id(&adev->psp, &adev->gmc.xgmi.hive_id); adev 341 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c dev_err(adev->dev, adev 346 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c ret = psp_xgmi_get_node_id(&adev->psp, &adev->gmc.xgmi.node_id); adev 348 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c dev_err(adev->dev, adev 353 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c adev->gmc.xgmi.hive_id = 16; adev 354 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c adev->gmc.xgmi.node_id = adev->gmc.xgmi.physical_node_id + 16; adev 357 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c hive = amdgpu_get_xgmi_hive(adev, 1); adev 360 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c dev_err(adev->dev, adev 362 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c adev->gmc.xgmi.node_id, adev->gmc.xgmi.hive_id); adev 366 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c top_info = &adev->psp.xgmi_context.top_info; adev 368 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c list_add_tail(&adev->gmc.xgmi.head, &hive->device_list); adev 374 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_PSP)) { adev 377 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c if (tmp_adev != adev) { adev 380 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c adev->gmc.xgmi.node_id; adev 404 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c ret = amdgpu_xgmi_sysfs_add_dev_info(adev, hive); adev 410 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c dev_info(adev->dev, "XGMI: Add node %d, hive 0x%llx.\n", adev 411 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c adev->gmc.xgmi.physical_node_id, adev->gmc.xgmi.hive_id); adev 413 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c dev_err(adev->dev, "XGMI: Failed to add node %d, hive 0x%llx ret: %d\n", adev 414 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c adev->gmc.xgmi.physical_node_id, adev->gmc.xgmi.hive_id, adev 420 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c void amdgpu_xgmi_remove_device(struct amdgpu_device *adev) adev 424 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c if (!adev->gmc.xgmi.supported) adev 427 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c hive = amdgpu_get_xgmi_hive(adev, 1); adev 432 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c amdgpu_xgmi_sysfs_destroy(adev, hive); adev 436 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c amdgpu_xgmi_sysfs_rem_dev_info(adev, hive); adev 34 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h struct amdgpu_device *adev; adev 38 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev, int lock); adev 39 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h int amdgpu_xgmi_update_topology(struct amdgpu_hive_info *hive, struct amdgpu_device *adev); adev 40 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h int amdgpu_xgmi_add_device(struct amdgpu_device *adev); adev 41 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h void amdgpu_xgmi_remove_device(struct amdgpu_device *adev); adev 42 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate); adev 43 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h int amdgpu_xgmi_get_hops_count(struct amdgpu_device *adev, adev 46 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h static inline bool amdgpu_xgmi_same_hive(struct amdgpu_device *adev, adev 49 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h return (adev != bo_adev && adev 50 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h adev->gmc.xgmi.hive_id && adev 51 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h adev->gmc.xgmi.hive_id == bo_adev->gmc.xgmi.hive_id); adev 30 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c int arct_reg_base_init(struct amdgpu_device *adev) adev 35 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); adev 36 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); adev 37 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); adev 38 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i])); adev 39 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIF0_BASE.instance[i])); adev 40 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); adev 41 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i])); adev 42 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i])); adev 43 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[DF_HWIP][i] = (uint32_t *)(&(DF_BASE.instance[i])); adev 44 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); adev 45 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i])); adev 46 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i])); adev 47 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[SDMA2_HWIP][i] = (uint32_t *)(&(SDMA2_BASE.instance[i])); adev 48 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[SDMA3_HWIP][i] = (uint32_t *)(&(SDMA3_BASE.instance[i])); adev 49 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[SDMA4_HWIP][i] = (uint32_t *)(&(SDMA4_BASE.instance[i])); adev 50 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[SDMA5_HWIP][i] = (uint32_t *)(&(SDMA5_BASE.instance[i])); adev 51 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[SDMA6_HWIP][i] = (uint32_t *)(&(SDMA6_BASE.instance[i])); adev 52 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[SDMA7_HWIP][i] = (uint32_t *)(&(SDMA7_BASE.instance[i])); adev 53 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); adev 54 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i])); adev 32 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c static void athub_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 39 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_MGCG)) adev 48 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c static void athub_update_medium_grain_light_sleep(struct amdgpu_device *adev, adev 55 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_LS) && adev 56 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c (adev->cg_flags & AMD_CG_SUPPORT_HDP_LS)) adev 65 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c int athub_v1_0_set_clockgating(struct amdgpu_device *adev, adev 68 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c if (amdgpu_sriov_vf(adev)) adev 71 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c switch (adev->asic_type) { adev 76 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c athub_update_medium_grain_clock_gating(adev, adev 78 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c athub_update_medium_grain_light_sleep(adev, adev 88 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c void athub_v1_0_get_clockgating(struct amdgpu_device *adev, u32 *flags) adev 92 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c if (amdgpu_sriov_vf(adev)) adev 26 drivers/gpu/drm/amd/amdgpu/athub_v1_0.h int athub_v1_0_set_clockgating(struct amdgpu_device *adev, adev 28 drivers/gpu/drm/amd/amdgpu/athub_v1_0.h void athub_v1_0_get_clockgating(struct amdgpu_device *adev, u32 *flags); adev 35 drivers/gpu/drm/amd/amdgpu/athub_v2_0.c athub_v2_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 42 drivers/gpu/drm/amd/amdgpu/athub_v2_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_MGCG)) adev 52 drivers/gpu/drm/amd/amdgpu/athub_v2_0.c athub_v2_0_update_medium_grain_light_sleep(struct amdgpu_device *adev, adev 59 drivers/gpu/drm/amd/amdgpu/athub_v2_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_LS) && adev 60 drivers/gpu/drm/amd/amdgpu/athub_v2_0.c (adev->cg_flags & AMD_CG_SUPPORT_HDP_LS)) adev 69 drivers/gpu/drm/amd/amdgpu/athub_v2_0.c int athub_v2_0_set_clockgating(struct amdgpu_device *adev, adev 72 drivers/gpu/drm/amd/amdgpu/athub_v2_0.c if (amdgpu_sriov_vf(adev)) adev 75 drivers/gpu/drm/amd/amdgpu/athub_v2_0.c switch (adev->asic_type) { adev 79 drivers/gpu/drm/amd/amdgpu/athub_v2_0.c athub_v2_0_update_medium_grain_clock_gating(adev, adev 81 drivers/gpu/drm/amd/amdgpu/athub_v2_0.c athub_v2_0_update_medium_grain_light_sleep(adev, adev 91 drivers/gpu/drm/amd/amdgpu/athub_v2_0.c void athub_v2_0_get_clockgating(struct amdgpu_device *adev, u32 *flags) adev 26 drivers/gpu/drm/amd/amdgpu/athub_v2_0.h int athub_v2_0_set_clockgating(struct amdgpu_device *adev, adev 28 drivers/gpu/drm/amd/amdgpu/athub_v2_0.h void athub_v2_0_get_clockgating(struct amdgpu_device *adev, u32 *flags); adev 44 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_device *adev = dev->dev_private; adev 81 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 87 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_device *adev = dev->dev_private; adev 110 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 117 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_device *adev = dev->dev_private; adev 127 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 134 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_device *adev = dev->dev_private; adev 143 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 150 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_device *adev = dev->dev_private; adev 159 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 166 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_device *adev = dev->dev_private; adev 175 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 178 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c void amdgpu_atombios_crtc_powergate_init(struct amdgpu_device *adev) adev 187 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 195 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_device *adev = dev->dev_private; adev 232 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 241 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c static void amdgpu_atombios_crtc_program_ss(struct amdgpu_device *adev, adev 262 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 263 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c if (adev->mode_info.crtcs[i] && adev 264 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c adev->mode_info.crtcs[i]->enabled && adev 266 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c pll_id == adev->mode_info.crtcs[i]->pll_id) { adev 297 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 310 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_device *adev = dev->dev_private; adev 380 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, adev 398 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 431 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 471 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev, adev 481 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, adev 501 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c if (adev->asic_type == CHIP_TAHITI || adev 502 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c adev->asic_type == CHIP_PITCAIRN || adev 503 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c adev->asic_type == CHIP_VERDE || adev 504 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c adev->asic_type == CHIP_OLAND) adev 518 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 526 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c u32 amdgpu_atombios_crtc_set_dce_clock(struct amdgpu_device *adev, adev 537 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, adev 548 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 591 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_device *adev = dev->dev_private; adev 598 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, adev 744 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 752 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_device *adev = dev->dev_private; adev 781 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atombios_get_asic_ss_info(adev, &amdgpu_crtc->ss, adev 787 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atombios_get_asic_ss_info(adev, adev 794 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atombios_get_asic_ss_info(adev, adev 801 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atombios_get_asic_ss_info(adev, adev 821 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c struct amdgpu_device *adev = dev->dev_private; adev 837 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c pll = &adev->clock.ppll[0]; adev 840 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c pll = &adev->clock.ppll[1]; adev 845 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c pll = &adev->clock.ppll[2]; adev 857 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atombios_crtc_program_ss(adev, ATOM_DISABLE, amdgpu_crtc->pll_id, adev 882 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c amdgpu_atombios_crtc_program_ss(adev, ATOM_ENABLE, amdgpu_crtc->pll_id, adev 35 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h void amdgpu_atombios_crtc_powergate_init(struct amdgpu_device *adev); adev 38 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev, adev 40 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h u32 amdgpu_atombios_crtc_set_dce_clock(struct amdgpu_device *adev, adev 63 drivers/gpu/drm/amd/amdgpu/atombios_dp.c struct amdgpu_device *adev = dev->dev_private; adev 74 drivers/gpu/drm/amd/amdgpu/atombios_dp.c base = (unsigned char *)(adev->mode_info.atom_context->scratch + 1); adev 85 drivers/gpu/drm/amd/amdgpu/atombios_dp.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 293 drivers/gpu/drm/amd/amdgpu/atombios_dp.c static u8 amdgpu_atombios_dp_encoder_service(struct amdgpu_device *adev, adev 307 drivers/gpu/drm/amd/amdgpu/atombios_dp.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 314 drivers/gpu/drm/amd/amdgpu/atombios_dp.c struct amdgpu_device *adev = dev->dev_private; adev 316 drivers/gpu/drm/amd/amdgpu/atombios_dp.c return amdgpu_atombios_dp_encoder_service(adev, ATOM_DP_ACTION_GET_SINK_TYPE, 0, adev 479 drivers/gpu/drm/amd/amdgpu/atombios_dp.c struct amdgpu_device *adev; adev 714 drivers/gpu/drm/amd/amdgpu/atombios_dp.c struct amdgpu_device *adev = dev->dev_private; adev 746 drivers/gpu/drm/amd/amdgpu/atombios_dp.c dp_info.adev = adev; adev 41 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c amdgpu_atombios_encoder_get_backlight_level_from_reg(struct amdgpu_device *adev) adev 55 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c amdgpu_atombios_encoder_set_backlight_level_to_reg(struct amdgpu_device *adev, adev 73 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 75 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (!(adev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU)) adev 78 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c return amdgpu_atombios_encoder_get_backlight_level_from_reg(adev); adev 87 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 90 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (!(adev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU)) adev 97 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c amdgpu_atombios_encoder_set_backlight_level_to_reg(adev, dig->backlight_level); adev 155 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 157 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c return amdgpu_atombios_encoder_get_backlight_level_from_reg(adev); adev 169 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 180 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if ((adev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE) && adev 181 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c (adev->pdev->device == 0x6741)) adev 187 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (!(adev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU)) adev 210 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c backlight_level = amdgpu_atombios_encoder_get_backlight_level_from_reg(adev); adev 232 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 239 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (!(adev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU)) adev 322 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 344 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 385 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 393 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, &crev)) adev 441 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 576 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 603 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, &crev)) adev 747 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 765 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 831 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, &crev)) adev 860 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if ((adev->flags & AMD_IS_APU) && adev 969 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (is_dp && adev->clock.dp_extclk) adev 1029 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (adev->clock.dp_extclk) adev 1096 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (is_dp && adev->clock.dp_extclk) adev 1172 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1181 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 1193 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, &crev)) adev 1200 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1207 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) adev 1228 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 1258 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, &crev)) adev 1324 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1469 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 1479 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, &crev)) adev 1669 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1674 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c amdgpu_atombios_encoder_init_dig(struct amdgpu_device *adev) adev 1676 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct drm_device *dev = adev->ddev; adev 1704 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 1717 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, &crev)) adev 1742 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 1754 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 1793 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 1851 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 2002 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_device *adev = dev->dev_private; adev 2003 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 2109 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c adev->mode_info.bios_hardcoded_edid = edid; adev 2110 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c adev->mode_info.bios_hardcoded_edid_size = edid_size; adev 28 drivers/gpu/drm/amd/amdgpu/atombios_encoders.h amdgpu_atombios_encoder_get_backlight_level_from_reg(struct amdgpu_device *adev); adev 30 drivers/gpu/drm/amd/amdgpu/atombios_encoders.h amdgpu_atombios_encoder_set_backlight_level_to_reg(struct amdgpu_device *adev, adev 60 drivers/gpu/drm/amd/amdgpu/atombios_encoders.h amdgpu_atombios_encoder_init_dig(struct amdgpu_device *adev); adev 43 drivers/gpu/drm/amd/amdgpu/atombios_i2c.c struct amdgpu_device *adev = dev->dev_private; adev 54 drivers/gpu/drm/amd/amdgpu/atombios_i2c.c base = (unsigned char *)adev->mode_info.atom_context->scratch; adev 94 drivers/gpu/drm/amd/amdgpu/atombios_i2c.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 167 drivers/gpu/drm/amd/amdgpu/atombios_i2c.c void amdgpu_atombios_i2c_channel_trans(struct amdgpu_device* adev, u8 slave_addr, u8 line_number, u8 offset, u8 data) adev 180 drivers/gpu/drm/amd/amdgpu/atombios_i2c.c amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); adev 30 drivers/gpu/drm/amd/amdgpu/atombios_i2c.h void amdgpu_atombios_i2c_channel_trans(struct amdgpu_device* adev, adev 76 drivers/gpu/drm/amd/amdgpu/cik.c static u32 cik_pcie_rreg(struct amdgpu_device *adev, u32 reg) adev 81 drivers/gpu/drm/amd/amdgpu/cik.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 85 drivers/gpu/drm/amd/amdgpu/cik.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 89 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 93 drivers/gpu/drm/amd/amdgpu/cik.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 98 drivers/gpu/drm/amd/amdgpu/cik.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 101 drivers/gpu/drm/amd/amdgpu/cik.c static u32 cik_smc_rreg(struct amdgpu_device *adev, u32 reg) adev 106 drivers/gpu/drm/amd/amdgpu/cik.c spin_lock_irqsave(&adev->smc_idx_lock, flags); adev 109 drivers/gpu/drm/amd/amdgpu/cik.c spin_unlock_irqrestore(&adev->smc_idx_lock, flags); adev 113 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 117 drivers/gpu/drm/amd/amdgpu/cik.c spin_lock_irqsave(&adev->smc_idx_lock, flags); adev 120 drivers/gpu/drm/amd/amdgpu/cik.c spin_unlock_irqrestore(&adev->smc_idx_lock, flags); adev 123 drivers/gpu/drm/amd/amdgpu/cik.c static u32 cik_uvd_ctx_rreg(struct amdgpu_device *adev, u32 reg) adev 128 drivers/gpu/drm/amd/amdgpu/cik.c spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags); adev 131 drivers/gpu/drm/amd/amdgpu/cik.c spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags); adev 135 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 139 drivers/gpu/drm/amd/amdgpu/cik.c spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags); adev 142 drivers/gpu/drm/amd/amdgpu/cik.c spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags); adev 145 drivers/gpu/drm/amd/amdgpu/cik.c static u32 cik_didt_rreg(struct amdgpu_device *adev, u32 reg) adev 150 drivers/gpu/drm/amd/amdgpu/cik.c spin_lock_irqsave(&adev->didt_idx_lock, flags); adev 153 drivers/gpu/drm/amd/amdgpu/cik.c spin_unlock_irqrestore(&adev->didt_idx_lock, flags); adev 157 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_didt_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 161 drivers/gpu/drm/amd/amdgpu/cik.c spin_lock_irqsave(&adev->didt_idx_lock, flags); adev 164 drivers/gpu/drm/amd/amdgpu/cik.c spin_unlock_irqrestore(&adev->didt_idx_lock, flags); adev 751 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_init_golden_registers(struct amdgpu_device *adev) adev 754 drivers/gpu/drm/amd/amdgpu/cik.c mutex_lock(&adev->grbm_idx_mutex); adev 756 drivers/gpu/drm/amd/amdgpu/cik.c switch (adev->asic_type) { adev 758 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 761 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 764 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 767 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 772 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 775 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 778 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 781 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 786 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 789 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 792 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 795 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 800 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 803 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 806 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 809 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 814 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 817 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 820 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 823 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_program_register_sequence(adev, adev 830 drivers/gpu/drm/amd/amdgpu/cik.c mutex_unlock(&adev->grbm_idx_mutex); adev 841 drivers/gpu/drm/amd/amdgpu/cik.c static u32 cik_get_xclk(struct amdgpu_device *adev) adev 843 drivers/gpu/drm/amd/amdgpu/cik.c u32 reference_clock = adev->clock.spll.reference_freq; adev 845 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->flags & AMD_IS_APU) { adev 868 drivers/gpu/drm/amd/amdgpu/cik.c void cik_srbm_select(struct amdgpu_device *adev, adev 879 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_vga_set_state(struct amdgpu_device *adev, bool state) adev 891 drivers/gpu/drm/amd/amdgpu/cik.c static bool cik_read_disabled_bios(struct amdgpu_device *adev) adev 901 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->mode_info.num_crtc) { adev 910 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->mode_info.num_crtc) { adev 923 drivers/gpu/drm/amd/amdgpu/cik.c r = amdgpu_read_bios(adev); adev 927 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->mode_info.num_crtc) { adev 936 drivers/gpu/drm/amd/amdgpu/cik.c static bool cik_read_bios_from_rom(struct amdgpu_device *adev, adev 948 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->flags & AMD_IS_APU) adev 954 drivers/gpu/drm/amd/amdgpu/cik.c spin_lock_irqsave(&adev->smc_idx_lock, flags); adev 962 drivers/gpu/drm/amd/amdgpu/cik.c spin_unlock_irqrestore(&adev->smc_idx_lock, flags); adev 1027 drivers/gpu/drm/amd/amdgpu/cik.c static uint32_t cik_get_register_value(struct amdgpu_device *adev, adev 1038 drivers/gpu/drm/amd/amdgpu/cik.c return adev->gfx.config.rb_config[se_idx][sh_idx].rb_backend_disable; adev 1040 drivers/gpu/drm/amd/amdgpu/cik.c return adev->gfx.config.rb_config[se_idx][sh_idx].user_rb_backend_disable; adev 1042 drivers/gpu/drm/amd/amdgpu/cik.c return adev->gfx.config.rb_config[se_idx][sh_idx].raster_config; adev 1044 drivers/gpu/drm/amd/amdgpu/cik.c return adev->gfx.config.rb_config[se_idx][sh_idx].raster_config_1; adev 1047 drivers/gpu/drm/amd/amdgpu/cik.c mutex_lock(&adev->grbm_idx_mutex); adev 1049 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); adev 1054 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_gfx_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1055 drivers/gpu/drm/amd/amdgpu/cik.c mutex_unlock(&adev->grbm_idx_mutex); adev 1062 drivers/gpu/drm/amd/amdgpu/cik.c return adev->gfx.config.gb_addr_config; adev 1064 drivers/gpu/drm/amd/amdgpu/cik.c return adev->gfx.config.mc_arb_ramcfg; adev 1098 drivers/gpu/drm/amd/amdgpu/cik.c return adev->gfx.config.tile_mode_array[idx]; adev 1116 drivers/gpu/drm/amd/amdgpu/cik.c return adev->gfx.config.macrotile_mode_array[idx]; adev 1123 drivers/gpu/drm/amd/amdgpu/cik.c static int cik_read_register(struct amdgpu_device *adev, u32 se_num, adev 1135 drivers/gpu/drm/amd/amdgpu/cik.c *value = cik_get_register_value(adev, indexed, se_num, sh_num, adev 1148 drivers/gpu/drm/amd/amdgpu/cik.c static void kv_save_regs_for_reset(struct amdgpu_device *adev, adev 1162 drivers/gpu/drm/amd/amdgpu/cik.c static void kv_restore_regs_for_reset(struct amdgpu_device *adev, adev 1235 drivers/gpu/drm/amd/amdgpu/cik.c static int cik_gpu_pci_config_reset(struct amdgpu_device *adev) adev 1241 drivers/gpu/drm/amd/amdgpu/cik.c dev_info(adev->dev, "GPU pci config reset\n"); adev 1243 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->flags & AMD_IS_APU) adev 1244 drivers/gpu/drm/amd/amdgpu/cik.c kv_save_regs_for_reset(adev, &kv_save); adev 1247 drivers/gpu/drm/amd/amdgpu/cik.c pci_clear_master(adev->pdev); adev 1249 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_pci_config_reset(adev); adev 1254 drivers/gpu/drm/amd/amdgpu/cik.c for (i = 0; i < adev->usec_timeout; i++) { adev 1257 drivers/gpu/drm/amd/amdgpu/cik.c pci_set_master(adev->pdev); adev 1258 drivers/gpu/drm/amd/amdgpu/cik.c adev->has_hw_reset = true; adev 1266 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->flags & AMD_IS_APU) adev 1267 drivers/gpu/drm/amd/amdgpu/cik.c kv_restore_regs_for_reset(adev, &kv_save); adev 1281 drivers/gpu/drm/amd/amdgpu/cik.c static int cik_asic_reset(struct amdgpu_device *adev) adev 1285 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_atombios_scratch_regs_engine_hung(adev, true); adev 1287 drivers/gpu/drm/amd/amdgpu/cik.c r = cik_gpu_pci_config_reset(adev); adev 1289 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_atombios_scratch_regs_engine_hung(adev, false); adev 1295 drivers/gpu/drm/amd/amdgpu/cik.c cik_asic_reset_method(struct amdgpu_device *adev) adev 1300 drivers/gpu/drm/amd/amdgpu/cik.c static u32 cik_get_config_memsize(struct amdgpu_device *adev) adev 1305 drivers/gpu/drm/amd/amdgpu/cik.c static int cik_set_uvd_clock(struct amdgpu_device *adev, u32 clock, adev 1312 drivers/gpu/drm/amd/amdgpu/cik.c r = amdgpu_atombios_get_clock_dividers(adev, adev 1335 drivers/gpu/drm/amd/amdgpu/cik.c static int cik_set_uvd_clocks(struct amdgpu_device *adev, u32 vclk, u32 dclk) adev 1339 drivers/gpu/drm/amd/amdgpu/cik.c r = cik_set_uvd_clock(adev, vclk, ixCG_VCLK_CNTL, ixCG_VCLK_STATUS); adev 1343 drivers/gpu/drm/amd/amdgpu/cik.c r = cik_set_uvd_clock(adev, dclk, ixCG_DCLK_CNTL, ixCG_DCLK_STATUS); adev 1347 drivers/gpu/drm/amd/amdgpu/cik.c static int cik_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) adev 1353 drivers/gpu/drm/amd/amdgpu/cik.c r = amdgpu_atombios_get_clock_dividers(adev, adev 1384 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_pcie_gen3_enable(struct amdgpu_device *adev) adev 1386 drivers/gpu/drm/amd/amdgpu/cik.c struct pci_dev *root = adev->pdev->bus->self; adev 1392 drivers/gpu/drm/amd/amdgpu/cik.c if (pci_is_root_bus(adev->pdev->bus)) adev 1398 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->flags & AMD_IS_APU) adev 1401 drivers/gpu/drm/amd/amdgpu/cik.c if (!(adev->pm.pcie_gen_mask & (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 | adev 1408 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) { adev 1414 drivers/gpu/drm/amd/amdgpu/cik.c } else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2) { adev 1426 drivers/gpu/drm/amd/amdgpu/cik.c gpu_pos = pci_pcie_cap(adev->pdev); adev 1430 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) { adev 1438 drivers/gpu/drm/amd/amdgpu/cik.c pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, &gpu_cfg); adev 1444 drivers/gpu/drm/amd/amdgpu/cik.c pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, tmp16); adev 1468 drivers/gpu/drm/amd/amdgpu/cik.c pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_DEVSTA, &tmp16); adev 1473 drivers/gpu/drm/amd/amdgpu/cik.c pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, &gpu_cfg); adev 1476 drivers/gpu/drm/amd/amdgpu/cik.c pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &gpu_cfg2); adev 1494 drivers/gpu/drm/amd/amdgpu/cik.c pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, &tmp16); adev 1497 drivers/gpu/drm/amd/amdgpu/cik.c pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, tmp16); adev 1505 drivers/gpu/drm/amd/amdgpu/cik.c pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &tmp16); adev 1508 drivers/gpu/drm/amd/amdgpu/cik.c pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, tmp16); adev 1523 drivers/gpu/drm/amd/amdgpu/cik.c pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &tmp16); adev 1525 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) adev 1527 drivers/gpu/drm/amd/amdgpu/cik.c else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2) adev 1531 drivers/gpu/drm/amd/amdgpu/cik.c pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, tmp16); adev 1537 drivers/gpu/drm/amd/amdgpu/cik.c for (i = 0; i < adev->usec_timeout; i++) { adev 1545 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_program_aspm(struct amdgpu_device *adev) adev 1554 drivers/gpu/drm/amd/amdgpu/cik.c if (pci_is_root_bus(adev->pdev->bus)) adev 1558 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->flags & AMD_IS_APU) adev 1633 drivers/gpu/drm/amd/amdgpu/cik.c struct pci_dev *root = adev->pdev->bus->self; adev 1712 drivers/gpu/drm/amd/amdgpu/cik.c static uint32_t cik_get_rev_id(struct amdgpu_device *adev) adev 1718 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_detect_hw_virtualization(struct amdgpu_device *adev) adev 1721 drivers/gpu/drm/amd/amdgpu/cik.c adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE; adev 1724 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_flush_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring) adev 1734 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_invalidate_hdp(struct amdgpu_device *adev, adev 1745 drivers/gpu/drm/amd/amdgpu/cik.c static bool cik_need_full_reset(struct amdgpu_device *adev) adev 1751 drivers/gpu/drm/amd/amdgpu/cik.c static void cik_get_pcie_usage(struct amdgpu_device *adev, uint64_t *count0, adev 1761 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->flags & AMD_IS_APU) adev 1797 drivers/gpu/drm/amd/amdgpu/cik.c static bool cik_need_reset_on_init(struct amdgpu_device *adev) adev 1801 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->flags & AMD_IS_APU) adev 1814 drivers/gpu/drm/amd/amdgpu/cik.c static uint64_t cik_get_pcie_replay_count(struct amdgpu_device *adev) adev 1849 drivers/gpu/drm/amd/amdgpu/cik.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1851 drivers/gpu/drm/amd/amdgpu/cik.c adev->smc_rreg = &cik_smc_rreg; adev 1852 drivers/gpu/drm/amd/amdgpu/cik.c adev->smc_wreg = &cik_smc_wreg; adev 1853 drivers/gpu/drm/amd/amdgpu/cik.c adev->pcie_rreg = &cik_pcie_rreg; adev 1854 drivers/gpu/drm/amd/amdgpu/cik.c adev->pcie_wreg = &cik_pcie_wreg; adev 1855 drivers/gpu/drm/amd/amdgpu/cik.c adev->uvd_ctx_rreg = &cik_uvd_ctx_rreg; adev 1856 drivers/gpu/drm/amd/amdgpu/cik.c adev->uvd_ctx_wreg = &cik_uvd_ctx_wreg; adev 1857 drivers/gpu/drm/amd/amdgpu/cik.c adev->didt_rreg = &cik_didt_rreg; adev 1858 drivers/gpu/drm/amd/amdgpu/cik.c adev->didt_wreg = &cik_didt_wreg; adev 1860 drivers/gpu/drm/amd/amdgpu/cik.c adev->asic_funcs = &cik_asic_funcs; adev 1862 drivers/gpu/drm/amd/amdgpu/cik.c adev->rev_id = cik_get_rev_id(adev); adev 1863 drivers/gpu/drm/amd/amdgpu/cik.c adev->external_rev_id = 0xFF; adev 1864 drivers/gpu/drm/amd/amdgpu/cik.c switch (adev->asic_type) { adev 1866 drivers/gpu/drm/amd/amdgpu/cik.c adev->cg_flags = adev 1883 drivers/gpu/drm/amd/amdgpu/cik.c adev->pg_flags = 0; adev 1884 drivers/gpu/drm/amd/amdgpu/cik.c adev->external_rev_id = adev->rev_id + 0x14; adev 1887 drivers/gpu/drm/amd/amdgpu/cik.c adev->cg_flags = adev 1903 drivers/gpu/drm/amd/amdgpu/cik.c adev->pg_flags = 0; adev 1904 drivers/gpu/drm/amd/amdgpu/cik.c adev->external_rev_id = 0x28; adev 1907 drivers/gpu/drm/amd/amdgpu/cik.c adev->cg_flags = adev 1922 drivers/gpu/drm/amd/amdgpu/cik.c adev->pg_flags = adev 1934 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->pdev->device == 0x1312 || adev 1935 drivers/gpu/drm/amd/amdgpu/cik.c adev->pdev->device == 0x1316 || adev 1936 drivers/gpu/drm/amd/amdgpu/cik.c adev->pdev->device == 0x1317) adev 1937 drivers/gpu/drm/amd/amdgpu/cik.c adev->external_rev_id = 0x41; adev 1939 drivers/gpu/drm/amd/amdgpu/cik.c adev->external_rev_id = 0x1; adev 1943 drivers/gpu/drm/amd/amdgpu/cik.c adev->cg_flags = adev 1958 drivers/gpu/drm/amd/amdgpu/cik.c adev->pg_flags = adev 1968 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->asic_type == CHIP_KABINI) { adev 1969 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->rev_id == 0) adev 1970 drivers/gpu/drm/amd/amdgpu/cik.c adev->external_rev_id = 0x81; adev 1971 drivers/gpu/drm/amd/amdgpu/cik.c else if (adev->rev_id == 1) adev 1972 drivers/gpu/drm/amd/amdgpu/cik.c adev->external_rev_id = 0x82; adev 1973 drivers/gpu/drm/amd/amdgpu/cik.c else if (adev->rev_id == 2) adev 1974 drivers/gpu/drm/amd/amdgpu/cik.c adev->external_rev_id = 0x85; adev 1976 drivers/gpu/drm/amd/amdgpu/cik.c adev->external_rev_id = adev->rev_id + 0xa1; adev 1998 drivers/gpu/drm/amd/amdgpu/cik.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2001 drivers/gpu/drm/amd/amdgpu/cik.c cik_init_golden_registers(adev); adev 2003 drivers/gpu/drm/amd/amdgpu/cik.c cik_pcie_gen3_enable(adev); adev 2005 drivers/gpu/drm/amd/amdgpu/cik.c cik_program_aspm(adev); adev 2017 drivers/gpu/drm/amd/amdgpu/cik.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2019 drivers/gpu/drm/amd/amdgpu/cik.c return cik_common_hw_fini(adev); adev 2024 drivers/gpu/drm/amd/amdgpu/cik.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2026 drivers/gpu/drm/amd/amdgpu/cik.c return cik_common_hw_init(adev); adev 2083 drivers/gpu/drm/amd/amdgpu/cik.c int cik_set_ip_blocks(struct amdgpu_device *adev) adev 2085 drivers/gpu/drm/amd/amdgpu/cik.c cik_detect_hw_virtualization(adev); adev 2087 drivers/gpu/drm/amd/amdgpu/cik.c switch (adev->asic_type) { adev 2089 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &cik_common_ip_block); adev 2090 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block); adev 2091 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &cik_ih_ip_block); adev 2092 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block); adev 2093 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); adev 2094 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); adev 2095 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->enable_virtual_display) adev 2096 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 2098 drivers/gpu/drm/amd/amdgpu/cik.c else if (amdgpu_device_has_dc_support(adev)) adev 2099 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &dm_ip_block); adev 2102 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &dce_v8_2_ip_block); adev 2103 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block); adev 2104 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block); adev 2107 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &cik_common_ip_block); adev 2108 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block); adev 2109 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &cik_ih_ip_block); adev 2110 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &gfx_v7_3_ip_block); adev 2111 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); adev 2112 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); adev 2113 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->enable_virtual_display) adev 2114 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 2116 drivers/gpu/drm/amd/amdgpu/cik.c else if (amdgpu_device_has_dc_support(adev)) adev 2117 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &dm_ip_block); adev 2120 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &dce_v8_5_ip_block); adev 2121 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block); adev 2122 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block); adev 2125 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &cik_common_ip_block); adev 2126 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block); adev 2127 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &cik_ih_ip_block); adev 2128 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &gfx_v7_1_ip_block); adev 2129 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); adev 2130 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &kv_smu_ip_block); adev 2131 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->enable_virtual_display) adev 2132 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 2134 drivers/gpu/drm/amd/amdgpu/cik.c else if (amdgpu_device_has_dc_support(adev)) adev 2135 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &dm_ip_block); adev 2138 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &dce_v8_1_ip_block); adev 2140 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block); adev 2141 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block); adev 2145 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &cik_common_ip_block); adev 2146 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block); adev 2147 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &cik_ih_ip_block); adev 2148 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block); adev 2149 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); adev 2150 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &kv_smu_ip_block); adev 2151 drivers/gpu/drm/amd/amdgpu/cik.c if (adev->enable_virtual_display) adev 2152 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 2154 drivers/gpu/drm/amd/amdgpu/cik.c else if (amdgpu_device_has_dc_support(adev)) adev 2155 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &dm_ip_block); adev 2158 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &dce_v8_3_ip_block); adev 2159 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block); adev 2160 drivers/gpu/drm/amd/amdgpu/cik.c amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block); adev 29 drivers/gpu/drm/amd/amdgpu/cik.h void cik_srbm_select(struct amdgpu_device *adev, adev 31 drivers/gpu/drm/amd/amdgpu/cik.h int cik_set_ip_blocks(struct amdgpu_device *adev); adev 33 drivers/gpu/drm/amd/amdgpu/cik.h void legacy_doorbell_index_init(struct amdgpu_device *adev); adev 51 drivers/gpu/drm/amd/amdgpu/cik_ih.c static void cik_ih_set_interrupt_funcs(struct amdgpu_device *adev); adev 60 drivers/gpu/drm/amd/amdgpu/cik_ih.c static void cik_ih_enable_interrupts(struct amdgpu_device *adev) adev 69 drivers/gpu/drm/amd/amdgpu/cik_ih.c adev->irq.ih.enabled = true; adev 79 drivers/gpu/drm/amd/amdgpu/cik_ih.c static void cik_ih_disable_interrupts(struct amdgpu_device *adev) adev 91 drivers/gpu/drm/amd/amdgpu/cik_ih.c adev->irq.ih.enabled = false; adev 92 drivers/gpu/drm/amd/amdgpu/cik_ih.c adev->irq.ih.rptr = 0; adev 106 drivers/gpu/drm/amd/amdgpu/cik_ih.c static int cik_ih_irq_init(struct amdgpu_device *adev) adev 108 drivers/gpu/drm/amd/amdgpu/cik_ih.c struct amdgpu_ih_ring *ih = &adev->irq.ih; adev 113 drivers/gpu/drm/amd/amdgpu/cik_ih.c cik_ih_disable_interrupts(adev); adev 116 drivers/gpu/drm/amd/amdgpu/cik_ih.c WREG32(mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); adev 126 drivers/gpu/drm/amd/amdgpu/cik_ih.c WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8); adev 127 drivers/gpu/drm/amd/amdgpu/cik_ih.c rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4); adev 150 drivers/gpu/drm/amd/amdgpu/cik_ih.c if (adev->irq.msi_enabled) adev 154 drivers/gpu/drm/amd/amdgpu/cik_ih.c pci_set_master(adev->pdev); adev 157 drivers/gpu/drm/amd/amdgpu/cik_ih.c cik_ih_enable_interrupts(adev); adev 169 drivers/gpu/drm/amd/amdgpu/cik_ih.c static void cik_ih_irq_disable(struct amdgpu_device *adev) adev 171 drivers/gpu/drm/amd/amdgpu/cik_ih.c cik_ih_disable_interrupts(adev); adev 187 drivers/gpu/drm/amd/amdgpu/cik_ih.c static u32 cik_ih_get_wptr(struct amdgpu_device *adev, adev 200 drivers/gpu/drm/amd/amdgpu/cik_ih.c dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", adev 241 drivers/gpu/drm/amd/amdgpu/cik_ih.c static void cik_ih_decode_iv(struct amdgpu_device *adev, adev 272 drivers/gpu/drm/amd/amdgpu/cik_ih.c static void cik_ih_set_rptr(struct amdgpu_device *adev, adev 280 drivers/gpu/drm/amd/amdgpu/cik_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 283 drivers/gpu/drm/amd/amdgpu/cik_ih.c ret = amdgpu_irq_add_domain(adev); adev 287 drivers/gpu/drm/amd/amdgpu/cik_ih.c cik_ih_set_interrupt_funcs(adev); adev 295 drivers/gpu/drm/amd/amdgpu/cik_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 297 drivers/gpu/drm/amd/amdgpu/cik_ih.c r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, false); adev 301 drivers/gpu/drm/amd/amdgpu/cik_ih.c r = amdgpu_irq_init(adev); adev 308 drivers/gpu/drm/amd/amdgpu/cik_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 310 drivers/gpu/drm/amd/amdgpu/cik_ih.c amdgpu_irq_fini(adev); adev 311 drivers/gpu/drm/amd/amdgpu/cik_ih.c amdgpu_ih_ring_fini(adev, &adev->irq.ih); adev 312 drivers/gpu/drm/amd/amdgpu/cik_ih.c amdgpu_irq_remove_domain(adev); adev 320 drivers/gpu/drm/amd/amdgpu/cik_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 322 drivers/gpu/drm/amd/amdgpu/cik_ih.c r = cik_ih_irq_init(adev); adev 331 drivers/gpu/drm/amd/amdgpu/cik_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 333 drivers/gpu/drm/amd/amdgpu/cik_ih.c cik_ih_irq_disable(adev); adev 340 drivers/gpu/drm/amd/amdgpu/cik_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 342 drivers/gpu/drm/amd/amdgpu/cik_ih.c return cik_ih_hw_fini(adev); adev 347 drivers/gpu/drm/amd/amdgpu/cik_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 349 drivers/gpu/drm/amd/amdgpu/cik_ih.c return cik_ih_hw_init(adev); adev 354 drivers/gpu/drm/amd/amdgpu/cik_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 367 drivers/gpu/drm/amd/amdgpu/cik_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 369 drivers/gpu/drm/amd/amdgpu/cik_ih.c for (i = 0; i < adev->usec_timeout; i++) { adev 381 drivers/gpu/drm/amd/amdgpu/cik_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 392 drivers/gpu/drm/amd/amdgpu/cik_ih.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 444 drivers/gpu/drm/amd/amdgpu/cik_ih.c static void cik_ih_set_interrupt_funcs(struct amdgpu_device *adev) adev 446 drivers/gpu/drm/amd/amdgpu/cik_ih.c adev->irq.ih_funcs = &cik_ih_funcs; adev 53 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_sdma_set_ring_funcs(struct amdgpu_device *adev); adev 54 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_sdma_set_irq_funcs(struct amdgpu_device *adev); adev 55 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_sdma_set_buffer_funcs(struct amdgpu_device *adev); adev 56 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_sdma_set_vm_pte_funcs(struct amdgpu_device *adev); adev 70 drivers/gpu/drm/amd/amdgpu/cik_sdma.c u32 amdgpu_cik_gpu_check_soft_reset(struct amdgpu_device *adev); adev 73 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_sdma_free_microcode(struct amdgpu_device *adev) adev 76 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 77 drivers/gpu/drm/amd/amdgpu/cik_sdma.c release_firmware(adev->sdma.instance[i].fw); adev 78 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->sdma.instance[i].fw = NULL; adev 108 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static int cik_sdma_init_microcode(struct amdgpu_device *adev) adev 116 drivers/gpu/drm/amd/amdgpu/cik_sdma.c switch (adev->asic_type) { adev 135 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 140 drivers/gpu/drm/amd/amdgpu/cik_sdma.c err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); adev 143 drivers/gpu/drm/amd/amdgpu/cik_sdma.c err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); adev 148 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 149 drivers/gpu/drm/amd/amdgpu/cik_sdma.c release_firmware(adev->sdma.instance[i].fw); adev 150 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->sdma.instance[i].fw = NULL; adev 167 drivers/gpu/drm/amd/amdgpu/cik_sdma.c rptr = ring->adev->wb.wb[ring->rptr_offs]; adev 181 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = ring->adev; adev 195 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = ring->adev; adev 306 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_sdma_gfx_stop(struct amdgpu_device *adev) adev 308 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_ring *sdma0 = &adev->sdma.instance[0].ring; adev 309 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_ring *sdma1 = &adev->sdma.instance[1].ring; adev 313 drivers/gpu/drm/amd/amdgpu/cik_sdma.c if ((adev->mman.buffer_funcs_ring == sdma0) || adev 314 drivers/gpu/drm/amd/amdgpu/cik_sdma.c (adev->mman.buffer_funcs_ring == sdma1)) adev 315 drivers/gpu/drm/amd/amdgpu/cik_sdma.c amdgpu_ttm_set_buffer_funcs_status(adev, false); adev 317 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 334 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_sdma_rlc_stop(struct amdgpu_device *adev) adev 347 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_ctx_switch_enable(struct amdgpu_device *adev, bool enable) adev 376 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 404 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_sdma_enable(struct amdgpu_device *adev, bool enable) adev 410 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_sdma_gfx_stop(adev); adev 411 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_sdma_rlc_stop(adev); adev 414 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 432 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static int cik_sdma_gfx_resume(struct amdgpu_device *adev) adev 440 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 441 drivers/gpu/drm/amd/amdgpu/cik_sdma.c ring = &adev->sdma.instance[i].ring; adev 444 drivers/gpu/drm/amd/amdgpu/cik_sdma.c mutex_lock(&adev->srbm_mutex); adev 446 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_srbm_select(adev, 0, 0, 0, j); adev 452 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_srbm_select(adev, 0, 0, 0, 0); adev 453 drivers/gpu/drm/amd/amdgpu/cik_sdma.c mutex_unlock(&adev->srbm_mutex); adev 456 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->gfx.config.gb_addr_config & 0x70); adev 478 drivers/gpu/drm/amd/amdgpu/cik_sdma.c upper_32_bits(adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFF); adev 480 drivers/gpu/drm/amd/amdgpu/cik_sdma.c ((adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFC)); adev 504 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_sdma_enable(adev, true); adev 506 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 507 drivers/gpu/drm/amd/amdgpu/cik_sdma.c ring = &adev->sdma.instance[i].ring; adev 512 drivers/gpu/drm/amd/amdgpu/cik_sdma.c if (adev->mman.buffer_funcs_ring == ring) adev 513 drivers/gpu/drm/amd/amdgpu/cik_sdma.c amdgpu_ttm_set_buffer_funcs_status(adev, true); adev 527 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static int cik_sdma_rlc_resume(struct amdgpu_device *adev) adev 541 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static int cik_sdma_load_microcode(struct amdgpu_device *adev) adev 549 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_sdma_enable(adev, false); adev 551 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 552 drivers/gpu/drm/amd/amdgpu/cik_sdma.c if (!adev->sdma.instance[i].fw) adev 554 drivers/gpu/drm/amd/amdgpu/cik_sdma.c hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; adev 557 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version); adev 558 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); adev 559 drivers/gpu/drm/amd/amdgpu/cik_sdma.c if (adev->sdma.instance[i].feature_version >= 20) adev 560 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->sdma.instance[i].burst_nop = true; adev 562 drivers/gpu/drm/amd/amdgpu/cik_sdma.c (adev->sdma.instance[i].fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); adev 566 drivers/gpu/drm/amd/amdgpu/cik_sdma.c WREG32(mmSDMA0_UCODE_ADDR + sdma_offsets[i], adev->sdma.instance[i].fw_version); adev 580 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static int cik_sdma_start(struct amdgpu_device *adev) adev 584 drivers/gpu/drm/amd/amdgpu/cik_sdma.c r = cik_sdma_load_microcode(adev); adev 589 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_sdma_enable(adev, false); adev 591 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_ctx_switch_enable(adev, true); adev 594 drivers/gpu/drm/amd/amdgpu/cik_sdma.c r = cik_sdma_gfx_resume(adev); adev 597 drivers/gpu/drm/amd/amdgpu/cik_sdma.c r = cik_sdma_rlc_resume(adev); adev 615 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = ring->adev; adev 622 drivers/gpu/drm/amd/amdgpu/cik_sdma.c r = amdgpu_device_wb_get(adev, &index); adev 626 drivers/gpu/drm/amd/amdgpu/cik_sdma.c gpu_addr = adev->wb.gpu_addr + (index * 4); adev 628 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->wb.wb[index] = cpu_to_le32(tmp); adev 641 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->usec_timeout; i++) { adev 642 drivers/gpu/drm/amd/amdgpu/cik_sdma.c tmp = le32_to_cpu(adev->wb.wb[index]); adev 648 drivers/gpu/drm/amd/amdgpu/cik_sdma.c if (i >= adev->usec_timeout) adev 652 drivers/gpu/drm/amd/amdgpu/cik_sdma.c amdgpu_device_wb_free(adev, index); adev 666 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = ring->adev; adev 674 drivers/gpu/drm/amd/amdgpu/cik_sdma.c r = amdgpu_device_wb_get(adev, &index); adev 678 drivers/gpu/drm/amd/amdgpu/cik_sdma.c gpu_addr = adev->wb.gpu_addr + (index * 4); adev 680 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->wb.wb[index] = cpu_to_le32(tmp); adev 682 drivers/gpu/drm/amd/amdgpu/cik_sdma.c r = amdgpu_ib_get(adev, NULL, 256, &ib); adev 704 drivers/gpu/drm/amd/amdgpu/cik_sdma.c tmp = le32_to_cpu(adev->wb.wb[index]); adev 711 drivers/gpu/drm/amd/amdgpu/cik_sdma.c amdgpu_ib_free(adev, &ib, NULL); adev 714 drivers/gpu/drm/amd/amdgpu/cik_sdma.c amdgpu_device_wb_free(adev, index); adev 882 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_enable_sdma_mgcg(struct amdgpu_device *adev, adev 887 drivers/gpu/drm/amd/amdgpu/cik_sdma.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG)) { adev 903 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_enable_sdma_mgls(struct amdgpu_device *adev, adev 908 drivers/gpu/drm/amd/amdgpu/cik_sdma.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_LS)) { adev 933 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 935 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->sdma.num_instances = SDMA_MAX_INSTANCE; adev 937 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_sdma_set_ring_funcs(adev); adev 938 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_sdma_set_irq_funcs(adev); adev 939 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_sdma_set_buffer_funcs(adev); adev 940 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_sdma_set_vm_pte_funcs(adev); adev 948 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 951 drivers/gpu/drm/amd/amdgpu/cik_sdma.c r = cik_sdma_init_microcode(adev); adev 958 drivers/gpu/drm/amd/amdgpu/cik_sdma.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 224, adev 959 drivers/gpu/drm/amd/amdgpu/cik_sdma.c &adev->sdma.trap_irq); adev 964 drivers/gpu/drm/amd/amdgpu/cik_sdma.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 241, adev 965 drivers/gpu/drm/amd/amdgpu/cik_sdma.c &adev->sdma.illegal_inst_irq); adev 970 drivers/gpu/drm/amd/amdgpu/cik_sdma.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 247, adev 971 drivers/gpu/drm/amd/amdgpu/cik_sdma.c &adev->sdma.illegal_inst_irq); adev 975 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 976 drivers/gpu/drm/amd/amdgpu/cik_sdma.c ring = &adev->sdma.instance[i].ring; adev 979 drivers/gpu/drm/amd/amdgpu/cik_sdma.c r = amdgpu_ring_init(adev, ring, 1024, adev 980 drivers/gpu/drm/amd/amdgpu/cik_sdma.c &adev->sdma.trap_irq, adev 993 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 996 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) adev 997 drivers/gpu/drm/amd/amdgpu/cik_sdma.c amdgpu_ring_fini(&adev->sdma.instance[i].ring); adev 999 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_sdma_free_microcode(adev); adev 1006 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1008 drivers/gpu/drm/amd/amdgpu/cik_sdma.c r = cik_sdma_start(adev); adev 1017 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1019 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_ctx_switch_enable(adev, false); adev 1020 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_sdma_enable(adev, false); adev 1027 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1029 drivers/gpu/drm/amd/amdgpu/cik_sdma.c return cik_sdma_hw_fini(adev); adev 1034 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1038 drivers/gpu/drm/amd/amdgpu/cik_sdma.c return cik_sdma_hw_init(adev); adev 1043 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1057 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1059 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->usec_timeout; i++) { adev 1073 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1094 drivers/gpu/drm/amd/amdgpu/cik_sdma.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 1111 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static int cik_sdma_set_trap_irq_state(struct amdgpu_device *adev, adev 1157 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static int cik_sdma_process_trap_irq(struct amdgpu_device *adev, adev 1170 drivers/gpu/drm/amd/amdgpu/cik_sdma.c amdgpu_fence_process(&adev->sdma.instance[0].ring); adev 1183 drivers/gpu/drm/amd/amdgpu/cik_sdma.c amdgpu_fence_process(&adev->sdma.instance[1].ring); adev 1198 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static int cik_sdma_process_illegal_inst_irq(struct amdgpu_device *adev, adev 1206 drivers/gpu/drm/amd/amdgpu/cik_sdma.c drm_sched_fault(&adev->sdma.instance[instance_id].ring.sched); adev 1214 drivers/gpu/drm/amd/amdgpu/cik_sdma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1219 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_enable_sdma_mgcg(adev, gate); adev 1220 drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_enable_sdma_mgls(adev, gate); adev 1275 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_sdma_set_ring_funcs(struct amdgpu_device *adev) adev 1279 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1280 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->sdma.instance[i].ring.funcs = &cik_sdma_ring_funcs; adev 1281 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->sdma.instance[i].ring.me = i; adev 1294 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_sdma_set_irq_funcs(struct amdgpu_device *adev) adev 1296 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST; adev 1297 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->sdma.trap_irq.funcs = &cik_sdma_trap_irq_funcs; adev 1298 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->sdma.illegal_inst_irq.funcs = &cik_sdma_illegal_inst_irq_funcs; adev 1359 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_sdma_set_buffer_funcs(struct amdgpu_device *adev) adev 1361 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->mman.buffer_funcs = &cik_sdma_buffer_funcs; adev 1362 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; adev 1373 drivers/gpu/drm/amd/amdgpu/cik_sdma.c static void cik_sdma_set_vm_pte_funcs(struct amdgpu_device *adev) adev 1378 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->vm_manager.vm_pte_funcs = &cik_sdma_vm_pte_funcs; adev 1379 drivers/gpu/drm/amd/amdgpu/cik_sdma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1380 drivers/gpu/drm/amd/amdgpu/cik_sdma.c sched = &adev->sdma.instance[i].ring.sched; adev 1381 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->vm_manager.vm_pte_rqs[i] = adev 1384 drivers/gpu/drm/amd/amdgpu/cik_sdma.c adev->vm_manager.vm_pte_num_rqs = adev->sdma.num_instances; adev 51 drivers/gpu/drm/amd/amdgpu/cz_ih.c static void cz_ih_set_interrupt_funcs(struct amdgpu_device *adev); adev 60 drivers/gpu/drm/amd/amdgpu/cz_ih.c static void cz_ih_enable_interrupts(struct amdgpu_device *adev) adev 69 drivers/gpu/drm/amd/amdgpu/cz_ih.c adev->irq.ih.enabled = true; adev 79 drivers/gpu/drm/amd/amdgpu/cz_ih.c static void cz_ih_disable_interrupts(struct amdgpu_device *adev) adev 91 drivers/gpu/drm/amd/amdgpu/cz_ih.c adev->irq.ih.enabled = false; adev 92 drivers/gpu/drm/amd/amdgpu/cz_ih.c adev->irq.ih.rptr = 0; adev 106 drivers/gpu/drm/amd/amdgpu/cz_ih.c static int cz_ih_irq_init(struct amdgpu_device *adev) adev 108 drivers/gpu/drm/amd/amdgpu/cz_ih.c struct amdgpu_ih_ring *ih = &adev->irq.ih; adev 113 drivers/gpu/drm/amd/amdgpu/cz_ih.c cz_ih_disable_interrupts(adev); adev 116 drivers/gpu/drm/amd/amdgpu/cz_ih.c WREG32(mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); adev 127 drivers/gpu/drm/amd/amdgpu/cz_ih.c WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8); adev 129 drivers/gpu/drm/amd/amdgpu/cz_ih.c rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4); adev 151 drivers/gpu/drm/amd/amdgpu/cz_ih.c if (adev->irq.msi_enabled) adev 155 drivers/gpu/drm/amd/amdgpu/cz_ih.c pci_set_master(adev->pdev); adev 158 drivers/gpu/drm/amd/amdgpu/cz_ih.c cz_ih_enable_interrupts(adev); adev 170 drivers/gpu/drm/amd/amdgpu/cz_ih.c static void cz_ih_irq_disable(struct amdgpu_device *adev) adev 172 drivers/gpu/drm/amd/amdgpu/cz_ih.c cz_ih_disable_interrupts(adev); adev 189 drivers/gpu/drm/amd/amdgpu/cz_ih.c static u32 cz_ih_get_wptr(struct amdgpu_device *adev, adev 202 drivers/gpu/drm/amd/amdgpu/cz_ih.c dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", adev 220 drivers/gpu/drm/amd/amdgpu/cz_ih.c static void cz_ih_decode_iv(struct amdgpu_device *adev, adev 251 drivers/gpu/drm/amd/amdgpu/cz_ih.c static void cz_ih_set_rptr(struct amdgpu_device *adev, adev 259 drivers/gpu/drm/amd/amdgpu/cz_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 262 drivers/gpu/drm/amd/amdgpu/cz_ih.c ret = amdgpu_irq_add_domain(adev); adev 266 drivers/gpu/drm/amd/amdgpu/cz_ih.c cz_ih_set_interrupt_funcs(adev); adev 274 drivers/gpu/drm/amd/amdgpu/cz_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 276 drivers/gpu/drm/amd/amdgpu/cz_ih.c r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, false); adev 280 drivers/gpu/drm/amd/amdgpu/cz_ih.c r = amdgpu_irq_init(adev); adev 287 drivers/gpu/drm/amd/amdgpu/cz_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 289 drivers/gpu/drm/amd/amdgpu/cz_ih.c amdgpu_irq_fini(adev); adev 290 drivers/gpu/drm/amd/amdgpu/cz_ih.c amdgpu_ih_ring_fini(adev, &adev->irq.ih); adev 291 drivers/gpu/drm/amd/amdgpu/cz_ih.c amdgpu_irq_remove_domain(adev); adev 299 drivers/gpu/drm/amd/amdgpu/cz_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 301 drivers/gpu/drm/amd/amdgpu/cz_ih.c r = cz_ih_irq_init(adev); adev 310 drivers/gpu/drm/amd/amdgpu/cz_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 312 drivers/gpu/drm/amd/amdgpu/cz_ih.c cz_ih_irq_disable(adev); adev 319 drivers/gpu/drm/amd/amdgpu/cz_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 321 drivers/gpu/drm/amd/amdgpu/cz_ih.c return cz_ih_hw_fini(adev); adev 326 drivers/gpu/drm/amd/amdgpu/cz_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 328 drivers/gpu/drm/amd/amdgpu/cz_ih.c return cz_ih_hw_init(adev); adev 333 drivers/gpu/drm/amd/amdgpu/cz_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 346 drivers/gpu/drm/amd/amdgpu/cz_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 348 drivers/gpu/drm/amd/amdgpu/cz_ih.c for (i = 0; i < adev->usec_timeout; i++) { adev 361 drivers/gpu/drm/amd/amdgpu/cz_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 371 drivers/gpu/drm/amd/amdgpu/cz_ih.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 425 drivers/gpu/drm/amd/amdgpu/cz_ih.c static void cz_ih_set_interrupt_funcs(struct amdgpu_device *adev) adev 427 drivers/gpu/drm/amd/amdgpu/cz_ih.c adev->irq.ih_funcs = &cz_ih_funcs; adev 50 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_set_display_funcs(struct amdgpu_device *adev); adev 51 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_set_irq_funcs(struct amdgpu_device *adev); adev 150 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_init_golden_registers(struct amdgpu_device *adev) adev 152 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c switch (adev->asic_type) { adev 154 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_device_program_register_sequence(adev, adev 157 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_device_program_register_sequence(adev, adev 162 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_device_program_register_sequence(adev, adev 165 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_device_program_register_sequence(adev, adev 174 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static u32 dce_v10_0_audio_endpt_rreg(struct amdgpu_device *adev, adev 180 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); adev 183 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); adev 188 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_audio_endpt_wreg(struct amdgpu_device *adev, adev 193 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); adev 196 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); adev 199 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static u32 dce_v10_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) adev 201 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (crtc >= adev->mode_info.num_crtc) adev 207 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_pageflip_interrupt_init(struct amdgpu_device *adev) adev 212 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) adev 213 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_irq_get(adev, &adev->pageflip_irq, i); adev 216 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_pageflip_interrupt_fini(struct amdgpu_device *adev) adev 221 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) adev 222 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_irq_put(adev, &adev->pageflip_irq, i); adev 235 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_page_flip(struct amdgpu_device *adev, adev 238 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; adev 260 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, adev 263 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc)) adev 281 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static bool dce_v10_0_hpd_sense(struct amdgpu_device *adev, adev 286 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (hpd >= adev->mode_info.num_hpd) adev 304 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_hpd_set_polarity(struct amdgpu_device *adev, adev 308 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c bool connected = dce_v10_0_hpd_sense(adev, hpd); adev 310 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (hpd >= adev->mode_info.num_hpd) adev 329 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_hpd_init(struct amdgpu_device *adev) adev 331 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct drm_device *dev = adev->ddev; adev 338 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) adev 367 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); adev 368 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_irq_get(adev, &adev->hpd_irq, adev 381 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_hpd_fini(struct amdgpu_device *adev) adev 383 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct drm_device *dev = adev->ddev; adev 390 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) adev 397 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_irq_put(adev, &adev->hpd_irq, adev 402 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static u32 dce_v10_0_hpd_get_gpio_reg(struct amdgpu_device *adev) adev 407 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static bool dce_v10_0_is_display_hung(struct amdgpu_device *adev) adev 413 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 422 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 437 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_set_vga_render_state(struct amdgpu_device *adev, adev 459 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_get_num_crtc(struct amdgpu_device *adev) adev 463 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c switch (adev->asic_type) { adev 474 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c void dce_v10_0_disable_dce(struct amdgpu_device *adev) adev 477 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (amdgpu_atombios_has_dce_engine_info(adev)) { adev 481 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_vga_render_state(adev, false); adev 484 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < dce_v10_0_get_num_crtc(adev); i++) { adev 501 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 588 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static u32 dce_v10_0_line_buffer_adjust(struct amdgpu_device *adev, adev 611 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c buffer_alloc = (adev->flags & AMD_IS_APU) ? 2 : 4; adev 615 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c buffer_alloc = (adev->flags & AMD_IS_APU) ? 2 : 4; adev 630 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 662 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static u32 cik_get_number_of_dram_channels(struct amdgpu_device *adev) adev 1020 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_program_watermarks(struct amdgpu_device *adev, adev 1039 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (adev->pm.dpm_enabled) { adev 1041 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_dpm_get_mclk(adev, false) * 10; adev 1043 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_dpm_get_sclk(adev, false) * 10; adev 1045 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c wm_high.yclk = adev->pm.current_mclk * 10; adev 1046 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c wm_high.sclk = adev->pm.current_sclk * 10; adev 1062 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c wm_high.dram_channels = cik_get_number_of_dram_channels(adev); adev 1073 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c (adev->mode_info.disp_priority == 2)) { adev 1078 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (adev->pm.dpm_enabled) { adev 1080 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_dpm_get_mclk(adev, true) * 10; adev 1082 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_dpm_get_sclk(adev, true) * 10; adev 1084 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c wm_low.yclk = adev->pm.current_mclk * 10; adev 1085 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c wm_low.sclk = adev->pm.current_sclk * 10; adev 1101 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c wm_low.dram_channels = cik_get_number_of_dram_channels(adev); adev 1112 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c (adev->mode_info.disp_priority == 2)) { adev 1152 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_bandwidth_update(struct amdgpu_device *adev) adev 1158 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_display_update_priority(adev); adev 1160 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 1161 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (adev->mode_info.crtcs[i]->base.enabled) adev 1164 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 1165 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c mode = &adev->mode_info.crtcs[i]->base.mode; adev 1166 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c lb_size = dce_v10_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode); adev 1167 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_program_watermarks(adev, adev->mode_info.crtcs[i], adev 1172 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_audio_get_connected_pins(struct amdgpu_device *adev) adev 1177 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 1178 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c offset = adev->mode_info.audio.pin[i].offset; adev 1184 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.audio.pin[i].connected = false; adev 1186 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.audio.pin[i].connected = true; adev 1190 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static struct amdgpu_audio_pin *dce_v10_0_audio_get_pin(struct amdgpu_device *adev) adev 1194 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_audio_get_connected_pins(adev); adev 1196 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 1197 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (adev->mode_info.audio.pin[i].connected) adev 1198 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c return &adev->mode_info.audio.pin[i]; adev 1206 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1222 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1264 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1316 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1396 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_audio_enable(struct amdgpu_device *adev, adev 1418 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_audio_init(struct amdgpu_device *adev) adev 1425 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.audio.enabled = true; adev 1427 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.audio.num_pins = 7; adev 1429 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 1430 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.audio.pin[i].channels = -1; adev 1431 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.audio.pin[i].rate = -1; adev 1432 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.audio.pin[i].bits_per_sample = -1; adev 1433 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.audio.pin[i].status_bits = 0; adev 1434 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.audio.pin[i].category_code = 0; adev 1435 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.audio.pin[i].connected = false; adev 1436 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.audio.pin[i].offset = pin_offsets[i]; adev 1437 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.audio.pin[i].id = i; adev 1440 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 1446 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_audio_fini(struct amdgpu_device *adev) adev 1453 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (!adev->mode_info.audio.enabled) adev 1456 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) adev 1457 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 1459 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.audio.enabled = false; adev 1468 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 1504 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 1523 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 1554 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 1578 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dig->afmt->pin = dce_v10_0_audio_get_pin(adev); adev 1579 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_audio_enable(adev, dig->afmt->pin, false); adev 1728 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_audio_enable(adev, dig->afmt->pin, true); adev 1734 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 1748 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_audio_enable(adev, dig->afmt->pin, false); adev 1758 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_afmt_init(struct amdgpu_device *adev) adev 1762 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.num_dig; i++) adev 1763 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.afmt[i] = NULL; adev 1766 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.num_dig; i++) { adev 1767 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.afmt[i] = kzalloc(sizeof(struct amdgpu_afmt), GFP_KERNEL); adev 1768 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (adev->mode_info.afmt[i]) { adev 1769 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.afmt[i]->offset = dig_offsets[i]; adev 1770 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.afmt[i]->id = i; adev 1774 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c kfree(adev->mode_info.afmt[j]); adev 1775 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.afmt[j] = NULL; adev 1783 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_afmt_fini(struct amdgpu_device *adev) adev 1787 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.num_dig; i++) { adev 1788 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c kfree(adev->mode_info.afmt[i]); adev 1789 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.afmt[i] = NULL; adev 1807 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 1821 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 1835 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 2071 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_bandwidth_update(adev); adev 2080 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 2096 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 2235 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 2240 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (adev->clock.dp_extclk) adev 2270 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2285 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2296 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2314 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2484 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 2496 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c type = amdgpu_display_crtc_idx_to_irq_type(adev, adev 2498 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_irq_update(adev, &adev->crtc_irq, type); adev 2499 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_irq_update(adev, &adev->pageflip_irq, type); adev 2517 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_pm_compute_clocks(adev); adev 2538 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 2561 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 2562 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (adev->mode_info.crtcs[i] && adev 2563 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.crtcs[i]->enabled && adev 2565 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { adev 2672 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_crtc_init(struct amdgpu_device *adev, int index) adev 2681 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c drm_crtc_init(adev->ddev, &amdgpu_crtc->base, &dce_v10_0_crtc_funcs); adev 2685 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.crtcs[index] = amdgpu_crtc; adev 2689 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width; adev 2690 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height; adev 2725 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2727 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->audio_endpt_rreg = &dce_v10_0_audio_endpt_rreg; adev 2728 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->audio_endpt_wreg = &dce_v10_0_audio_endpt_wreg; adev 2730 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_display_funcs(adev); adev 2732 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.num_crtc = dce_v10_0_get_num_crtc(adev); adev 2734 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c switch (adev->asic_type) { adev 2737 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.num_hpd = 6; adev 2738 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.num_dig = 7; adev 2745 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_irq_funcs(adev); adev 2753 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2755 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 2756 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq); adev 2762 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i, &adev->pageflip_irq); adev 2768 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A, &adev->hpd_irq); adev 2772 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->ddev->mode_config.funcs = &amdgpu_mode_funcs; adev 2774 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->ddev->mode_config.async_page_flip = true; adev 2776 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->ddev->mode_config.max_width = 16384; adev 2777 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->ddev->mode_config.max_height = 16384; adev 2779 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->ddev->mode_config.preferred_depth = 24; adev 2780 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->ddev->mode_config.prefer_shadow = 1; adev 2782 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->ddev->mode_config.fb_base = adev->gmc.aper_base; adev 2784 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c r = amdgpu_display_modeset_create_props(adev); adev 2788 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->ddev->mode_config.max_width = 16384; adev 2789 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->ddev->mode_config.max_height = 16384; adev 2792 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 2793 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c r = dce_v10_0_crtc_init(adev, i); adev 2798 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (amdgpu_atombios_get_connector_info_from_object_table(adev)) adev 2799 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_display_print_display_setup(adev->ddev); adev 2804 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c r = dce_v10_0_afmt_init(adev); adev 2808 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c r = dce_v10_0_audio_init(adev); adev 2812 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c drm_kms_helper_poll_init(adev->ddev); adev 2814 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.mode_config_initialized = true; adev 2820 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2822 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c kfree(adev->mode_info.bios_hardcoded_edid); adev 2824 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c drm_kms_helper_poll_fini(adev->ddev); adev 2826 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_audio_fini(adev); adev 2828 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_afmt_fini(adev); adev 2830 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c drm_mode_config_cleanup(adev->ddev); adev 2831 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.mode_config_initialized = false; adev 2839 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2841 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_init_golden_registers(adev); adev 2844 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_vga_render_state(adev, false); adev 2846 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_encoder_init_dig(adev); adev 2847 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk); adev 2850 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_hpd_init(adev); adev 2852 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 2853 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 2856 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_pageflip_interrupt_init(adev); adev 2864 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2866 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_hpd_fini(adev); adev 2868 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 2869 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 2872 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_pageflip_interrupt_fini(adev); adev 2879 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2881 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.bl_level = adev 2882 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_encoder_get_backlight_level_from_reg(adev); adev 2889 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2892 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_encoder_set_backlight_level_to_reg(adev, adev 2893 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.bl_level); adev 2898 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (adev->mode_info.bl_encoder) { adev 2899 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c u8 bl_level = amdgpu_display_backlight_get_level(adev, adev 2900 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.bl_encoder); adev 2901 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_display_backlight_set_level(adev, adev->mode_info.bl_encoder, adev 2920 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2922 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c return dce_v10_0_is_display_hung(adev); adev 2928 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2930 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (dce_v10_0_is_display_hung(adev)) adev 2936 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 2952 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_set_crtc_vblank_interrupt_state(struct amdgpu_device *adev, adev 2958 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (crtc >= adev->mode_info.num_crtc) { adev 2981 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_set_crtc_vline_interrupt_state(struct amdgpu_device *adev, adev 2987 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (crtc >= adev->mode_info.num_crtc) { adev 3010 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_set_hpd_irq_state(struct amdgpu_device *adev, adev 3017 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (hpd >= adev->mode_info.num_hpd) { adev 3040 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_set_crtc_irq_state(struct amdgpu_device *adev, adev 3047 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_crtc_vblank_interrupt_state(adev, 0, state); adev 3050 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_crtc_vblank_interrupt_state(adev, 1, state); adev 3053 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_crtc_vblank_interrupt_state(adev, 2, state); adev 3056 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_crtc_vblank_interrupt_state(adev, 3, state); adev 3059 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_crtc_vblank_interrupt_state(adev, 4, state); adev 3062 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_crtc_vblank_interrupt_state(adev, 5, state); adev 3065 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_crtc_vline_interrupt_state(adev, 0, state); adev 3068 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_crtc_vline_interrupt_state(adev, 1, state); adev 3071 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_crtc_vline_interrupt_state(adev, 2, state); adev 3074 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_crtc_vline_interrupt_state(adev, 3, state); adev 3077 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_crtc_vline_interrupt_state(adev, 4, state); adev 3080 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_set_crtc_vline_interrupt_state(adev, 5, state); adev 3088 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_set_pageflip_irq_state(struct amdgpu_device *adev, adev 3095 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (type >= adev->mode_info.num_crtc) { adev 3111 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_pageflip_irq(struct amdgpu_device *adev, adev 3121 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; adev 3123 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (crtc_id >= adev->mode_info.num_crtc) { adev 3137 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c spin_lock_irqsave(&adev->ddev->event_lock, flags); adev 3144 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 3156 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 3164 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_hpd_int_ack(struct amdgpu_device *adev, adev 3169 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (hpd >= adev->mode_info.num_hpd) { adev 3179 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_crtc_vblank_int_ack(struct amdgpu_device *adev, adev 3184 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (crtc >= adev->mode_info.num_crtc) { adev 3194 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_crtc_vline_int_ack(struct amdgpu_device *adev, adev 3199 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (crtc >= adev->mode_info.num_crtc) { adev 3209 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_crtc_irq(struct amdgpu_device *adev, adev 3215 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c unsigned int irq_type = amdgpu_display_crtc_idx_to_irq_type(adev, crtc); adev 3220 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_crtc_vblank_int_ack(adev, crtc); adev 3224 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (amdgpu_irq_enabled(adev, source, irq_type)) { adev 3225 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c drm_handle_vblank(adev->ddev, crtc); adev 3232 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_crtc_vline_int_ack(adev, crtc); adev 3247 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static int dce_v10_0_hpd_irq(struct amdgpu_device *adev, adev 3254 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (entry->src_data[0] >= adev->mode_info.num_hpd) { adev 3264 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dce_v10_0_hpd_int_ack(adev, hpd); adev 3265 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c schedule_work(&adev->hotplug_work); adev 3325 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 3337 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c dig->afmt = adev->mode_info.afmt[dig->dig_encoder]; adev 3341 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_scratch_regs_lock(adev, true); adev 3365 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct amdgpu_device *adev = dev->dev_private; adev 3369 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_atombios_scratch_regs_lock(adev, false); adev 3460 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_encoder_add(struct amdgpu_device *adev, adev 3465 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c struct drm_device *dev = adev->ddev; adev 3485 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c switch (adev->mode_info.num_crtc) { adev 3578 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_set_display_funcs(struct amdgpu_device *adev) adev 3580 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->mode_info.funcs = &dce_v10_0_display_funcs; adev 3598 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c static void dce_v10_0_set_irq_funcs(struct amdgpu_device *adev) adev 3600 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c if (adev->mode_info.num_crtc > 0) adev 3601 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + adev->mode_info.num_crtc; adev 3603 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->crtc_irq.num_types = 0; adev 3604 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->crtc_irq.funcs = &dce_v10_0_crtc_irq_funcs; adev 3606 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->pageflip_irq.num_types = adev->mode_info.num_crtc; adev 3607 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->pageflip_irq.funcs = &dce_v10_0_pageflip_irq_funcs; adev 3609 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->hpd_irq.num_types = adev->mode_info.num_hpd; adev 3610 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c adev->hpd_irq.funcs = &dce_v10_0_hpd_irq_funcs; adev 31 drivers/gpu/drm/amd/amdgpu/dce_v10_0.h void dce_v10_0_disable_dce(struct amdgpu_device *adev); adev 50 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_set_display_funcs(struct amdgpu_device *adev); adev 51 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_set_irq_funcs(struct amdgpu_device *adev); adev 159 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_init_golden_registers(struct amdgpu_device *adev) adev 161 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c switch (adev->asic_type) { adev 163 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_device_program_register_sequence(adev, adev 166 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_device_program_register_sequence(adev, adev 171 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_device_program_register_sequence(adev, adev 177 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_device_program_register_sequence(adev, adev 183 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_device_program_register_sequence(adev, adev 192 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static u32 dce_v11_0_audio_endpt_rreg(struct amdgpu_device *adev, adev 198 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); adev 201 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); adev 206 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_audio_endpt_wreg(struct amdgpu_device *adev, adev 211 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); adev 214 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); adev 217 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static u32 dce_v11_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) adev 219 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (crtc < 0 || crtc >= adev->mode_info.num_crtc) adev 225 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_pageflip_interrupt_init(struct amdgpu_device *adev) adev 230 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) adev 231 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_irq_get(adev, &adev->pageflip_irq, i); adev 234 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_pageflip_interrupt_fini(struct amdgpu_device *adev) adev 239 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) adev 240 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_irq_put(adev, &adev->pageflip_irq, i); adev 253 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_page_flip(struct amdgpu_device *adev, adev 256 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; adev 278 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, adev 281 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc)) adev 299 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static bool dce_v11_0_hpd_sense(struct amdgpu_device *adev, adev 304 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (hpd >= adev->mode_info.num_hpd) adev 322 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_hpd_set_polarity(struct amdgpu_device *adev, adev 326 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c bool connected = dce_v11_0_hpd_sense(adev, hpd); adev 328 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (hpd >= adev->mode_info.num_hpd) adev 347 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_hpd_init(struct amdgpu_device *adev) adev 349 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct drm_device *dev = adev->ddev; adev 356 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) adev 385 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); adev 386 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_irq_get(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); adev 398 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_hpd_fini(struct amdgpu_device *adev) adev 400 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct drm_device *dev = adev->ddev; adev 407 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) adev 414 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_irq_put(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); adev 418 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static u32 dce_v11_0_hpd_get_gpio_reg(struct amdgpu_device *adev) adev 423 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static bool dce_v11_0_is_display_hung(struct amdgpu_device *adev) adev 429 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 438 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 453 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_set_vga_render_state(struct amdgpu_device *adev, adev 475 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_get_num_crtc (struct amdgpu_device *adev) adev 479 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c switch (adev->asic_type) { adev 500 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c void dce_v11_0_disable_dce(struct amdgpu_device *adev) adev 503 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (amdgpu_atombios_has_dce_engine_info(adev)) { adev 507 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_vga_render_state(adev, false); adev 510 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < dce_v11_0_get_num_crtc(adev); i++) { adev 527 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 614 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static u32 dce_v11_0_line_buffer_adjust(struct amdgpu_device *adev, adev 637 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c buffer_alloc = (adev->flags & AMD_IS_APU) ? 2 : 4; adev 641 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c buffer_alloc = (adev->flags & AMD_IS_APU) ? 2 : 4; adev 656 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 688 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static u32 cik_get_number_of_dram_channels(struct amdgpu_device *adev) adev 1046 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_program_watermarks(struct amdgpu_device *adev, adev 1065 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (adev->pm.dpm_enabled) { adev 1067 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_dpm_get_mclk(adev, false) * 10; adev 1069 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_dpm_get_sclk(adev, false) * 10; adev 1071 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c wm_high.yclk = adev->pm.current_mclk * 10; adev 1072 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c wm_high.sclk = adev->pm.current_sclk * 10; adev 1088 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c wm_high.dram_channels = cik_get_number_of_dram_channels(adev); adev 1099 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c (adev->mode_info.disp_priority == 2)) { adev 1104 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (adev->pm.dpm_enabled) { adev 1106 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_dpm_get_mclk(adev, true) * 10; adev 1108 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_dpm_get_sclk(adev, true) * 10; adev 1110 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c wm_low.yclk = adev->pm.current_mclk * 10; adev 1111 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c wm_low.sclk = adev->pm.current_sclk * 10; adev 1127 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c wm_low.dram_channels = cik_get_number_of_dram_channels(adev); adev 1138 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c (adev->mode_info.disp_priority == 2)) { adev 1178 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_bandwidth_update(struct amdgpu_device *adev) adev 1184 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_display_update_priority(adev); adev 1186 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 1187 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (adev->mode_info.crtcs[i]->base.enabled) adev 1190 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 1191 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c mode = &adev->mode_info.crtcs[i]->base.mode; adev 1192 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c lb_size = dce_v11_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode); adev 1193 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_program_watermarks(adev, adev->mode_info.crtcs[i], adev 1198 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_audio_get_connected_pins(struct amdgpu_device *adev) adev 1203 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 1204 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c offset = adev->mode_info.audio.pin[i].offset; adev 1210 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.pin[i].connected = false; adev 1212 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.pin[i].connected = true; adev 1216 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static struct amdgpu_audio_pin *dce_v11_0_audio_get_pin(struct amdgpu_device *adev) adev 1220 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_audio_get_connected_pins(adev); adev 1222 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 1223 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (adev->mode_info.audio.pin[i].connected) adev 1224 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c return &adev->mode_info.audio.pin[i]; adev 1232 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1248 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1290 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1342 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1422 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_audio_enable(struct amdgpu_device *adev, adev 1445 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_audio_init(struct amdgpu_device *adev) adev 1452 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.enabled = true; adev 1454 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c switch (adev->asic_type) { adev 1457 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.num_pins = 7; adev 1461 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.num_pins = 8; adev 1465 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.num_pins = 6; adev 1471 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 1472 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.pin[i].channels = -1; adev 1473 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.pin[i].rate = -1; adev 1474 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.pin[i].bits_per_sample = -1; adev 1475 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.pin[i].status_bits = 0; adev 1476 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.pin[i].category_code = 0; adev 1477 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.pin[i].connected = false; adev 1478 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.pin[i].offset = pin_offsets[i]; adev 1479 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.pin[i].id = i; adev 1482 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 1488 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_audio_fini(struct amdgpu_device *adev) adev 1495 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (!adev->mode_info.audio.enabled) adev 1498 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) adev 1499 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 1501 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.audio.enabled = false; adev 1510 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 1546 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 1565 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 1596 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 1620 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dig->afmt->pin = dce_v11_0_audio_get_pin(adev); adev 1621 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_audio_enable(adev, dig->afmt->pin, false); adev 1770 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_audio_enable(adev, dig->afmt->pin, true); adev 1776 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 1790 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_audio_enable(adev, dig->afmt->pin, false); adev 1800 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_afmt_init(struct amdgpu_device *adev) adev 1804 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.num_dig; i++) adev 1805 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.afmt[i] = NULL; adev 1808 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.num_dig; i++) { adev 1809 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.afmt[i] = kzalloc(sizeof(struct amdgpu_afmt), GFP_KERNEL); adev 1810 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (adev->mode_info.afmt[i]) { adev 1811 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.afmt[i]->offset = dig_offsets[i]; adev 1812 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.afmt[i]->id = i; adev 1816 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c kfree(adev->mode_info.afmt[j]); adev 1817 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.afmt[j] = NULL; adev 1825 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_afmt_fini(struct amdgpu_device *adev) adev 1829 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.num_dig; i++) { adev 1830 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c kfree(adev->mode_info.afmt[i]); adev 1831 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.afmt[i] = NULL; adev 1849 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 1863 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 1877 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 2113 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_bandwidth_update(adev); adev 2122 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 2138 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 2268 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 2272 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if ((adev->asic_type == CHIP_POLARIS10) || adev 2273 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c (adev->asic_type == CHIP_POLARIS11) || adev 2274 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c (adev->asic_type == CHIP_POLARIS12) || adev 2275 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c (adev->asic_type == CHIP_VEGAM)) { adev 2309 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (adev->clock.dp_extclk) adev 2327 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (adev->asic_type == CHIP_CARRIZO || adev->asic_type == CHIP_STONEY) { adev 2349 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2364 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2375 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2393 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2563 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 2575 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c type = amdgpu_display_crtc_idx_to_irq_type(adev, adev 2577 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_irq_update(adev, &adev->crtc_irq, type); adev 2578 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_irq_update(adev, &adev->pageflip_irq, type); adev 2596 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_pm_compute_clocks(adev); adev 2617 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 2640 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 2641 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (adev->mode_info.crtcs[i] && adev 2642 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.crtcs[i]->enabled && adev 2644 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { adev 2687 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 2692 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if ((adev->asic_type == CHIP_POLARIS10) || adev 2693 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c (adev->asic_type == CHIP_POLARIS11) || adev 2694 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c (adev->asic_type == CHIP_POLARIS12) || adev 2695 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c (adev->asic_type == CHIP_VEGAM)) { adev 2780 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_crtc_init(struct amdgpu_device *adev, int index) adev 2789 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c drm_crtc_init(adev->ddev, &amdgpu_crtc->base, &dce_v11_0_crtc_funcs); adev 2793 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.crtcs[index] = amdgpu_crtc; adev 2797 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width; adev 2798 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height; adev 2833 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2835 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->audio_endpt_rreg = &dce_v11_0_audio_endpt_rreg; adev 2836 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->audio_endpt_wreg = &dce_v11_0_audio_endpt_wreg; adev 2838 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_display_funcs(adev); adev 2840 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.num_crtc = dce_v11_0_get_num_crtc(adev); adev 2842 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c switch (adev->asic_type) { adev 2844 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.num_hpd = 6; adev 2845 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.num_dig = 9; adev 2848 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.num_hpd = 6; adev 2849 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.num_dig = 9; adev 2853 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.num_hpd = 6; adev 2854 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.num_dig = 6; adev 2858 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.num_hpd = 5; adev 2859 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.num_dig = 5; adev 2866 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_irq_funcs(adev); adev 2874 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2876 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 2877 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq); adev 2883 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i, &adev->pageflip_irq); adev 2889 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A, &adev->hpd_irq); adev 2893 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->ddev->mode_config.funcs = &amdgpu_mode_funcs; adev 2895 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->ddev->mode_config.async_page_flip = true; adev 2897 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->ddev->mode_config.max_width = 16384; adev 2898 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->ddev->mode_config.max_height = 16384; adev 2900 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->ddev->mode_config.preferred_depth = 24; adev 2901 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->ddev->mode_config.prefer_shadow = 1; adev 2903 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->ddev->mode_config.fb_base = adev->gmc.aper_base; adev 2905 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c r = amdgpu_display_modeset_create_props(adev); adev 2909 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->ddev->mode_config.max_width = 16384; adev 2910 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->ddev->mode_config.max_height = 16384; adev 2914 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 2915 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c r = dce_v11_0_crtc_init(adev, i); adev 2920 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (amdgpu_atombios_get_connector_info_from_object_table(adev)) adev 2921 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_display_print_display_setup(adev->ddev); adev 2926 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c r = dce_v11_0_afmt_init(adev); adev 2930 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c r = dce_v11_0_audio_init(adev); adev 2934 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c drm_kms_helper_poll_init(adev->ddev); adev 2936 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.mode_config_initialized = true; adev 2942 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2944 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c kfree(adev->mode_info.bios_hardcoded_edid); adev 2946 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c drm_kms_helper_poll_fini(adev->ddev); adev 2948 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_audio_fini(adev); adev 2950 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_afmt_fini(adev); adev 2952 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c drm_mode_config_cleanup(adev->ddev); adev 2953 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.mode_config_initialized = false; adev 2961 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2963 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_init_golden_registers(adev); adev 2966 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_vga_render_state(adev, false); adev 2968 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_powergate_init(adev); adev 2969 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_encoder_init_dig(adev); adev 2970 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if ((adev->asic_type == CHIP_POLARIS10) || adev 2971 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c (adev->asic_type == CHIP_POLARIS11) || adev 2972 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c (adev->asic_type == CHIP_POLARIS12) || adev 2973 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c (adev->asic_type == CHIP_VEGAM)) { adev 2974 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_set_dce_clock(adev, adev->clock.default_dispclk, adev 2976 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_set_dce_clock(adev, 0, adev 2979 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk); adev 2983 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_hpd_init(adev); adev 2985 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 2986 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 2989 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_pageflip_interrupt_init(adev); adev 2997 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2999 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_hpd_fini(adev); adev 3001 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 3002 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 3005 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_pageflip_interrupt_fini(adev); adev 3012 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3014 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.bl_level = adev 3015 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_encoder_get_backlight_level_from_reg(adev); adev 3022 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3025 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_encoder_set_backlight_level_to_reg(adev, adev 3026 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.bl_level); adev 3031 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (adev->mode_info.bl_encoder) { adev 3032 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c u8 bl_level = amdgpu_display_backlight_get_level(adev, adev 3033 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.bl_encoder); adev 3034 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_display_backlight_set_level(adev, adev->mode_info.bl_encoder, adev 3054 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3056 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (dce_v11_0_is_display_hung(adev)) adev 3062 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 3078 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_set_crtc_vblank_interrupt_state(struct amdgpu_device *adev, adev 3084 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (crtc >= adev->mode_info.num_crtc) { adev 3107 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_set_crtc_vline_interrupt_state(struct amdgpu_device *adev, adev 3113 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (crtc >= adev->mode_info.num_crtc) { adev 3136 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_set_hpd_irq_state(struct amdgpu_device *adev, adev 3143 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (hpd >= adev->mode_info.num_hpd) { adev 3166 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_set_crtc_irq_state(struct amdgpu_device *adev, adev 3173 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_crtc_vblank_interrupt_state(adev, 0, state); adev 3176 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_crtc_vblank_interrupt_state(adev, 1, state); adev 3179 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_crtc_vblank_interrupt_state(adev, 2, state); adev 3182 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_crtc_vblank_interrupt_state(adev, 3, state); adev 3185 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_crtc_vblank_interrupt_state(adev, 4, state); adev 3188 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_crtc_vblank_interrupt_state(adev, 5, state); adev 3191 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_crtc_vline_interrupt_state(adev, 0, state); adev 3194 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_crtc_vline_interrupt_state(adev, 1, state); adev 3197 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_crtc_vline_interrupt_state(adev, 2, state); adev 3200 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_crtc_vline_interrupt_state(adev, 3, state); adev 3203 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_crtc_vline_interrupt_state(adev, 4, state); adev 3206 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_set_crtc_vline_interrupt_state(adev, 5, state); adev 3214 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_set_pageflip_irq_state(struct amdgpu_device *adev, adev 3221 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (type >= adev->mode_info.num_crtc) { adev 3237 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_pageflip_irq(struct amdgpu_device *adev, adev 3247 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; adev 3249 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (crtc_id >= adev->mode_info.num_crtc) { adev 3263 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c spin_lock_irqsave(&adev->ddev->event_lock, flags); adev 3270 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 3282 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 3290 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_hpd_int_ack(struct amdgpu_device *adev, adev 3295 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (hpd >= adev->mode_info.num_hpd) { adev 3305 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_crtc_vblank_int_ack(struct amdgpu_device *adev, adev 3310 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (crtc < 0 || crtc >= adev->mode_info.num_crtc) { adev 3320 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_crtc_vline_int_ack(struct amdgpu_device *adev, adev 3325 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (crtc < 0 || crtc >= adev->mode_info.num_crtc) { adev 3335 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_crtc_irq(struct amdgpu_device *adev, adev 3341 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c unsigned int irq_type = amdgpu_display_crtc_idx_to_irq_type(adev, adev 3347 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_crtc_vblank_int_ack(adev, crtc); adev 3351 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (amdgpu_irq_enabled(adev, source, irq_type)) { adev 3352 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c drm_handle_vblank(adev->ddev, crtc); adev 3359 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_crtc_vline_int_ack(adev, crtc); adev 3374 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static int dce_v11_0_hpd_irq(struct amdgpu_device *adev, adev 3381 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (entry->src_data[0] >= adev->mode_info.num_hpd) { adev 3391 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dce_v11_0_hpd_int_ack(adev, hpd); adev 3392 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c schedule_work(&adev->hotplug_work); adev 3451 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 3463 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c dig->afmt = adev->mode_info.afmt[dig->dig_encoder]; adev 3467 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_scratch_regs_lock(adev, true); adev 3491 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct amdgpu_device *adev = dev->dev_private; adev 3495 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_atombios_scratch_regs_lock(adev, false); adev 3586 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_encoder_add(struct amdgpu_device *adev, adev 3591 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c struct drm_device *dev = adev->ddev; adev 3611 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c switch (adev->mode_info.num_crtc) { adev 3710 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_set_display_funcs(struct amdgpu_device *adev) adev 3712 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->mode_info.funcs = &dce_v11_0_display_funcs; adev 3730 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c static void dce_v11_0_set_irq_funcs(struct amdgpu_device *adev) adev 3732 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c if (adev->mode_info.num_crtc > 0) adev 3733 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + adev->mode_info.num_crtc; adev 3735 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->crtc_irq.num_types = 0; adev 3736 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->crtc_irq.funcs = &dce_v11_0_crtc_irq_funcs; adev 3738 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->pageflip_irq.num_types = adev->mode_info.num_crtc; adev 3739 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->pageflip_irq.funcs = &dce_v11_0_pageflip_irq_funcs; adev 3741 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->hpd_irq.num_types = adev->mode_info.num_hpd; adev 3742 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c adev->hpd_irq.funcs = &dce_v11_0_hpd_irq_funcs; adev 30 drivers/gpu/drm/amd/amdgpu/dce_v11_0.h void dce_v11_0_disable_dce(struct amdgpu_device *adev); adev 54 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_set_display_funcs(struct amdgpu_device *adev); adev 55 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_set_irq_funcs(struct amdgpu_device *adev); adev 125 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static u32 dce_v6_0_audio_endpt_rreg(struct amdgpu_device *adev, adev 131 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); adev 134 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); adev 139 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_audio_endpt_wreg(struct amdgpu_device *adev, adev 144 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); adev 148 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); adev 151 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static u32 dce_v6_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) adev 153 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (crtc >= adev->mode_info.num_crtc) adev 159 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_pageflip_interrupt_init(struct amdgpu_device *adev) adev 164 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) adev 165 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_irq_get(adev, &adev->pageflip_irq, i); adev 168 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_pageflip_interrupt_fini(struct amdgpu_device *adev) adev 173 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) adev 174 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_irq_put(adev, &adev->pageflip_irq, i); adev 190 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_page_flip(struct amdgpu_device *adev, adev 193 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; adev 212 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, adev 215 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc)) adev 233 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static bool dce_v6_0_hpd_sense(struct amdgpu_device *adev, adev 238 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (hpd >= adev->mode_info.num_hpd) adev 255 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_hpd_set_polarity(struct amdgpu_device *adev, adev 259 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c bool connected = dce_v6_0_hpd_sense(adev, hpd); adev 261 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (hpd >= adev->mode_info.num_hpd) adev 280 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_hpd_init(struct amdgpu_device *adev) adev 282 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct drm_device *dev = adev->ddev; adev 289 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) adev 309 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); adev 310 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_irq_get(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); adev 323 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_hpd_fini(struct amdgpu_device *adev) adev 325 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct drm_device *dev = adev->ddev; adev 332 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) adev 339 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_irq_put(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); adev 343 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static u32 dce_v6_0_hpd_get_gpio_reg(struct amdgpu_device *adev) adev 348 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_set_vga_render_state(struct amdgpu_device *adev, adev 357 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_get_num_crtc(struct amdgpu_device *adev) adev 359 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c switch (adev->asic_type) { adev 371 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c void dce_v6_0_disable_dce(struct amdgpu_device *adev) adev 374 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (amdgpu_atombios_has_dce_engine_info(adev)) { adev 378 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_vga_render_state(adev, false); adev 381 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < dce_v6_0_get_num_crtc(adev); i++) { adev 399 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 461 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static u32 si_get_number_of_dram_channels(struct amdgpu_device *adev) adev 819 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_program_watermarks(struct amdgpu_device *adev, adev 844 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dram_channels = si_get_number_of_dram_channels(adev); adev 847 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (adev->pm.dpm_enabled) { adev 849 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_dpm_get_mclk(adev, false) * 10; adev 851 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_dpm_get_sclk(adev, false) * 10; adev 853 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c wm_high.yclk = adev->pm.current_mclk * 10; adev 854 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c wm_high.sclk = adev->pm.current_sclk * 10; adev 873 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (adev->pm.dpm_enabled) { adev 876 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_dpm_get_mclk(adev, true) * 10; adev 878 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_dpm_get_sclk(adev, true) * 10; adev 880 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c wm_low.yclk = adev->pm.current_mclk * 10; adev 881 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c wm_low.sclk = adev->pm.current_sclk * 10; adev 910 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c (adev->mode_info.disp_priority == 2)) { adev 918 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c (adev->mode_info.disp_priority == 2)) { adev 984 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static u32 dce_v6_0_line_buffer_adjust(struct amdgpu_device *adev, adev 1022 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 1053 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_bandwidth_update(struct amdgpu_device *adev) adev 1060 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (!adev->mode_info.mode_config_initialized) adev 1063 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_display_update_priority(adev); adev 1065 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 1066 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (adev->mode_info.crtcs[i]->base.enabled) adev 1069 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.num_crtc; i += 2) { adev 1070 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c mode0 = &adev->mode_info.crtcs[i]->base.mode; adev 1071 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c mode1 = &adev->mode_info.crtcs[i+1]->base.mode; adev 1072 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode0, mode1); adev 1073 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_program_watermarks(adev, adev->mode_info.crtcs[i], lb_size, num_heads); adev 1074 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i+1], mode1, mode0); adev 1075 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_program_watermarks(adev, adev->mode_info.crtcs[i+1], lb_size, num_heads); adev 1079 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_audio_get_connected_pins(struct amdgpu_device *adev) adev 1084 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 1085 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c tmp = RREG32_AUDIO_ENDPT(adev->mode_info.audio.pin[i].offset, adev 1089 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.audio.pin[i].connected = false; adev 1091 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.audio.pin[i].connected = true; adev 1096 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static struct amdgpu_audio_pin *dce_v6_0_audio_get_pin(struct amdgpu_device *adev) adev 1100 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_audio_get_connected_pins(adev); adev 1102 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 1103 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (adev->mode_info.audio.pin[i].connected) adev 1104 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c return &adev->mode_info.audio.pin[i]; adev 1112 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1127 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1167 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1224 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1301 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_audio_enable(struct amdgpu_device *adev, adev 1323 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_audio_init(struct amdgpu_device *adev) adev 1330 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.audio.enabled = true; adev 1332 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c switch (adev->asic_type) { adev 1337 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.audio.num_pins = 6; adev 1340 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.audio.num_pins = 2; adev 1344 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 1345 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.audio.pin[i].channels = -1; adev 1346 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.audio.pin[i].rate = -1; adev 1347 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.audio.pin[i].bits_per_sample = -1; adev 1348 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.audio.pin[i].status_bits = 0; adev 1349 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.audio.pin[i].category_code = 0; adev 1350 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.audio.pin[i].connected = false; adev 1351 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.audio.pin[i].offset = pin_offsets[i]; adev 1352 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.audio.pin[i].id = i; adev 1353 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 1359 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_audio_fini(struct amdgpu_device *adev) adev 1366 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (!adev->mode_info.audio.enabled) adev 1369 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) adev 1370 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 1372 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.audio.enabled = false; adev 1378 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 1394 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 1432 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 1474 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 1508 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 1552 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 1565 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 1602 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 1631 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 1657 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dig->afmt->pin = dce_v6_0_audio_get_pin(adev); adev 1667 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_audio_enable(adev, dig->afmt->pin, false); adev 1678 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_audio_set_dto(encoder, adev->clock.default_dispclk * 10); adev 1691 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_audio_enable(adev, dig->afmt->pin, true); adev 1697 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 1712 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_audio_enable(adev, dig->afmt->pin, false); adev 1722 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_afmt_init(struct amdgpu_device *adev) adev 1726 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.num_dig; i++) adev 1727 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.afmt[i] = NULL; adev 1730 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.num_dig; i++) { adev 1731 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.afmt[i] = kzalloc(sizeof(struct amdgpu_afmt), GFP_KERNEL); adev 1732 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (adev->mode_info.afmt[i]) { adev 1733 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.afmt[i]->offset = dig_offsets[i]; adev 1734 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.afmt[i]->id = i; adev 1737 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c kfree(adev->mode_info.afmt[j]); adev 1738 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.afmt[j] = NULL; adev 1747 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_afmt_fini(struct amdgpu_device *adev) adev 1751 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.num_dig; i++) { adev 1752 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c kfree(adev->mode_info.afmt[i]); adev 1753 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.afmt[i] = NULL; adev 1771 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 1782 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 1793 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 2006 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_bandwidth_update(adev); adev 2016 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 2031 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 2131 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 2136 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (adev->clock.dp_extclk) adev 2160 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2175 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2187 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2205 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2376 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 2386 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c type = amdgpu_display_crtc_idx_to_irq_type(adev, adev 2388 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_irq_update(adev, &adev->crtc_irq, type); adev 2389 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_irq_update(adev, &adev->pageflip_irq, type); adev 2404 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_pm_compute_clocks(adev); adev 2426 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 2449 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 2450 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (adev->mode_info.crtcs[i] && adev 2451 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.crtcs[i]->enabled && adev 2453 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { adev 2560 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_crtc_init(struct amdgpu_device *adev, int index) adev 2569 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c drm_crtc_init(adev->ddev, &amdgpu_crtc->base, &dce_v6_0_crtc_funcs); adev 2573 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.crtcs[index] = amdgpu_crtc; adev 2577 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width; adev 2578 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height; adev 2593 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2595 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->audio_endpt_rreg = &dce_v6_0_audio_endpt_rreg; adev 2596 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->audio_endpt_wreg = &dce_v6_0_audio_endpt_wreg; adev 2598 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_display_funcs(adev); adev 2600 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.num_crtc = dce_v6_0_get_num_crtc(adev); adev 2602 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c switch (adev->asic_type) { adev 2606 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.num_hpd = 6; adev 2607 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.num_dig = 6; adev 2610 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.num_hpd = 2; adev 2611 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.num_dig = 2; adev 2617 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_irq_funcs(adev); adev 2626 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2628 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 2629 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq); adev 2635 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i, &adev->pageflip_irq); adev 2641 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 42, &adev->hpd_irq); adev 2645 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.mode_config_initialized = true; adev 2647 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->ddev->mode_config.funcs = &amdgpu_mode_funcs; adev 2648 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->ddev->mode_config.async_page_flip = true; adev 2649 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->ddev->mode_config.max_width = 16384; adev 2650 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->ddev->mode_config.max_height = 16384; adev 2651 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->ddev->mode_config.preferred_depth = 24; adev 2652 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->ddev->mode_config.prefer_shadow = 1; adev 2653 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->ddev->mode_config.fb_base = adev->gmc.aper_base; adev 2655 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c r = amdgpu_display_modeset_create_props(adev); adev 2659 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->ddev->mode_config.max_width = 16384; adev 2660 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->ddev->mode_config.max_height = 16384; adev 2663 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 2664 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c r = dce_v6_0_crtc_init(adev, i); adev 2669 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c ret = amdgpu_atombios_get_connector_info_from_object_table(adev); adev 2671 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_display_print_display_setup(adev->ddev); adev 2676 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c r = dce_v6_0_afmt_init(adev); adev 2680 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c r = dce_v6_0_audio_init(adev); adev 2684 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c drm_kms_helper_poll_init(adev->ddev); adev 2691 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2693 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c kfree(adev->mode_info.bios_hardcoded_edid); adev 2695 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c drm_kms_helper_poll_fini(adev->ddev); adev 2697 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_audio_fini(adev); adev 2698 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_afmt_fini(adev); adev 2700 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c drm_mode_config_cleanup(adev->ddev); adev 2701 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.mode_config_initialized = false; adev 2709 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2712 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_vga_render_state(adev, false); adev 2714 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_encoder_init_dig(adev); adev 2715 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk); adev 2718 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_hpd_init(adev); adev 2720 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 2721 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 2724 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_pageflip_interrupt_init(adev); adev 2732 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2734 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_hpd_fini(adev); adev 2736 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 2737 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 2740 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_pageflip_interrupt_fini(adev); adev 2747 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2749 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.bl_level = adev 2750 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_encoder_get_backlight_level_from_reg(adev); adev 2757 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2760 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_encoder_set_backlight_level_to_reg(adev, adev 2761 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.bl_level); adev 2766 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (adev->mode_info.bl_encoder) { adev 2767 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c u8 bl_level = amdgpu_display_backlight_get_level(adev, adev 2768 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.bl_encoder); adev 2769 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_display_backlight_set_level(adev, adev->mode_info.bl_encoder, adev 2792 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_set_crtc_vblank_interrupt_state(struct amdgpu_device *adev, adev 2798 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (crtc >= adev->mode_info.num_crtc) { adev 2843 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_set_crtc_vline_interrupt_state(struct amdgpu_device *adev, adev 2850 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_set_hpd_interrupt_state(struct amdgpu_device *adev, adev 2857 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (type >= adev->mode_info.num_hpd) { adev 2880 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_set_crtc_interrupt_state(struct amdgpu_device *adev, adev 2887 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_crtc_vblank_interrupt_state(adev, 0, state); adev 2890 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_crtc_vblank_interrupt_state(adev, 1, state); adev 2893 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_crtc_vblank_interrupt_state(adev, 2, state); adev 2896 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_crtc_vblank_interrupt_state(adev, 3, state); adev 2899 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_crtc_vblank_interrupt_state(adev, 4, state); adev 2902 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_crtc_vblank_interrupt_state(adev, 5, state); adev 2905 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_crtc_vline_interrupt_state(adev, 0, state); adev 2908 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_crtc_vline_interrupt_state(adev, 1, state); adev 2911 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_crtc_vline_interrupt_state(adev, 2, state); adev 2914 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_crtc_vline_interrupt_state(adev, 3, state); adev 2917 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_crtc_vline_interrupt_state(adev, 4, state); adev 2920 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dce_v6_0_set_crtc_vline_interrupt_state(adev, 5, state); adev 2928 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_crtc_irq(struct amdgpu_device *adev, adev 2934 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c unsigned int irq_type = amdgpu_display_crtc_idx_to_irq_type(adev, adev 2944 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (amdgpu_irq_enabled(adev, source, irq_type)) { adev 2945 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c drm_handle_vblank(adev->ddev, crtc); adev 2965 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_set_pageflip_interrupt_state(struct amdgpu_device *adev, adev 2972 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (type >= adev->mode_info.num_crtc) { adev 2988 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_pageflip_irq(struct amdgpu_device *adev, adev 2998 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; adev 3000 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (crtc_id >= adev->mode_info.num_crtc) { adev 3014 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c spin_lock_irqsave(&adev->ddev->event_lock, flags); adev 3021 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 3033 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 3041 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static int dce_v6_0_hpd_irq(struct amdgpu_device *adev, adev 3048 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (entry->src_data[0] >= adev->mode_info.num_hpd) { adev 3061 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c schedule_work(&adev->hotplug_work); adev 3124 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 3136 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c dig->afmt = adev->mode_info.afmt[dig->dig_encoder]; adev 3140 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_scratch_regs_lock(adev, true); adev 3165 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct amdgpu_device *adev = dev->dev_private; adev 3169 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_atombios_scratch_regs_lock(adev, false); adev 3270 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_encoder_add(struct amdgpu_device *adev, adev 3275 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct drm_device *dev = adev->ddev; adev 3295 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c switch (adev->mode_info.num_crtc) { adev 3387 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_set_display_funcs(struct amdgpu_device *adev) adev 3389 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->mode_info.funcs = &dce_v6_0_display_funcs; adev 3407 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c static void dce_v6_0_set_irq_funcs(struct amdgpu_device *adev) adev 3409 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c if (adev->mode_info.num_crtc > 0) adev 3410 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + adev->mode_info.num_crtc; adev 3412 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->crtc_irq.num_types = 0; adev 3413 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->crtc_irq.funcs = &dce_v6_0_crtc_irq_funcs; adev 3415 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->pageflip_irq.num_types = adev->mode_info.num_crtc; adev 3416 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->pageflip_irq.funcs = &dce_v6_0_pageflip_irq_funcs; adev 3418 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->hpd_irq.num_types = adev->mode_info.num_hpd; adev 3419 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c adev->hpd_irq.funcs = &dce_v6_0_hpd_irq_funcs; adev 30 drivers/gpu/drm/amd/amdgpu/dce_v6_0.h void dce_v6_0_disable_dce(struct amdgpu_device *adev); adev 51 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_set_display_funcs(struct amdgpu_device *adev); adev 52 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_set_irq_funcs(struct amdgpu_device *adev); adev 122 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static u32 dce_v8_0_audio_endpt_rreg(struct amdgpu_device *adev, adev 128 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); adev 131 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); adev 136 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_audio_endpt_wreg(struct amdgpu_device *adev, adev 141 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); adev 144 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); adev 147 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static u32 dce_v8_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) adev 149 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (crtc >= adev->mode_info.num_crtc) adev 155 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_pageflip_interrupt_init(struct amdgpu_device *adev) adev 160 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) adev 161 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_irq_get(adev, &adev->pageflip_irq, i); adev 164 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_pageflip_interrupt_fini(struct amdgpu_device *adev) adev 169 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) adev 170 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_irq_put(adev, &adev->pageflip_irq, i); adev 183 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_page_flip(struct amdgpu_device *adev, adev 186 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; adev 205 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, adev 208 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc)) adev 226 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static bool dce_v8_0_hpd_sense(struct amdgpu_device *adev, adev 231 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (hpd >= adev->mode_info.num_hpd) adev 249 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_hpd_set_polarity(struct amdgpu_device *adev, adev 253 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c bool connected = dce_v8_0_hpd_sense(adev, hpd); adev 255 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (hpd >= adev->mode_info.num_hpd) adev 274 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_hpd_init(struct amdgpu_device *adev) adev 276 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct drm_device *dev = adev->ddev; adev 283 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) adev 303 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); adev 304 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_irq_get(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); adev 316 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_hpd_fini(struct amdgpu_device *adev) adev 318 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct drm_device *dev = adev->ddev; adev 325 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) adev 332 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_irq_put(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd); adev 336 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static u32 dce_v8_0_hpd_get_gpio_reg(struct amdgpu_device *adev) adev 341 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static bool dce_v8_0_is_display_hung(struct amdgpu_device *adev) adev 347 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 355 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 370 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_set_vga_render_state(struct amdgpu_device *adev, adev 392 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_get_num_crtc(struct amdgpu_device *adev) adev 396 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c switch (adev->asic_type) { adev 414 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c void dce_v8_0_disable_dce(struct amdgpu_device *adev) adev 417 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (amdgpu_atombios_has_dce_engine_info(adev)) { adev 421 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_vga_render_state(adev, false); adev 424 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < dce_v8_0_get_num_crtc(adev); i++) { adev 441 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 525 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static u32 dce_v8_0_line_buffer_adjust(struct amdgpu_device *adev, adev 548 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c buffer_alloc = (adev->flags & AMD_IS_APU) ? 2 : 4; adev 552 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c buffer_alloc = (adev->flags & AMD_IS_APU) ? 2 : 4; adev 565 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 597 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static u32 cik_get_number_of_dram_channels(struct amdgpu_device *adev) adev 955 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_program_watermarks(struct amdgpu_device *adev, adev 974 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (adev->pm.dpm_enabled) { adev 976 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_dpm_get_mclk(adev, false) * 10; adev 978 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_dpm_get_sclk(adev, false) * 10; adev 980 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c wm_high.yclk = adev->pm.current_mclk * 10; adev 981 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c wm_high.sclk = adev->pm.current_sclk * 10; adev 997 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c wm_high.dram_channels = cik_get_number_of_dram_channels(adev); adev 1008 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c (adev->mode_info.disp_priority == 2)) { adev 1013 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (adev->pm.dpm_enabled) { adev 1015 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_dpm_get_mclk(adev, true) * 10; adev 1017 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_dpm_get_sclk(adev, true) * 10; adev 1019 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c wm_low.yclk = adev->pm.current_mclk * 10; adev 1020 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c wm_low.sclk = adev->pm.current_sclk * 10; adev 1036 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c wm_low.dram_channels = cik_get_number_of_dram_channels(adev); adev 1047 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c (adev->mode_info.disp_priority == 2)) { adev 1089 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_bandwidth_update(struct amdgpu_device *adev) adev 1095 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_display_update_priority(adev); adev 1097 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 1098 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (adev->mode_info.crtcs[i]->base.enabled) adev 1101 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 1102 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c mode = &adev->mode_info.crtcs[i]->base.mode; adev 1103 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c lb_size = dce_v8_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode); adev 1104 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_program_watermarks(adev, adev->mode_info.crtcs[i], adev 1109 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_audio_get_connected_pins(struct amdgpu_device *adev) adev 1114 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 1115 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c offset = adev->mode_info.audio.pin[i].offset; adev 1121 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.pin[i].connected = false; adev 1123 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.pin[i].connected = true; adev 1127 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static struct amdgpu_audio_pin *dce_v8_0_audio_get_pin(struct amdgpu_device *adev) adev 1131 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_audio_get_connected_pins(adev); adev 1133 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 1134 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (adev->mode_info.audio.pin[i].connected) adev 1135 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c return &adev->mode_info.audio.pin[i]; adev 1143 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1160 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1217 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1266 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 1350 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_audio_enable(struct amdgpu_device *adev, adev 1372 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_audio_init(struct amdgpu_device *adev) adev 1379 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.enabled = true; adev 1381 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (adev->asic_type == CHIP_KAVERI) /* KV: 4 streams, 7 endpoints */ adev 1382 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.num_pins = 7; adev 1383 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c else if ((adev->asic_type == CHIP_KABINI) || adev 1384 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c (adev->asic_type == CHIP_MULLINS)) /* KB/ML: 2 streams, 3 endpoints */ adev 1385 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.num_pins = 3; adev 1386 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c else if ((adev->asic_type == CHIP_BONAIRE) || adev 1387 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c (adev->asic_type == CHIP_HAWAII))/* BN/HW: 6 streams, 7 endpoints */ adev 1388 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.num_pins = 7; adev 1390 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.num_pins = 3; adev 1392 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 1393 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.pin[i].channels = -1; adev 1394 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.pin[i].rate = -1; adev 1395 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.pin[i].bits_per_sample = -1; adev 1396 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.pin[i].status_bits = 0; adev 1397 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.pin[i].category_code = 0; adev 1398 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.pin[i].connected = false; adev 1399 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.pin[i].offset = pin_offsets[i]; adev 1400 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.pin[i].id = i; adev 1403 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 1409 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_audio_fini(struct amdgpu_device *adev) adev 1416 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (!adev->mode_info.audio.enabled) adev 1419 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) adev 1420 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 1422 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.audio.enabled = false; adev 1431 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 1454 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 1474 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 1501 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 1527 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dig->afmt->pin = dce_v8_0_audio_get_pin(adev); adev 1528 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_audio_enable(adev, dig->afmt->pin, false); adev 1657 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_audio_enable(adev, dig->afmt->pin, true); adev 1663 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 1677 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_audio_enable(adev, dig->afmt->pin, false); adev 1687 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_afmt_init(struct amdgpu_device *adev) adev 1691 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.num_dig; i++) adev 1692 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.afmt[i] = NULL; adev 1695 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.num_dig; i++) { adev 1696 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.afmt[i] = kzalloc(sizeof(struct amdgpu_afmt), GFP_KERNEL); adev 1697 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (adev->mode_info.afmt[i]) { adev 1698 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.afmt[i]->offset = dig_offsets[i]; adev 1699 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.afmt[i]->id = i; adev 1703 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c kfree(adev->mode_info.afmt[j]); adev 1704 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.afmt[j] = NULL; adev 1712 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_afmt_fini(struct amdgpu_device *adev) adev 1716 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.num_dig; i++) { adev 1717 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c kfree(adev->mode_info.afmt[i]); adev 1718 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.afmt[i] = NULL; adev 1736 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 1750 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 1764 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 1980 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_bandwidth_update(adev); adev 1989 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 2003 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 2125 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 2130 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (adev->clock.dp_extclk) adev 2146 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if ((adev->asic_type == CHIP_KABINI) || adev 2147 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c (adev->asic_type == CHIP_MULLINS)) { adev 2173 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2188 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2198 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2215 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 2385 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 2397 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c type = amdgpu_display_crtc_idx_to_irq_type(adev, adev 2399 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_irq_update(adev, &adev->crtc_irq, type); adev 2400 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_irq_update(adev, &adev->pageflip_irq, type); adev 2418 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_pm_compute_clocks(adev); adev 2439 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 2462 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 2463 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (adev->mode_info.crtcs[i] && adev 2464 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.crtcs[i]->enabled && adev 2466 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { adev 2483 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if ((adev->asic_type == CHIP_KAVERI) || adev 2484 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c (adev->asic_type == CHIP_BONAIRE) || adev 2485 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c (adev->asic_type == CHIP_HAWAII)) adev 2580 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_crtc_init(struct amdgpu_device *adev, int index) adev 2589 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c drm_crtc_init(adev->ddev, &amdgpu_crtc->base, &dce_v8_0_crtc_funcs); adev 2593 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.crtcs[index] = amdgpu_crtc; adev 2597 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width; adev 2598 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height; adev 2613 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2615 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->audio_endpt_rreg = &dce_v8_0_audio_endpt_rreg; adev 2616 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->audio_endpt_wreg = &dce_v8_0_audio_endpt_wreg; adev 2618 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_display_funcs(adev); adev 2620 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.num_crtc = dce_v8_0_get_num_crtc(adev); adev 2622 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c switch (adev->asic_type) { adev 2625 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.num_hpd = 6; adev 2626 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.num_dig = 6; adev 2629 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.num_hpd = 6; adev 2630 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.num_dig = 7; adev 2634 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.num_hpd = 6; adev 2635 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.num_dig = 6; /* ? */ adev 2642 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_irq_funcs(adev); adev 2650 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2652 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 2653 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq); adev 2659 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i, &adev->pageflip_irq); adev 2665 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 42, &adev->hpd_irq); adev 2669 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->ddev->mode_config.funcs = &amdgpu_mode_funcs; adev 2671 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->ddev->mode_config.async_page_flip = true; adev 2673 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->ddev->mode_config.max_width = 16384; adev 2674 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->ddev->mode_config.max_height = 16384; adev 2676 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->ddev->mode_config.preferred_depth = 24; adev 2677 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->ddev->mode_config.prefer_shadow = 1; adev 2679 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->ddev->mode_config.fb_base = adev->gmc.aper_base; adev 2681 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c r = amdgpu_display_modeset_create_props(adev); adev 2685 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->ddev->mode_config.max_width = 16384; adev 2686 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->ddev->mode_config.max_height = 16384; adev 2689 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 2690 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c r = dce_v8_0_crtc_init(adev, i); adev 2695 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (amdgpu_atombios_get_connector_info_from_object_table(adev)) adev 2696 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_display_print_display_setup(adev->ddev); adev 2701 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c r = dce_v8_0_afmt_init(adev); adev 2705 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c r = dce_v8_0_audio_init(adev); adev 2709 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c drm_kms_helper_poll_init(adev->ddev); adev 2711 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.mode_config_initialized = true; adev 2717 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2719 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c kfree(adev->mode_info.bios_hardcoded_edid); adev 2721 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c drm_kms_helper_poll_fini(adev->ddev); adev 2723 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_audio_fini(adev); adev 2725 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_afmt_fini(adev); adev 2727 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c drm_mode_config_cleanup(adev->ddev); adev 2728 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.mode_config_initialized = false; adev 2736 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2739 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_vga_render_state(adev, false); adev 2741 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_encoder_init_dig(adev); adev 2742 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk); adev 2745 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_hpd_init(adev); adev 2747 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 2748 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 2751 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_pageflip_interrupt_init(adev); adev 2759 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2761 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_hpd_fini(adev); adev 2763 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 2764 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); adev 2767 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_pageflip_interrupt_fini(adev); adev 2774 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2776 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.bl_level = adev 2777 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_encoder_get_backlight_level_from_reg(adev); adev 2784 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2787 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_encoder_set_backlight_level_to_reg(adev, adev 2788 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.bl_level); adev 2793 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (adev->mode_info.bl_encoder) { adev 2794 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c u8 bl_level = amdgpu_display_backlight_get_level(adev, adev 2795 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.bl_encoder); adev 2796 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_display_backlight_set_level(adev, adev->mode_info.bl_encoder, adev 2816 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2818 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (dce_v8_0_is_display_hung(adev)) adev 2824 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 2840 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_set_crtc_vblank_interrupt_state(struct amdgpu_device *adev, adev 2846 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (crtc >= adev->mode_info.num_crtc) { adev 2891 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_set_crtc_vline_interrupt_state(struct amdgpu_device *adev, adev 2897 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (crtc >= adev->mode_info.num_crtc) { adev 2942 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_set_hpd_interrupt_state(struct amdgpu_device *adev, adev 2949 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (type >= adev->mode_info.num_hpd) { adev 2972 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_set_crtc_interrupt_state(struct amdgpu_device *adev, adev 2979 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_crtc_vblank_interrupt_state(adev, 0, state); adev 2982 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_crtc_vblank_interrupt_state(adev, 1, state); adev 2985 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_crtc_vblank_interrupt_state(adev, 2, state); adev 2988 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_crtc_vblank_interrupt_state(adev, 3, state); adev 2991 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_crtc_vblank_interrupt_state(adev, 4, state); adev 2994 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_crtc_vblank_interrupt_state(adev, 5, state); adev 2997 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_crtc_vline_interrupt_state(adev, 0, state); adev 3000 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_crtc_vline_interrupt_state(adev, 1, state); adev 3003 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_crtc_vline_interrupt_state(adev, 2, state); adev 3006 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_crtc_vline_interrupt_state(adev, 3, state); adev 3009 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_crtc_vline_interrupt_state(adev, 4, state); adev 3012 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dce_v8_0_set_crtc_vline_interrupt_state(adev, 5, state); adev 3020 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_crtc_irq(struct amdgpu_device *adev, adev 3026 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c unsigned int irq_type = amdgpu_display_crtc_idx_to_irq_type(adev, adev 3036 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (amdgpu_irq_enabled(adev, source, irq_type)) { adev 3037 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c drm_handle_vblank(adev->ddev, crtc); adev 3057 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_set_pageflip_interrupt_state(struct amdgpu_device *adev, adev 3064 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (type >= adev->mode_info.num_crtc) { adev 3080 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_pageflip_irq(struct amdgpu_device *adev, adev 3090 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; adev 3092 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (crtc_id >= adev->mode_info.num_crtc) { adev 3106 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c spin_lock_irqsave(&adev->ddev->event_lock, flags); adev 3113 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 3125 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 3133 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static int dce_v8_0_hpd_irq(struct amdgpu_device *adev, adev 3140 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (entry->src_data[0] >= adev->mode_info.num_hpd) { adev 3153 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c schedule_work(&adev->hotplug_work); adev 3213 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = encoder->dev->dev_private; adev 3225 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c dig->afmt = adev->mode_info.afmt[dig->dig_encoder]; adev 3229 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_scratch_regs_lock(adev, true); adev 3253 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct amdgpu_device *adev = dev->dev_private; adev 3257 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_atombios_scratch_regs_lock(adev, false); adev 3348 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_encoder_add(struct amdgpu_device *adev, adev 3353 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c struct drm_device *dev = adev->ddev; adev 3373 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c switch (adev->mode_info.num_crtc) { adev 3466 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_set_display_funcs(struct amdgpu_device *adev) adev 3468 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->mode_info.funcs = &dce_v8_0_display_funcs; adev 3486 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c static void dce_v8_0_set_irq_funcs(struct amdgpu_device *adev) adev 3488 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c if (adev->mode_info.num_crtc > 0) adev 3489 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + adev->mode_info.num_crtc; adev 3491 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->crtc_irq.num_types = 0; adev 3492 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->crtc_irq.funcs = &dce_v8_0_crtc_irq_funcs; adev 3494 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->pageflip_irq.num_types = adev->mode_info.num_crtc; adev 3495 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->pageflip_irq.funcs = &dce_v8_0_pageflip_irq_funcs; adev 3497 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->hpd_irq.num_types = adev->mode_info.num_hpd; adev 3498 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c adev->hpd_irq.funcs = &dce_v8_0_hpd_irq_funcs; adev 33 drivers/gpu/drm/amd/amdgpu/dce_v8_0.h void dce_v8_0_disable_dce(struct amdgpu_device *adev); adev 46 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static void dce_virtual_set_display_funcs(struct amdgpu_device *adev); adev 47 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static void dce_virtual_set_irq_funcs(struct amdgpu_device *adev); adev 48 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static int dce_virtual_connector_encoder_init(struct amdgpu_device *adev, adev 50 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static void dce_virtual_set_crtc_vblank_interrupt_state(struct amdgpu_device *adev, adev 54 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static u32 dce_virtual_vblank_get_counter(struct amdgpu_device *adev, int crtc) adev 59 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static void dce_virtual_page_flip(struct amdgpu_device *adev, adev 65 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static int dce_virtual_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, adev 74 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static bool dce_virtual_hpd_sense(struct amdgpu_device *adev, adev 80 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static void dce_virtual_hpd_set_polarity(struct amdgpu_device *adev, adev 86 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static u32 dce_virtual_hpd_get_gpio_reg(struct amdgpu_device *adev) adev 99 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static void dce_virtual_bandwidth_update(struct amdgpu_device *adev) adev 131 drivers/gpu/drm/amd/amdgpu/dce_virtual.c struct amdgpu_device *adev = dev->dev_private; adev 135 drivers/gpu/drm/amd/amdgpu/dce_virtual.c if (amdgpu_sriov_vf(adev)) adev 142 drivers/gpu/drm/amd/amdgpu/dce_virtual.c type = amdgpu_display_crtc_idx_to_irq_type(adev, adev 144 drivers/gpu/drm/amd/amdgpu/dce_virtual.c amdgpu_irq_update(adev, &adev->crtc_irq, type); adev 223 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static int dce_virtual_crtc_init(struct amdgpu_device *adev, int index) adev 232 drivers/gpu/drm/amd/amdgpu/dce_virtual.c drm_crtc_init(adev->ddev, &amdgpu_crtc->base, &dce_virtual_crtc_funcs); adev 236 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->mode_info.crtcs[index] = amdgpu_crtc; adev 249 drivers/gpu/drm/amd/amdgpu/dce_virtual.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 251 drivers/gpu/drm/amd/amdgpu/dce_virtual.c dce_virtual_set_display_funcs(adev); adev 252 drivers/gpu/drm/amd/amdgpu/dce_virtual.c dce_virtual_set_irq_funcs(adev); adev 254 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->mode_info.num_hpd = 1; adev 255 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->mode_info.num_dig = 1; adev 362 drivers/gpu/drm/amd/amdgpu/dce_virtual.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 364 drivers/gpu/drm/amd/amdgpu/dce_virtual.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SMU_DISP_TIMER2_TRIGGER, &adev->crtc_irq); adev 368 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->ddev->max_vblank_count = 0; adev 370 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->ddev->mode_config.funcs = &amdgpu_mode_funcs; adev 372 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->ddev->mode_config.max_width = 16384; adev 373 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->ddev->mode_config.max_height = 16384; adev 375 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->ddev->mode_config.preferred_depth = 24; adev 376 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->ddev->mode_config.prefer_shadow = 1; adev 378 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->ddev->mode_config.fb_base = adev->gmc.aper_base; adev 380 drivers/gpu/drm/amd/amdgpu/dce_virtual.c r = amdgpu_display_modeset_create_props(adev); adev 384 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->ddev->mode_config.max_width = 16384; adev 385 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->ddev->mode_config.max_height = 16384; adev 388 drivers/gpu/drm/amd/amdgpu/dce_virtual.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 389 drivers/gpu/drm/amd/amdgpu/dce_virtual.c r = dce_virtual_crtc_init(adev, i); adev 392 drivers/gpu/drm/amd/amdgpu/dce_virtual.c r = dce_virtual_connector_encoder_init(adev, i); adev 397 drivers/gpu/drm/amd/amdgpu/dce_virtual.c drm_kms_helper_poll_init(adev->ddev); adev 399 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->mode_info.mode_config_initialized = true; adev 405 drivers/gpu/drm/amd/amdgpu/dce_virtual.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 407 drivers/gpu/drm/amd/amdgpu/dce_virtual.c kfree(adev->mode_info.bios_hardcoded_edid); adev 409 drivers/gpu/drm/amd/amdgpu/dce_virtual.c drm_kms_helper_poll_fini(adev->ddev); adev 411 drivers/gpu/drm/amd/amdgpu/dce_virtual.c drm_mode_config_cleanup(adev->ddev); adev 413 drivers/gpu/drm/amd/amdgpu/dce_virtual.c memset(adev->mode_info.crtcs, 0, sizeof(adev->mode_info.crtcs[0]) * AMDGPU_MAX_CRTCS); adev 414 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->mode_info.mode_config_initialized = false; adev 420 drivers/gpu/drm/amd/amdgpu/dce_virtual.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 422 drivers/gpu/drm/amd/amdgpu/dce_virtual.c switch (adev->asic_type) { adev 428 drivers/gpu/drm/amd/amdgpu/dce_virtual.c dce_v6_0_disable_dce(adev); adev 437 drivers/gpu/drm/amd/amdgpu/dce_virtual.c dce_v8_0_disable_dce(adev); adev 442 drivers/gpu/drm/amd/amdgpu/dce_virtual.c dce_v10_0_disable_dce(adev); adev 449 drivers/gpu/drm/amd/amdgpu/dce_virtual.c dce_v11_0_disable_dce(adev); adev 465 drivers/gpu/drm/amd/amdgpu/dce_virtual.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 468 drivers/gpu/drm/amd/amdgpu/dce_virtual.c for (i = 0; i<adev->mode_info.num_crtc; i++) adev 469 drivers/gpu/drm/amd/amdgpu/dce_virtual.c if (adev->mode_info.crtcs[i]) adev 470 drivers/gpu/drm/amd/amdgpu/dce_virtual.c dce_virtual_set_crtc_vblank_interrupt_state(adev, i, AMDGPU_IRQ_STATE_DISABLE); adev 585 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static int dce_virtual_connector_encoder_init(struct amdgpu_device *adev, adev 596 drivers/gpu/drm/amd/amdgpu/dce_virtual.c drm_encoder_init(adev->ddev, encoder, &dce_virtual_encoder_funcs, adev 607 drivers/gpu/drm/amd/amdgpu/dce_virtual.c drm_connector_init(adev->ddev, connector, &dce_virtual_connector_funcs, adev 635 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static void dce_virtual_set_display_funcs(struct amdgpu_device *adev) adev 637 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->mode_info.funcs = &dce_virtual_display_funcs; adev 640 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static int dce_virtual_pageflip(struct amdgpu_device *adev, adev 647 drivers/gpu/drm/amd/amdgpu/dce_virtual.c amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; adev 649 drivers/gpu/drm/amd/amdgpu/dce_virtual.c if (crtc_id >= adev->mode_info.num_crtc) { adev 658 drivers/gpu/drm/amd/amdgpu/dce_virtual.c spin_lock_irqsave(&adev->ddev->event_lock, flags); adev 665 drivers/gpu/drm/amd/amdgpu/dce_virtual.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 677 drivers/gpu/drm/amd/amdgpu/dce_virtual.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 692 drivers/gpu/drm/amd/amdgpu/dce_virtual.c struct amdgpu_device *adev = ddev->dev_private; adev 695 drivers/gpu/drm/amd/amdgpu/dce_virtual.c dce_virtual_pageflip(adev, amdgpu_crtc->crtc_id); adev 702 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static void dce_virtual_set_crtc_vblank_interrupt_state(struct amdgpu_device *adev, adev 706 drivers/gpu/drm/amd/amdgpu/dce_virtual.c if (crtc >= adev->mode_info.num_crtc || !adev->mode_info.crtcs[crtc]) { adev 711 drivers/gpu/drm/amd/amdgpu/dce_virtual.c if (state && !adev->mode_info.crtcs[crtc]->vsync_timer_enabled) { adev 713 drivers/gpu/drm/amd/amdgpu/dce_virtual.c hrtimer_init(&adev->mode_info.crtcs[crtc]->vblank_timer, adev 715 drivers/gpu/drm/amd/amdgpu/dce_virtual.c hrtimer_set_expires(&adev->mode_info.crtcs[crtc]->vblank_timer, adev 717 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->mode_info.crtcs[crtc]->vblank_timer.function = adev 719 drivers/gpu/drm/amd/amdgpu/dce_virtual.c hrtimer_start(&adev->mode_info.crtcs[crtc]->vblank_timer, adev 721 drivers/gpu/drm/amd/amdgpu/dce_virtual.c } else if (!state && adev->mode_info.crtcs[crtc]->vsync_timer_enabled) { adev 723 drivers/gpu/drm/amd/amdgpu/dce_virtual.c hrtimer_cancel(&adev->mode_info.crtcs[crtc]->vblank_timer); adev 726 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->mode_info.crtcs[crtc]->vsync_timer_enabled = state; adev 731 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static int dce_virtual_set_crtc_irq_state(struct amdgpu_device *adev, adev 739 drivers/gpu/drm/amd/amdgpu/dce_virtual.c dce_virtual_set_crtc_vblank_interrupt_state(adev, type, state); adev 749 drivers/gpu/drm/amd/amdgpu/dce_virtual.c static void dce_virtual_set_irq_funcs(struct amdgpu_device *adev) adev 751 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VBLANK6 + 1; adev 752 drivers/gpu/drm/amd/amdgpu/dce_virtual.c adev->crtc_irq.funcs = &dce_virtual_crtc_irq_funcs; adev 32 drivers/gpu/drm/amd/amdgpu/df_v1_7.c static void df_v1_7_sw_init(struct amdgpu_device *adev) adev 36 drivers/gpu/drm/amd/amdgpu/df_v1_7.c static void df_v1_7_enable_broadcast_mode(struct amdgpu_device *adev, adev 50 drivers/gpu/drm/amd/amdgpu/df_v1_7.c static u32 df_v1_7_get_fb_channel_number(struct amdgpu_device *adev) adev 61 drivers/gpu/drm/amd/amdgpu/df_v1_7.c static u32 df_v1_7_get_hbm_channel_number(struct amdgpu_device *adev) adev 65 drivers/gpu/drm/amd/amdgpu/df_v1_7.c fb_channel_number = adev->df_funcs->get_fb_channel_number(adev); adev 70 drivers/gpu/drm/amd/amdgpu/df_v1_7.c static void df_v1_7_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 76 drivers/gpu/drm/amd/amdgpu/df_v1_7.c adev->df_funcs->enable_broadcast_mode(adev, true); adev 78 drivers/gpu/drm/amd/amdgpu/df_v1_7.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_DF_MGCG)) { adev 91 drivers/gpu/drm/amd/amdgpu/df_v1_7.c adev->df_funcs->enable_broadcast_mode(adev, false); adev 94 drivers/gpu/drm/amd/amdgpu/df_v1_7.c static void df_v1_7_get_clockgating_state(struct amdgpu_device *adev, adev 105 drivers/gpu/drm/amd/amdgpu/df_v1_7.c static void df_v1_7_enable_ecc_force_par_wr_rmw(struct amdgpu_device *adev, adev 96 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static uint64_t df_v3_6_get_fica(struct amdgpu_device *adev, adev 102 drivers/gpu/drm/amd/amdgpu/df_v3_6.c address = adev->nbio_funcs->get_pcie_index_offset(adev); adev 103 drivers/gpu/drm/amd/amdgpu/df_v3_6.c data = adev->nbio_funcs->get_pcie_data_offset(adev); adev 105 drivers/gpu/drm/amd/amdgpu/df_v3_6.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 115 drivers/gpu/drm/amd/amdgpu/df_v3_6.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 120 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static void df_v3_6_set_fica(struct amdgpu_device *adev, uint32_t ficaa_val, adev 125 drivers/gpu/drm/amd/amdgpu/df_v3_6.c address = adev->nbio_funcs->get_pcie_index_offset(adev); adev 126 drivers/gpu/drm/amd/amdgpu/df_v3_6.c data = adev->nbio_funcs->get_pcie_data_offset(adev); adev 128 drivers/gpu/drm/amd/amdgpu/df_v3_6.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 138 drivers/gpu/drm/amd/amdgpu/df_v3_6.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 147 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static void df_v3_6_perfmon_rreg(struct amdgpu_device *adev, adev 153 drivers/gpu/drm/amd/amdgpu/df_v3_6.c address = adev->nbio_funcs->get_pcie_index_offset(adev); adev 154 drivers/gpu/drm/amd/amdgpu/df_v3_6.c data = adev->nbio_funcs->get_pcie_data_offset(adev); adev 156 drivers/gpu/drm/amd/amdgpu/df_v3_6.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 161 drivers/gpu/drm/amd/amdgpu/df_v3_6.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 170 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static void df_v3_6_perfmon_wreg(struct amdgpu_device *adev, uint32_t lo_addr, adev 175 drivers/gpu/drm/amd/amdgpu/df_v3_6.c address = adev->nbio_funcs->get_pcie_index_offset(adev); adev 176 drivers/gpu/drm/amd/amdgpu/df_v3_6.c data = adev->nbio_funcs->get_pcie_data_offset(adev); adev 178 drivers/gpu/drm/amd/amdgpu/df_v3_6.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 183 drivers/gpu/drm/amd/amdgpu/df_v3_6.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 191 drivers/gpu/drm/amd/amdgpu/df_v3_6.c struct amdgpu_device *adev; adev 196 drivers/gpu/drm/amd/amdgpu/df_v3_6.c adev = ddev->dev_private; adev 200 drivers/gpu/drm/amd/amdgpu/df_v3_6.c if (adev->df_perfmon_config_assign_mask[i] == 0) adev 211 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static void df_v3_6_sw_init(struct amdgpu_device *adev) adev 215 drivers/gpu/drm/amd/amdgpu/df_v3_6.c ret = device_create_file(adev->dev, &dev_attr_df_cntr_avail); adev 220 drivers/gpu/drm/amd/amdgpu/df_v3_6.c adev->df_perfmon_config_assign_mask[i] = 0; adev 223 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static void df_v3_6_enable_broadcast_mode(struct amdgpu_device *adev, adev 237 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static u32 df_v3_6_get_fb_channel_number(struct amdgpu_device *adev) adev 248 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static u32 df_v3_6_get_hbm_channel_number(struct amdgpu_device *adev) adev 252 drivers/gpu/drm/amd/amdgpu/df_v3_6.c fb_channel_number = adev->df_funcs->get_fb_channel_number(adev); adev 259 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static void df_v3_6_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 264 drivers/gpu/drm/amd/amdgpu/df_v3_6.c if (adev->cg_flags & AMD_CG_SUPPORT_DF_MGCG) { adev 266 drivers/gpu/drm/amd/amdgpu/df_v3_6.c adev->df_funcs->enable_broadcast_mode(adev, true); adev 285 drivers/gpu/drm/amd/amdgpu/df_v3_6.c adev->df_funcs->enable_broadcast_mode(adev, false); adev 289 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static void df_v3_6_get_clockgating_state(struct amdgpu_device *adev, adev 301 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static int df_v3_6_pmc_config_2_cntr(struct amdgpu_device *adev, adev 308 drivers/gpu/drm/amd/amdgpu/df_v3_6.c adev->df_perfmon_config_assign_mask[i]) adev 316 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static void df_v3_6_pmc_get_addr(struct amdgpu_device *adev, adev 322 drivers/gpu/drm/amd/amdgpu/df_v3_6.c int target_cntr = df_v3_6_pmc_config_2_cntr(adev, config); adev 351 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static void df_v3_6_pmc_get_read_settings(struct amdgpu_device *adev, adev 356 drivers/gpu/drm/amd/amdgpu/df_v3_6.c df_v3_6_pmc_get_addr(adev, config, 0, lo_base_addr, hi_base_addr); adev 360 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static int df_v3_6_pmc_get_ctrl_settings(struct amdgpu_device *adev, adev 371 drivers/gpu/drm/amd/amdgpu/df_v3_6.c df_v3_6_pmc_get_addr(adev, config, 1, lo_base_addr, hi_base_addr); adev 397 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static int df_v3_6_pmc_add_cntr(struct amdgpu_device *adev, adev 402 drivers/gpu/drm/amd/amdgpu/df_v3_6.c target_cntr = df_v3_6_pmc_config_2_cntr(adev, config); adev 408 drivers/gpu/drm/amd/amdgpu/df_v3_6.c if (adev->df_perfmon_config_assign_mask[i] == 0U) { adev 409 drivers/gpu/drm/amd/amdgpu/df_v3_6.c adev->df_perfmon_config_assign_mask[i] = adev 419 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static void df_v3_6_pmc_release_cntr(struct amdgpu_device *adev, adev 422 drivers/gpu/drm/amd/amdgpu/df_v3_6.c int target_cntr = df_v3_6_pmc_config_2_cntr(adev, config); adev 425 drivers/gpu/drm/amd/amdgpu/df_v3_6.c adev->df_perfmon_config_assign_mask[target_cntr] = 0ULL; adev 429 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static void df_v3_6_reset_perfmon_cntr(struct amdgpu_device *adev, adev 434 drivers/gpu/drm/amd/amdgpu/df_v3_6.c df_v3_6_pmc_get_read_settings(adev, config, &lo_base_addr, adev 440 drivers/gpu/drm/amd/amdgpu/df_v3_6.c df_v3_6_perfmon_wreg(adev, lo_base_addr, 0, hi_base_addr, 0); adev 443 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static int df_v3_6_pmc_start(struct amdgpu_device *adev, uint64_t config, adev 449 drivers/gpu/drm/amd/amdgpu/df_v3_6.c switch (adev->asic_type) { adev 452 drivers/gpu/drm/amd/amdgpu/df_v3_6.c df_v3_6_reset_perfmon_cntr(adev, config); adev 455 drivers/gpu/drm/amd/amdgpu/df_v3_6.c ret = df_v3_6_pmc_add_cntr(adev, config); adev 457 drivers/gpu/drm/amd/amdgpu/df_v3_6.c ret = df_v3_6_pmc_get_ctrl_settings(adev, adev 467 drivers/gpu/drm/amd/amdgpu/df_v3_6.c df_v3_6_perfmon_wreg(adev, lo_base_addr, lo_val, adev 479 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static int df_v3_6_pmc_stop(struct amdgpu_device *adev, uint64_t config, adev 485 drivers/gpu/drm/amd/amdgpu/df_v3_6.c switch (adev->asic_type) { adev 487 drivers/gpu/drm/amd/amdgpu/df_v3_6.c ret = df_v3_6_pmc_get_ctrl_settings(adev, adev 497 drivers/gpu/drm/amd/amdgpu/df_v3_6.c df_v3_6_perfmon_wreg(adev, lo_base_addr, 0, hi_base_addr, 0); adev 500 drivers/gpu/drm/amd/amdgpu/df_v3_6.c df_v3_6_pmc_release_cntr(adev, config); adev 510 drivers/gpu/drm/amd/amdgpu/df_v3_6.c static void df_v3_6_pmc_get_count(struct amdgpu_device *adev, adev 517 drivers/gpu/drm/amd/amdgpu/df_v3_6.c switch (adev->asic_type) { adev 520 drivers/gpu/drm/amd/amdgpu/df_v3_6.c df_v3_6_pmc_get_read_settings(adev, config, &lo_base_addr, adev 526 drivers/gpu/drm/amd/amdgpu/df_v3_6.c df_v3_6_perfmon_rreg(adev, lo_base_addr, &lo_val, adev 29 drivers/gpu/drm/amd/amdgpu/emu_soc.c int emu_soc_asic_init(struct amdgpu_device *adev) adev 238 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_set_ring_funcs(struct amdgpu_device *adev); adev 239 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_set_irq_funcs(struct amdgpu_device *adev); adev 240 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_set_gds_init(struct amdgpu_device *adev); adev 241 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_set_rlc_funcs(struct amdgpu_device *adev); adev 242 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_get_cu_info(struct amdgpu_device *adev, adev 244 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static uint64_t gfx_v10_0_get_gpu_clock_counter(struct amdgpu_device *adev); adev 245 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, adev 247 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static u32 gfx_v10_0_get_wgp_active_bitmap_per_sh(struct amdgpu_device *adev); adev 249 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_rlc_backdoor_autoload_buffer_init(struct amdgpu_device *adev); adev 250 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_rlc_backdoor_autoload_buffer_fini(struct amdgpu_device *adev); adev 251 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_rlc_backdoor_autoload_enable(struct amdgpu_device *adev); adev 252 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_wait_for_rlc_autoload_complete(struct amdgpu_device *adev); adev 273 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = kiq_ring->adev; adev 275 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c uint64_t wptr_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 356 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_set_kiq_pm4_funcs(struct amdgpu_device *adev) adev 358 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.kiq.pmf = &gfx_v10_0_kiq_pm4_funcs; adev 361 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_init_golden_registers(struct amdgpu_device *adev) adev 363 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c switch (adev->asic_type) { adev 365 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c soc15_program_register_sequence(adev, adev 368 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c soc15_program_register_sequence(adev, adev 373 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c soc15_program_register_sequence(adev, adev 376 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c soc15_program_register_sequence(adev, adev 381 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c soc15_program_register_sequence(adev, adev 384 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c soc15_program_register_sequence(adev, adev 393 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_scratch_init(struct amdgpu_device *adev) adev 395 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.scratch.num_reg = 8; adev 396 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.scratch.reg_base = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0); adev 397 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; adev 435 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 441 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_gfx_scratch_get(adev, &scratch); adev 453 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gfx_scratch_free(adev, scratch); adev 462 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 471 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (i < adev->usec_timeout) { adev 483 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gfx_scratch_free(adev, scratch); adev 490 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 497 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_gfx_scratch_get(adev, &scratch); adev 506 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_ib_get(adev, NULL, 256, &ib); adev 541 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ib_free(adev, &ib, NULL); adev 544 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gfx_scratch_free(adev, scratch); adev 549 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_free_microcode(struct amdgpu_device *adev) adev 551 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c release_firmware(adev->gfx.pfp_fw); adev 552 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.pfp_fw = NULL; adev 553 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c release_firmware(adev->gfx.me_fw); adev 554 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.me_fw = NULL; adev 555 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c release_firmware(adev->gfx.ce_fw); adev 556 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.ce_fw = NULL; adev 557 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c release_firmware(adev->gfx.rlc_fw); adev 558 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc_fw = NULL; adev 559 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c release_firmware(adev->gfx.mec_fw); adev 560 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec_fw = NULL; adev 561 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c release_firmware(adev->gfx.mec2_fw); adev 562 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec2_fw = NULL; adev 564 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c kfree(adev->gfx.rlc.register_list_format); adev 567 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_check_fw_write_wait(struct amdgpu_device *adev) adev 569 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.cp_fw_write_wait = false; adev 571 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c switch (adev->asic_type) { adev 575 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if ((adev->gfx.me_fw_version >= 0x00000046) && adev 576 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (adev->gfx.me_feature_version >= 27) && adev 577 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (adev->gfx.pfp_fw_version >= 0x00000068) && adev 578 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (adev->gfx.pfp_feature_version >= 27) && adev 579 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (adev->gfx.mec_fw_version >= 0x0000005b) && adev 580 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (adev->gfx.mec_feature_version >= 27)) adev 581 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.cp_fw_write_wait = true; adev 587 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->gfx.cp_fw_write_wait == false) adev 593 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_init_rlc_ext_microcode(struct amdgpu_device *adev) adev 597 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c rlc_hdr = (const struct rlc_firmware_header_v2_1 *)adev->gfx.rlc_fw->data; adev 598 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc_srlc_fw_version = le32_to_cpu(rlc_hdr->save_restore_list_cntl_ucode_ver); adev 599 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc_srlc_feature_version = le32_to_cpu(rlc_hdr->save_restore_list_cntl_feature_ver); adev 600 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.save_restore_list_cntl_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_cntl_size_bytes); adev 601 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.save_restore_list_cntl = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_cntl_offset_bytes); adev 602 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc_srlg_fw_version = le32_to_cpu(rlc_hdr->save_restore_list_gpm_ucode_ver); adev 603 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc_srlg_feature_version = le32_to_cpu(rlc_hdr->save_restore_list_gpm_feature_ver); adev 604 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.save_restore_list_gpm_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_gpm_size_bytes); adev 605 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.save_restore_list_gpm = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_gpm_offset_bytes); adev 606 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc_srls_fw_version = le32_to_cpu(rlc_hdr->save_restore_list_srm_ucode_ver); adev 607 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc_srls_feature_version = le32_to_cpu(rlc_hdr->save_restore_list_srm_feature_ver); adev 608 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.save_restore_list_srm_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_srm_size_bytes); adev 609 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.save_restore_list_srm = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_srm_offset_bytes); adev 610 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.reg_list_format_direct_reg_list_length = adev 614 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_check_gfxoff_flag(struct amdgpu_device *adev) adev 616 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c switch (adev->asic_type) { adev 618 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->pm.pp_feature &= ~PP_GFXOFF_MASK; adev 625 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_init_microcode(struct amdgpu_device *adev) adev 643 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c switch (adev->asic_type) { adev 649 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (!(adev->pdev->device == 0x7340 && adev 650 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->pdev->revision != 0x00)) adev 661 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev); adev 664 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c err = amdgpu_ucode_validate(adev->gfx.pfp_fw); adev 667 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; adev 668 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 669 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 672 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); adev 675 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c err = amdgpu_ucode_validate(adev->gfx.me_fw); adev 678 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; adev 679 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 680 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 683 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev); adev 686 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c err = amdgpu_ucode_validate(adev->gfx.ce_fw); adev 689 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; adev 690 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 691 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 694 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev); adev 697 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c err = amdgpu_ucode_validate(adev->gfx.rlc_fw); adev 698 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; adev 702 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.is_rlc_v2_1 = true; adev 704 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version); adev 705 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version); adev 706 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.save_and_restore_offset = adev 708 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.clear_state_descriptor_offset = adev 710 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.avail_scratch_ram_locations = adev 712 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.reg_restore_list_size = adev 714 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.reg_list_format_start = adev 716 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.reg_list_format_separate_start = adev 718 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.starting_offsets_start = adev 720 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.reg_list_format_size_bytes = adev 722 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.reg_list_size_bytes = adev 724 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.register_list_format = adev 725 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c kmalloc(adev->gfx.rlc.reg_list_format_size_bytes + adev 726 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL); adev 727 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (!adev->gfx.rlc.register_list_format) { adev 735 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.register_list_format[i] = le32_to_cpu(tmp[i]); adev 737 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i; adev 742 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]); adev 744 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->gfx.rlc.is_rlc_v2_1) adev 745 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_init_rlc_ext_microcode(adev); adev 748 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev); adev 751 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c err = amdgpu_ucode_validate(adev->gfx.mec_fw); adev 754 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; adev 755 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 756 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 759 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev); adev 761 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c err = amdgpu_ucode_validate(adev->gfx.mec2_fw); adev 765 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec2_fw->data; adev 766 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec2_fw_version = adev 768 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec2_feature_version = adev 772 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec2_fw = NULL; adev 775 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 776 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_PFP]; adev 778 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info->fw = adev->gfx.pfp_fw; adev 780 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->firmware.fw_size += adev 783 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_ME]; adev 785 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info->fw = adev->gfx.me_fw; adev 787 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->firmware.fw_size += adev 790 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_CE]; adev 792 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info->fw = adev->gfx.ce_fw; adev 794 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->firmware.fw_size += adev 797 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_G]; adev 799 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info->fw = adev->gfx.rlc_fw; adev 801 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->firmware.fw_size += adev 804 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->gfx.rlc.is_rlc_v2_1 && adev 805 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.save_restore_list_cntl_size_bytes && adev 806 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.save_restore_list_gpm_size_bytes && adev 807 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.save_restore_list_srm_size_bytes) { adev 808 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL]; adev 810 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info->fw = adev->gfx.rlc_fw; adev 811 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->firmware.fw_size += adev 812 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ALIGN(adev->gfx.rlc.save_restore_list_cntl_size_bytes, PAGE_SIZE); adev 814 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM]; adev 816 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info->fw = adev->gfx.rlc_fw; adev 817 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->firmware.fw_size += adev 818 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ALIGN(adev->gfx.rlc.save_restore_list_gpm_size_bytes, PAGE_SIZE); adev 820 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM]; adev 822 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info->fw = adev->gfx.rlc_fw; adev 823 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->firmware.fw_size += adev 824 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ALIGN(adev->gfx.rlc.save_restore_list_srm_size_bytes, PAGE_SIZE); adev 827 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC1]; adev 829 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info->fw = adev->gfx.mec_fw; adev 832 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->firmware.fw_size += adev 836 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC1_JT]; adev 838 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info->fw = adev->gfx.mec_fw; adev 839 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->firmware.fw_size += adev 842 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->gfx.mec2_fw) { adev 843 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC2]; adev 845 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info->fw = adev->gfx.mec2_fw; adev 848 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->firmware.fw_size += adev 852 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC2_JT]; adev 854 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c info->fw = adev->gfx.mec2_fw; adev 855 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->firmware.fw_size += adev 861 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_check_fw_write_wait(adev); adev 864 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, adev 867 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c release_firmware(adev->gfx.pfp_fw); adev 868 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.pfp_fw = NULL; adev 869 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c release_firmware(adev->gfx.me_fw); adev 870 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.me_fw = NULL; adev 871 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c release_firmware(adev->gfx.ce_fw); adev 872 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.ce_fw = NULL; adev 873 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c release_firmware(adev->gfx.rlc_fw); adev 874 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc_fw = NULL; adev 875 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c release_firmware(adev->gfx.mec_fw); adev 876 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec_fw = NULL; adev 877 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c release_firmware(adev->gfx.mec2_fw); adev 878 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec2_fw = NULL; adev 881 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_check_gfxoff_flag(adev); adev 886 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static u32 gfx_v10_0_get_csb_size(struct amdgpu_device *adev) adev 916 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_get_csb_buffer(struct amdgpu_device *adev, adev 924 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->gfx.rlc.cs_data == NULL) adev 936 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { adev 955 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c buffer[count++] = cpu_to_le32(adev->gfx.config.pa_sc_tile_steering_override); adev 964 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_rlc_fini(struct amdgpu_device *adev) adev 967 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, adev 968 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.rlc.clear_state_gpu_addr, adev 969 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (void **)&adev->gfx.rlc.cs_ptr); adev 972 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, adev 973 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.rlc.cp_table_gpu_addr, adev 974 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (void **)&adev->gfx.rlc.cp_table_ptr); adev 977 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_rlc_init(struct amdgpu_device *adev) adev 982 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.cs_data = gfx10_cs_data; adev 984 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c cs_data = adev->gfx.rlc.cs_data; adev 988 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_gfx_rlc_init_csb(adev); adev 996 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_csb_vram_pin(struct amdgpu_device *adev) adev 1000 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false); adev 1004 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj, adev 1007 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.clear_state_gpu_addr = adev 1008 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj); adev 1010 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); adev 1015 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_csb_vram_unpin(struct amdgpu_device *adev) adev 1019 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (!adev->gfx.rlc.clear_state_obj) adev 1022 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true); adev 1024 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj); adev 1025 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); adev 1029 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_mec_fini(struct amdgpu_device *adev) adev 1031 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); adev 1032 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL); adev 1035 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_me_init(struct amdgpu_device *adev) adev 1039 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c bitmap_zero(adev->gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES); adev 1041 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gfx_graphics_queue_acquire(adev); adev 1043 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_init_microcode(adev); adev 1050 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_mec_init(struct amdgpu_device *adev) adev 1061 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); adev 1064 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gfx_compute_queue_acquire(adev); adev 1065 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mec_hpd_size = adev->gfx.num_compute_rings * GFX10_MEC_HPD_SIZE; adev 1067 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE, adev 1069 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.mec.hpd_eop_obj, adev 1070 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.mec.hpd_eop_gpu_addr, adev 1073 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r); adev 1074 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_mec_fini(adev); adev 1078 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c memset(hpd, 0, adev->gfx.mec.hpd_eop_obj->tbo.mem.size); adev 1080 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj); adev 1081 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); adev 1083 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) { adev 1084 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; adev 1086 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c fw_data = (const __le32 *) (adev->gfx.mec_fw->data + adev 1090 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, adev 1092 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.mec.mec_fw_obj, adev 1093 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.mec.mec_fw_gpu_addr, adev 1096 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "(%d) failed to create mec fw bo\n", r); adev 1097 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_mec_fini(adev); adev 1103 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_obj); adev 1104 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj); adev 1110 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t wave, uint32_t address) adev 1118 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void wave_read_regs(struct amdgpu_device *adev, uint32_t wave, adev 1131 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) adev 1140 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS); adev 1141 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO); adev 1142 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); adev 1143 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO); adev 1144 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_HI); adev 1145 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID1); adev 1146 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID2); adev 1147 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_INST_DW0); adev 1148 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_GPR_ALLOC); adev 1149 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_LDS_ALLOC); adev 1150 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_TRAPSTS); adev 1151 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_STS); adev 1152 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_STS2); adev 1153 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_DBG1); adev 1154 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_M0); adev 1157 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd, adev 1164 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev, wave, 0, start + SQIND_WAVE_SGPRS_OFFSET, size, adev 1168 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t simd, adev 1174 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev, wave, thread, adev 1178 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_select_me_pipe_q(struct amdgpu_device *adev, adev 1181 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, me, pipe, q, vm); adev 1194 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_gpu_early_init(struct amdgpu_device *adev) adev 1198 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.funcs = &gfx_v10_0_gfx_funcs; adev 1200 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c switch (adev->asic_type) { adev 1204 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.max_hw_contexts = 8; adev 1205 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1206 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1207 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0; adev 1208 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x4C0; adev 1216 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.gb_addr_config = gb_addr_config; adev 1218 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << adev 1219 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c REG_GET_FIELD(adev->gfx.config.gb_addr_config, adev 1222 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.max_tile_pipes = adev 1223 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.gb_addr_config_fields.num_pipes; adev 1225 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << adev 1226 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c REG_GET_FIELD(adev->gfx.config.gb_addr_config, adev 1228 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << adev 1229 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c REG_GET_FIELD(adev->gfx.config.gb_addr_config, adev 1231 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.gb_addr_config_fields.num_se = 1 << adev 1232 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c REG_GET_FIELD(adev->gfx.config.gb_addr_config, adev 1234 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + adev 1235 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c REG_GET_FIELD(adev->gfx.config.gb_addr_config, adev 1239 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_gfx_ring_init(struct amdgpu_device *adev, int ring_id, adev 1246 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.gfx_ring[ring_id]; adev 1256 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring->doorbell_index = adev->doorbell_index.gfx_ring0 << 1; adev 1258 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring->doorbell_index = adev->doorbell_index.gfx_ring1 << 1; adev 1262 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_ring_init(adev, ring, 1024, adev 1263 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.eop_irq, irq_type); adev 1269 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, adev 1274 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[ring_id]; adev 1276 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.compute_ring[ring_id]; adev 1285 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring->doorbell_index = (adev->doorbell_index.mec_ring0 + ring_id) << 1; adev 1286 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr adev 1291 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) adev 1295 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_ring_init(adev, ring, 1024, adev 1296 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.eop_irq, irq_type); adev 1307 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1309 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c switch (adev->asic_type) { adev 1313 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.me.num_me = 1; adev 1314 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.me.num_pipe_per_me = 2; adev 1315 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.me.num_queue_per_pipe = 1; adev 1316 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec.num_mec = 2; adev 1317 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec.num_pipe_per_mec = 4; adev 1318 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec.num_queue_per_pipe = 8; adev 1321 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.me.num_me = 1; adev 1322 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.me.num_pipe_per_me = 1; adev 1323 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.me.num_queue_per_pipe = 1; adev 1324 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec.num_mec = 1; adev 1325 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec.num_pipe_per_mec = 4; adev 1326 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec.num_queue_per_pipe = 8; adev 1331 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, adev 1333 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.kiq.irq); adev 1338 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, adev 1340 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.eop_irq); adev 1345 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, GFX_10_1__SRCID__CP_PRIV_REG_FAULT, adev 1346 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.priv_reg_irq); adev 1351 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, GFX_10_1__SRCID__CP_PRIV_INSTR_FAULT, adev 1352 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.priv_inst_irq); adev 1356 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.gfx_current_status = AMDGPU_GFX_NORMAL_MODE; adev 1358 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_scratch_init(adev); adev 1360 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_me_init(adev); adev 1364 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_rlc_init(adev); adev 1370 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_mec_init(adev); adev 1377 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.me.num_me; i++) { adev 1378 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (j = 0; j < adev->gfx.me.num_queue_per_pipe; j++) { adev 1379 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (k = 0; k < adev->gfx.me.num_pipe_per_me; k++) { adev 1380 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (!amdgpu_gfx_is_me_queue_enabled(adev, i, k, j)) adev 1383 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_gfx_ring_init(adev, ring_id, adev 1394 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.mec.num_mec; ++i) { adev 1395 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { adev 1396 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { adev 1397 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (!amdgpu_gfx_is_mec_queue_enabled(adev, i, k, adev 1401 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_compute_ring_init(adev, ring_id, adev 1411 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_gfx_kiq_init(adev, GFX10_MEC_HPD_SIZE); adev 1417 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c kiq = &adev->gfx.kiq; adev 1418 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_gfx_kiq_init_ring(adev, &kiq->ring, &kiq->irq); adev 1422 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_gfx_mqd_sw_init(adev, sizeof(struct v10_compute_mqd)); adev 1427 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_RLC_BACKDOOR_AUTO) { adev 1428 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_rlc_backdoor_autoload_buffer_init(adev); adev 1433 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.ce_ram_size = F32_CE_PROGRAM_RAM_SIZE; adev 1435 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_gpu_early_init(adev); adev 1440 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_pfp_fini(struct amdgpu_device *adev) adev 1442 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_free_kernel(&adev->gfx.pfp.pfp_fw_obj, adev 1443 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.pfp.pfp_fw_gpu_addr, adev 1444 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (void **)&adev->gfx.pfp.pfp_fw_ptr); adev 1447 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_ce_fini(struct amdgpu_device *adev) adev 1449 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_free_kernel(&adev->gfx.ce.ce_fw_obj, adev 1450 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.ce.ce_fw_gpu_addr, adev 1451 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (void **)&adev->gfx.ce.ce_fw_ptr); adev 1454 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_me_fini(struct amdgpu_device *adev) adev 1456 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_free_kernel(&adev->gfx.me.me_fw_obj, adev 1457 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.me.me_fw_gpu_addr, adev 1458 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (void **)&adev->gfx.me.me_fw_ptr); adev 1464 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1466 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 1467 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_fini(&adev->gfx.gfx_ring[i]); adev 1468 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 1469 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_fini(&adev->gfx.compute_ring[i]); adev 1471 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gfx_mqd_sw_fini(adev); adev 1472 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq.ring, &adev->gfx.kiq.irq); adev 1473 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gfx_kiq_fini(adev); adev 1475 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_pfp_fini(adev); adev 1476 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_ce_fini(adev); adev 1477 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_me_fini(adev); adev 1478 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_fini(adev); adev 1479 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_mec_fini(adev); adev 1481 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_RLC_BACKDOOR_AUTO) adev 1482 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_backdoor_autoload_buffer_fini(adev); adev 1484 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_free_microcode(adev); adev 1490 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_tiling_mode_table_init(struct amdgpu_device *adev) adev 1495 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, adev 1522 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static u32 gfx_v10_0_get_rb_active_bitmap(struct amdgpu_device *adev) adev 1532 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / adev 1533 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.max_sh_per_se); adev 1538 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_setup_rb(struct amdgpu_device *adev) adev 1543 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / adev 1544 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.max_sh_per_se; adev 1546 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_lock(&adev->grbm_idx_mutex); adev 1547 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 1548 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 1549 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_select_se_sh(adev, i, j, 0xffffffff); adev 1550 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c data = gfx_v10_0_get_rb_active_bitmap(adev); adev 1551 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * adev 1555 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1556 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 1558 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.backend_enable_mask = active_rbs; adev 1559 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.num_rbs = hweight32(active_rbs); adev 1562 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static u32 gfx_v10_0_init_pa_sc_tile_steering_override(struct amdgpu_device *adev) adev 1572 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c num_sc = adev->gfx.config.max_shader_engines * adev->gfx.config.max_sh_per_se * adev 1573 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.num_sc_per_sh; adev 1575 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c active_rb_bitmap = gfx_v10_0_get_rb_active_bitmap(adev); adev 1577 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c num_rb_per_sc = enabled_rb_per_sh / adev->gfx.config.num_sc_per_sh; adev 1579 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c num_packer_per_sc = adev->gfx.config.num_packer_per_sc; adev 1599 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_init_compute_vmid(struct amdgpu_device *adev) adev 1612 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_lock(&adev->srbm_mutex); adev 1614 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, 0, 0, 0, i); adev 1619 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, 0, 0, 0, 0); adev 1620 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_unlock(&adev->srbm_mutex); adev 1632 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_init_gds_vmid(struct amdgpu_device *adev) adev 1651 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_tcp_harvest(struct amdgpu_device *adev) adev 1654 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c int max_wgp_per_sh = adev->gfx.config.max_cu_per_sh >> 1; adev 1678 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->asic_type == CHIP_NAVI10 || adev 1679 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->asic_type == CHIP_NAVI14 || adev 1680 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->asic_type == CHIP_NAVI12) { adev 1681 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_lock(&adev->grbm_idx_mutex); adev 1682 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 1683 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 1684 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_select_se_sh(adev, i, j, 0xffffffff); adev 1685 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c wgp_active_bitmap = gfx_v10_0_get_wgp_active_bitmap_per_sh(adev); adev 1716 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1717 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 1721 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_get_tcc_info(struct amdgpu_device *adev) adev 1727 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.tcc_disabled_mask = adev 1732 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_constants_init(struct amdgpu_device *adev) adev 1739 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_tiling_mode_table_init(adev); adev 1741 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_setup_rb(adev); adev 1742 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_get_cu_info(adev, &adev->gfx.cu_info); adev 1743 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_get_tcc_info(adev); adev 1744 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.pa_sc_tile_steering_override = adev 1745 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_init_pa_sc_tile_steering_override(adev); adev 1749 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_lock(&adev->srbm_mutex); adev 1750 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->vm_manager.id_mgr[AMDGPU_GFXHUB_0].num_ids; i++) { adev 1751 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, 0, 0, 0, i); adev 1756 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (adev->gmc.private_aperture_start >> 48)); adev 1758 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (adev->gmc.shared_aperture_start >> 48)); adev 1762 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, 0, 0, 0, 0); adev 1764 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_unlock(&adev->srbm_mutex); adev 1766 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_init_compute_vmid(adev); adev 1767 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_init_gds_vmid(adev); adev 1771 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_enable_gui_idle_interrupt(struct amdgpu_device *adev, adev 1788 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_init_csb(struct amdgpu_device *adev) adev 1792 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->in_gpu_reset) { adev 1793 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false); adev 1797 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_bo_kmap(adev->gfx.rlc.clear_state_obj, adev 1798 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (void **)&adev->gfx.rlc.cs_ptr); adev 1800 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.funcs->get_csb_buffer(adev, adev 1801 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.cs_ptr); adev 1802 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj); adev 1805 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); adev 1812 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.clear_state_gpu_addr >> 32); adev 1814 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); adev 1815 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CSIB_LENGTH, adev->gfx.rlc.clear_state_size); adev 1820 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_init_pg(struct amdgpu_device *adev) adev 1825 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_init_csb(adev); adev 1829 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->num_vmhubs; i++) adev 1830 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gmc_flush_gpu_tlb(adev, 0, i, 0); adev 1836 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c void gfx_v10_0_rlc_stop(struct amdgpu_device *adev) adev 1844 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_rlc_reset(struct amdgpu_device *adev) adev 1852 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_rlc_smu_handshake_cntl(struct amdgpu_device *adev, adev 1874 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_rlc_start(struct amdgpu_device *adev) adev 1879 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_smu_handshake_cntl(adev, false); adev 1885 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_rlc_enable_srm(struct amdgpu_device *adev) adev 1896 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_rlc_load_microcode(struct amdgpu_device *adev) adev 1902 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (!adev->gfx.rlc_fw) adev 1905 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; adev 1908 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c fw_data = (const __le32 *)(adev->gfx.rlc_fw->data + adev 1919 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version); adev 1924 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_rlc_resume(struct amdgpu_device *adev) adev 1928 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (amdgpu_sriov_vf(adev)) adev 1931 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 1932 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_wait_for_rlc_autoload_complete(adev); adev 1936 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_init_pg(adev); adev 1941 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_enable_srm(adev); adev 1944 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.funcs->stop(adev); adev 1952 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) { adev 1954 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_rlc_load_microcode(adev); adev 1957 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c } else if (adev->firmware.load_type == AMDGPU_FW_LOAD_RLC_BACKDOOR_AUTO) { adev 1959 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_rlc_backdoor_autoload_enable(adev); adev 1964 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_init_pg(adev); adev 1968 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.funcs->start(adev); adev 1970 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_RLC_BACKDOOR_AUTO) { adev 1971 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_wait_for_rlc_autoload_complete(adev); adev 1985 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_parse_rlc_toc(struct amdgpu_device *adev) adev 1990 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ret = amdgpu_bo_create_reserved(adev, adev->psp.toc_bin_size, PAGE_SIZE, adev 1992 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.rlc.rlc_toc_bo, adev 1993 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.rlc.rlc_toc_gpu_addr, adev 1994 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (void **)&adev->gfx.rlc.rlc_toc_buf); adev 1996 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "(%d) failed to create rlc toc bo\n", ret); adev 2001 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c memcpy(adev->gfx.rlc.rlc_toc_buf, adev->psp.toc_start_addr, adev->psp.toc_bin_size); adev 2003 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c rlc_toc = (RLC_TABLE_OF_CONTENT *)adev->gfx.rlc.rlc_toc_buf; adev 2022 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static uint32_t gfx_v10_0_calc_toc_total_size(struct amdgpu_device *adev) adev 2028 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ret = gfx_v10_0_parse_rlc_toc(adev); adev 2030 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "failed to parse rlc toc\n"); adev 2045 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_rlc_backdoor_autoload_buffer_init(struct amdgpu_device *adev) adev 2050 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c total_size = gfx_v10_0_calc_toc_total_size(adev); adev 2052 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_bo_create_reserved(adev, total_size, PAGE_SIZE, adev 2054 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.rlc.rlc_autoload_bo, adev 2055 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.rlc.rlc_autoload_gpu_addr, adev 2056 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (void **)&adev->gfx.rlc.rlc_autoload_ptr); adev 2058 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "(%d) failed to create fw autoload bo\n", r); adev 2065 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_rlc_backdoor_autoload_buffer_fini(struct amdgpu_device *adev) adev 2067 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_free_kernel(&adev->gfx.rlc.rlc_toc_bo, adev 2068 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.rlc.rlc_toc_gpu_addr, adev 2069 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (void **)&adev->gfx.rlc.rlc_toc_buf); adev 2070 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_free_kernel(&adev->gfx.rlc.rlc_autoload_bo, adev 2071 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.rlc.rlc_autoload_gpu_addr, adev 2072 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (void **)&adev->gfx.rlc.rlc_autoload_ptr); adev 2075 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_rlc_backdoor_autoload_copy_ucode(struct amdgpu_device *adev, adev 2082 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c char *ptr = adev->gfx.rlc.rlc_autoload_ptr; adev 2102 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_rlc_backdoor_autoload_copy_toc_ucode(struct amdgpu_device *adev) adev 2107 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c data = adev->gfx.rlc.rlc_toc_buf; adev 2110 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_backdoor_autoload_copy_ucode(adev, adev 2115 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode(struct amdgpu_device *adev) adev 2124 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.pfp_fw->data; adev 2125 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c fw_data = (const __le32 *)(adev->gfx.pfp_fw->data + adev 2128 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_backdoor_autoload_copy_ucode(adev, adev 2134 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.ce_fw->data; adev 2135 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c fw_data = (const __le32 *)(adev->gfx.ce_fw->data + adev 2138 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_backdoor_autoload_copy_ucode(adev, adev 2144 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.me_fw->data; adev 2145 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c fw_data = (const __le32 *)(adev->gfx.me_fw->data + adev 2148 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_backdoor_autoload_copy_ucode(adev, adev 2154 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc_fw->data; adev 2155 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c fw_data = (const __le32 *)(adev->gfx.rlc_fw->data + adev 2158 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_backdoor_autoload_copy_ucode(adev, adev 2164 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.mec_fw->data; adev 2165 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c fw_data = (const __le32 *) (adev->gfx.mec_fw->data + adev 2169 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_backdoor_autoload_copy_ucode(adev, adev 2176 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_rlc_backdoor_autoload_copy_sdma_ucode(struct amdgpu_device *adev) adev 2183 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 2185 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->sdma.instance[i].fw->data; adev 2186 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c fw_data = (const __le32 *) (adev->sdma.instance[i].fw->data + adev 2191 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_backdoor_autoload_copy_ucode(adev, adev 2193 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_backdoor_autoload_copy_ucode(adev, adev 2199 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_backdoor_autoload_copy_ucode(adev, adev 2201 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_backdoor_autoload_copy_ucode(adev, adev 2210 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_rlc_backdoor_autoload_enable(struct amdgpu_device *adev) adev 2215 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_backdoor_autoload_copy_toc_ucode(adev); adev 2216 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_backdoor_autoload_copy_sdma_ucode(adev); adev 2217 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode(adev); adev 2221 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gpu_addr = adev->gfx.rlc.rlc_autoload_gpu_addr + rlc_g_offset; adev 2243 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_rlc_backdoor_autoload_config_me_cache(struct amdgpu_device *adev) adev 2265 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "failed to invalidate instruction cache\n"); adev 2270 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c addr = adev->gfx.rlc.rlc_autoload_gpu_addr + adev 2280 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_rlc_backdoor_autoload_config_ce_cache(struct amdgpu_device *adev) adev 2302 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "failed to invalidate instruction cache\n"); adev 2307 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c addr = adev->gfx.rlc.rlc_autoload_gpu_addr + adev 2317 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_rlc_backdoor_autoload_config_pfp_cache(struct amdgpu_device *adev) adev 2339 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "failed to invalidate instruction cache\n"); adev 2344 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c addr = adev->gfx.rlc.rlc_autoload_gpu_addr + adev 2354 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_rlc_backdoor_autoload_config_mec_cache(struct amdgpu_device *adev) adev 2376 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "failed to invalidate instruction cache\n"); adev 2381 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c addr = adev->gfx.rlc.rlc_autoload_gpu_addr + adev 2391 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_wait_for_rlc_autoload_complete(struct amdgpu_device *adev) adev 2397 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 2408 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (i >= adev->usec_timeout) { adev 2409 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "rlc autoload: gc ucode autoload timeout\n"); adev 2413 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_RLC_BACKDOOR_AUTO) { adev 2414 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_rlc_backdoor_autoload_config_me_cache(adev); adev 2418 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_rlc_backdoor_autoload_config_ce_cache(adev); adev 2422 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_rlc_backdoor_autoload_config_pfp_cache(adev); adev 2426 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_rlc_backdoor_autoload_config_mec_cache(adev); adev 2434 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_cp_gfx_enable(struct amdgpu_device *adev, bool enable) adev 2443 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 2444 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.gfx_ring[i].sched.ready = false; adev 2448 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 2454 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (i >= adev->usec_timeout) adev 2460 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_cp_gfx_load_pfp_microcode(struct amdgpu_device *adev) adev 2470 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.pfp_fw->data; adev 2474 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c fw_data = (const __le32 *)(adev->gfx.pfp_fw->data + adev 2478 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_bo_create_reserved(adev, pfp_hdr->header.ucode_size_bytes, adev 2480 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.pfp.pfp_fw_obj, adev 2481 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.pfp.pfp_fw_gpu_addr, adev 2482 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (void **)&adev->gfx.pfp.pfp_fw_ptr); adev 2484 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "(%d) failed to create pfp fw bo\n", r); adev 2485 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_pfp_fini(adev); adev 2489 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c memcpy(adev->gfx.pfp.pfp_fw_ptr, fw_data, fw_size); adev 2491 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_kunmap(adev->gfx.pfp.pfp_fw_obj); adev 2492 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_unreserve(adev->gfx.pfp.pfp_fw_obj); adev 2509 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "failed to invalidate instruction cache\n"); adev 2514 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->nbio_funcs->hdp_flush(adev, NULL); adev 2523 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.pfp.pfp_fw_gpu_addr & 0xFFFFF000); adev 2525 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c upper_32_bits(adev->gfx.pfp.pfp_fw_gpu_addr)); adev 2530 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_cp_gfx_load_ce_microcode(struct amdgpu_device *adev) adev 2540 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.ce_fw->data; adev 2544 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c fw_data = (const __le32 *)(adev->gfx.ce_fw->data + adev 2548 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_bo_create_reserved(adev, ce_hdr->header.ucode_size_bytes, adev 2550 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.ce.ce_fw_obj, adev 2551 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.ce.ce_fw_gpu_addr, adev 2552 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (void **)&adev->gfx.ce.ce_fw_ptr); adev 2554 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "(%d) failed to create ce fw bo\n", r); adev 2555 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_ce_fini(adev); adev 2559 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c memcpy(adev->gfx.ce.ce_fw_ptr, fw_data, fw_size); adev 2561 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_kunmap(adev->gfx.ce.ce_fw_obj); adev 2562 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_unreserve(adev->gfx.ce.ce_fw_obj); adev 2579 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "failed to invalidate instruction cache\n"); adev 2584 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->nbio_funcs->hdp_flush(adev, NULL); adev 2592 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.ce.ce_fw_gpu_addr & 0xFFFFF000); adev 2594 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c upper_32_bits(adev->gfx.ce.ce_fw_gpu_addr)); adev 2599 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_cp_gfx_load_me_microcode(struct amdgpu_device *adev) adev 2609 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.me_fw->data; adev 2613 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c fw_data = (const __le32 *)(adev->gfx.me_fw->data + adev 2617 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_bo_create_reserved(adev, me_hdr->header.ucode_size_bytes, adev 2619 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.me.me_fw_obj, adev 2620 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c &adev->gfx.me.me_fw_gpu_addr, adev 2621 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (void **)&adev->gfx.me.me_fw_ptr); adev 2623 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "(%d) failed to create me fw bo\n", r); adev 2624 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_me_fini(adev); adev 2628 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c memcpy(adev->gfx.me.me_fw_ptr, fw_data, fw_size); adev 2630 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_kunmap(adev->gfx.me.me_fw_obj); adev 2631 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_bo_unreserve(adev->gfx.me.me_fw_obj); adev 2648 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "failed to invalidate instruction cache\n"); adev 2653 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->nbio_funcs->hdp_flush(adev, NULL); adev 2661 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.me.me_fw_gpu_addr & 0xFFFFF000); adev 2663 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c upper_32_bits(adev->gfx.me.me_fw_gpu_addr)); adev 2668 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_cp_gfx_load_microcode(struct amdgpu_device *adev) adev 2672 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (!adev->gfx.me_fw || !adev->gfx.pfp_fw || !adev->gfx.ce_fw) adev 2675 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_gfx_enable(adev, false); adev 2677 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_cp_gfx_load_pfp_microcode(adev); adev 2679 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "(%d) failed to load pfp fw\n", r); adev 2683 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_cp_gfx_load_ce_microcode(adev); adev 2685 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "(%d) failed to load ce fw\n", r); adev 2689 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_cp_gfx_load_me_microcode(adev); adev 2691 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "(%d) failed to load me fw\n", r); adev 2698 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_cp_gfx_start(struct amdgpu_device *adev) adev 2708 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.config.max_hw_contexts - 1); adev 2711 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_gfx_enable(adev, true); adev 2713 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.gfx_ring[0]; adev 2714 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_ring_alloc(ring, gfx_v10_0_get_csb_size(adev) + 4); adev 2745 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, adev->gfx.config.pa_sc_tile_steering_override); adev 2761 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.gfx_ring[1]; adev 2776 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_cp_gfx_switch_pipe(struct amdgpu_device *adev, adev 2787 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_cp_gfx_set_doorbell(struct amdgpu_device *adev, adev 2811 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_cp_gfx_resume(struct amdgpu_device *adev) adev 2826 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_lock(&adev->srbm_mutex); adev 2827 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_gfx_switch_pipe(adev, PIPE_ID0); adev 2828 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_unlock(&adev->srbm_mutex); adev 2830 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.gfx_ring[0]; adev 2845 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); adev 2850 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 2865 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_gfx_set_doorbell(adev, ring); adev 2868 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_lock(&adev->srbm_mutex); adev 2869 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_gfx_switch_pipe(adev, PIPE_ID1); adev 2870 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_unlock(&adev->srbm_mutex); adev 2871 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.gfx_ring[1]; adev 2881 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); adev 2885 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 2899 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_gfx_set_doorbell(adev, ring); adev 2902 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_lock(&adev->srbm_mutex); adev 2903 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_gfx_switch_pipe(adev, PIPE_ID0); adev 2904 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_unlock(&adev->srbm_mutex); adev 2907 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_gfx_start(adev); adev 2909 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) { adev 2910 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.gfx_ring[i]; adev 2917 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_cp_compute_enable(struct amdgpu_device *adev, bool enable) adev 2927 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 2928 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.compute_ring[i].sched.ready = false; adev 2929 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.kiq.ring.sched.ready = false; adev 2934 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_cp_compute_load_microcode(struct amdgpu_device *adev) adev 2942 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (!adev->gfx.mec_fw) adev 2945 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_compute_enable(adev, false); adev 2947 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; adev 2951 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (adev->gfx.mec_fw->data + adev 2969 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_err(adev->dev, "failed to invalidate instruction cache\n"); adev 2974 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->nbio_funcs->hdp_flush(adev, NULL); adev 2982 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO, adev->gfx.mec.mec_fw_gpu_addr & adev 2985 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c upper_32_bits(adev->gfx.mec.mec_fw_gpu_addr)); adev 2994 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, adev->gfx.mec_fw_version); adev 3007 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 3020 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 3063 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c wb_gpu_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); adev 3069 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c wb_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 3108 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 3156 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 3159 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (!adev->in_gpu_reset && !adev->in_suspend) { adev 3161 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_lock(&adev->srbm_mutex); adev 3162 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 3167 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, 0, 0, 0, 0); adev 3168 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_unlock(&adev->srbm_mutex); adev 3169 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->gfx.me.mqd_backup[AMDGPU_MAX_GFX_RINGS]) adev 3170 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c memcpy(adev->gfx.me.mqd_backup[AMDGPU_MAX_GFX_RINGS], mqd, sizeof(*mqd)); adev 3171 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c } else if (adev->in_gpu_reset) { adev 3173 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->gfx.me.mqd_backup[AMDGPU_MAX_GFX_RINGS]) adev 3174 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c memcpy(mqd, adev->gfx.me.mqd_backup[AMDGPU_MAX_GFX_RINGS], sizeof(*mqd)); adev 3179 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_lock(&adev->srbm_mutex); adev 3180 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 3182 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, 0, 0, 0, 0); adev 3183 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_unlock(&adev->srbm_mutex); adev 3193 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_kiq_enable_kgq(struct amdgpu_device *adev) adev 3195 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_kiq *kiq = &adev->gfx.kiq; adev 3196 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; adev 3203 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.num_gfx_rings); adev 3209 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 3210 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c kiq->pmf->kiq_map_queues(kiq_ring, &adev->gfx.gfx_ring[i]); adev 3221 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_cp_async_gfx_ring_resume(struct amdgpu_device *adev) adev 3226 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) { adev 3227 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.gfx_ring[i]; adev 3244 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_kiq_enable_kgq(adev); adev 3248 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_cp_gfx_start(adev); adev 3252 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) { adev 3253 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.gfx_ring[i]; adev 3262 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 3342 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c wb_gpu_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); adev 3348 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c wb_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 3393 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 3417 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (j = 0; j < adev->usec_timeout; j++) { adev 3467 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (adev->doorbell_index.kiq * 2) << 2); adev 3469 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (adev->doorbell_index.userqueue_end * 2) << 2); adev 3499 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 3505 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->in_gpu_reset) { /* for GPU_RESET case */ adev 3507 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->gfx.mec.mqd_backup[mqd_idx]) adev 3508 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd)); adev 3514 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_lock(&adev->srbm_mutex); adev 3515 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 3517 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, 0, 0, 0, 0); adev 3518 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_unlock(&adev->srbm_mutex); adev 3521 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_lock(&adev->srbm_mutex); adev 3522 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 3525 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, 0, 0, 0, 0); adev 3526 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_unlock(&adev->srbm_mutex); adev 3528 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->gfx.mec.mqd_backup[mqd_idx]) adev 3529 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd)); adev 3537 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 3539 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c int mqd_idx = ring - &adev->gfx.compute_ring[0]; adev 3541 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (!adev->in_gpu_reset && !adev->in_suspend) { adev 3543 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_lock(&adev->srbm_mutex); adev 3544 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 3546 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c nv_grbm_select(adev, 0, 0, 0, 0); adev 3547 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_unlock(&adev->srbm_mutex); adev 3549 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->gfx.mec.mqd_backup[mqd_idx]) adev 3550 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd)); adev 3551 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c } else if (adev->in_gpu_reset) { /* for GPU_RESET case */ adev 3553 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->gfx.mec.mqd_backup[mqd_idx]) adev 3554 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd)); adev 3558 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c atomic64_set((atomic64_t *)&adev->wb.wb[ring->wptr_offs], 0); adev 3567 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_kiq_resume(struct amdgpu_device *adev) adev 3572 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.kiq.ring; adev 3590 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_kcq_resume(struct amdgpu_device *adev) adev 3595 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_compute_enable(adev, true); adev 3597 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 3598 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.compute_ring[i]; adev 3614 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_gfx_enable_kcq(adev); adev 3619 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_cp_resume(struct amdgpu_device *adev) adev 3624 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (!(adev->flags & AMD_IS_APU)) adev 3625 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_enable_gui_idle_interrupt(adev, false); adev 3627 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) { adev 3629 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_cp_gfx_load_microcode(adev); adev 3633 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_cp_compute_load_microcode(adev); adev 3638 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_kiq_resume(adev); adev 3642 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_kcq_resume(adev); adev 3647 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_cp_gfx_resume(adev); adev 3651 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_cp_async_gfx_ring_resume(adev); adev 3656 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) { adev 3657 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.gfx_ring[i]; adev 3667 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 3668 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.compute_ring[i]; adev 3680 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_cp_enable(struct amdgpu_device *adev, bool enable) adev 3682 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_gfx_enable(adev, enable); adev 3683 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_compute_enable(adev, enable); adev 3686 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static bool gfx_v10_0_check_grbm_cam_remapping(struct amdgpu_device *adev) adev 3707 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_setup_grbm_cam_remapping(struct amdgpu_device *adev) adev 3775 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3777 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_csb_vram_pin(adev); adev 3782 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_init_golden_registers(adev); adev 3784 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) { adev 3790 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = smu_load_microcode(&adev->smu); adev 3794 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = smu_check_fw_status(&adev->smu); adev 3802 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (!gfx_v10_0_check_grbm_cam_remapping(adev)) adev 3803 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_setup_grbm_cam_remapping(adev); adev 3805 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_constants_init(adev); adev 3807 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_rlc_resume(adev); adev 3815 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_tcp_harvest(adev); adev 3817 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_cp_resume(adev); adev 3825 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_kiq_disable_kgq(struct amdgpu_device *adev) adev 3827 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_kiq *kiq = &adev->gfx.kiq; adev 3835 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.num_gfx_rings)) adev 3838 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 3839 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c kiq->pmf->kiq_unmap_queues(kiq_ring, &adev->gfx.gfx_ring[i], adev 3848 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3851 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0); adev 3852 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0); adev 3855 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = gfx_v10_0_kiq_disable_kgq(adev); adev 3860 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (amdgpu_gfx_disable_kcq(adev)) adev 3862 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (amdgpu_sriov_vf(adev)) { adev 3866 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_enable(adev, false); adev 3867 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_enable_gui_idle_interrupt(adev, false); adev 3868 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_csb_vram_unpin(adev); adev 3885 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3898 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3900 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 3916 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3949 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_rlc_stop(adev); adev 3952 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_gfx_enable(adev, false); adev 3955 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_cp_compute_enable(adev, false); adev 3960 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dev_info(adev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); adev 3977 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static uint64_t gfx_v10_0_get_gpu_clock_counter(struct amdgpu_device *adev) adev 3981 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gfx_off_ctrl(adev, false); adev 3982 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_lock(&adev->gfx.gpu_clock_mutex); adev 3986 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_unlock(&adev->gfx.gpu_clock_mutex); adev 3987 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gfx_off_ctrl(adev, true); adev 3997 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 4022 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4024 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.num_gfx_rings = GFX10_NUM_GFX_RINGS; adev 4025 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.num_compute_rings = AMDGPU_MAX_COMPUTE_RINGS; adev 4027 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_kiq_pm4_funcs(adev); adev 4028 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_ring_funcs(adev); adev 4029 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_irq_funcs(adev); adev 4030 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_gds_init(adev); adev 4031 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_rlc_funcs(adev); adev 4038 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4041 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); adev 4045 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c r = amdgpu_irq_get(adev, &adev->gfx.priv_inst_irq, 0); adev 4052 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static bool gfx_v10_0_is_rlc_enabled(struct amdgpu_device *adev) adev 4061 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_set_safe_mode(struct amdgpu_device *adev) adev 4071 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 4078 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_unset_safe_mode(struct amdgpu_device *adev) adev 4086 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 4092 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGCG)) { adev 4106 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGLS) { adev 4108 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_RLC_LS) { adev 4115 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CP_LS) { adev 4148 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_update_3d_clock_gating(struct amdgpu_device *adev, adev 4154 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_3D_CGCG)) { adev 4166 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_3D_CGLS) adev 4190 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev, adev 4195 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGCG)) { adev 4199 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGLS) adev 4211 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGLS) adev 4233 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_update_gfx_clock_gating(struct amdgpu_device *adev, adev 4236 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 4242 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_update_medium_grain_clock_gating(adev, enable); adev 4244 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_update_3d_clock_gating(adev, enable); adev 4246 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_update_coarse_grain_clock_gating(adev, enable); adev 4251 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_update_coarse_grain_clock_gating(adev, enable); adev 4253 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_update_3d_clock_gating(adev, enable); adev 4255 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_update_medium_grain_clock_gating(adev, enable); adev 4258 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->cg_flags & adev 4265 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_enable_gui_idle_interrupt(adev, enable); adev 4267 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 4288 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4290 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c switch (adev->asic_type) { adev 4293 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gfx_off_ctrl(adev, enable); adev 4304 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4306 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c switch (adev->asic_type) { adev 4310 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_update_gfx_clock_gating(adev, adev 4321 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4360 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c return ring->adev->wb.wb[ring->rptr_offs]; /* gfx10 is 32bit rptr*/ adev 4365 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 4370 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c wptr = atomic64_read((atomic64_t *)&adev->wb.wb[ring->wptr_offs]); adev 4381 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 4385 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c atomic64_set((atomic64_t *)&adev->wb.wb[ring->wptr_offs], ring->wptr); adev 4395 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c return ring->adev->wb.wb[ring->rptr_offs]; /* gfx10 hardware is 32bit rptr */ adev 4404 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c wptr = atomic64_read((atomic64_t *)&ring->adev->wb.wb[ring->wptr_offs]); adev 4412 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 4416 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c atomic64_set((atomic64_t *)&adev->wb.wb[ring->wptr_offs], ring->wptr); adev 4425 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 4427 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio_funcs->hdp_flush_reg; adev 4447 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->nbio_funcs->get_hdp_flush_req_offset(adev), adev 4448 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->nbio_funcs->get_hdp_flush_done_offset(adev), adev 4510 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); adev 4527 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 4532 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (adev->pdev->device == 0x50) adev 4588 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 4683 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 4684 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_kiq *kiq = &adev->gfx.kiq; adev 4703 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 4710 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (i >= adev->usec_timeout) { adev 4722 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 4728 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c csa_addr = amdgpu_csa_vaddr(ring->adev); adev 4741 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write_multiple(ring, adev->virt.csa_cpu_addr + adev 4752 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 4757 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c csa_addr = amdgpu_csa_vaddr(ring->adev); adev 4758 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gds_addr = ALIGN(csa_addr + AMDGPU_CSA_SIZE - adev->gds.gds_size, adev 4775 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write_multiple(ring, adev->virt.csa_cpu_addr + adev 4792 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 4800 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, lower_32_bits(adev->wb.gpu_addr + adev 4801 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->virt.reg_val_offs * 4)); adev 4802 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_ring_write(ring, upper_32_bits(adev->wb.gpu_addr + adev 4803 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->virt.reg_val_offs * 4)); adev 4840 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_device *adev = ring->adev; adev 4843 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c fw_version_ok = adev->gfx.cp_fw_write_wait; adev 4854 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, adev 4895 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_set_compute_eop_interrupt_state(struct amdgpu_device *adev, adev 4948 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_set_eop_interrupt_state(struct amdgpu_device *adev, adev 4955 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_gfx_eop_interrupt_state(adev, 0, 0, state); adev 4958 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_gfx_eop_interrupt_state(adev, 0, 1, state); adev 4961 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_compute_eop_interrupt_state(adev, 1, 0, state); adev 4964 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_compute_eop_interrupt_state(adev, 1, 1, state); adev 4967 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_compute_eop_interrupt_state(adev, 1, 2, state); adev 4970 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_compute_eop_interrupt_state(adev, 1, 3, state); adev 4973 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_compute_eop_interrupt_state(adev, 2, 0, state); adev 4976 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_compute_eop_interrupt_state(adev, 2, 1, state); adev 4979 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_compute_eop_interrupt_state(adev, 2, 2, state); adev 4982 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_set_compute_eop_interrupt_state(adev, 2, 3, state); adev 4990 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_eop_irq(struct amdgpu_device *adev, adev 5006 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_fence_process(&adev->gfx.gfx_ring[0]); adev 5008 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_fence_process(&adev->gfx.gfx_ring[1]); adev 5012 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 5013 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.compute_ring[i]; adev 5025 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_set_priv_reg_fault_state(struct amdgpu_device *adev, adev 5044 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_set_priv_inst_fault_state(struct amdgpu_device *adev, adev 5062 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_handle_priv_fault(struct amdgpu_device *adev, adev 5075 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) { adev 5076 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.gfx_ring[i]; adev 5084 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 5085 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ring = &adev->gfx.compute_ring[i]; adev 5096 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_priv_reg_irq(struct amdgpu_device *adev, adev 5101 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_handle_priv_fault(adev, entry); adev 5105 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_priv_inst_irq(struct amdgpu_device *adev, adev 5110 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_handle_priv_fault(adev, entry); adev 5114 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_kiq_set_interrupt_state(struct amdgpu_device *adev, adev 5120 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_ring *ring = &(adev->gfx.kiq.ring); adev 5159 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_kiq_irq(struct amdgpu_device *adev, adev 5164 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c struct amdgpu_ring *ring = &(adev->gfx.kiq.ring); adev 5311 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_set_ring_funcs(struct amdgpu_device *adev) adev 5315 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.kiq.ring.funcs = &gfx_v10_0_ring_funcs_kiq; adev 5317 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 5318 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.gfx_ring[i].funcs = &gfx_v10_0_ring_funcs_gfx; adev 5320 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 5321 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.compute_ring[i].funcs = &gfx_v10_0_ring_funcs_compute; adev 5344 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_set_irq_funcs(struct amdgpu_device *adev) adev 5346 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.eop_irq.num_types = AMDGPU_CP_IRQ_LAST; adev 5347 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.eop_irq.funcs = &gfx_v10_0_eop_irq_funcs; adev 5349 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.kiq.irq.num_types = AMDGPU_CP_KIQ_IRQ_LAST; adev 5350 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.kiq.irq.funcs = &gfx_v10_0_kiq_irq_funcs; adev 5352 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.priv_reg_irq.num_types = 1; adev 5353 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.priv_reg_irq.funcs = &gfx_v10_0_priv_reg_irq_funcs; adev 5355 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.priv_inst_irq.num_types = 1; adev 5356 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.priv_inst_irq.funcs = &gfx_v10_0_priv_inst_irq_funcs; adev 5359 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_set_rlc_funcs(struct amdgpu_device *adev) adev 5361 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c switch (adev->asic_type) { adev 5365 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gfx.rlc.funcs = &gfx_v10_0_rlc_funcs; adev 5372 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_set_gds_init(struct amdgpu_device *adev) adev 5375 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c switch (adev->asic_type) { adev 5378 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gds.gds_size = 0x10000; adev 5379 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gds.gds_compute_max_wave_id = 0x4ff; adev 5383 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gds.gws_size = 64; adev 5384 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev->gds.oa_size = 16; adev 5387 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_set_user_wgp_inactive_bitmap_per_sh(struct amdgpu_device *adev, adev 5401 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static u32 gfx_v10_0_get_wgp_active_bitmap_per_sh(struct amdgpu_device *adev) adev 5411 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c amdgpu_gfx_create_bitmask(adev->gfx.config.max_cu_per_sh >> 1); adev 5416 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static u32 gfx_v10_0_get_cu_active_bitmap_per_sh(struct amdgpu_device *adev) adev 5421 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c wgp_active_bitmap = gfx_v10_0_get_wgp_active_bitmap_per_sh(adev); adev 5434 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static int gfx_v10_0_get_cu_info(struct amdgpu_device *adev, adev 5441 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (!adev || !cu_info) adev 5446 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_lock(&adev->grbm_idx_mutex); adev 5447 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 5448 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 5452 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_select_se_sh(adev, i, j, 0xffffffff); adev 5455 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev, disable_masks[i * 2 + j]); adev 5456 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c bitmap = gfx_v10_0_get_cu_active_bitmap_per_sh(adev); adev 5459 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) { adev 5461 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c if (counter < adev->gfx.config.max_cu_per_sh) adev 5473 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 5474 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 45 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_set_ring_funcs(struct amdgpu_device *adev); adev 46 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_set_irq_funcs(struct amdgpu_device *adev); adev 47 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_get_cu_info(struct amdgpu_device *adev); adev 74 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static u32 gfx_v6_0_get_csb_size(struct amdgpu_device *adev); adev 75 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_get_csb_buffer(struct amdgpu_device *adev, volatile u32 *buffer); adev 77 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_init_pg(struct amdgpu_device *adev); adev 311 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_init_microcode(struct amdgpu_device *adev) adev 321 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c switch (adev->asic_type) { adev 341 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev); adev 344 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c err = amdgpu_ucode_validate(adev->gfx.pfp_fw); adev 347 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; adev 348 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 349 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 352 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); adev 355 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c err = amdgpu_ucode_validate(adev->gfx.me_fw); adev 358 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; adev 359 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 360 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 363 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev); adev 366 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c err = amdgpu_ucode_validate(adev->gfx.ce_fw); adev 369 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; adev 370 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 371 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 374 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev); adev 377 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c err = amdgpu_ucode_validate(adev->gfx.rlc_fw); adev 378 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c rlc_hdr = (const struct rlc_firmware_header_v1_0 *)adev->gfx.rlc_fw->data; adev 379 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version); adev 380 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version); adev 385 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c release_firmware(adev->gfx.pfp_fw); adev 386 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.pfp_fw = NULL; adev 387 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c release_firmware(adev->gfx.me_fw); adev 388 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.me_fw = NULL; adev 389 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c release_firmware(adev->gfx.ce_fw); adev 390 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.ce_fw = NULL; adev 391 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c release_firmware(adev->gfx.rlc_fw); adev 392 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.rlc_fw = NULL; adev 397 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_tiling_mode_table_init(struct amdgpu_device *adev) adev 399 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c const u32 num_tile_mode_states = ARRAY_SIZE(adev->gfx.config.tile_mode_array); adev 402 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c memset(adev->gfx.config.tile_mode_array, 0, sizeof(adev->gfx.config.tile_mode_array)); adev 403 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c tilemode = adev->gfx.config.tile_mode_array; adev 405 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c switch (adev->gfx.config.mem_row_size_in_kb) { adev 418 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (adev->asic_type == CHIP_VERDE) { adev 642 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c } else if (adev->asic_type == CHIP_OLAND) { adev 848 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c } else if (adev->asic_type == CHIP_HAINAN) { adev 1072 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c } else if ((adev->asic_type == CHIP_TAHITI) || (adev->asic_type == CHIP_PITCAIRN)) { adev 1297 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c DRM_ERROR("unknown asic: 0x%x\n", adev->asic_type); adev 1301 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, adev 1326 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static u32 gfx_v6_0_get_rb_active_bitmap(struct amdgpu_device *adev) adev 1335 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se/ adev 1336 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_sh_per_se); adev 1341 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_raster_config(struct amdgpu_device *adev, u32 *rconf) adev 1343 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c switch (adev->asic_type) { adev 1368 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c DRM_ERROR("unknown asic: 0x%x\n", adev->asic_type); adev 1373 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_write_harvested_raster_configs(struct amdgpu_device *adev, adev 1377 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c unsigned sh_per_se = max_t(unsigned, adev->gfx.config.max_sh_per_se, 1); adev 1378 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c unsigned num_se = max_t(unsigned, adev->gfx.config.max_shader_engines, 1); adev 1455 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_select_se_sh(adev, se, 0xffffffff, 0xffffffff); adev 1460 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1463 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_setup_rb(struct amdgpu_device *adev) adev 1469 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / adev 1470 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_sh_per_se; adev 1473 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c mutex_lock(&adev->grbm_idx_mutex); adev 1474 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 1475 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 1476 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_select_se_sh(adev, i, j, 0xffffffff); adev 1477 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c data = gfx_v6_0_get_rb_active_bitmap(adev); adev 1479 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c ((i * adev->gfx.config.max_sh_per_se + j) * adev 1483 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1485 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.backend_enable_mask = active_rbs; adev 1486 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.num_rbs = hweight32(active_rbs); adev 1488 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c num_rb_pipes = min_t(unsigned, adev->gfx.config.max_backends_per_se * adev 1489 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_shader_engines, 16); adev 1491 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_raster_config(adev, &raster_config); adev 1493 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (!adev->gfx.config.backend_enable_mask || adev 1494 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.num_rbs >= num_rb_pipes) adev 1497 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_write_harvested_raster_configs(adev, raster_config, adev 1498 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.backend_enable_mask, adev 1502 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 1503 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 1504 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_select_se_sh(adev, i, j, 0xffffffff); adev 1505 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.rb_config[i][j].rb_backend_disable = adev 1507 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.rb_config[i][j].user_rb_backend_disable = adev 1509 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.rb_config[i][j].raster_config = adev 1513 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1514 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 1517 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_set_user_cu_inactive_bitmap(struct amdgpu_device *adev, adev 1531 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static u32 gfx_v6_0_get_cu_enabled(struct amdgpu_device *adev) adev 1538 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_cu_per_sh); adev 1543 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_setup_spi(struct amdgpu_device *adev) adev 1549 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c mutex_lock(&adev->grbm_idx_mutex); adev 1550 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 1551 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 1552 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_select_se_sh(adev, i, j, 0xffffffff); adev 1554 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c active_cu = gfx_v6_0_get_cu_enabled(adev); adev 1567 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1568 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 1571 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_config_init(struct amdgpu_device *adev) adev 1573 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.double_offchip_lds_buf = 0; adev 1576 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_constants_init(struct amdgpu_device *adev) adev 1584 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c switch (adev->asic_type) { adev 1586 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_shader_engines = 2; adev 1587 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_tile_pipes = 12; adev 1588 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_cu_per_sh = 8; adev 1589 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_sh_per_se = 2; adev 1590 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_backends_per_se = 4; adev 1591 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_texture_channel_caches = 12; adev 1592 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_gprs = 256; adev 1593 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_gs_threads = 32; adev 1594 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_hw_contexts = 8; adev 1596 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1597 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1598 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1599 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 1603 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_shader_engines = 2; adev 1604 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_tile_pipes = 8; adev 1605 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_cu_per_sh = 5; adev 1606 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_sh_per_se = 2; adev 1607 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_backends_per_se = 4; adev 1608 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_texture_channel_caches = 8; adev 1609 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_gprs = 256; adev 1610 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_gs_threads = 32; adev 1611 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_hw_contexts = 8; adev 1613 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1614 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1615 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1616 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 1620 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_shader_engines = 1; adev 1621 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_tile_pipes = 4; adev 1622 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_cu_per_sh = 5; adev 1623 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_sh_per_se = 2; adev 1624 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_backends_per_se = 4; adev 1625 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_texture_channel_caches = 4; adev 1626 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_gprs = 256; adev 1627 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_gs_threads = 32; adev 1628 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_hw_contexts = 8; adev 1630 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1631 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x40; adev 1632 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1633 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 1637 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_shader_engines = 1; adev 1638 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_tile_pipes = 4; adev 1639 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_cu_per_sh = 6; adev 1640 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_sh_per_se = 1; adev 1641 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_backends_per_se = 2; adev 1642 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_texture_channel_caches = 4; adev 1643 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_gprs = 256; adev 1644 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_gs_threads = 16; adev 1645 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_hw_contexts = 8; adev 1647 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1648 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x40; adev 1649 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1650 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 1654 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_shader_engines = 1; adev 1655 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_tile_pipes = 4; adev 1656 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_cu_per_sh = 5; adev 1657 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_sh_per_se = 1; adev 1658 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_backends_per_se = 1; adev 1659 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_texture_channel_caches = 2; adev 1660 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_gprs = 256; adev 1661 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_gs_threads = 16; adev 1662 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.max_hw_contexts = 8; adev 1664 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1665 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x40; adev 1666 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1667 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 1682 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.mc_arb_ramcfg = RREG32(mmMC_ARB_RAMCFG); adev 1683 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c mc_arb_ramcfg = adev->gfx.config.mc_arb_ramcfg; adev 1685 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.num_tile_pipes = adev->gfx.config.max_tile_pipes; adev 1686 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.mem_max_burst_length_bytes = 256; adev 1688 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.mem_row_size_in_kb = (4 * (1 << (8 + tmp))) / 1024; adev 1689 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (adev->gfx.config.mem_row_size_in_kb > 4) adev 1690 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.mem_row_size_in_kb = 4; adev 1691 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.shader_engine_tile_size = 32; adev 1692 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.num_gpus = 1; adev 1693 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.multi_gpu_tile_size = 64; adev 1696 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c switch (adev->gfx.config.mem_row_size_in_kb) { adev 1709 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (adev->gfx.config.max_shader_engines == 2) adev 1711 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.config.gb_addr_config = gb_addr_config; adev 1721 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (adev->has_uvd) { adev 1727 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_tiling_mode_table_init(adev); adev 1729 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_setup_rb(adev); adev 1731 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_setup_spi(adev); adev 1733 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_get_cu_info(adev); adev 1734 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_config_init(adev); adev 1746 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c WREG32(mmPA_SC_FIFO_SIZE, ((adev->gfx.config.sc_prim_fifo_size_frontend << PA_SC_FIFO_SIZE__SC_FRONTEND_PRIM_FIFO_SIZE__SHIFT) | adev 1747 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c (adev->gfx.config.sc_prim_fifo_size_backend << PA_SC_FIFO_SIZE__SC_BACKEND_PRIM_FIFO_SIZE__SHIFT) | adev 1748 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c (adev->gfx.config.sc_hiz_tile_fifo_size << PA_SC_FIFO_SIZE__SC_HIZ_TILE_FIFO_SIZE__SHIFT) | adev 1749 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c (adev->gfx.config.sc_earlyz_tile_fifo_size << PA_SC_FIFO_SIZE__SC_EARLYZ_TILE_FIFO_SIZE__SHIFT))); adev 1783 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_scratch_init(struct amdgpu_device *adev) adev 1785 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.scratch.num_reg = 8; adev 1786 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.scratch.reg_base = mmSCRATCH_REG0; adev 1787 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; adev 1792 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = ring->adev; adev 1798 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = amdgpu_gfx_scratch_get(adev, &scratch); adev 1813 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 1820 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (i >= adev->usec_timeout) adev 1824 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_gfx_scratch_free(adev, scratch); adev 1905 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = ring->adev; adev 1912 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = amdgpu_gfx_scratch_get(adev, &scratch); adev 1918 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = amdgpu_ib_get(adev, NULL, 256, &ib); adev 1945 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ib_free(adev, &ib, NULL); adev 1948 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_gfx_scratch_free(adev, scratch); adev 1952 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_cp_gfx_enable(struct amdgpu_device *adev, bool enable) adev 1962 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 1963 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.gfx_ring[i].sched.ready = false; adev 1964 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 1965 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.compute_ring[i].sched.ready = false; adev 1970 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_cp_gfx_load_microcode(struct amdgpu_device *adev) adev 1979 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (!adev->gfx.me_fw || !adev->gfx.pfp_fw || !adev->gfx.ce_fw) adev 1982 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_cp_gfx_enable(adev, false); adev 1983 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c pfp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; adev 1984 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c ce_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; adev 1985 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c me_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; adev 1993 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c (adev->gfx.pfp_fw->data + le32_to_cpu(pfp_hdr->header.ucode_array_offset_bytes)); adev 2002 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c (adev->gfx.ce_fw->data + le32_to_cpu(ce_hdr->header.ucode_array_offset_bytes)); adev 2011 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c (adev->gfx.me_fw->data + le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); adev 2025 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_cp_gfx_start(struct amdgpu_device *adev) adev 2029 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_ring *ring = &adev->gfx.gfx_ring[0]; adev 2040 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_write(ring, adev->gfx.config.max_hw_contexts - 1); adev 2051 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_cp_gfx_enable(adev, true); adev 2053 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = amdgpu_ring_alloc(ring, gfx_v6_0_get_csb_size(adev) + 10); adev 2062 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { adev 2090 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_cp_gfx_resume(struct amdgpu_device *adev) adev 2109 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c ring = &adev->gfx.gfx_ring[0]; adev 2124 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); adev 2136 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_cp_gfx_start(adev); adev 2146 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c return ring->adev->wb.wb[ring->rptr_offs]; adev 2151 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = ring->adev; adev 2153 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (ring == &adev->gfx.gfx_ring[0]) adev 2155 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c else if (ring == &adev->gfx.compute_ring[0]) adev 2157 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c else if (ring == &adev->gfx.compute_ring[1]) adev 2165 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = ring->adev; adev 2173 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = ring->adev; adev 2175 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (ring == &adev->gfx.compute_ring[0]) { adev 2178 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c } else if (ring == &adev->gfx.compute_ring[1]) { adev 2187 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_cp_compute_resume(struct amdgpu_device *adev) adev 2198 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c ring = &adev->gfx.compute_ring[0]; adev 2210 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); adev 2218 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c ring = &adev->gfx.compute_ring[1]; adev 2229 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); adev 2239 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = amdgpu_ring_test_helper(&adev->gfx.compute_ring[i]); adev 2247 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_cp_enable(struct amdgpu_device *adev, bool enable) adev 2249 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_cp_gfx_enable(adev, enable); adev 2252 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_cp_load_microcode(struct amdgpu_device *adev) adev 2254 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c return gfx_v6_0_cp_gfx_load_microcode(adev); adev 2257 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_enable_gui_idle_interrupt(struct amdgpu_device *adev, adev 2277 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 2285 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_cp_resume(struct amdgpu_device *adev) adev 2289 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_gui_idle_interrupt(adev, false); adev 2291 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = gfx_v6_0_cp_load_microcode(adev); adev 2295 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = gfx_v6_0_cp_gfx_resume(adev); adev 2298 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = gfx_v6_0_cp_compute_resume(adev); adev 2302 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_gui_idle_interrupt(adev, true); adev 2375 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_rlc_init(struct amdgpu_device *adev) adev 2384 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.rlc.reg_list = verde_rlc_save_restore_register_list; adev 2385 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.rlc.reg_list_size = adev 2388 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.rlc.cs_data = si_cs_data; adev 2389 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c src_ptr = adev->gfx.rlc.reg_list; adev 2390 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dws = adev->gfx.rlc.reg_list_size; adev 2391 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c cs_data = adev->gfx.rlc.cs_data; adev 2395 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = amdgpu_gfx_rlc_init_sr(adev, dws); adev 2402 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.rlc.clear_state_size = gfx_v6_0_get_csb_size(adev); adev 2403 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dws = adev->gfx.rlc.clear_state_size + (256 / 4); adev 2405 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE, adev 2407 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c &adev->gfx.rlc.clear_state_obj, adev 2408 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c &adev->gfx.rlc.clear_state_gpu_addr, adev 2409 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c (void **)&adev->gfx.rlc.cs_ptr); adev 2411 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dev_warn(adev->dev, "(%d) create RLC c bo failed\n", r); adev 2412 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_gfx_rlc_fini(adev); adev 2417 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst_ptr = adev->gfx.rlc.cs_ptr; adev 2418 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c reg_list_mc_addr = adev->gfx.rlc.clear_state_gpu_addr + 256; adev 2421 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst_ptr[2] = cpu_to_le32(adev->gfx.rlc.clear_state_size); adev 2422 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_get_csb_buffer(adev, &dst_ptr[(256/4)]); adev 2423 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj); adev 2424 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); adev 2430 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_enable_lbpw(struct amdgpu_device *adev, bool enable) adev 2435 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 2440 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_wait_for_rlc_serdes(struct amdgpu_device *adev) adev 2444 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 2450 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 2457 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_update_rlc(struct amdgpu_device *adev, u32 rlc) adev 2466 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static u32 gfx_v6_0_halt_rlc(struct amdgpu_device *adev) adev 2476 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_wait_for_rlc_serdes(adev); adev 2482 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_rlc_stop(struct amdgpu_device *adev) adev 2486 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_gui_idle_interrupt(adev, false); adev 2487 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_wait_for_rlc_serdes(adev); adev 2490 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_rlc_start(struct amdgpu_device *adev) adev 2494 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_gui_idle_interrupt(adev, true); adev 2499 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_rlc_reset(struct amdgpu_device *adev) adev 2507 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static bool gfx_v6_0_lbpw_supported(struct amdgpu_device *adev) adev 2518 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_init_cg(struct amdgpu_device *adev) adev 2522 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_rlc_resume(struct amdgpu_device *adev) adev 2530 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (!adev->gfx.rlc_fw) adev 2533 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.rlc.funcs->stop(adev); adev 2534 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.rlc.funcs->reset(adev); adev 2535 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_init_pg(adev); adev 2536 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_init_cg(adev); adev 2548 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c hdr = (const struct rlc_firmware_header_v1_0 *)adev->gfx.rlc_fw->data; adev 2551 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c (adev->gfx.rlc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); adev 2561 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_lbpw(adev, gfx_v6_0_lbpw_supported(adev)); adev 2562 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.rlc.funcs->start(adev); adev 2567 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_enable_cgcg(struct amdgpu_device *adev, bool enable) adev 2573 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGCG)) { adev 2574 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_gui_idle_interrupt(adev, true); adev 2578 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c tmp = gfx_v6_0_halt_rlc(adev); adev 2584 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_wait_for_rlc_serdes(adev); adev 2585 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_update_rlc(adev, tmp); adev 2591 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_gui_idle_interrupt(adev, false); adev 2606 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_enable_mgcg(struct amdgpu_device *adev, bool enable) adev 2611 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGCG)) { adev 2617 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CP_LS) { adev 2629 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c tmp = gfx_v6_0_halt_rlc(adev); adev 2635 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_update_rlc(adev, tmp); adev 2652 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c tmp = gfx_v6_0_halt_rlc(adev); adev 2658 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_update_rlc(adev, tmp); adev 2677 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_enable_sclk_slowdown_on_pu(struct amdgpu_device *adev, adev 2682 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_enable_sclk_slowdown_on_pd(struct amdgpu_device *adev, adev 2687 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_enable_cp_pg(struct amdgpu_device *adev, bool enable) adev 2692 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (enable && (adev->pg_flags & AMD_PG_SUPPORT_CP)) adev 2700 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_enable_gds_pg(struct amdgpu_device *adev, bool enable) adev 2771 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_enable_gfx_cgpg(struct amdgpu_device *adev, adev 2774 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) { adev 2784 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_init_ao_cu_mask(struct amdgpu_device *adev) adev 2788 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask); adev 2792 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c tmp |= (adev->gfx.cu_info.number << RLC_MAX_PG_CU__MAX_POWERED_UP_CU__SHIFT); adev 2796 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_enable_gfx_static_mgpg(struct amdgpu_device *adev, adev 2802 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_SMG)) adev 2810 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_enable_gfx_dynamic_mgpg(struct amdgpu_device *adev, adev 2816 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_DMG)) adev 2824 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_init_gfx_cgpg(struct amdgpu_device *adev) adev 2828 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c WREG32(mmRLC_SAVE_AND_RESTORE_BASE, adev->gfx.rlc.save_restore_gpu_addr >> 8); adev 2830 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8); adev 2839 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_update_gfx_pg(struct amdgpu_device *adev, bool enable) adev 2841 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_gfx_cgpg(adev, enable); adev 2842 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_gfx_static_mgpg(adev, enable); adev 2843 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_gfx_dynamic_mgpg(adev, enable); adev 2846 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static u32 gfx_v6_0_get_csb_size(struct amdgpu_device *adev) adev 2852 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (adev->gfx.rlc.cs_data == NULL) adev 2860 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { adev 2878 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_get_csb_buffer(struct amdgpu_device *adev, adev 2885 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (adev->gfx.rlc.cs_data == NULL) adev 2896 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { adev 2912 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c buffer[count++] = cpu_to_le32(adev->gfx.config.rb_config[0][0].raster_config); adev 2921 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_init_pg(struct amdgpu_device *adev) adev 2923 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_PG | adev 2929 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_sclk_slowdown_on_pu(adev, true); adev 2930 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_sclk_slowdown_on_pd(adev, true); adev 2931 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) { adev 2932 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_init_gfx_cgpg(adev); adev 2933 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_cp_pg(adev, true); adev 2934 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_gds_pg(adev, true); adev 2936 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c WREG32(mmRLC_SAVE_AND_RESTORE_BASE, adev->gfx.rlc.save_restore_gpu_addr >> 8); adev 2937 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8); adev 2940 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_init_ao_cu_mask(adev); adev 2941 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_update_gfx_pg(adev, true); adev 2944 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c WREG32(mmRLC_SAVE_AND_RESTORE_BASE, adev->gfx.rlc.save_restore_gpu_addr >> 8); adev 2945 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8); adev 2949 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_fini_pg(struct amdgpu_device *adev) adev 2951 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_PG | adev 2957 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_update_gfx_pg(adev, false); adev 2958 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) { adev 2959 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_cp_pg(adev, false); adev 2960 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_gds_pg(adev, false); adev 2965 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static uint64_t gfx_v6_0_get_gpu_clock_counter(struct amdgpu_device *adev) adev 2969 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c mutex_lock(&adev->gfx.gpu_clock_mutex); adev 2973 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c mutex_unlock(&adev->gfx.gpu_clock_mutex); adev 2987 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address) adev 2997 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, adev 3012 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) adev 3016 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); adev 3017 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); adev 3018 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); adev 3019 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); adev 3020 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); adev 3021 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); adev 3022 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); adev 3023 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); adev 3024 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC); adev 3025 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC); adev 3026 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS); adev 3027 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS); adev 3028 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO); adev 3029 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI); adev 3030 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO); adev 3031 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI); adev 3032 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0); adev 3033 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); adev 3036 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd, adev 3041 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev, simd, wave, 0, adev 3045 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_select_me_pipe_q(struct amdgpu_device *adev, adev 3069 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3071 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.num_gfx_rings = GFX6_NUM_GFX_RINGS; adev 3072 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.num_compute_rings = GFX6_NUM_COMPUTE_RINGS; adev 3073 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.funcs = &gfx_v6_0_gfx_funcs; adev 3074 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.rlc.funcs = &gfx_v6_0_rlc_funcs; adev 3075 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_set_ring_funcs(adev); adev 3076 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_set_irq_funcs(adev); adev 3084 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3087 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 181, &adev->gfx.eop_irq); adev 3091 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 184, &adev->gfx.priv_reg_irq); adev 3095 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 185, &adev->gfx.priv_inst_irq); adev 3099 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_scratch_init(adev); adev 3101 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = gfx_v6_0_init_microcode(adev); adev 3107 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = adev->gfx.rlc.funcs->init(adev); adev 3113 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) { adev 3114 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c ring = &adev->gfx.gfx_ring[i]; adev 3117 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = amdgpu_ring_init(adev, ring, 1024, adev 3118 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP); adev 3123 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 3130 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c ring = &adev->gfx.compute_ring[i]; adev 3139 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = amdgpu_ring_init(adev, ring, 1024, adev 3140 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c &adev->gfx.eop_irq, irq_type); adev 3151 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3153 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 3154 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_fini(&adev->gfx.gfx_ring[i]); adev 3155 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 3156 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_ring_fini(&adev->gfx.compute_ring[i]); adev 3158 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_gfx_rlc_fini(adev); adev 3166 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3168 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_constants_init(adev); adev 3170 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = adev->gfx.rlc.funcs->resume(adev); adev 3174 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c r = gfx_v6_0_cp_resume(adev); adev 3178 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.ce_ram_size = 0x8000; adev 3185 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3187 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_cp_enable(adev, false); adev 3188 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.rlc.funcs->stop(adev); adev 3189 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_fini_pg(adev); adev 3196 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3198 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c return gfx_v6_0_hw_fini(adev); adev 3203 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3205 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c return gfx_v6_0_hw_init(adev); adev 3210 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3221 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3223 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 3236 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, adev 3257 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_set_compute_eop_interrupt_state(struct amdgpu_device *adev, adev 3297 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_set_priv_reg_fault_state(struct amdgpu_device *adev, adev 3322 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_set_priv_inst_fault_state(struct amdgpu_device *adev, adev 3347 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_set_eop_interrupt_state(struct amdgpu_device *adev, adev 3354 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_set_gfx_eop_interrupt_state(adev, state); adev 3357 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_set_compute_eop_interrupt_state(adev, 0, state); adev 3360 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_set_compute_eop_interrupt_state(adev, 1, state); adev 3368 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_eop_irq(struct amdgpu_device *adev, adev 3374 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_fence_process(&adev->gfx.gfx_ring[0]); adev 3378 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c amdgpu_fence_process(&adev->gfx.compute_ring[entry->ring_id - 1]); adev 3386 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_fault(struct amdgpu_device *adev, adev 3393 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c ring = &adev->gfx.gfx_ring[0]; adev 3397 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c ring = &adev->gfx.compute_ring[entry->ring_id - 1]; adev 3405 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_priv_reg_irq(struct amdgpu_device *adev, adev 3410 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_fault(adev, entry); adev 3414 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static int gfx_v6_0_priv_inst_irq(struct amdgpu_device *adev, adev 3419 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_fault(adev, entry); adev 3427 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3432 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_gui_idle_interrupt(adev, false); adev 3434 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_mgcg(adev, true); adev 3435 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_cgcg(adev, true); adev 3437 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_cgcg(adev, false); adev 3438 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_mgcg(adev, false); adev 3440 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_gui_idle_interrupt(adev, true); adev 3449 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3454 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_PG | adev 3460 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_update_gfx_pg(adev, gate); adev 3461 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) { adev 3462 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_cp_pg(adev, gate); adev 3463 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_enable_gds_pg(adev, gate); adev 3536 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_set_ring_funcs(struct amdgpu_device *adev) adev 3540 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 3541 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.gfx_ring[i].funcs = &gfx_v6_0_ring_funcs_gfx; adev 3542 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 3543 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.compute_ring[i].funcs = &gfx_v6_0_ring_funcs_compute; adev 3561 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_set_irq_funcs(struct amdgpu_device *adev) adev 3563 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.eop_irq.num_types = AMDGPU_CP_IRQ_LAST; adev 3564 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.eop_irq.funcs = &gfx_v6_0_eop_irq_funcs; adev 3566 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.priv_reg_irq.num_types = 1; adev 3567 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.priv_reg_irq.funcs = &gfx_v6_0_priv_reg_irq_funcs; adev 3569 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.priv_inst_irq.num_types = 1; adev 3570 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev->gfx.priv_inst_irq.funcs = &gfx_v6_0_priv_inst_irq_funcs; adev 3573 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_get_cu_info(struct amdgpu_device *adev) adev 3577 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; adev 3581 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c if (adev->flags & AMD_IS_APU) adev 3584 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c ao_cu_num = adev->gfx.config.max_cu_per_sh; adev 3590 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c mutex_lock(&adev->grbm_idx_mutex); adev 3591 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 3592 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 3596 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_select_se_sh(adev, i, j, 0xffffffff); adev 3599 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev, disable_masks[i * 2 + j]); adev 3600 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c bitmap = gfx_v6_0_get_cu_enabled(adev); adev 3603 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) { adev 3618 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 3619 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 58 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_set_ring_funcs(struct amdgpu_device *adev); adev 59 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_set_irq_funcs(struct amdgpu_device *adev); adev 60 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_set_gds_init(struct amdgpu_device *adev); adev 885 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static u32 gfx_v7_0_get_csb_size(struct amdgpu_device *adev); adev 886 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_get_csb_buffer(struct amdgpu_device *adev, volatile u32 *buffer); adev 887 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_init_pg(struct amdgpu_device *adev); adev 888 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_get_cu_info(struct amdgpu_device *adev); adev 902 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_init_microcode(struct amdgpu_device *adev) adev 910 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c switch (adev->asic_type) { adev 930 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev); adev 933 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c err = amdgpu_ucode_validate(adev->gfx.pfp_fw); adev 938 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); adev 941 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c err = amdgpu_ucode_validate(adev->gfx.me_fw); adev 946 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev); adev 949 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c err = amdgpu_ucode_validate(adev->gfx.ce_fw); adev 954 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev); adev 957 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c err = amdgpu_ucode_validate(adev->gfx.mec_fw); adev 961 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->asic_type == CHIP_KAVERI) { adev 963 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev); adev 966 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c err = amdgpu_ucode_validate(adev->gfx.mec2_fw); adev 972 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev); adev 975 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c err = amdgpu_ucode_validate(adev->gfx.rlc_fw); adev 980 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c release_firmware(adev->gfx.pfp_fw); adev 981 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.pfp_fw = NULL; adev 982 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c release_firmware(adev->gfx.me_fw); adev 983 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.me_fw = NULL; adev 984 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c release_firmware(adev->gfx.ce_fw); adev 985 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.ce_fw = NULL; adev 986 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c release_firmware(adev->gfx.mec_fw); adev 987 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.mec_fw = NULL; adev 988 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c release_firmware(adev->gfx.mec2_fw); adev 989 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.mec2_fw = NULL; adev 990 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c release_firmware(adev->gfx.rlc_fw); adev 991 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc_fw = NULL; adev 996 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_free_microcode(struct amdgpu_device *adev) adev 998 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c release_firmware(adev->gfx.pfp_fw); adev 999 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.pfp_fw = NULL; adev 1000 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c release_firmware(adev->gfx.me_fw); adev 1001 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.me_fw = NULL; adev 1002 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c release_firmware(adev->gfx.ce_fw); adev 1003 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.ce_fw = NULL; adev 1004 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c release_firmware(adev->gfx.mec_fw); adev 1005 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.mec_fw = NULL; adev 1006 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c release_firmware(adev->gfx.mec2_fw); adev 1007 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.mec2_fw = NULL; adev 1008 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c release_firmware(adev->gfx.rlc_fw); adev 1009 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc_fw = NULL; adev 1023 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_tiling_mode_table_init(struct amdgpu_device *adev) adev 1026 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ARRAY_SIZE(adev->gfx.config.tile_mode_array); adev 1028 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ARRAY_SIZE(adev->gfx.config.macrotile_mode_array); adev 1032 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c tile = adev->gfx.config.tile_mode_array; adev 1033 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c macrotile = adev->gfx.config.macrotile_mode_array; adev 1035 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c switch (adev->gfx.config.mem_row_size_in_kb) { adev 1053 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c switch (adev->asic_type) { adev 1588 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_select_se_sh(struct amdgpu_device *adev, adev 1621 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static u32 gfx_v7_0_get_rb_active_bitmap(struct amdgpu_device *adev) adev 1631 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / adev 1632 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_sh_per_se); adev 1638 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_raster_config(struct amdgpu_device *adev, u32 *rconf, u32 *rconf1) adev 1640 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c switch (adev->asic_type) { adev 1664 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c DRM_ERROR("unknown asic: 0x%x\n", adev->asic_type); adev 1670 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_write_harvested_raster_configs(struct amdgpu_device *adev, adev 1674 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c unsigned sh_per_se = max_t(unsigned, adev->gfx.config.max_sh_per_se, 1); adev 1675 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c unsigned num_se = max_t(unsigned, adev->gfx.config.max_shader_engines, 1); adev 1769 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, se, 0xffffffff, 0xffffffff); adev 1775 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1787 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_setup_rb(struct amdgpu_device *adev) adev 1793 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / adev 1794 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_sh_per_se; adev 1797 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_lock(&adev->grbm_idx_mutex); adev 1798 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 1799 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 1800 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, i, j, 0xffffffff); adev 1801 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c data = gfx_v7_0_get_rb_active_bitmap(adev); adev 1802 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * adev 1806 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1808 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.backend_enable_mask = active_rbs; adev 1809 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.num_rbs = hweight32(active_rbs); adev 1811 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c num_rb_pipes = min_t(unsigned, adev->gfx.config.max_backends_per_se * adev 1812 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_shader_engines, 16); adev 1814 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_raster_config(adev, &raster_config, &raster_config_1); adev 1816 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (!adev->gfx.config.backend_enable_mask || adev 1817 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.num_rbs >= num_rb_pipes) { adev 1821 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_write_harvested_raster_configs(adev, raster_config, raster_config_1, adev 1822 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.backend_enable_mask, adev 1827 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 1828 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 1829 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, i, j, 0xffffffff); adev 1830 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.rb_config[i][j].rb_backend_disable = adev 1832 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.rb_config[i][j].user_rb_backend_disable = adev 1834 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.rb_config[i][j].raster_config = adev 1836 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.rb_config[i][j].raster_config_1 = adev 1840 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1841 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 1855 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_init_compute_vmid(struct amdgpu_device *adev) adev 1871 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_lock(&adev->srbm_mutex); adev 1873 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c cik_srbm_select(adev, 0, 0, 0, i); adev 1880 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c cik_srbm_select(adev, 0, 0, 0, 0); adev 1881 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_unlock(&adev->srbm_mutex); adev 1893 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_init_gds_vmid(struct amdgpu_device *adev) adev 1911 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_config_init(struct amdgpu_device *adev) adev 1913 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.double_offchip_lds_buf = 1; adev 1924 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_constants_init(struct amdgpu_device *adev) adev 1932 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmGB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 1933 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmHDP_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 1934 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmDMIF_ADDR_CALC, adev->gfx.config.gb_addr_config); adev 1936 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_tiling_mode_table_init(adev); adev 1938 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_setup_rb(adev); adev 1939 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_get_cu_info(adev); adev 1940 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_config_init(adev); adev 1947 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_lock(&adev->grbm_idx_mutex); adev 1952 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1972 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_lock(&adev->srbm_mutex); adev 1973 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->vm_manager.id_mgr[0].num_ids; i++) { adev 1977 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c sh_mem_base = adev->gmc.shared_aperture_start >> 48; adev 1978 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c cik_srbm_select(adev, 0, 0, 0, i); adev 1985 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c cik_srbm_select(adev, 0, 0, 0, 0); adev 1986 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_unlock(&adev->srbm_mutex); adev 1988 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_init_compute_vmid(adev); adev 1989 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_init_gds_vmid(adev); adev 2018 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ((adev->gfx.config.sc_prim_fifo_size_frontend << PA_SC_FIFO_SIZE__SC_FRONTEND_PRIM_FIFO_SIZE__SHIFT) | adev 2019 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (adev->gfx.config.sc_prim_fifo_size_backend << PA_SC_FIFO_SIZE__SC_BACKEND_PRIM_FIFO_SIZE__SHIFT) | adev 2020 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (adev->gfx.config.sc_hiz_tile_fifo_size << PA_SC_FIFO_SIZE__SC_HIZ_TILE_FIFO_SIZE__SHIFT) | adev 2021 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (adev->gfx.config.sc_earlyz_tile_fifo_size << PA_SC_FIFO_SIZE__SC_EARLYZ_TILE_FIFO_SIZE__SHIFT))); adev 2051 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 2069 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_scratch_init(struct amdgpu_device *adev) adev 2071 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.scratch.num_reg = 8; adev 2072 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.scratch.reg_base = mmSCRATCH_REG0; adev 2073 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; adev 2089 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = ring->adev; adev 2095 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_gfx_scratch_get(adev, &scratch); adev 2109 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 2115 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (i >= adev->usec_timeout) adev 2119 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_gfx_scratch_free(adev, scratch); adev 2310 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); adev 2354 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = ring->adev; adev 2361 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_gfx_scratch_get(adev, &scratch); adev 2367 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_ib_get(adev, NULL, 256, &ib); adev 2394 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ib_free(adev, &ib, NULL); adev 2397 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_gfx_scratch_free(adev, scratch); adev 2432 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_cp_gfx_enable(struct amdgpu_device *adev, bool enable) adev 2440 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 2441 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.gfx_ring[i].sched.ready = false; adev 2454 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_cp_gfx_load_microcode(struct amdgpu_device *adev) adev 2462 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (!adev->gfx.me_fw || !adev->gfx.pfp_fw || !adev->gfx.ce_fw) adev 2465 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c pfp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; adev 2466 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ce_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; adev 2467 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c me_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; adev 2472 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.pfp_fw_version = le32_to_cpu(pfp_hdr->header.ucode_version); adev 2473 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.ce_fw_version = le32_to_cpu(ce_hdr->header.ucode_version); adev 2474 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.me_fw_version = le32_to_cpu(me_hdr->header.ucode_version); adev 2475 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.me_feature_version = le32_to_cpu(me_hdr->ucode_feature_version); adev 2476 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.ce_feature_version = le32_to_cpu(ce_hdr->ucode_feature_version); adev 2477 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.pfp_feature_version = le32_to_cpu(pfp_hdr->ucode_feature_version); adev 2479 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_cp_gfx_enable(adev, false); adev 2483 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (adev->gfx.pfp_fw->data + adev 2489 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmCP_PFP_UCODE_ADDR, adev->gfx.pfp_fw_version); adev 2493 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (adev->gfx.ce_fw->data + adev 2499 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmCP_CE_UCODE_ADDR, adev->gfx.ce_fw_version); adev 2503 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (adev->gfx.me_fw->data + adev 2509 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmCP_ME_RAM_WADDR, adev->gfx.me_fw_version); adev 2523 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_cp_gfx_start(struct amdgpu_device *adev) adev 2525 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_ring *ring = &adev->gfx.gfx_ring[0]; adev 2531 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmCP_MAX_CONTEXT, adev->gfx.config.max_hw_contexts - 1); adev 2535 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_cp_gfx_enable(adev, true); adev 2537 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_ring_alloc(ring, gfx_v7_0_get_csb_size(adev) + 8); adev 2557 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { adev 2571 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, adev->gfx.config.rb_config[0][0].raster_config); adev 2572 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_write(ring, adev->gfx.config.rb_config[0][0].raster_config_1); adev 2599 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_cp_gfx_resume(struct amdgpu_device *adev) adev 2608 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->asic_type != CHIP_HAWAII) adev 2621 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ring = &adev->gfx.gfx_ring[0]; adev 2635 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); adev 2650 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_cp_gfx_start(adev); adev 2660 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c return ring->adev->wb.wb[ring->rptr_offs]; adev 2665 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = ring->adev; adev 2672 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = ring->adev; adev 2681 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c return ring->adev->wb.wb[ring->wptr_offs]; adev 2686 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = ring->adev; adev 2689 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); adev 2701 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_cp_compute_enable(struct amdgpu_device *adev, bool enable) adev 2709 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 2710 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.compute_ring[i].sched.ready = false; adev 2723 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_cp_compute_load_microcode(struct amdgpu_device *adev) adev 2729 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (!adev->gfx.mec_fw) adev 2732 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; adev 2734 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version); adev 2735 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.mec_feature_version = le32_to_cpu( adev 2738 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_cp_compute_enable(adev, false); adev 2742 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (adev->gfx.mec_fw->data + adev 2750 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->asic_type == CHIP_KAVERI) { adev 2753 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (!adev->gfx.mec2_fw) adev 2756 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mec2_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec2_fw->data; adev 2758 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.mec2_fw_version = le32_to_cpu(mec2_hdr->header.ucode_version); adev 2759 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.mec2_feature_version = le32_to_cpu( adev 2764 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (adev->gfx.mec2_fw->data + adev 2784 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_cp_compute_fini(struct amdgpu_device *adev) adev 2788 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 2789 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[i]; adev 2795 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_mec_fini(struct amdgpu_device *adev) adev 2797 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); adev 2800 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_mec_init(struct amdgpu_device *adev) adev 2806 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); adev 2809 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_gfx_compute_queue_acquire(adev); adev 2812 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mec_hpd_size = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec adev 2815 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE, adev 2817 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c &adev->gfx.mec.hpd_eop_obj, adev 2818 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c &adev->gfx.mec.hpd_eop_gpu_addr, adev 2821 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dev_warn(adev->dev, "(%d) create, pin or map of HDP EOP bo failed\n", r); adev 2822 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_mec_fini(adev); adev 2829 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj); adev 2830 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); adev 2874 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_compute_pipe_init(struct amdgpu_device *adev, adev 2879 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c size_t eop_offset = (mec * adev->gfx.mec.num_pipe_per_mec + pipe) adev 2882 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_lock(&adev->srbm_mutex); adev 2883 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr + eop_offset; adev 2885 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c cik_srbm_select(adev, mec + 1, pipe, 0, 0); adev 2900 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c cik_srbm_select(adev, 0, 0, 0, 0); adev 2901 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_unlock(&adev->srbm_mutex); adev 2904 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_mqd_deactivate(struct amdgpu_device *adev) adev 2911 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 2917 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (i == adev->usec_timeout) adev 2928 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_mqd_init(struct amdgpu_device *adev, adev 2989 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c wb_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 2994 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c wb_gpu_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); adev 3048 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c int gfx_v7_0_mqd_commit(struct amdgpu_device *adev, struct cik_mqd *mqd) adev 3073 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_compute_queue_init(struct amdgpu_device *adev, int ring_id) adev 3078 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[ring_id]; adev 3080 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_bo_create_reserved(adev, sizeof(struct cik_mqd), PAGE_SIZE, adev 3084 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dev_warn(adev->dev, "(%d) create MQD bo failed\n", r); adev 3088 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_lock(&adev->srbm_mutex); adev 3089 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c cik_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 3091 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_mqd_init(adev, mqd, mqd_gpu_addr, ring); adev 3092 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_mqd_deactivate(adev); adev 3093 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_mqd_commit(adev, mqd); adev 3095 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c cik_srbm_select(adev, 0, 0, 0, 0); adev 3096 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_unlock(&adev->srbm_mutex); adev 3112 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev) adev 3124 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.mec.num_mec; i++) adev 3125 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) adev 3126 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_compute_pipe_init(adev, i, j); adev 3129 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 3130 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = gfx_v7_0_compute_queue_init(adev, i); adev 3132 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_cp_compute_fini(adev); adev 3137 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_cp_compute_enable(adev, true); adev 3139 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 3140 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ring = &adev->gfx.compute_ring[i]; adev 3147 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_cp_enable(struct amdgpu_device *adev, bool enable) adev 3149 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_cp_gfx_enable(adev, enable); adev 3150 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_cp_compute_enable(adev, enable); adev 3153 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_cp_load_microcode(struct amdgpu_device *adev) adev 3157 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = gfx_v7_0_cp_gfx_load_microcode(adev); adev 3160 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = gfx_v7_0_cp_compute_load_microcode(adev); adev 3167 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_enable_gui_idle_interrupt(struct amdgpu_device *adev, adev 3181 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_cp_resume(struct amdgpu_device *adev) adev 3185 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gui_idle_interrupt(adev, false); adev 3187 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = gfx_v7_0_cp_load_microcode(adev); adev 3191 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = gfx_v7_0_cp_gfx_resume(adev); adev 3194 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = gfx_v7_0_cp_compute_resume(adev); adev 3198 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gui_idle_interrupt(adev, true); adev 3300 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_rlc_init(struct amdgpu_device *adev) adev 3308 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->flags & AMD_IS_APU) { adev 3309 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->asic_type == CHIP_KAVERI) { adev 3310 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc.reg_list = spectre_rlc_save_restore_register_list; adev 3311 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc.reg_list_size = adev 3314 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc.reg_list = kalindi_rlc_save_restore_register_list; adev 3315 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc.reg_list_size = adev 3319 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc.cs_data = ci_cs_data; adev 3320 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc.cp_table_size = ALIGN(CP_ME_TABLE_SIZE * 5 * 4, 2048); /* CP JT */ adev 3321 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc.cp_table_size += 64 * 1024; /* GDS */ adev 3323 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c src_ptr = adev->gfx.rlc.reg_list; adev 3324 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dws = adev->gfx.rlc.reg_list_size; adev 3327 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c cs_data = adev->gfx.rlc.cs_data; adev 3331 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_gfx_rlc_init_sr(adev, dws); adev 3338 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_gfx_rlc_init_csb(adev); adev 3343 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->gfx.rlc.cp_table_size) { adev 3344 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_gfx_rlc_init_cpt(adev); adev 3352 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_enable_lbpw(struct amdgpu_device *adev, bool enable) adev 3364 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_wait_for_rlc_serdes(struct amdgpu_device *adev) adev 3369 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_lock(&adev->grbm_idx_mutex); adev 3370 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 3371 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 3372 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, i, j, 0xffffffff); adev 3373 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (k = 0; k < adev->usec_timeout; k++) { adev 3380 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 3381 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 3387 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (k = 0; k < adev->usec_timeout; k++) { adev 3394 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_update_rlc(struct amdgpu_device *adev, u32 rlc) adev 3403 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static u32 gfx_v7_0_halt_rlc(struct amdgpu_device *adev) adev 3415 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 3421 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_wait_for_rlc_serdes(adev); adev 3427 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static bool gfx_v7_0_is_rlc_enabled(struct amdgpu_device *adev) adev 3432 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_set_safe_mode(struct amdgpu_device *adev) adev 3441 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 3447 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 3454 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_unset_safe_mode(struct amdgpu_device *adev) adev 3469 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_rlc_stop(struct amdgpu_device *adev) adev 3473 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gui_idle_interrupt(adev, false); adev 3475 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_wait_for_rlc_serdes(adev); adev 3485 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_rlc_start(struct amdgpu_device *adev) adev 3489 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gui_idle_interrupt(adev, true); adev 3494 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_rlc_reset(struct amdgpu_device *adev) adev 3515 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_rlc_resume(struct amdgpu_device *adev) adev 3522 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (!adev->gfx.rlc_fw) adev 3525 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c hdr = (const struct rlc_firmware_header_v1_0 *)adev->gfx.rlc_fw->data; adev 3527 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc_fw_version = le32_to_cpu(hdr->header.ucode_version); adev 3528 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc_feature_version = le32_to_cpu( adev 3531 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc.funcs->stop(adev); adev 3537 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc.funcs->reset(adev); adev 3539 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_init_pg(adev); adev 3544 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_lock(&adev->grbm_idx_mutex); adev 3545 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 3549 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 3555 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (adev->gfx.rlc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); adev 3560 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version); adev 3563 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_lbpw(adev, false); adev 3565 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->asic_type == CHIP_BONAIRE) adev 3568 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc.funcs->start(adev); adev 3573 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_enable_cgcg(struct amdgpu_device *adev, bool enable) adev 3579 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGCG)) { adev 3580 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gui_idle_interrupt(adev, true); adev 3582 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c tmp = gfx_v7_0_halt_rlc(adev); adev 3584 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_lock(&adev->grbm_idx_mutex); adev 3585 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 3592 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 3594 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_update_rlc(adev, tmp); adev 3601 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gui_idle_interrupt(adev, false); adev 3612 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gui_idle_interrupt(adev, true); adev 3616 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_enable_mgcg(struct amdgpu_device *adev, bool enable) adev 3620 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGCG)) { adev 3621 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGLS) { adev 3622 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CP_LS) { adev 3636 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c tmp = gfx_v7_0_halt_rlc(adev); adev 3638 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_lock(&adev->grbm_idx_mutex); adev 3639 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 3645 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 3647 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_update_rlc(adev, tmp); adev 3649 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGTS) { adev 3655 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if ((adev->cg_flags & AMD_CG_SUPPORT_GFX_MGLS) && adev 3656 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGTS_LS)) adev 3687 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c tmp = gfx_v7_0_halt_rlc(adev); adev 3689 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_lock(&adev->grbm_idx_mutex); adev 3690 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 3695 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 3697 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_update_rlc(adev, tmp); adev 3701 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_update_cg(struct amdgpu_device *adev, adev 3704 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gui_idle_interrupt(adev, false); adev 3707 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_mgcg(adev, true); adev 3708 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_cgcg(adev, true); adev 3710 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_cgcg(adev, false); adev 3711 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_mgcg(adev, false); adev 3713 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gui_idle_interrupt(adev, true); adev 3716 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_enable_sclk_slowdown_on_pu(struct amdgpu_device *adev, adev 3722 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (enable && (adev->pg_flags & AMD_PG_SUPPORT_RLC_SMU_HS)) adev 3730 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_enable_sclk_slowdown_on_pd(struct amdgpu_device *adev, adev 3736 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (enable && (adev->pg_flags & AMD_PG_SUPPORT_RLC_SMU_HS)) adev 3744 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_enable_cp_pg(struct amdgpu_device *adev, bool enable) adev 3749 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (enable && (adev->pg_flags & AMD_PG_SUPPORT_CP)) adev 3757 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_enable_gds_pg(struct amdgpu_device *adev, bool enable) adev 3762 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GDS)) adev 3770 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_cp_pg_table_num(struct amdgpu_device *adev) adev 3772 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->asic_type == CHIP_KAVERI) adev 3778 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_enable_gfx_cgpg(struct amdgpu_device *adev, adev 3783 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) { adev 3808 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_set_user_cu_inactive_bitmap(struct amdgpu_device *adev, adev 3822 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static u32 gfx_v7_0_get_cu_active_bitmap(struct amdgpu_device *adev) adev 3832 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_cu_per_sh); adev 3837 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_init_ao_cu_mask(struct amdgpu_device *adev) adev 3841 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask); adev 3845 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c tmp |= (adev->gfx.cu_info.number << RLC_MAX_PG_CU__MAX_POWERED_UP_CU__SHIFT); adev 3849 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_enable_gfx_static_mgpg(struct amdgpu_device *adev, adev 3855 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_SMG)) adev 3863 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_enable_gfx_dynamic_mgpg(struct amdgpu_device *adev, adev 3869 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_DMG)) adev 3880 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_init_gfx_cgpg(struct amdgpu_device *adev) adev 3885 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->gfx.rlc.cs_data) { adev 3887 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmRLC_GPM_SCRATCH_DATA, upper_32_bits(adev->gfx.rlc.clear_state_gpu_addr)); adev 3888 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmRLC_GPM_SCRATCH_DATA, lower_32_bits(adev->gfx.rlc.clear_state_gpu_addr)); adev 3889 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmRLC_GPM_SCRATCH_DATA, adev->gfx.rlc.clear_state_size); adev 3895 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->gfx.rlc.reg_list) { adev 3897 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.rlc.reg_list_size; i++) adev 3898 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmRLC_GPM_SCRATCH_DATA, adev->gfx.rlc.reg_list[i]); adev 3906 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmRLC_SAVE_AND_RESTORE_BASE, adev->gfx.rlc.save_restore_gpu_addr >> 8); adev 3907 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c WREG32(mmRLC_JUMP_TABLE_RESTORE, adev->gfx.rlc.cp_table_gpu_addr >> 8); adev 3929 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_update_gfx_pg(struct amdgpu_device *adev, bool enable) adev 3931 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gfx_cgpg(adev, enable); adev 3932 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gfx_static_mgpg(adev, enable); adev 3933 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gfx_dynamic_mgpg(adev, enable); adev 3936 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static u32 gfx_v7_0_get_csb_size(struct amdgpu_device *adev) adev 3942 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->gfx.rlc.cs_data == NULL) adev 3950 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { adev 3968 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_get_csb_buffer(struct amdgpu_device *adev, adev 3975 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->gfx.rlc.cs_data == NULL) adev 3987 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { adev 4003 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c switch (adev->asic_type) { adev 4034 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_init_pg(struct amdgpu_device *adev) adev 4036 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_PG | adev 4042 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_sclk_slowdown_on_pu(adev, true); adev 4043 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_sclk_slowdown_on_pd(adev, true); adev 4044 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) { adev 4045 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_init_gfx_cgpg(adev); adev 4046 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_cp_pg(adev, true); adev 4047 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gds_pg(adev, true); adev 4049 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_init_ao_cu_mask(adev); adev 4050 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_update_gfx_pg(adev, true); adev 4054 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_fini_pg(struct amdgpu_device *adev) adev 4056 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_PG | adev 4062 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_update_gfx_pg(adev, false); adev 4063 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) { adev 4064 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_cp_pg(adev, false); adev 4065 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gds_pg(adev, false); adev 4078 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static uint64_t gfx_v7_0_get_gpu_clock_counter(struct amdgpu_device *adev) adev 4082 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_lock(&adev->gfx.gpu_clock_mutex); adev 4086 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_unlock(&adev->gfx.gpu_clock_mutex); adev 4131 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = ring->adev; adev 4141 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address) adev 4151 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, adev 4166 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) adev 4170 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); adev 4171 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); adev 4172 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); adev 4173 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); adev 4174 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); adev 4175 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); adev 4176 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); adev 4177 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); adev 4178 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC); adev 4179 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC); adev 4180 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS); adev 4181 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS); adev 4182 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO); adev 4183 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI); adev 4184 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO); adev 4185 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI); adev 4186 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0); adev 4187 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); adev 4190 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd, adev 4195 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev, simd, wave, 0, adev 4199 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_select_me_pipe_q(struct amdgpu_device *adev, adev 4202 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c cik_srbm_select(adev, me, pipe, q, vm); adev 4229 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4231 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.num_gfx_rings = GFX7_NUM_GFX_RINGS; adev 4232 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.num_compute_rings = AMDGPU_MAX_COMPUTE_RINGS; adev 4233 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.funcs = &gfx_v7_0_gfx_funcs; adev 4234 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc.funcs = &gfx_v7_0_rlc_funcs; adev 4235 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_set_ring_funcs(adev); adev 4236 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_set_irq_funcs(adev); adev 4237 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_set_gds_init(adev); adev 4244 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4247 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); adev 4251 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_irq_get(adev, &adev->gfx.priv_inst_irq, 0); adev 4258 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_gpu_early_init(struct amdgpu_device *adev) adev 4265 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c switch (adev->asic_type) { adev 4267 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_shader_engines = 2; adev 4268 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_tile_pipes = 4; adev 4269 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_cu_per_sh = 7; adev 4270 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_sh_per_se = 1; adev 4271 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_backends_per_se = 2; adev 4272 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_texture_channel_caches = 4; adev 4273 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_gprs = 256; adev 4274 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_gs_threads = 32; adev 4275 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_hw_contexts = 8; adev 4277 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 4278 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 4279 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 4280 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 4284 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_shader_engines = 4; adev 4285 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_tile_pipes = 16; adev 4286 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_cu_per_sh = 11; adev 4287 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_sh_per_se = 1; adev 4288 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_backends_per_se = 4; adev 4289 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_texture_channel_caches = 16; adev 4290 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_gprs = 256; adev 4291 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_gs_threads = 32; adev 4292 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_hw_contexts = 8; adev 4294 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 4295 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 4296 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 4297 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 4301 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_shader_engines = 1; adev 4302 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_tile_pipes = 4; adev 4303 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_cu_per_sh = 8; adev 4304 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_backends_per_se = 2; adev 4305 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_sh_per_se = 1; adev 4306 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_texture_channel_caches = 4; adev 4307 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_gprs = 256; adev 4308 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_gs_threads = 16; adev 4309 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_hw_contexts = 8; adev 4311 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 4312 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 4313 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 4314 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 4320 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_shader_engines = 1; adev 4321 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_tile_pipes = 2; adev 4322 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_cu_per_sh = 2; adev 4323 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_sh_per_se = 1; adev 4324 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_backends_per_se = 1; adev 4325 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_texture_channel_caches = 2; adev 4326 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_gprs = 256; adev 4327 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_gs_threads = 16; adev 4328 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.max_hw_contexts = 8; adev 4330 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 4331 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 4332 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 4333 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 4339 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.mc_arb_ramcfg = RREG32(mmMC_ARB_RAMCFG); adev 4340 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mc_arb_ramcfg = adev->gfx.config.mc_arb_ramcfg; adev 4342 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.num_tile_pipes = adev->gfx.config.max_tile_pipes; adev 4343 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.mem_max_burst_length_bytes = 256; adev 4344 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->flags & AMD_IS_APU) { adev 4367 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.mem_row_size_in_kb = 2; adev 4369 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.mem_row_size_in_kb = 1; adev 4372 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.mem_row_size_in_kb = (4 * (1 << (8 + tmp))) / 1024; adev 4373 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->gfx.config.mem_row_size_in_kb > 4) adev 4374 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.mem_row_size_in_kb = 4; adev 4377 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.shader_engine_tile_size = 32; adev 4378 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.num_gpus = 1; adev 4379 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.multi_gpu_tile_size = 64; adev 4383 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c switch (adev->gfx.config.mem_row_size_in_kb) { adev 4395 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.config.gb_addr_config = gb_addr_config; adev 4398 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, adev 4403 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[ring_id]; adev 4412 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id; adev 4416 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) adev 4420 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_ring_init(adev, ring, 1024, adev 4421 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c &adev->gfx.eop_irq, irq_type); adev 4432 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4435 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c switch (adev->asic_type) { adev 4437 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.mec.num_mec = 2; adev 4444 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.mec.num_mec = 1; adev 4447 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.mec.num_pipe_per_mec = 4; adev 4448 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.mec.num_queue_per_pipe = 8; adev 4451 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 181, &adev->gfx.eop_irq); adev 4456 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 184, adev 4457 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c &adev->gfx.priv_reg_irq); adev 4462 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 185, adev 4463 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c &adev->gfx.priv_inst_irq); adev 4467 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_scratch_init(adev); adev 4469 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = gfx_v7_0_init_microcode(adev); adev 4475 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = adev->gfx.rlc.funcs->init(adev); adev 4482 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = gfx_v7_0_mec_init(adev); adev 4488 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) { adev 4489 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ring = &adev->gfx.gfx_ring[i]; adev 4492 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = amdgpu_ring_init(adev, ring, 1024, adev 4493 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP); adev 4500 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.mec.num_mec; ++i) { adev 4501 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { adev 4502 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { adev 4503 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (!amdgpu_gfx_is_mec_queue_enabled(adev, i, k, j)) adev 4506 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = gfx_v7_0_compute_ring_init(adev, adev 4517 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.ce_ram_size = 0x8000; adev 4519 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_gpu_early_init(adev); adev 4526 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4529 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 4530 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_fini(&adev->gfx.gfx_ring[i]); adev 4531 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 4532 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_ring_fini(&adev->gfx.compute_ring[i]); adev 4534 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_cp_compute_fini(adev); adev 4535 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_gfx_rlc_fini(adev); adev 4536 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_mec_fini(adev); adev 4537 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, adev 4538 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c &adev->gfx.rlc.clear_state_gpu_addr, adev 4539 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (void **)&adev->gfx.rlc.cs_ptr); adev 4540 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->gfx.rlc.cp_table_size) { adev 4541 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, adev 4542 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c &adev->gfx.rlc.cp_table_gpu_addr, adev 4543 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (void **)&adev->gfx.rlc.cp_table_ptr); adev 4545 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_free_microcode(adev); adev 4553 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4555 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_constants_init(adev); adev 4558 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = adev->gfx.rlc.funcs->resume(adev); adev 4562 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c r = gfx_v7_0_cp_resume(adev); adev 4571 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4573 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0); adev 4574 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0); adev 4575 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_cp_enable(adev, false); adev 4576 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc.funcs->stop(adev); adev 4577 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_fini_pg(adev); adev 4584 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4586 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c return gfx_v7_0_hw_fini(adev); adev 4591 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4593 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c return gfx_v7_0_hw_init(adev); adev 4598 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4610 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4612 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 4627 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4657 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_fini_pg(adev); adev 4658 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_update_cg(adev, false); adev 4661 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.rlc.funcs->stop(adev); adev 4672 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dev_info(adev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); adev 4686 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 4702 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, adev 4723 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_set_compute_eop_interrupt_state(struct amdgpu_device *adev, adev 4774 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_set_priv_reg_fault_state(struct amdgpu_device *adev, adev 4799 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_set_priv_inst_fault_state(struct amdgpu_device *adev, adev 4824 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_set_eop_interrupt_state(struct amdgpu_device *adev, adev 4831 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_set_gfx_eop_interrupt_state(adev, state); adev 4834 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_set_compute_eop_interrupt_state(adev, 1, 0, state); adev 4837 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_set_compute_eop_interrupt_state(adev, 1, 1, state); adev 4840 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_set_compute_eop_interrupt_state(adev, 1, 2, state); adev 4843 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_set_compute_eop_interrupt_state(adev, 1, 3, state); adev 4846 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_set_compute_eop_interrupt_state(adev, 2, 0, state); adev 4849 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_set_compute_eop_interrupt_state(adev, 2, 1, state); adev 4852 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_set_compute_eop_interrupt_state(adev, 2, 2, state); adev 4855 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_set_compute_eop_interrupt_state(adev, 2, 3, state); adev 4863 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_eop_irq(struct amdgpu_device *adev, adev 4876 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c amdgpu_fence_process(&adev->gfx.gfx_ring[0]); adev 4880 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 4881 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ring = &adev->gfx.compute_ring[i]; adev 4890 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_fault(struct amdgpu_device *adev, adev 4901 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c drm_sched_fault(&adev->gfx.gfx_ring[0].sched); adev 4905 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 4906 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ring = &adev->gfx.compute_ring[i]; adev 4914 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_priv_reg_irq(struct amdgpu_device *adev, adev 4919 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_fault(adev, entry); adev 4923 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static int gfx_v7_0_priv_inst_irq(struct amdgpu_device *adev, adev 4929 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_fault(adev, entry); adev 4937 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4942 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gui_idle_interrupt(adev, false); adev 4945 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_mgcg(adev, true); adev 4946 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_cgcg(adev, true); adev 4948 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_cgcg(adev, false); adev 4949 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_mgcg(adev, false); adev 4951 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gui_idle_interrupt(adev, true); adev 4960 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4965 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_PG | adev 4971 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_update_gfx_pg(adev, gate); adev 4972 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) { adev 4973 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_cp_pg(adev, gate); adev 4974 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_enable_gds_pg(adev, gate); adev 5059 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_set_ring_funcs(struct amdgpu_device *adev) adev 5063 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 5064 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.gfx_ring[i].funcs = &gfx_v7_0_ring_funcs_gfx; adev 5065 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 5066 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.compute_ring[i].funcs = &gfx_v7_0_ring_funcs_compute; adev 5084 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_set_irq_funcs(struct amdgpu_device *adev) adev 5086 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.eop_irq.num_types = AMDGPU_CP_IRQ_LAST; adev 5087 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.eop_irq.funcs = &gfx_v7_0_eop_irq_funcs; adev 5089 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.priv_reg_irq.num_types = 1; adev 5090 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.priv_reg_irq.funcs = &gfx_v7_0_priv_reg_irq_funcs; adev 5092 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.priv_inst_irq.num_types = 1; adev 5093 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gfx.priv_inst_irq.funcs = &gfx_v7_0_priv_inst_irq_funcs; adev 5096 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_set_gds_init(struct amdgpu_device *adev) adev 5099 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gds.gds_size = RREG32(mmGDS_VMID0_SIZE); adev 5100 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gds.gws_size = 64; adev 5101 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gds.oa_size = 16; adev 5102 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev->gds.gds_compute_max_wave_id = RREG32(mmGDS_COMPUTE_MAX_WAVE_ID); adev 5106 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_get_cu_info(struct amdgpu_device *adev) adev 5110 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; adev 5114 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c if (adev->flags & AMD_IS_APU) adev 5117 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ao_cu_num = adev->gfx.config.max_cu_per_sh; adev 5123 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_lock(&adev->grbm_idx_mutex); adev 5124 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 5125 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 5129 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, i, j, 0xffffffff); adev 5132 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev, disable_masks[i * 2 + j]); adev 5133 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c bitmap = gfx_v7_0_get_cu_active_bitmap(adev); adev 5136 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) { adev 5150 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 5151 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 35 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.h int gfx_v7_0_mqd_commit(struct amdgpu_device *adev, struct cik_mqd *mqd); adev 723 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_set_ring_funcs(struct amdgpu_device *adev); adev 724 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_set_irq_funcs(struct amdgpu_device *adev); adev 725 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_set_gds_init(struct amdgpu_device *adev); adev 726 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_set_rlc_funcs(struct amdgpu_device *adev); adev 727 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static u32 gfx_v8_0_get_csb_size(struct amdgpu_device *adev); adev 728 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_get_cu_info(struct amdgpu_device *adev); adev 732 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev) adev 734 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c switch (adev->asic_type) { adev 736 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 739 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 742 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 747 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 750 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 753 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 759 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 762 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 765 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 770 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 773 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 779 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 782 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 787 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 790 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 794 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->pdev->revision == 0xc7 && adev 795 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ((adev->pdev->subsystem_device == 0xb37 && adev->pdev->subsystem_vendor == 0x1002) || adev 796 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->pdev->subsystem_device == 0x4a8 && adev->pdev->subsystem_vendor == 0x1043) || adev 797 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->pdev->subsystem_device == 0x9480 && adev->pdev->subsystem_vendor == 0x1682))) { adev 798 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_atombios_i2c_channel_trans(adev, 0x10, 0x96, 0x1E, 0xDD); adev 799 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_atombios_i2c_channel_trans(adev, 0x10, 0x96, 0x1F, 0xD0); adev 803 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 806 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 809 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 814 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 817 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 820 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_program_register_sequence(adev, adev 829 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_scratch_init(struct amdgpu_device *adev) adev 831 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.scratch.num_reg = 8; adev 832 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.scratch.reg_base = mmSCRATCH_REG0; adev 833 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; adev 838 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = ring->adev; adev 844 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_gfx_scratch_get(adev, &scratch); adev 858 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 865 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (i >= adev->usec_timeout) adev 869 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_gfx_scratch_free(adev, scratch); adev 875 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = ring->adev; adev 884 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_device_wb_get(adev, &index); adev 888 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gpu_addr = adev->wb.gpu_addr + (index * 4); adev 889 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD); adev 891 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_ib_get(adev, NULL, 16, &ib); adev 914 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c tmp = adev->wb.wb[index]; adev 921 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ib_free(adev, &ib, NULL); adev 924 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_device_wb_free(adev, index); adev 929 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_free_microcode(struct amdgpu_device *adev) adev 931 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c release_firmware(adev->gfx.pfp_fw); adev 932 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.pfp_fw = NULL; adev 933 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c release_firmware(adev->gfx.me_fw); adev 934 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.me_fw = NULL; adev 935 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c release_firmware(adev->gfx.ce_fw); adev 936 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.ce_fw = NULL; adev 937 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c release_firmware(adev->gfx.rlc_fw); adev 938 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc_fw = NULL; adev 939 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c release_firmware(adev->gfx.mec_fw); adev 940 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.mec_fw = NULL; adev 941 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((adev->asic_type != CHIP_STONEY) && adev 942 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->asic_type != CHIP_TOPAZ)) adev 943 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c release_firmware(adev->gfx.mec2_fw); adev 944 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.mec2_fw = NULL; adev 946 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c kfree(adev->gfx.rlc.register_list_format); adev 949 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) adev 962 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c switch (adev->asic_type) { adev 994 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { adev 996 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev); adev 999 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev); adev 1003 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev); adev 1007 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = amdgpu_ucode_validate(adev->gfx.pfp_fw); adev 1010 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; adev 1011 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 1012 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 1014 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { adev 1016 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); adev 1019 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); adev 1023 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); adev 1027 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = amdgpu_ucode_validate(adev->gfx.me_fw); adev 1030 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; adev 1031 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 1033 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 1035 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { adev 1037 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev); adev 1040 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev); adev 1044 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev); adev 1048 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = amdgpu_ucode_validate(adev->gfx.ce_fw); adev 1051 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; adev 1052 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 1053 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 1059 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->gfx.ce_feature_version >= 46 && adev 1060 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.pfp_feature_version >= 46) { adev 1061 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->virt.chained_ib_support = true; adev 1064 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->virt.chained_ib_support = false; adev 1067 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev); adev 1070 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = amdgpu_ucode_validate(adev->gfx.rlc_fw); adev 1071 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; adev 1072 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version); adev 1073 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version); adev 1075 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.save_and_restore_offset = adev 1077 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.clear_state_descriptor_offset = adev 1079 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.avail_scratch_ram_locations = adev 1081 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.reg_restore_list_size = adev 1083 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.reg_list_format_start = adev 1085 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.reg_list_format_separate_start = adev 1087 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.starting_offsets_start = adev 1089 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.reg_list_format_size_bytes = adev 1091 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.reg_list_size_bytes = adev 1094 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.register_list_format = adev 1095 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c kmalloc(adev->gfx.rlc.reg_list_format_size_bytes + adev 1096 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL); adev 1098 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (!adev->gfx.rlc.register_list_format) { adev 1105 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0 ; i < (adev->gfx.rlc.reg_list_format_size_bytes >> 2); i++) adev 1106 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.register_list_format[i] = le32_to_cpu(tmp[i]); adev 1108 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i; adev 1112 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0 ; i < (adev->gfx.rlc.reg_list_size_bytes >> 2); i++) adev 1113 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]); adev 1115 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { adev 1117 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev); adev 1120 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev); adev 1124 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev); adev 1128 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = amdgpu_ucode_validate(adev->gfx.mec_fw); adev 1131 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; adev 1132 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.mec_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 1133 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.mec_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 1135 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((adev->asic_type != CHIP_STONEY) && adev 1136 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->asic_type != CHIP_TOPAZ)) { adev 1137 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { adev 1139 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev); adev 1142 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev); adev 1146 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev); adev 1149 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c err = amdgpu_ucode_validate(adev->gfx.mec2_fw); adev 1153 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.mec2_fw->data; adev 1154 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.mec2_fw_version = adev 1156 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.mec2_feature_version = adev 1160 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.mec2_fw = NULL; adev 1164 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_PFP]; adev 1166 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c info->fw = adev->gfx.pfp_fw; adev 1168 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->firmware.fw_size += adev 1171 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_ME]; adev 1173 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c info->fw = adev->gfx.me_fw; adev 1175 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->firmware.fw_size += adev 1178 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_CE]; adev 1180 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c info->fw = adev->gfx.ce_fw; adev 1182 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->firmware.fw_size += adev 1185 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_G]; adev 1187 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c info->fw = adev->gfx.rlc_fw; adev 1189 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->firmware.fw_size += adev 1192 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC1]; adev 1194 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c info->fw = adev->gfx.mec_fw; adev 1196 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->firmware.fw_size += adev 1200 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; adev 1201 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->firmware.fw_size += adev 1204 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (amdgpu_sriov_vf(adev)) { adev 1205 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_STORAGE]; adev 1207 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c info->fw = adev->gfx.mec_fw; adev 1208 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->firmware.fw_size += adev 1212 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->gfx.mec2_fw) { adev 1213 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC2]; adev 1215 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c info->fw = adev->gfx.mec2_fw; adev 1217 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->firmware.fw_size += adev 1223 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dev_err(adev->dev, adev 1226 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c release_firmware(adev->gfx.pfp_fw); adev 1227 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.pfp_fw = NULL; adev 1228 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c release_firmware(adev->gfx.me_fw); adev 1229 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.me_fw = NULL; adev 1230 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c release_firmware(adev->gfx.ce_fw); adev 1231 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.ce_fw = NULL; adev 1232 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c release_firmware(adev->gfx.rlc_fw); adev 1233 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc_fw = NULL; adev 1234 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c release_firmware(adev->gfx.mec_fw); adev 1235 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.mec_fw = NULL; adev 1236 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c release_firmware(adev->gfx.mec2_fw); adev 1237 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.mec2_fw = NULL; adev 1242 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_get_csb_buffer(struct amdgpu_device *adev, adev 1249 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->gfx.rlc.cs_data == NULL) adev 1261 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { adev 1279 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c buffer[count++] = cpu_to_le32(adev->gfx.config.rb_config[0][0].raster_config); adev 1280 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c buffer[count++] = cpu_to_le32(adev->gfx.config.rb_config[0][0].raster_config_1); adev 1289 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_cp_jump_table_num(struct amdgpu_device *adev) adev 1291 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->asic_type == CHIP_CARRIZO) adev 1297 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_rlc_init(struct amdgpu_device *adev) adev 1302 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.cs_data = vi_cs_data; adev 1304 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cs_data = adev->gfx.rlc.cs_data; adev 1308 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_gfx_rlc_init_csb(adev); adev 1313 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((adev->asic_type == CHIP_CARRIZO) || adev 1314 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->asic_type == CHIP_STONEY)) { adev 1315 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.cp_table_size = ALIGN(96 * 5 * 4, 2048) + (64 * 1024); /* JT + GDS */ adev 1316 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_gfx_rlc_init_cpt(adev); adev 1324 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_csb_vram_pin(struct amdgpu_device *adev) adev 1328 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false); adev 1332 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj, adev 1335 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.clear_state_gpu_addr = adev 1336 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj); adev 1338 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); adev 1343 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_csb_vram_unpin(struct amdgpu_device *adev) adev 1347 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (!adev->gfx.rlc.clear_state_obj) adev 1350 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true); adev 1352 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj); adev 1353 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); adev 1357 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_mec_fini(struct amdgpu_device *adev) adev 1359 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); adev 1362 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_mec_init(struct amdgpu_device *adev) adev 1368 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); adev 1371 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_gfx_compute_queue_acquire(adev); adev 1373 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mec_hpd_size = adev->gfx.num_compute_rings * GFX8_MEC_HPD_SIZE; adev 1375 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE, adev 1377 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c &adev->gfx.mec.hpd_eop_obj, adev 1378 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c &adev->gfx.mec.hpd_eop_gpu_addr, adev 1381 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r); adev 1387 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj); adev 1388 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); adev 1547 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_do_edc_gpr_workarounds(struct amdgpu_device *adev) adev 1549 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[0]; adev 1558 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->asic_type != CHIP_CARRIZO) adev 1582 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_ib_get(adev, NULL, total_size, &ib); adev 1704 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ib_free(adev, &ib, NULL); adev 1710 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_gpu_early_init(struct amdgpu_device *adev) adev 1718 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c switch (adev->asic_type) { adev 1720 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_shader_engines = 1; adev 1721 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_tile_pipes = 2; adev 1722 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_cu_per_sh = 6; adev 1723 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_sh_per_se = 1; adev 1724 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_backends_per_se = 2; adev 1725 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_texture_channel_caches = 2; adev 1726 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gprs = 256; adev 1727 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gs_threads = 32; adev 1728 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_hw_contexts = 8; adev 1730 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1731 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1732 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1733 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 1737 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_shader_engines = 4; adev 1738 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_tile_pipes = 16; adev 1739 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_cu_per_sh = 16; adev 1740 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_sh_per_se = 1; adev 1741 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_backends_per_se = 4; adev 1742 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_texture_channel_caches = 16; adev 1743 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gprs = 256; adev 1744 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gs_threads = 32; adev 1745 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_hw_contexts = 8; adev 1747 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1748 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1749 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1750 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 1755 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ret = amdgpu_atombios_get_gfx_info(adev); adev 1758 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gprs = 256; adev 1759 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gs_threads = 32; adev 1760 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_hw_contexts = 8; adev 1762 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1763 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1764 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1765 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 1770 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ret = amdgpu_atombios_get_gfx_info(adev); adev 1773 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gprs = 256; adev 1774 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gs_threads = 32; adev 1775 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_hw_contexts = 8; adev 1777 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1778 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1779 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1780 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 1784 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_shader_engines = 4; adev 1785 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_tile_pipes = 8; adev 1786 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_cu_per_sh = 8; adev 1787 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_sh_per_se = 1; adev 1788 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_backends_per_se = 2; adev 1789 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_texture_channel_caches = 8; adev 1790 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gprs = 256; adev 1791 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gs_threads = 32; adev 1792 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_hw_contexts = 8; adev 1794 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1795 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1796 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1797 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 1801 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_shader_engines = 1; adev 1802 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_tile_pipes = 2; adev 1803 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_sh_per_se = 1; adev 1804 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_backends_per_se = 2; adev 1805 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_cu_per_sh = 8; adev 1806 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_texture_channel_caches = 2; adev 1807 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gprs = 256; adev 1808 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gs_threads = 32; adev 1809 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_hw_contexts = 8; adev 1811 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1812 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1813 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1814 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 1818 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_shader_engines = 1; adev 1819 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_tile_pipes = 2; adev 1820 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_sh_per_se = 1; adev 1821 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_backends_per_se = 1; adev 1822 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_cu_per_sh = 3; adev 1823 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_texture_channel_caches = 2; adev 1824 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gprs = 256; adev 1825 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gs_threads = 16; adev 1826 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_hw_contexts = 8; adev 1828 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1829 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1830 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1831 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 1835 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_shader_engines = 2; adev 1836 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_tile_pipes = 4; adev 1837 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_cu_per_sh = 2; adev 1838 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_sh_per_se = 1; adev 1839 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_backends_per_se = 2; adev 1840 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_texture_channel_caches = 4; adev 1841 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gprs = 256; adev 1842 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_gs_threads = 32; adev 1843 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_hw_contexts = 8; adev 1845 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1846 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1847 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1848 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x130; adev 1854 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.mc_arb_ramcfg = RREG32(mmMC_ARB_RAMCFG); adev 1855 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mc_arb_ramcfg = adev->gfx.config.mc_arb_ramcfg; adev 1857 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.num_tile_pipes = adev->gfx.config.max_tile_pipes; adev 1858 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.mem_max_burst_length_bytes = 256; adev 1859 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->flags & AMD_IS_APU) { adev 1882 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.mem_row_size_in_kb = 2; adev 1884 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.mem_row_size_in_kb = 1; adev 1887 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.mem_row_size_in_kb = (4 * (1 << (8 + tmp))) / 1024; adev 1888 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->gfx.config.mem_row_size_in_kb > 4) adev 1889 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.mem_row_size_in_kb = 4; adev 1892 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.shader_engine_tile_size = 32; adev 1893 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.num_gpus = 1; adev 1894 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.multi_gpu_tile_size = 64; adev 1897 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c switch (adev->gfx.config.mem_row_size_in_kb) { adev 1909 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.gb_addr_config = gb_addr_config; adev 1914 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, adev 1919 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[ring_id]; adev 1921 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ring = &adev->gfx.compute_ring[ring_id]; adev 1930 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ring->doorbell_index = adev->doorbell_index.mec_ring0 + ring_id; adev 1931 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr adev 1936 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) adev 1940 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_ring_init(adev, ring, 1024, adev 1941 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c &adev->gfx.eop_irq, irq_type); adev 1956 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1958 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c switch (adev->asic_type) { adev 1966 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.mec.num_mec = 2; adev 1971 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.mec.num_mec = 1; adev 1975 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.mec.num_pipe_per_mec = 4; adev 1976 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.mec.num_queue_per_pipe = 8; adev 1979 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_END_OF_PIPE, &adev->gfx.eop_irq); adev 1984 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_PRIV_REG_FAULT, adev 1985 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c &adev->gfx.priv_reg_irq); adev 1990 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_PRIV_INSTR_FAULT, adev 1991 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c &adev->gfx.priv_inst_irq); adev 1996 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_ECC_ERROR, adev 1997 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c &adev->gfx.cp_ecc_error_irq); adev 2002 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SQ_INTERRUPT_MSG, adev 2003 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c &adev->gfx.sq_irq); adev 2009 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c INIT_WORK(&adev->gfx.sq_work.work, gfx_v8_0_sq_irq_work_func); adev 2011 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.gfx_current_status = AMDGPU_GFX_NORMAL_MODE; adev 2013 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_scratch_init(adev); adev 2015 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = gfx_v8_0_init_microcode(adev); adev 2021 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = adev->gfx.rlc.funcs->init(adev); adev 2027 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = gfx_v8_0_mec_init(adev); adev 2034 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) { adev 2035 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ring = &adev->gfx.gfx_ring[i]; adev 2039 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->asic_type != CHIP_TOPAZ) { adev 2041 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ring->doorbell_index = adev->doorbell_index.gfx_ring0; adev 2044 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq, adev 2053 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.mec.num_mec; ++i) { adev 2054 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { adev 2055 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { adev 2056 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (!amdgpu_gfx_is_mec_queue_enabled(adev, i, k, j)) adev 2059 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = gfx_v8_0_compute_ring_init(adev, adev 2070 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_gfx_kiq_init(adev, GFX8_MEC_HPD_SIZE); adev 2076 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c kiq = &adev->gfx.kiq; adev 2077 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_gfx_kiq_init_ring(adev, &kiq->ring, &kiq->irq); adev 2082 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_gfx_mqd_sw_init(adev, sizeof(struct vi_mqd_allocation)); adev 2086 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.ce_ram_size = 0x8000; adev 2088 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = gfx_v8_0_gpu_early_init(adev); adev 2097 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2100 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 2101 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_fini(&adev->gfx.gfx_ring[i]); adev 2102 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 2103 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_fini(&adev->gfx.compute_ring[i]); adev 2105 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_gfx_mqd_sw_fini(adev); adev 2106 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq.ring, &adev->gfx.kiq.irq); adev 2107 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_gfx_kiq_fini(adev); adev 2109 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_mec_fini(adev); adev 2110 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_gfx_rlc_fini(adev); adev 2111 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, adev 2112 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c &adev->gfx.rlc.clear_state_gpu_addr, adev 2113 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (void **)&adev->gfx.rlc.cs_ptr); adev 2114 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((adev->asic_type == CHIP_CARRIZO) || adev 2115 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->asic_type == CHIP_STONEY)) { adev 2116 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, adev 2117 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c &adev->gfx.rlc.cp_table_gpu_addr, adev 2118 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (void **)&adev->gfx.rlc.cp_table_ptr); adev 2120 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_free_microcode(adev); adev 2125 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_tiling_mode_table_init(struct amdgpu_device *adev) adev 2128 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c const u32 num_tile_mode_states = ARRAY_SIZE(adev->gfx.config.tile_mode_array); adev 2129 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c const u32 num_secondary_tile_mode_states = ARRAY_SIZE(adev->gfx.config.macrotile_mode_array); adev 2132 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c modearray = adev->gfx.config.tile_mode_array; adev 2133 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mod2array = adev->gfx.config.macrotile_mode_array; adev 2141 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c switch (adev->asic_type) { adev 3269 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dev_warn(adev->dev, adev 3271 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->asic_type); adev 3448 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_select_se_sh(struct amdgpu_device *adev, adev 3471 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_select_me_pipe_q(struct amdgpu_device *adev, adev 3474 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, me, pipe, q, vm); adev 3477 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static u32 gfx_v8_0_get_rb_active_bitmap(struct amdgpu_device *adev) adev 3486 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / adev 3487 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_sh_per_se); adev 3493 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_raster_config(struct amdgpu_device *adev, u32 *rconf, u32 *rconf1) adev 3495 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c switch (adev->asic_type) { adev 3528 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c DRM_ERROR("unknown asic: 0x%x\n", adev->asic_type); adev 3534 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_write_harvested_raster_configs(struct amdgpu_device *adev, adev 3538 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c unsigned sh_per_se = max_t(unsigned, adev->gfx.config.max_sh_per_se, 1); adev 3539 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c unsigned num_se = max_t(unsigned, adev->gfx.config.max_shader_engines, 1); adev 3633 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, se, 0xffffffff, 0xffffffff); adev 3639 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 3642 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_setup_rb(struct amdgpu_device *adev) adev 3648 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / adev 3649 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_sh_per_se; adev 3652 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->grbm_idx_mutex); adev 3653 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 3654 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 3655 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, i, j, 0xffffffff); adev 3656 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c data = gfx_v8_0_get_rb_active_bitmap(adev); adev 3657 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * adev 3661 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 3663 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.backend_enable_mask = active_rbs; adev 3664 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.num_rbs = hweight32(active_rbs); adev 3666 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c num_rb_pipes = min_t(unsigned, adev->gfx.config.max_backends_per_se * adev 3667 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.max_shader_engines, 16); adev 3669 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_raster_config(adev, &raster_config, &raster_config_1); adev 3671 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (!adev->gfx.config.backend_enable_mask || adev 3672 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.num_rbs >= num_rb_pipes) { adev 3676 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_write_harvested_raster_configs(adev, raster_config, raster_config_1, adev 3677 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.backend_enable_mask, adev 3682 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 3683 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 3684 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, i, j, 0xffffffff); adev 3685 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.rb_config[i][j].rb_backend_disable = adev 3687 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.rb_config[i][j].user_rb_backend_disable = adev 3689 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.rb_config[i][j].raster_config = adev 3691 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.rb_config[i][j].raster_config_1 = adev 3695 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 3696 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 3710 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_init_compute_vmid(struct amdgpu_device *adev) adev 3731 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->srbm_mutex); adev 3733 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, 0, 0, 0, i); adev 3740 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, 0, 0, 0, 0); adev 3741 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->srbm_mutex); adev 3753 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_init_gds_vmid(struct amdgpu_device *adev) adev 3771 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_config_init(struct amdgpu_device *adev) adev 3773 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c switch (adev->asic_type) { adev 3775 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.double_offchip_lds_buf = 1; adev 3779 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.config.double_offchip_lds_buf = 0; adev 3784 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_constants_init(struct amdgpu_device *adev) adev 3790 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c WREG32(mmGB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 3791 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c WREG32(mmHDP_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 3792 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c WREG32(mmDMIF_ADDR_CALC, adev->gfx.config.gb_addr_config); adev 3794 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_tiling_mode_table_init(adev); adev 3795 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_setup_rb(adev); adev 3796 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_get_cu_info(adev); adev 3797 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_config_init(adev); adev 3809 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->srbm_mutex); adev 3810 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->vm_manager.id_mgr[0].num_ids; i++) { adev 3811 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, 0, 0, 0, i); adev 3826 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c tmp = adev->gmc.shared_aperture_start >> 48; adev 3833 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, 0, 0, 0, 0); adev 3834 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->srbm_mutex); adev 3836 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_init_compute_vmid(adev); adev 3837 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_init_gds_vmid(adev); adev 3839 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->grbm_idx_mutex); adev 3844 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 3847 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->gfx.config.sc_prim_fifo_size_frontend << adev 3849 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->gfx.config.sc_prim_fifo_size_backend << adev 3851 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->gfx.config.sc_hiz_tile_fifo_size << adev 3853 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->gfx.config.sc_earlyz_tile_fifo_size << adev 3863 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 3867 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_wait_for_rlc_serdes(struct amdgpu_device *adev) adev 3872 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->grbm_idx_mutex); adev 3873 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 3874 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 3875 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, i, j, 0xffffffff); adev 3876 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (k = 0; k < adev->usec_timeout; k++) { adev 3881 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (k == adev->usec_timeout) { adev 3882 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, 0xffffffff, adev 3884 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 3891 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 3892 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 3898 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (k = 0; k < adev->usec_timeout; k++) { adev 3905 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_enable_gui_idle_interrupt(struct amdgpu_device *adev, adev 3918 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_init_csb(struct amdgpu_device *adev) adev 3922 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.clear_state_gpu_addr >> 32); adev 3924 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); adev 3926 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.clear_state_size); adev 3979 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_init_save_restore_list(struct amdgpu_device *adev) adev 3989 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c kmemdup(adev->gfx.rlc.register_list_format, adev 3990 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.reg_list_format_size_bytes, GFP_KERNEL); adev 3996 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.reg_list_format_size_bytes >> 2, adev 4008 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.rlc.reg_list_size_bytes >> 2; i++) adev 4009 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c WREG32(mmRLC_SRM_ARAM_DATA, adev->gfx.rlc.register_restore[i]); adev 4012 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c WREG32(mmRLC_GPM_SCRATCH_ADDR, adev->gfx.rlc.reg_list_format_start); adev 4013 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.rlc.reg_list_format_size_bytes >> 2; i++) adev 4016 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c list_size = adev->gfx.rlc.reg_list_size_bytes >> 2; adev 4018 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c WREG32(mmRLC_GPM_SCRATCH_ADDR, adev->gfx.rlc.reg_restore_list_size); adev 4023 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.starting_offsets_start); adev 4042 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_enable_save_restore_machine(struct amdgpu_device *adev) adev 4047 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_init_power_gating(struct amdgpu_device *adev) adev 4064 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void cz_enable_sck_slow_down_on_power_up(struct amdgpu_device *adev, adev 4070 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void cz_enable_sck_slow_down_on_power_down(struct amdgpu_device *adev, adev 4076 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void cz_enable_cp_power_gating(struct amdgpu_device *adev, bool enable) adev 4081 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_init_pg(struct amdgpu_device *adev) adev 4083 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((adev->asic_type == CHIP_CARRIZO) || adev 4084 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->asic_type == CHIP_STONEY)) { adev 4085 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_init_csb(adev); adev 4086 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_init_save_restore_list(adev); adev 4087 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_save_restore_machine(adev); adev 4088 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c WREG32(mmRLC_JUMP_TABLE_RESTORE, adev->gfx.rlc.cp_table_gpu_addr >> 8); adev 4089 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_init_power_gating(adev); adev 4090 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask); adev 4091 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c } else if ((adev->asic_type == CHIP_POLARIS11) || adev 4092 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->asic_type == CHIP_POLARIS12) || adev 4093 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->asic_type == CHIP_VEGAM)) { adev 4094 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_init_csb(adev); adev 4095 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_init_save_restore_list(adev); adev 4096 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_save_restore_machine(adev); adev 4097 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_init_power_gating(adev); adev 4102 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_rlc_stop(struct amdgpu_device *adev) adev 4106 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gui_idle_interrupt(adev, false); adev 4107 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_wait_for_rlc_serdes(adev); adev 4110 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_rlc_reset(struct amdgpu_device *adev) adev 4119 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_rlc_start(struct amdgpu_device *adev) adev 4124 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (!(adev->flags & AMD_IS_APU)) adev 4125 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gui_idle_interrupt(adev, true); adev 4130 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_rlc_resume(struct amdgpu_device *adev) adev 4132 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (amdgpu_sriov_vf(adev)) { adev 4133 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_init_csb(adev); adev 4137 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.funcs->stop(adev); adev 4138 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.funcs->reset(adev); adev 4139 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_init_pg(adev); adev 4140 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.funcs->start(adev); adev 4145 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_cp_gfx_enable(struct amdgpu_device *adev, bool enable) adev 4158 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 4159 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.gfx_ring[i].sched.ready = false; adev 4165 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static u32 gfx_v8_0_get_csb_size(struct amdgpu_device *adev) adev 4194 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_cp_gfx_start(struct amdgpu_device *adev) adev 4196 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_ring *ring = &adev->gfx.gfx_ring[0]; adev 4202 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c WREG32(mmCP_MAX_CONTEXT, adev->gfx.config.max_hw_contexts - 1); adev 4206 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_cp_gfx_enable(adev, true); adev 4208 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_ring_alloc(ring, gfx_v8_0_get_csb_size(adev) + 4); adev 4238 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, adev->gfx.config.rb_config[0][0].raster_config); adev 4239 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, adev->gfx.config.rb_config[0][0].raster_config_1); adev 4257 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_set_cpg_door_bell(struct amdgpu_device *adev, struct amdgpu_ring *ring) adev 4261 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->asic_type == CHIP_TOPAZ) adev 4279 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->flags & AMD_IS_APU) adev 4284 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->doorbell_index.gfx_ring0); adev 4291 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_cp_gfx_resume(struct amdgpu_device *adev) adev 4305 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ring = &adev->gfx.gfx_ring[0]; adev 4322 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); adev 4326 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 4336 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_cpg_door_bell(adev, ring); adev 4339 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_cp_gfx_start(adev); adev 4345 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_cp_compute_enable(struct amdgpu_device *adev, bool enable) adev 4353 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 4354 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.compute_ring[i].sched.ready = false; adev 4355 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.kiq.ring.sched.ready = false; adev 4364 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = ring->adev; adev 4375 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_kiq_kcq_enable(struct amdgpu_device *adev) adev 4377 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; adev 4382 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (!test_bit(i, adev->gfx.mec.queue_bitmap)) adev 4396 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_ring_alloc(kiq_ring, (8 * adev->gfx.num_compute_rings) + 8); adev 4410 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 4411 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[i]; adev 4413 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c uint64_t wptr_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 4436 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_deactivate_hqd(struct amdgpu_device *adev, u32 req) adev 4442 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 4447 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (i == adev->usec_timeout) adev 4459 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = ring->adev; adev 4524 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c wb_gpu_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); adev 4530 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c wb_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 4600 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c int gfx_v8_0_mqd_commit(struct amdgpu_device *adev, adev 4621 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->asic_type != CHIP_TONGA) { adev 4639 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = ring->adev; adev 4645 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->in_gpu_reset) { /* for GPU_RESET case */ adev 4647 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->gfx.mec.mqd_backup[mqd_idx]) adev 4648 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct vi_mqd_allocation)); adev 4653 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->srbm_mutex); adev 4654 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 4655 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_mqd_commit(adev, mqd); adev 4656 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, 0, 0, 0, 0); adev 4657 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->srbm_mutex); adev 4662 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->srbm_mutex); adev 4663 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 4665 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_mqd_commit(adev, mqd); adev 4666 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, 0, 0, 0, 0); adev 4667 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->srbm_mutex); adev 4669 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->gfx.mec.mqd_backup[mqd_idx]) adev 4670 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(struct vi_mqd_allocation)); adev 4678 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = ring->adev; adev 4680 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c int mqd_idx = ring - &adev->gfx.compute_ring[0]; adev 4682 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (!adev->in_gpu_reset && !adev->in_suspend) { adev 4686 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->srbm_mutex); adev 4687 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 4689 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, 0, 0, 0, 0); adev 4690 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->srbm_mutex); adev 4692 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->gfx.mec.mqd_backup[mqd_idx]) adev 4693 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(struct vi_mqd_allocation)); adev 4694 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c } else if (adev->in_gpu_reset) { /* for GPU_RESET case */ adev 4696 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->gfx.mec.mqd_backup[mqd_idx]) adev 4697 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct vi_mqd_allocation)); adev 4707 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_set_mec_doorbell_range(struct amdgpu_device *adev) adev 4709 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->asic_type > CHIP_TONGA) { adev 4710 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, adev->doorbell_index.kiq << 2); adev 4711 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, adev->doorbell_index.mec_ring7 << 2); adev 4717 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_kiq_resume(struct amdgpu_device *adev) adev 4722 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ring = &adev->gfx.kiq.ring; adev 4740 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_kcq_resume(struct amdgpu_device *adev) adev 4745 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_cp_compute_enable(adev, true); adev 4747 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 4748 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ring = &adev->gfx.compute_ring[i]; adev 4764 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_mec_doorbell_range(adev); adev 4766 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = gfx_v8_0_kiq_kcq_enable(adev); adev 4774 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_cp_test_all_rings(struct amdgpu_device *adev) adev 4780 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ring = &adev->gfx.gfx_ring[0]; adev 4785 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ring = &adev->gfx.kiq.ring; adev 4790 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 4791 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ring = &adev->gfx.compute_ring[i]; adev 4798 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_cp_resume(struct amdgpu_device *adev) adev 4802 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (!(adev->flags & AMD_IS_APU)) adev 4803 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gui_idle_interrupt(adev, false); adev 4805 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = gfx_v8_0_kiq_resume(adev); adev 4809 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = gfx_v8_0_cp_gfx_resume(adev); adev 4813 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = gfx_v8_0_kcq_resume(adev); adev 4817 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = gfx_v8_0_cp_test_all_rings(adev); adev 4821 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gui_idle_interrupt(adev, true); adev 4826 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_cp_enable(struct amdgpu_device *adev, bool enable) adev 4828 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_cp_gfx_enable(adev, enable); adev 4829 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_cp_compute_enable(adev, enable); adev 4835 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4837 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_init_golden_registers(adev); adev 4838 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_constants_init(adev); adev 4840 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = gfx_v8_0_csb_vram_pin(adev); adev 4844 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = adev->gfx.rlc.funcs->resume(adev); adev 4848 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = gfx_v8_0_cp_resume(adev); adev 4853 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_kcq_disable(struct amdgpu_device *adev) adev 4856 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; adev 4858 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_ring_alloc(kiq_ring, 6 * adev->gfx.num_compute_rings); adev 4862 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 4863 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[i]; adev 4885 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4896 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4907 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4909 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 4921 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4923 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 4934 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4936 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0); adev 4937 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0); adev 4939 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_irq_put(adev, &adev->gfx.cp_ecc_error_irq, 0); adev 4941 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_irq_put(adev, &adev->gfx.sq_irq, 0); adev 4944 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_kcq_disable(adev); adev 4946 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (amdgpu_sriov_vf(adev)) { adev 4950 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 4951 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (!gfx_v8_0_wait_for_idle(adev)) adev 4952 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_cp_enable(adev, false); adev 4955 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (!gfx_v8_0_wait_for_rlc_idle(adev)) adev 4956 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.funcs->stop(adev); adev 4959 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 4961 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_csb_vram_unpin(adev); adev 4978 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 5028 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.grbm_soft_reset = grbm_soft_reset; adev 5029 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.srbm_soft_reset = srbm_soft_reset; adev 5032 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.grbm_soft_reset = 0; adev 5033 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.srbm_soft_reset = 0; adev 5040 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 5043 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((!adev->gfx.grbm_soft_reset) && adev 5044 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (!adev->gfx.srbm_soft_reset)) adev 5047 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c grbm_soft_reset = adev->gfx.grbm_soft_reset; adev 5050 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.funcs->stop(adev); adev 5055 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_cp_gfx_enable(adev, false); adev 5063 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 5064 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[i]; adev 5066 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->srbm_mutex); adev 5067 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 5068 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_deactivate_hqd(adev, 2); adev 5069 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, 0, 0, 0, 0); adev 5070 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->srbm_mutex); adev 5073 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_cp_compute_enable(adev, false); adev 5081 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 5085 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((!adev->gfx.grbm_soft_reset) && adev 5086 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (!adev->gfx.srbm_soft_reset)) adev 5089 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c grbm_soft_reset = adev->gfx.grbm_soft_reset; adev 5090 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c srbm_soft_reset = adev->gfx.srbm_soft_reset; adev 5103 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dev_info(adev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); adev 5117 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 5143 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 5146 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((!adev->gfx.grbm_soft_reset) && adev 5147 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (!adev->gfx.srbm_soft_reset)) adev 5150 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c grbm_soft_reset = adev->gfx.grbm_soft_reset; adev 5158 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 5159 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[i]; adev 5161 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->srbm_mutex); adev 5162 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 5163 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_deactivate_hqd(adev, 2); adev 5164 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, 0, 0, 0, 0); adev 5165 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->srbm_mutex); adev 5167 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_kiq_resume(adev); adev 5168 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_kcq_resume(adev); adev 5173 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_cp_gfx_resume(adev); adev 5175 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_cp_test_all_rings(adev); adev 5177 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.funcs->start(adev); adev 5190 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static uint64_t gfx_v8_0_get_gpu_clock_counter(struct amdgpu_device *adev) adev 5194 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->gfx.gpu_clock_mutex); adev 5198 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->gfx.gpu_clock_mutex); adev 5241 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address) adev 5251 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, adev 5266 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) adev 5270 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); adev 5271 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); adev 5272 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); adev 5273 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); adev 5274 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); adev 5275 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); adev 5276 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); adev 5277 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); adev 5278 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC); adev 5279 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC); adev 5280 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS); adev 5281 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS); adev 5282 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO); adev 5283 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI); adev 5284 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO); adev 5285 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI); adev 5286 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0); adev 5287 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); adev 5290 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd, adev 5295 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev, simd, wave, 0, adev 5310 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 5312 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.num_gfx_rings = GFX8_NUM_GFX_RINGS; adev 5313 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.num_compute_rings = AMDGPU_MAX_COMPUTE_RINGS; adev 5314 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.funcs = &gfx_v8_0_gfx_funcs; adev 5315 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_ring_funcs(adev); adev 5316 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_irq_funcs(adev); adev 5317 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_gds_init(adev); adev 5318 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_rlc_funcs(adev); adev 5325 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 5328 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); adev 5332 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_irq_get(adev, &adev->gfx.priv_inst_irq, 0); adev 5337 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = gfx_v8_0_do_edc_gpr_workarounds(adev); adev 5341 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_irq_get(adev, &adev->gfx.cp_ecc_error_irq, 0); adev 5347 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c r = amdgpu_irq_get(adev, &adev->gfx.sq_irq, 0); adev 5358 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev, adev 5361 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (((adev->asic_type == CHIP_POLARIS11) || adev 5362 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->asic_type == CHIP_POLARIS12) || adev 5363 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->asic_type == CHIP_VEGAM)) && adev 5364 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->powerplay.pp_funcs->set_powergating_by_smu) adev 5366 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, enable); adev 5371 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_enable_gfx_dynamic_mg_power_gating(struct amdgpu_device *adev, adev 5377 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void polaris11_enable_gfx_quick_mg_power_gating(struct amdgpu_device *adev, adev 5383 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void cz_enable_gfx_cg_power_gating(struct amdgpu_device *adev, adev 5389 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void cz_enable_gfx_pipeline_power_gating(struct amdgpu_device *adev, adev 5399 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void cz_update_gfx_cg_power_gating(struct amdgpu_device *adev, adev 5402 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) && enable) { adev 5403 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cz_enable_gfx_cg_power_gating(adev, true); adev 5404 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PIPELINE) adev 5405 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cz_enable_gfx_pipeline_power_gating(adev, true); adev 5407 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cz_enable_gfx_cg_power_gating(adev, false); adev 5408 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cz_enable_gfx_pipeline_power_gating(adev, false); adev 5415 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 5418 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (amdgpu_sriov_vf(adev)) adev 5421 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_SMG | adev 5425 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 5426 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c switch (adev->asic_type) { adev 5430 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->pg_flags & AMD_PG_SUPPORT_RLC_SMU_HS) { adev 5431 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cz_enable_sck_slow_down_on_power_up(adev, true); adev 5432 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cz_enable_sck_slow_down_on_power_down(adev, true); adev 5434 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cz_enable_sck_slow_down_on_power_up(adev, false); adev 5435 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cz_enable_sck_slow_down_on_power_down(adev, false); adev 5437 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->pg_flags & AMD_PG_SUPPORT_CP) adev 5438 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cz_enable_cp_power_gating(adev, true); adev 5440 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cz_enable_cp_power_gating(adev, false); adev 5442 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c cz_update_gfx_cg_power_gating(adev, enable); adev 5444 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((adev->pg_flags & AMD_PG_SUPPORT_GFX_SMG) && enable) adev 5445 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gfx_static_mg_power_gating(adev, true); adev 5447 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gfx_static_mg_power_gating(adev, false); adev 5449 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((adev->pg_flags & AMD_PG_SUPPORT_GFX_DMG) && enable) adev 5450 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gfx_dynamic_mg_power_gating(adev, true); adev 5452 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gfx_dynamic_mg_power_gating(adev, false); adev 5457 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((adev->pg_flags & AMD_PG_SUPPORT_GFX_SMG) && enable) adev 5458 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gfx_static_mg_power_gating(adev, true); adev 5460 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gfx_static_mg_power_gating(adev, false); adev 5462 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((adev->pg_flags & AMD_PG_SUPPORT_GFX_DMG) && enable) adev 5463 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gfx_dynamic_mg_power_gating(adev, true); adev 5465 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gfx_dynamic_mg_power_gating(adev, false); adev 5467 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((adev->pg_flags & AMD_PG_SUPPORT_GFX_QUICK_MG) && enable) adev 5468 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c polaris11_enable_gfx_quick_mg_power_gating(adev, true); adev 5470 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c polaris11_enable_gfx_quick_mg_power_gating(adev, false); adev 5475 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_SMG | adev 5479 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 5485 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 5488 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (amdgpu_sriov_vf(adev)) adev 5525 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_send_serdes_cmd(struct amdgpu_device *adev, adev 5530 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 5536 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->asic_type == CHIP_STONEY) adev 5573 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static bool gfx_v8_0_is_rlc_enabled(struct amdgpu_device *adev) adev 5584 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_set_safe_mode(struct amdgpu_device *adev) adev 5595 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 5604 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 5611 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_unset_safe_mode(struct amdgpu_device *adev) adev 5621 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 5642 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 5647 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 5650 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGCG)) { adev 5651 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGLS) { adev 5652 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_RLC_LS) adev 5656 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CP_LS) adev 5662 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->flags & AMD_IS_APU) adev 5676 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_wait_for_rlc_serdes(adev); adev 5679 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_send_serdes_cmd(adev, BPM_REG_MGCG_OVERRIDE, CLE_BPM_SERDES_CMD); adev 5681 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGTS) { adev 5688 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if ((adev->cg_flags & AMD_CG_SUPPORT_GFX_MGLS) && adev 5689 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGTS_LS)) adev 5699 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_wait_for_rlc_serdes(adev); adev 5732 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_wait_for_rlc_serdes(adev); adev 5735 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_send_serdes_cmd(adev, BPM_REG_MGCG_OVERRIDE, SET_BPM_SERDES_CMD); adev 5740 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_wait_for_rlc_serdes(adev); adev 5743 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 5746 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev, adev 5753 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 5755 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGCG)) { adev 5762 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_wait_for_rlc_serdes(adev); adev 5765 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_send_serdes_cmd(adev, BPM_REG_CGCG_OVERRIDE, CLE_BPM_SERDES_CMD); adev 5768 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_wait_for_rlc_serdes(adev); adev 5771 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_send_serdes_cmd(adev, BPM_REG_CGLS_EN, SET_BPM_SERDES_CMD); adev 5776 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGLS) { adev 5795 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gui_idle_interrupt(adev, true); adev 5798 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gui_idle_interrupt(adev, false); adev 5814 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_wait_for_rlc_serdes(adev); adev 5817 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_send_serdes_cmd(adev, BPM_REG_CGCG_OVERRIDE, SET_BPM_SERDES_CMD); adev 5820 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_wait_for_rlc_serdes(adev); adev 5823 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_send_serdes_cmd(adev, BPM_REG_CGLS_EN, CLE_BPM_SERDES_CMD); adev 5831 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_enable_gui_idle_interrupt(adev, true); adev 5834 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_wait_for_rlc_serdes(adev); adev 5836 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 5838 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_update_gfx_clock_gating(struct amdgpu_device *adev, adev 5845 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_update_medium_grain_clock_gating(adev, enable); adev 5846 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_update_coarse_grain_clock_gating(adev, enable); adev 5851 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_update_coarse_grain_clock_gating(adev, enable); adev 5852 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_update_medium_grain_clock_gating(adev, enable); adev 5857 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_tonga_update_gfx_clock_gating(struct amdgpu_device *adev, adev 5863 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & (AMD_CG_SUPPORT_GFX_CGCG | AMD_CG_SUPPORT_GFX_CGLS)) { adev 5864 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGLS) { adev 5868 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGCG) { adev 5879 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->powerplay.pp_funcs->set_clockgating_by_smu) adev 5880 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_dpm_set_clockgating_by_smu(adev, msg_id); adev 5883 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & (AMD_CG_SUPPORT_GFX_MGCG | AMD_CG_SUPPORT_GFX_MGLS)) { adev 5884 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGLS) { adev 5889 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGCG) { adev 5901 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->powerplay.pp_funcs->set_clockgating_by_smu) adev 5902 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_dpm_set_clockgating_by_smu(adev, msg_id); adev 5908 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_polaris_update_gfx_clock_gating(struct amdgpu_device *adev, adev 5915 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & (AMD_CG_SUPPORT_GFX_CGCG | AMD_CG_SUPPORT_GFX_CGLS)) { adev 5916 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGLS) { adev 5920 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGCG) { adev 5931 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->powerplay.pp_funcs->set_clockgating_by_smu) adev 5932 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_dpm_set_clockgating_by_smu(adev, msg_id); adev 5935 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & (AMD_CG_SUPPORT_GFX_3D_CGCG | AMD_CG_SUPPORT_GFX_3D_CGLS)) { adev 5936 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_3D_CGLS) { adev 5940 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_3D_CGCG) { adev 5951 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->powerplay.pp_funcs->set_clockgating_by_smu) adev 5952 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_dpm_set_clockgating_by_smu(adev, msg_id); adev 5955 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & (AMD_CG_SUPPORT_GFX_MGCG | AMD_CG_SUPPORT_GFX_MGLS)) { adev 5956 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGLS) { adev 5961 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGCG) { adev 5973 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->powerplay.pp_funcs->set_clockgating_by_smu) adev 5974 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_dpm_set_clockgating_by_smu(adev, msg_id); adev 5977 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_RLC_LS) { adev 5989 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->powerplay.pp_funcs->set_clockgating_by_smu) adev 5990 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_dpm_set_clockgating_by_smu(adev, msg_id); adev 5993 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CP_LS) { adev 6004 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->powerplay.pp_funcs->set_clockgating_by_smu) adev 6005 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_dpm_set_clockgating_by_smu(adev, msg_id); adev 6014 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 6016 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (amdgpu_sriov_vf(adev)) adev 6019 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c switch (adev->asic_type) { adev 6023 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_update_gfx_clock_gating(adev, adev 6027 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_tonga_update_gfx_clock_gating(adev, state); adev 6033 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_polaris_update_gfx_clock_gating(adev, state); adev 6043 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c return ring->adev->wb.wb[ring->rptr_offs]; adev 6048 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = ring->adev; adev 6052 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c return ring->adev->wb.wb[ring->wptr_offs]; adev 6059 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = ring->adev; adev 6063 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); adev 6130 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (amdgpu_sriov_vf(ring->adev) && (ib->flags & AMDGPU_IB_FLAG_PREEMPT)) { adev 6168 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); adev 6263 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c return ring->adev->wb.wb[ring->wptr_offs]; adev 6268 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = ring->adev; adev 6271 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); adev 6278 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = ring->adev; adev 6282 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c pipe_num = ring->me * adev->gfx.mec.num_pipe_per_mec + ring->pipe; adev 6294 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_pipe_reserve_resources(struct amdgpu_device *adev, adev 6302 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->gfx.pipe_reserve_mutex); adev 6303 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c pipe = amdgpu_gfx_mec_queue_to_bit(adev, ring->me, ring->pipe, 0); adev 6305 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c set_bit(pipe, adev->gfx.pipe_reserve_bitmap); adev 6307 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c clear_bit(pipe, adev->gfx.pipe_reserve_bitmap); adev 6309 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (!bitmap_weight(adev->gfx.pipe_reserve_bitmap, AMDGPU_MAX_COMPUTE_QUEUES)) { adev 6311 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_gfx_rings; ++i) adev 6312 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_ring_set_pipe_percent(&adev->gfx.gfx_ring[i], adev 6315 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_compute_rings; ++i) adev 6316 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_ring_set_pipe_percent(&adev->gfx.compute_ring[i], adev 6320 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_gfx_rings; ++i) { adev 6321 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c iring = &adev->gfx.gfx_ring[i]; adev 6322 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c pipe = amdgpu_gfx_mec_queue_to_bit(adev, adev 6326 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c reserve = test_bit(pipe, adev->gfx.pipe_reserve_bitmap); adev 6330 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_compute_rings; ++i) { adev 6331 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c iring = &adev->gfx.compute_ring[i]; adev 6332 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c pipe = amdgpu_gfx_mec_queue_to_bit(adev, adev 6336 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c reserve = test_bit(pipe, adev->gfx.pipe_reserve_bitmap); adev 6341 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->gfx.pipe_reserve_mutex); adev 6344 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_hqd_set_priority(struct amdgpu_device *adev, adev 6351 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->srbm_mutex); adev 6352 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 6357 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c vi_srbm_select(adev, 0, 0, 0, 0); adev 6358 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->srbm_mutex); adev 6363 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = ring->adev; adev 6369 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_hqd_set_priority(adev, ring, acquire); adev 6370 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_pipe_reserve_resources(adev, ring, acquire); adev 6429 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (amdgpu_sriov_vf(ring->adev)) adev 6487 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = ring->adev; adev 6495 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, lower_32_bits(adev->wb.gpu_addr + adev 6496 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->virt.reg_val_offs * 4)); adev 6497 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_ring_write(ring, upper_32_bits(adev->wb.gpu_addr + adev 6498 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->virt.reg_val_offs * 4)); adev 6527 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = ring->adev; adev 6537 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, adev 6544 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_set_compute_eop_interrupt_state(struct amdgpu_device *adev, adev 6595 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_set_priv_reg_fault_state(struct amdgpu_device *adev, adev 6606 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_set_priv_inst_fault_state(struct amdgpu_device *adev, adev 6617 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_set_eop_interrupt_state(struct amdgpu_device *adev, adev 6624 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_gfx_eop_interrupt_state(adev, state); adev 6627 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_compute_eop_interrupt_state(adev, 1, 0, state); adev 6630 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_compute_eop_interrupt_state(adev, 1, 1, state); adev 6633 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_compute_eop_interrupt_state(adev, 1, 2, state); adev 6636 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_compute_eop_interrupt_state(adev, 1, 3, state); adev 6639 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_compute_eop_interrupt_state(adev, 2, 0, state); adev 6642 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_compute_eop_interrupt_state(adev, 2, 1, state); adev 6645 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_compute_eop_interrupt_state(adev, 2, 2, state); adev 6648 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_set_compute_eop_interrupt_state(adev, 2, 3, state); adev 6656 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_set_cp_ecc_int_state(struct amdgpu_device *adev, adev 6701 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_set_sq_int_state(struct amdgpu_device *adev, adev 6727 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_eop_irq(struct amdgpu_device *adev, adev 6742 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c amdgpu_fence_process(&adev->gfx.gfx_ring[0]); adev 6746 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 6747 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ring = &adev->gfx.compute_ring[i]; adev 6759 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_fault(struct amdgpu_device *adev, adev 6772 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c drm_sched_fault(&adev->gfx.gfx_ring[0].sched); adev 6776 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 6777 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ring = &adev->gfx.compute_ring[i]; adev 6786 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_priv_reg_irq(struct amdgpu_device *adev, adev 6791 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_fault(adev, entry); adev 6795 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_priv_inst_irq(struct amdgpu_device *adev, adev 6800 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_fault(adev, entry); adev 6804 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_cp_ecc_error_irq(struct amdgpu_device *adev, adev 6812 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_parse_sq_irq(struct amdgpu_device *adev, unsigned ih_data) adev 6851 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->grbm_idx_mutex); adev 6852 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, se_id, sh_id, cu_id); adev 6856 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 6857 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 6885 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_device *adev = container_of(work, struct amdgpu_device, gfx.sq_work.work); adev 6888 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_parse_sq_irq(adev, sq_work->ih_data); adev 6891 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static int gfx_v8_0_sq_irq(struct amdgpu_device *adev, adev 6902 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (work_pending(&adev->gfx.sq_work.work)) { adev 6903 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_parse_sq_irq(adev, ih_data); adev 6905 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.sq_work.ih_data = ih_data; adev 6906 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c schedule_work(&adev->gfx.sq_work.work); adev 7032 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_set_ring_funcs(struct amdgpu_device *adev) adev 7036 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.kiq.ring.funcs = &gfx_v8_0_ring_funcs_kiq; adev 7038 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 7039 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.gfx_ring[i].funcs = &gfx_v8_0_ring_funcs_gfx; adev 7041 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 7042 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.compute_ring[i].funcs = &gfx_v8_0_ring_funcs_compute; adev 7070 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_set_irq_funcs(struct amdgpu_device *adev) adev 7072 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.eop_irq.num_types = AMDGPU_CP_IRQ_LAST; adev 7073 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.eop_irq.funcs = &gfx_v8_0_eop_irq_funcs; adev 7075 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.priv_reg_irq.num_types = 1; adev 7076 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.priv_reg_irq.funcs = &gfx_v8_0_priv_reg_irq_funcs; adev 7078 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.priv_inst_irq.num_types = 1; adev 7079 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.priv_inst_irq.funcs = &gfx_v8_0_priv_inst_irq_funcs; adev 7081 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.cp_ecc_error_irq.num_types = 1; adev 7082 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.cp_ecc_error_irq.funcs = &gfx_v8_0_cp_ecc_error_irq_funcs; adev 7084 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.sq_irq.num_types = 1; adev 7085 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.sq_irq.funcs = &gfx_v8_0_sq_irq_funcs; adev 7088 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_set_rlc_funcs(struct amdgpu_device *adev) adev 7090 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gfx.rlc.funcs = &iceland_rlc_funcs; adev 7093 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_set_gds_init(struct amdgpu_device *adev) adev 7096 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gds.gds_size = RREG32(mmGDS_VMID0_SIZE); adev 7097 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gds.gws_size = 64; adev 7098 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gds.oa_size = 16; adev 7099 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev->gds.gds_compute_max_wave_id = RREG32(mmGDS_COMPUTE_MAX_WAVE_ID); adev 7102 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_set_user_cu_inactive_bitmap(struct amdgpu_device *adev, adev 7116 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static u32 gfx_v8_0_get_cu_active_bitmap(struct amdgpu_device *adev) adev 7123 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_cu_per_sh); adev 7128 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_get_cu_info(struct amdgpu_device *adev) adev 7132 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; adev 7138 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (adev->flags & AMD_IS_APU) adev 7141 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ao_cu_num = adev->gfx.config.max_cu_per_sh; adev 7145 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_lock(&adev->grbm_idx_mutex); adev 7146 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 7147 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 7151 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, i, j, 0xffffffff); adev 7154 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev, disable_masks[i * 2 + j]); adev 7155 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c bitmap = gfx_v8_0_get_cu_active_bitmap(adev); adev 7158 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) { adev 7172 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 7173 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 7211 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (ring->adev->virt.chained_ib_support) { adev 7212 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ce_payload_addr = amdgpu_csa_vaddr(ring->adev) + adev 7216 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ce_payload_addr = amdgpu_csa_vaddr(ring->adev) + adev 7240 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c csa_addr = amdgpu_csa_vaddr(ring->adev); adev 7242 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c if (ring->adev->virt.chained_ib_support) { adev 33 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.h int gfx_v8_0_mqd_commit(struct amdgpu_device *adev, struct vi_mqd *mqd); adev 725 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_set_ring_funcs(struct amdgpu_device *adev); adev 726 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_set_irq_funcs(struct amdgpu_device *adev); adev 727 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_set_gds_init(struct amdgpu_device *adev); adev 728 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_set_rlc_funcs(struct amdgpu_device *adev); adev 729 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_get_cu_info(struct amdgpu_device *adev, adev 731 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev); adev 732 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance); adev 735 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_query_ras_error_count(struct amdgpu_device *adev, adev 737 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_ras_error_inject(struct amdgpu_device *adev, adev 740 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_init_golden_registers(struct amdgpu_device *adev) adev 742 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c switch (adev->asic_type) { adev 744 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_program_register_sequence(adev, adev 747 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_program_register_sequence(adev, adev 752 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_program_register_sequence(adev, adev 755 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_program_register_sequence(adev, adev 760 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_program_register_sequence(adev, adev 763 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_program_register_sequence(adev, adev 768 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_program_register_sequence(adev, adev 773 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_program_register_sequence(adev, golden_settings_gc_9_1, adev 775 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->rev_id >= 8) adev 776 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_program_register_sequence(adev, adev 780 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_program_register_sequence(adev, adev 785 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_program_register_sequence(adev, adev 793 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type != CHIP_ARCTURUS) adev 794 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_program_register_sequence(adev, golden_settings_gc_9_x_common, adev 798 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_scratch_init(struct amdgpu_device *adev) adev 800 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.scratch.num_reg = 8; adev 801 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.scratch.reg_base = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0); adev 802 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; adev 841 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 847 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_gfx_scratch_get(adev, &scratch); adev 861 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 868 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (i >= adev->usec_timeout) adev 872 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_scratch_free(adev, scratch); adev 878 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 887 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_device_wb_get(adev, &index); adev 891 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gpu_addr = adev->wb.gpu_addr + (index * 4); adev 892 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD); adev 894 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_ib_get(adev, NULL, 16, &ib); adev 917 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c tmp = adev->wb.wb[index]; adev 924 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ib_free(adev, &ib, NULL); adev 927 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_device_wb_free(adev, index); adev 932 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_free_microcode(struct amdgpu_device *adev) adev 934 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c release_firmware(adev->gfx.pfp_fw); adev 935 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.pfp_fw = NULL; adev 936 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c release_firmware(adev->gfx.me_fw); adev 937 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.me_fw = NULL; adev 938 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c release_firmware(adev->gfx.ce_fw); adev 939 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ce_fw = NULL; adev 940 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c release_firmware(adev->gfx.rlc_fw); adev 941 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc_fw = NULL; adev 942 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c release_firmware(adev->gfx.mec_fw); adev 943 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec_fw = NULL; adev 944 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c release_firmware(adev->gfx.mec2_fw); adev 945 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec2_fw = NULL; adev 947 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c kfree(adev->gfx.rlc.register_list_format); adev 950 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_init_rlc_ext_microcode(struct amdgpu_device *adev) adev 954 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c rlc_hdr = (const struct rlc_firmware_header_v2_1 *)adev->gfx.rlc_fw->data; adev 955 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc_srlc_fw_version = le32_to_cpu(rlc_hdr->save_restore_list_cntl_ucode_ver); adev 956 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc_srlc_feature_version = le32_to_cpu(rlc_hdr->save_restore_list_cntl_feature_ver); adev 957 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.save_restore_list_cntl_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_cntl_size_bytes); adev 958 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.save_restore_list_cntl = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_cntl_offset_bytes); adev 959 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc_srlg_fw_version = le32_to_cpu(rlc_hdr->save_restore_list_gpm_ucode_ver); adev 960 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc_srlg_feature_version = le32_to_cpu(rlc_hdr->save_restore_list_gpm_feature_ver); adev 961 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.save_restore_list_gpm_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_gpm_size_bytes); adev 962 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.save_restore_list_gpm = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_gpm_offset_bytes); adev 963 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc_srls_fw_version = le32_to_cpu(rlc_hdr->save_restore_list_srm_ucode_ver); adev 964 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc_srls_feature_version = le32_to_cpu(rlc_hdr->save_restore_list_srm_feature_ver); adev 965 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.save_restore_list_srm_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_srm_size_bytes); adev 966 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.save_restore_list_srm = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_srm_offset_bytes); adev 967 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.reg_list_format_direct_reg_list_length = adev 971 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_check_fw_write_wait(struct amdgpu_device *adev) adev 973 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.me_fw_write_wait = false; adev 974 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec_fw_write_wait = false; adev 976 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if ((adev->gfx.mec_fw_version < 0x000001a5) || adev 977 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.mec_feature_version < 46) || adev 978 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.pfp_fw_version < 0x000000b7) || adev 979 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.pfp_feature_version < 46)) adev 983 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c switch (adev->asic_type) { adev 985 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if ((adev->gfx.me_fw_version >= 0x0000009c) && adev 986 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.me_feature_version >= 42) && adev 987 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.pfp_fw_version >= 0x000000b1) && adev 988 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.pfp_feature_version >= 42)) adev 989 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.me_fw_write_wait = true; adev 991 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if ((adev->gfx.mec_fw_version >= 0x00000193) && adev 992 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.mec_feature_version >= 42)) adev 993 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec_fw_write_wait = true; adev 996 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if ((adev->gfx.me_fw_version >= 0x0000009c) && adev 997 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.me_feature_version >= 44) && adev 998 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.pfp_fw_version >= 0x000000b2) && adev 999 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.pfp_feature_version >= 44)) adev 1000 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.me_fw_write_wait = true; adev 1002 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if ((adev->gfx.mec_fw_version >= 0x00000196) && adev 1003 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.mec_feature_version >= 44)) adev 1004 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec_fw_write_wait = true; adev 1007 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if ((adev->gfx.me_fw_version >= 0x0000009c) && adev 1008 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.me_feature_version >= 44) && adev 1009 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.pfp_fw_version >= 0x000000b2) && adev 1010 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.pfp_feature_version >= 44)) adev 1011 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.me_fw_write_wait = true; adev 1013 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if ((adev->gfx.mec_fw_version >= 0x00000197) && adev 1014 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.mec_feature_version >= 44)) adev 1015 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec_fw_write_wait = true; adev 1018 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if ((adev->gfx.me_fw_version >= 0x0000009c) && adev 1019 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.me_feature_version >= 42) && adev 1020 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.pfp_fw_version >= 0x000000b1) && adev 1021 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.pfp_feature_version >= 42)) adev 1022 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.me_fw_write_wait = true; adev 1024 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if ((adev->gfx.mec_fw_version >= 0x00000192) && adev 1025 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.mec_feature_version >= 42)) adev 1026 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec_fw_write_wait = true; adev 1029 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.me_fw_write_wait = true; adev 1030 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec_fw_write_wait = true; adev 1035 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_check_if_need_gfxoff(struct amdgpu_device *adev) adev 1037 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c switch (adev->asic_type) { adev 1043 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!(adev->rev_id >= 0x8 || adev 1044 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->pdev->device == 0x15d8) && adev 1045 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->pm.fw_version < 0x41e2b || /* not raven1 fresh */ adev 1046 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c !adev->gfx.rlc.is_rlc_v2_1)) /* without rlc save restore ucodes */ adev 1047 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->pm.pp_feature &= ~PP_GFXOFF_MASK; adev 1049 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->pm.pp_feature & PP_GFXOFF_MASK) adev 1050 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG | adev 1055 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->pm.pp_feature & PP_GFXOFF_MASK) adev 1056 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG | adev 1065 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_init_cp_gfx_microcode(struct amdgpu_device *adev, adev 1075 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev); adev 1078 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c err = amdgpu_ucode_validate(adev->gfx.pfp_fw); adev 1081 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; adev 1082 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 1083 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 1086 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); adev 1089 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c err = amdgpu_ucode_validate(adev->gfx.me_fw); adev 1092 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; adev 1093 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 1094 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 1097 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev); adev 1100 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c err = amdgpu_ucode_validate(adev->gfx.ce_fw); adev 1103 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; adev 1104 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 1105 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 1107 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 1108 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_PFP]; adev 1110 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info->fw = adev->gfx.pfp_fw; adev 1112 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->firmware.fw_size += adev 1115 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_ME]; adev 1117 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info->fw = adev->gfx.me_fw; adev 1119 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->firmware.fw_size += adev 1122 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_CE]; adev 1124 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info->fw = adev->gfx.ce_fw; adev 1126 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->firmware.fw_size += adev 1132 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dev_err(adev->dev, adev 1135 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c release_firmware(adev->gfx.pfp_fw); adev 1136 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.pfp_fw = NULL; adev 1137 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c release_firmware(adev->gfx.me_fw); adev 1138 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.me_fw = NULL; adev 1139 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c release_firmware(adev->gfx.ce_fw); adev 1140 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ce_fw = NULL; adev 1145 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_init_rlc_microcode(struct amdgpu_device *adev, adev 1168 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (((adev->pdev->revision >= 0xC8) && (adev->pdev->revision <= 0xCF)) || adev 1169 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ((adev->pdev->revision >= 0xD8) && (adev->pdev->revision <= 0xDF)))) adev 1171 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c else if (!strcmp(chip_name, "raven") && (amdgpu_pm_load_smu_firmware(adev, &smu_version) == 0) && adev 1179 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev); adev 1182 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c err = amdgpu_ucode_validate(adev->gfx.rlc_fw); adev 1183 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; adev 1188 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.is_rlc_v2_1 = true; adev 1190 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version); adev 1191 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version); adev 1192 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.save_and_restore_offset = adev 1194 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.clear_state_descriptor_offset = adev 1196 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.avail_scratch_ram_locations = adev 1198 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.reg_restore_list_size = adev 1200 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.reg_list_format_start = adev 1202 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.reg_list_format_separate_start = adev 1204 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.starting_offsets_start = adev 1206 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.reg_list_format_size_bytes = adev 1208 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.reg_list_size_bytes = adev 1210 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.register_list_format = adev 1211 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c kmalloc(adev->gfx.rlc.reg_list_format_size_bytes + adev 1212 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL); adev 1213 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!adev->gfx.rlc.register_list_format) { adev 1220 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0 ; i < (adev->gfx.rlc.reg_list_format_size_bytes >> 2); i++) adev 1221 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.register_list_format[i] = le32_to_cpu(tmp[i]); adev 1223 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i; adev 1227 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0 ; i < (adev->gfx.rlc.reg_list_size_bytes >> 2); i++) adev 1228 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]); adev 1230 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->gfx.rlc.is_rlc_v2_1) adev 1231 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_init_rlc_ext_microcode(adev); adev 1233 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 1234 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_G]; adev 1236 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info->fw = adev->gfx.rlc_fw; adev 1238 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->firmware.fw_size += adev 1241 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->gfx.rlc.is_rlc_v2_1 && adev 1242 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.save_restore_list_cntl_size_bytes && adev 1243 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.save_restore_list_gpm_size_bytes && adev 1244 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.save_restore_list_srm_size_bytes) { adev 1245 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL]; adev 1247 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info->fw = adev->gfx.rlc_fw; adev 1248 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->firmware.fw_size += adev 1249 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ALIGN(adev->gfx.rlc.save_restore_list_cntl_size_bytes, PAGE_SIZE); adev 1251 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM]; adev 1253 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info->fw = adev->gfx.rlc_fw; adev 1254 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->firmware.fw_size += adev 1255 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ALIGN(adev->gfx.rlc.save_restore_list_gpm_size_bytes, PAGE_SIZE); adev 1257 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM]; adev 1259 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info->fw = adev->gfx.rlc_fw; adev 1260 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->firmware.fw_size += adev 1261 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ALIGN(adev->gfx.rlc.save_restore_list_srm_size_bytes, PAGE_SIZE); adev 1267 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dev_err(adev->dev, adev 1270 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c release_firmware(adev->gfx.rlc_fw); adev 1271 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc_fw = NULL; adev 1276 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev, adev 1286 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev); adev 1289 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c err = amdgpu_ucode_validate(adev->gfx.mec_fw); adev 1292 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; adev 1293 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); adev 1294 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); adev 1298 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev); adev 1300 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c err = amdgpu_ucode_validate(adev->gfx.mec2_fw); adev 1304 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec2_fw->data; adev 1305 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec2_fw_version = adev 1307 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec2_feature_version = adev 1311 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec2_fw = NULL; adev 1314 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 1315 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC1]; adev 1317 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info->fw = adev->gfx.mec_fw; adev 1320 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->firmware.fw_size += adev 1323 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC1_JT]; adev 1325 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info->fw = adev->gfx.mec_fw; adev 1326 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->firmware.fw_size += adev 1329 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->gfx.mec2_fw) { adev 1330 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC2]; adev 1332 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info->fw = adev->gfx.mec2_fw; adev 1335 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->firmware.fw_size += adev 1340 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type != CHIP_ARCTURUS) { adev 1341 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC2_JT]; adev 1343 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c info->fw = adev->gfx.mec2_fw; adev 1344 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->firmware.fw_size += adev 1352 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_check_if_need_gfxoff(adev); adev 1353 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_check_fw_write_wait(adev); adev 1355 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dev_err(adev->dev, adev 1358 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c release_firmware(adev->gfx.mec_fw); adev 1359 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec_fw = NULL; adev 1360 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c release_firmware(adev->gfx.mec2_fw); adev 1361 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec2_fw = NULL; adev 1366 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_init_microcode(struct amdgpu_device *adev) adev 1373 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c switch (adev->asic_type) { adev 1384 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->rev_id >= 8) adev 1386 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c else if (adev->pdev->device == 0x15d8) adev 1402 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type != CHIP_ARCTURUS) { adev 1403 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_init_cp_gfx_microcode(adev, chip_name); adev 1408 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_init_rlc_microcode(adev, chip_name); adev 1412 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_init_cp_compute_microcode(adev, chip_name); adev 1419 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static u32 gfx_v9_0_get_csb_size(struct amdgpu_device *adev) adev 1447 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_get_csb_buffer(struct amdgpu_device *adev, adev 1454 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->gfx.rlc.cs_data == NULL) adev 1466 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { adev 1488 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_init_always_on_cu_mask(struct amdgpu_device *adev) adev 1490 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; adev 1496 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->flags & AMD_IS_APU) adev 1498 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c else if (adev->asic_type == CHIP_VEGA12) adev 1503 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->grbm_idx_mutex); adev 1504 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 1505 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 1509 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_select_se_sh(adev, i, j, 0xffffffff); adev 1511 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) { adev 1528 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1529 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 1532 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_init_lbpw(struct amdgpu_device *adev) adev 1548 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->grbm_idx_mutex); adev 1550 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1576 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 1578 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_init_always_on_cu_mask(adev); adev 1581 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_4_init_lbpw(struct amdgpu_device *adev) adev 1597 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->grbm_idx_mutex); adev 1599 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1625 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 1627 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_init_always_on_cu_mask(adev); adev 1630 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_enable_lbpw(struct amdgpu_device *adev, bool enable) adev 1635 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_cp_jump_table_num(struct amdgpu_device *adev) adev 1640 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_rlc_init(struct amdgpu_device *adev) adev 1645 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.cs_data = gfx9_cs_data; adev 1647 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c cs_data = adev->gfx.rlc.cs_data; adev 1651 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_gfx_rlc_init_csb(adev); adev 1656 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type == CHIP_RAVEN || adev->asic_type == CHIP_RENOIR) { adev 1658 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.cp_table_size = ALIGN(96 * 5 * 4, 2048) + (64 * 1024); /* JT + GDS */ adev 1659 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_gfx_rlc_init_cpt(adev); adev 1664 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c switch (adev->asic_type) { adev 1666 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_init_lbpw(adev); adev 1669 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_4_init_lbpw(adev); adev 1678 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_csb_vram_pin(struct amdgpu_device *adev) adev 1682 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false); adev 1686 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj, adev 1689 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.clear_state_gpu_addr = adev 1690 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj); adev 1692 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); adev 1697 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_csb_vram_unpin(struct amdgpu_device *adev) adev 1701 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!adev->gfx.rlc.clear_state_obj) adev 1704 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true); adev 1706 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj); adev 1707 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); adev 1711 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_mec_fini(struct amdgpu_device *adev) adev 1713 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); adev 1714 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL); adev 1717 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_mec_init(struct amdgpu_device *adev) adev 1728 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); adev 1731 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_compute_queue_acquire(adev); adev 1732 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mec_hpd_size = adev->gfx.num_compute_rings * GFX9_MEC_HPD_SIZE; adev 1734 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE, adev 1736 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c &adev->gfx.mec.hpd_eop_obj, adev 1737 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c &adev->gfx.mec.hpd_eop_gpu_addr, adev 1740 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dev_warn(adev->dev, "(%d) create HDP EOP bo failed\n", r); adev 1741 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_mec_fini(adev); adev 1745 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c memset(hpd, 0, adev->gfx.mec.hpd_eop_obj->tbo.mem.size); adev 1747 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj); adev 1748 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); adev 1750 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; adev 1753 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.mec_fw->data + adev 1757 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, adev 1759 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c &adev->gfx.mec.mec_fw_obj, adev 1760 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c &adev->gfx.mec.mec_fw_gpu_addr, adev 1763 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dev_warn(adev->dev, "(%d) create mec firmware bo failed\n", r); adev 1764 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_mec_fini(adev); adev 1770 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_obj); adev 1771 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj); adev 1776 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address) adev 1786 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, adev 1801 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) adev 1805 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); adev 1806 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); adev 1807 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); adev 1808 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); adev 1809 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); adev 1810 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); adev 1811 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); adev 1812 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); adev 1813 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC); adev 1814 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC); adev 1815 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS); adev 1816 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS); adev 1817 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0); adev 1818 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); adev 1821 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd, adev 1826 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev, simd, wave, 0, adev 1830 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t simd, adev 1836 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev, simd, wave, thread, adev 1840 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_select_me_pipe_q(struct amdgpu_device *adev, adev 1843 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, me, pipe, q, vm); adev 1857 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_gpu_early_init(struct amdgpu_device *adev) adev 1862 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.funcs = &gfx_v9_0_gfx_funcs; adev 1864 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c switch (adev->asic_type) { adev 1866 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.max_hw_contexts = 8; adev 1867 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1868 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1869 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1870 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x4C0; adev 1874 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.max_hw_contexts = 8; adev 1875 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1876 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1877 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1878 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x4C0; adev 1883 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.max_hw_contexts = 8; adev 1884 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1885 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1886 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1887 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x4C0; adev 1892 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c err = amdgpu_atomfirmware_get_gfx_info(adev); adev 1897 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.max_hw_contexts = 8; adev 1898 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1899 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1900 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1901 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x4C0; adev 1902 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->rev_id >= 8) adev 1908 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.max_hw_contexts = 8; adev 1909 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1910 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1911 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; adev 1912 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x4C0; adev 1918 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.max_hw_contexts = 8; adev 1919 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev 1920 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_prim_fifo_size_backend = 0x100; adev 1921 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_hiz_tile_fifo_size = 0x80; adev 1922 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.sc_earlyz_tile_fifo_size = 0x4C0; adev 1932 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.gb_addr_config = gb_addr_config; adev 1934 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << adev 1936 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.gb_addr_config, adev 1940 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.max_tile_pipes = adev 1941 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.gb_addr_config_fields.num_pipes; adev 1943 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.gb_addr_config_fields.num_banks = 1 << adev 1945 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.gb_addr_config, adev 1948 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << adev 1950 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.gb_addr_config, adev 1953 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << adev 1955 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.gb_addr_config, adev 1958 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.gb_addr_config_fields.num_se = 1 << adev 1960 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.gb_addr_config, adev 1963 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + adev 1965 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.gb_addr_config, adev 1972 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_ngg_create_buf(struct amdgpu_device *adev, adev 1980 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dev_err(adev->dev, "Buffer size is invalid: %d\n", size_se); adev 1985 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ngg_buf->size = size_se * adev->gfx.config.max_shader_engines; adev 1986 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_bo_create_kernel(adev, ngg_buf->size, adev 1992 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dev_err(adev->dev, "(%d) failed to create NGG buffer\n", r); adev 2000 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_ngg_fini(struct amdgpu_device *adev) adev 2005 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_bo_free_kernel(&adev->gfx.ngg.buf[i].bo, adev 2006 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c &adev->gfx.ngg.buf[i].gpu_addr, adev 2009 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c memset(&adev->gfx.ngg.buf[0], 0, adev 2012 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ngg.init = false; adev 2017 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_ngg_init(struct amdgpu_device *adev) adev 2021 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!amdgpu_ngg || adev->gfx.ngg.init == true) adev 2025 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ngg.gds_reserve_size = ALIGN(5 * 4, 0x40); adev 2026 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gds.gds_size -= adev->gfx.ngg.gds_reserve_size; adev 2027 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ngg.gds_reserve_addr = RREG32_SOC15(GC, 0, mmGDS_VMID0_BASE); adev 2028 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ngg.gds_reserve_addr += RREG32_SOC15(GC, 0, mmGDS_VMID0_SIZE); adev 2031 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_ngg_create_buf(adev, &adev->gfx.ngg.buf[NGG_PRIM], adev 2035 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dev_err(adev->dev, "Failed to create Primitive Buffer\n"); adev 2040 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_ngg_create_buf(adev, &adev->gfx.ngg.buf[NGG_POS], adev 2044 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dev_err(adev->dev, "Failed to create Position Buffer\n"); adev 2049 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_ngg_create_buf(adev, &adev->gfx.ngg.buf[NGG_CNTL], adev 2053 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dev_err(adev->dev, "Failed to create Control Sideband Buffer\n"); adev 2061 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_ngg_create_buf(adev, &adev->gfx.ngg.buf[NGG_PARAM], adev 2065 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dev_err(adev->dev, "Failed to create Parameter Cache\n"); adev 2070 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ngg.init = true; adev 2073 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_ngg_fini(adev); adev 2077 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_ngg_en(struct amdgpu_device *adev) adev 2079 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_ring *ring = &adev->gfx.gfx_ring[0]; adev 2088 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ngg.buf[NGG_PRIM].size >> 8); adev 2090 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ngg.buf[NGG_POS].size >> 8); adev 2094 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ngg.buf[NGG_CNTL].size >> 8); adev 2096 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ngg.buf[NGG_PARAM].size >> 10); adev 2100 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c base = lower_32_bits(adev->gfx.ngg.buf[NGG_PRIM].gpu_addr); adev 2104 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c base = upper_32_bits(adev->gfx.ngg.buf[NGG_PRIM].gpu_addr); adev 2108 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c base = lower_32_bits(adev->gfx.ngg.buf[NGG_POS].gpu_addr); adev 2112 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c base = upper_32_bits(adev->gfx.ngg.buf[NGG_POS].gpu_addr); adev 2116 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c base = lower_32_bits(adev->gfx.ngg.buf[NGG_CNTL].gpu_addr); adev 2120 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c base = upper_32_bits(adev->gfx.ngg.buf[NGG_CNTL].gpu_addr); adev 2134 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gds.gds_size + adev 2135 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ngg.gds_reserve_size)); adev 2143 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, adev->gfx.ngg.gds_reserve_addr); adev 2146 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ngg.gds_reserve_size); adev 2156 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_compute_ring_init(struct amdgpu_device *adev, int ring_id, adev 2161 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[ring_id]; adev 2163 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ring = &adev->gfx.compute_ring[ring_id]; adev 2172 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ring->doorbell_index = (adev->doorbell_index.mec_ring0 + ring_id) << 1; adev 2173 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr adev 2178 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) adev 2182 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_ring_init(adev, ring, 1024, adev 2183 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c &adev->gfx.eop_irq, irq_type); adev 2196 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2198 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c switch (adev->asic_type) { adev 2205 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec.num_mec = 2; adev 2208 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec.num_mec = 1; adev 2212 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec.num_pipe_per_mec = 4; adev 2213 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec.num_queue_per_pipe = 8; adev 2216 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, GFX_9_0__SRCID__CP_EOP_INTERRUPT, &adev->gfx.eop_irq); adev 2221 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, GFX_9_0__SRCID__CP_PRIV_REG_FAULT, adev 2222 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c &adev->gfx.priv_reg_irq); adev 2227 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, GFX_9_0__SRCID__CP_PRIV_INSTR_FAULT, adev 2228 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c &adev->gfx.priv_inst_irq); adev 2233 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, GFX_9_0__SRCID__CP_ECC_ERROR, adev 2234 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c &adev->gfx.cp_ecc_error_irq); adev 2239 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, GFX_9_0__SRCID__CP_FUE_ERROR, adev 2240 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c &adev->gfx.cp_ecc_error_irq); adev 2244 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.gfx_current_status = AMDGPU_GFX_NORMAL_MODE; adev 2246 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_scratch_init(adev); adev 2248 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_init_microcode(adev); adev 2254 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = adev->gfx.rlc.funcs->init(adev); adev 2260 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_mec_init(adev); adev 2267 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) { adev 2268 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ring = &adev->gfx.gfx_ring[i]; adev 2275 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ring->doorbell_index = adev->doorbell_index.gfx_ring0 << 1; adev 2276 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_ring_init(adev, ring, 1024, adev 2277 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP); adev 2284 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.mec.num_mec; ++i) { adev 2285 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { adev 2286 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { adev 2287 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!amdgpu_gfx_is_mec_queue_enabled(adev, i, k, j)) adev 2290 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_compute_ring_init(adev, adev 2301 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_gfx_kiq_init(adev, GFX9_MEC_HPD_SIZE); adev 2307 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c kiq = &adev->gfx.kiq; adev 2308 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_gfx_kiq_init_ring(adev, &kiq->ring, &kiq->irq); adev 2313 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_gfx_mqd_sw_init(adev, sizeof(struct v9_mqd_allocation)); adev 2317 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ce_ram_size = 0x8000; adev 2319 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_gpu_early_init(adev); adev 2323 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_ngg_init(adev); adev 2334 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2336 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX) && adev 2337 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ras_if) { adev 2338 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct ras_common_if *ras_if = adev->gfx.ras_if; adev 2343 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ras_debugfs_remove(adev, ras_if); adev 2344 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ras_sysfs_remove(adev, ras_if); adev 2345 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ras_interrupt_remove_handler(adev, &ih_info); adev 2346 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ras_feature_enable(adev, ras_if, 0); adev 2350 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 2351 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_fini(&adev->gfx.gfx_ring[i]); adev 2352 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 2353 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_fini(&adev->gfx.compute_ring[i]); adev 2355 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_mqd_sw_fini(adev); adev 2356 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq.ring, &adev->gfx.kiq.irq); adev 2357 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_kiq_fini(adev); adev 2359 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_mec_fini(adev); adev 2360 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_ngg_fini(adev); adev 2361 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj); adev 2362 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type == CHIP_RAVEN || adev->asic_type == CHIP_RENOIR) { adev 2363 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, adev 2364 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c &adev->gfx.rlc.cp_table_gpu_addr, adev 2365 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (void **)&adev->gfx.rlc.cp_table_ptr); adev 2367 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_free_microcode(adev); adev 2373 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_tiling_mode_table_init(struct amdgpu_device *adev) adev 2378 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance) adev 2400 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static u32 gfx_v9_0_get_rb_active_bitmap(struct amdgpu_device *adev) adev 2410 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / adev 2411 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.max_sh_per_se); adev 2416 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_setup_rb(struct amdgpu_device *adev) adev 2421 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / adev 2422 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.max_sh_per_se; adev 2424 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->grbm_idx_mutex); adev 2425 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 2426 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 2427 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_select_se_sh(adev, i, j, 0xffffffff); adev 2428 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c data = gfx_v9_0_get_rb_active_bitmap(adev); adev 2429 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * adev 2433 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 2434 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 2436 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.backend_enable_mask = active_rbs; adev 2437 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.num_rbs = hweight32(active_rbs); adev 2443 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_init_compute_vmid(struct amdgpu_device *adev) adev 2461 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->srbm_mutex); adev 2463 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, 0, 0, 0, i); adev 2468 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, 0, 0, 0, 0); adev 2469 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->srbm_mutex); adev 2481 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_init_gds_vmid(struct amdgpu_device *adev) adev 2499 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_constants_init(struct amdgpu_device *adev) adev 2506 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_tiling_mode_table_init(adev); adev 2508 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_setup_rb(adev); adev 2509 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_get_cu_info(adev, &adev->gfx.cu_info); adev 2510 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.db_debug2 = RREG32_SOC15(GC, 0, mmDB_DEBUG2); adev 2514 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->srbm_mutex); adev 2515 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->vm_manager.id_mgr[AMDGPU_GFXHUB_0].num_ids; i++) { adev 2516 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, 0, 0, 0, i); adev 2532 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gmc.private_aperture_start >> 48)); adev 2534 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gmc.shared_aperture_start >> 48)); adev 2538 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, 0, 0, 0, 0); adev 2540 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->srbm_mutex); adev 2542 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_init_compute_vmid(adev); adev 2543 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_init_gds_vmid(adev); adev 2546 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_wait_for_rlc_serdes(struct amdgpu_device *adev) adev 2551 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->grbm_idx_mutex); adev 2552 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 2553 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 2554 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_select_se_sh(adev, i, j, 0xffffffff); adev 2555 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (k = 0; k < adev->usec_timeout; k++) { adev 2560 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (k == adev->usec_timeout) { adev 2561 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_select_se_sh(adev, 0xffffffff, adev 2563 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 2570 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 2571 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 2577 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (k = 0; k < adev->usec_timeout; k++) { adev 2584 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_enable_gui_idle_interrupt(struct amdgpu_device *adev, adev 2597 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_init_csb(struct amdgpu_device *adev) adev 2601 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.clear_state_gpu_addr >> 32); adev 2603 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); adev 2605 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.clear_state_size); adev 2645 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_1_init_rlc_save_restore_list(struct amdgpu_device *adev) adev 2658 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c kmemdup(adev->gfx.rlc.register_list_format, adev 2659 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.reg_list_format_size_bytes, GFP_KERNEL); adev 2666 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.reg_list_format_direct_reg_list_length, adev 2667 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.reg_list_format_size_bytes >> 2, adev 2682 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.rlc.reg_list_size_bytes >> 2; i++) adev 2684 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.register_restore[i]); adev 2688 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.reg_list_format_start); adev 2691 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.rlc.reg_list_format_direct_reg_list_length; i++) adev 2696 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c while (i < (adev->gfx.rlc.reg_list_format_size_bytes >> 2)) { adev 2718 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c list_size = adev->gfx.rlc.reg_list_size_bytes >> 2; adev 2721 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.reg_restore_list_size); adev 2726 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.starting_offsets_start); adev 2748 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_enable_save_restore_machine(struct amdgpu_device *adev) adev 2753 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void pwr_10_0_gfxip_control_over_cgpg(struct amdgpu_device *adev, adev 2779 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_init_gfx_power_gating(struct amdgpu_device *adev) adev 2783 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_PG | adev 2817 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c pwr_10_0_gfxip_control_over_cgpg(adev, true); adev 2821 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_enable_sck_slow_down_on_power_up(struct amdgpu_device *adev, adev 2835 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_enable_sck_slow_down_on_power_down(struct amdgpu_device *adev, adev 2849 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_enable_cp_power_gating(struct amdgpu_device *adev, adev 2863 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_enable_gfx_cg_power_gating(struct amdgpu_device *adev, adev 2876 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_enable_gfx_pipeline_powergating(struct amdgpu_device *adev, adev 2893 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev, adev 2906 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_enable_gfx_dynamic_mg_power_gating(struct amdgpu_device *adev, adev 2919 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_init_pg(struct amdgpu_device *adev) adev 2921 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_init_csb(adev); adev 2927 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->gfx.rlc.is_rlc_v2_1) { adev 2928 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type == CHIP_VEGA12 || adev 2929 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->asic_type == CHIP_RAVEN && adev 2930 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->rev_id >= 8)) adev 2931 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_1_init_rlc_save_restore_list(adev); adev 2932 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_save_restore_machine(adev); adev 2935 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_PG | adev 2942 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.cp_table_gpu_addr >> 8); adev 2943 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_init_gfx_power_gating(adev); adev 2947 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c void gfx_v9_0_rlc_stop(struct amdgpu_device *adev) adev 2950 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_gui_idle_interrupt(adev, false); adev 2951 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_wait_for_rlc_serdes(adev); adev 2954 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_rlc_reset(struct amdgpu_device *adev) adev 2962 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_rlc_start(struct amdgpu_device *adev) adev 2972 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!(adev->flags & AMD_IS_APU)) { adev 2973 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_gui_idle_interrupt(adev, true); adev 2982 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c rlc_ucode_ver, adev->gfx.rlc_fw_version); adev 2994 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_rlc_load_microcode(struct amdgpu_device *adev) adev 3000 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!adev->gfx.rlc_fw) adev 3003 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; adev 3006 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c fw_data = (const __le32 *)(adev->gfx.rlc_fw->data + adev 3014 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version); adev 3019 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_rlc_resume(struct amdgpu_device *adev) adev 3023 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (amdgpu_sriov_vf(adev)) { adev 3024 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_init_csb(adev); adev 3028 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.funcs->stop(adev); adev 3033 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_init_pg(adev); adev 3035 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) { adev 3037 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_rlc_load_microcode(adev); adev 3042 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c switch (adev->asic_type) { adev 3045 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_lbpw(adev, false); adev 3047 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_lbpw(adev, true); adev 3051 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_lbpw(adev, true); adev 3053 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_lbpw(adev, false); adev 3059 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.funcs->start(adev); adev 3064 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_cp_gfx_enable(struct amdgpu_device *adev, bool enable) adev 3073 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 3074 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.gfx_ring[i].sched.ready = false; adev 3080 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_cp_gfx_load_microcode(struct amdgpu_device *adev) adev 3088 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!adev->gfx.me_fw || !adev->gfx.pfp_fw || !adev->gfx.ce_fw) adev 3092 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.pfp_fw->data; adev 3094 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.ce_fw->data; adev 3096 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.me_fw->data; adev 3102 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_cp_gfx_enable(adev, false); adev 3106 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.pfp_fw->data + adev 3112 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_PFP_UCODE_ADDR, adev->gfx.pfp_fw_version); adev 3116 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.ce_fw->data + adev 3122 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_CE_UCODE_ADDR, adev->gfx.ce_fw_version); adev 3126 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.me_fw->data + adev 3132 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_ME_RAM_WADDR, adev->gfx.me_fw_version); adev 3137 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_cp_gfx_start(struct amdgpu_device *adev) adev 3139 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_ring *ring = &adev->gfx.gfx_ring[0]; adev 3145 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_MAX_CONTEXT, adev->gfx.config.max_hw_contexts - 1); adev 3148 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_cp_gfx_enable(adev, true); adev 3150 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_ring_alloc(ring, gfx_v9_0_get_csb_size(adev) + 4 + 3); adev 3199 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_cp_gfx_resume(struct amdgpu_device *adev) adev 3213 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ring = &adev->gfx.gfx_ring[0]; adev 3228 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); adev 3232 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 3263 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_cp_gfx_start(adev); adev 3269 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_cp_compute_enable(struct amdgpu_device *adev, bool enable) adev 3278 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 3279 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.compute_ring[i].sched.ready = false; adev 3280 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.kiq.ring.sched.ready = false; adev 3285 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_cp_compute_load_microcode(struct amdgpu_device *adev) adev 3292 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!adev->gfx.mec_fw) adev 3295 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_cp_compute_enable(adev, false); adev 3297 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; adev 3301 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->gfx.mec_fw->data + adev 3309 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec.mec_fw_gpu_addr & 0xFFFFF000); adev 3311 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c upper_32_bits(adev->gfx.mec.mec_fw_gpu_addr)); adev 3321 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.mec_fw_version); adev 3331 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 3342 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_kiq_kcq_enable(struct amdgpu_device *adev) adev 3344 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; adev 3349 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!test_bit(i, adev->gfx.mec.queue_bitmap)) adev 3363 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_ring_alloc(kiq_ring, (7 * adev->gfx.num_compute_rings) + 8); adev 3379 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 3380 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[i]; adev 3382 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c uint64_t wptr_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 3412 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 3503 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c wb_gpu_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); adev 3509 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c wb_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 3554 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 3577 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (j = 0; j < adev->usec_timeout; j++) { adev 3627 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->doorbell_index.kiq * 2) << 2); adev 3629 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (adev->doorbell_index.userqueue_end * 2) << 2); adev 3659 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 3667 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (j = 0; j < adev->usec_timeout; j++) { adev 3698 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 3704 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->in_gpu_reset) { /* for GPU_RESET case */ adev 3706 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->gfx.mec.mqd_backup[mqd_idx]) adev 3707 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct v9_mqd_allocation)); adev 3713 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->srbm_mutex); adev 3714 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 3716 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, 0, 0, 0, 0); adev 3717 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->srbm_mutex); adev 3722 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->srbm_mutex); adev 3723 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 3726 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, 0, 0, 0, 0); adev 3727 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->srbm_mutex); adev 3729 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->gfx.mec.mqd_backup[mqd_idx]) adev 3730 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(struct v9_mqd_allocation)); adev 3738 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 3740 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c int mqd_idx = ring - &adev->gfx.compute_ring[0]; adev 3742 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!adev->in_gpu_reset && !adev->in_suspend) { adev 3746 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->srbm_mutex); adev 3747 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 3749 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, 0, 0, 0, 0); adev 3750 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->srbm_mutex); adev 3752 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->gfx.mec.mqd_backup[mqd_idx]) adev 3753 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(struct v9_mqd_allocation)); adev 3754 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c } else if (adev->in_gpu_reset) { /* for GPU_RESET case */ adev 3756 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->gfx.mec.mqd_backup[mqd_idx]) adev 3757 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct v9_mqd_allocation)); adev 3761 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c atomic64_set((atomic64_t *)&adev->wb.wb[ring->wptr_offs], 0); adev 3770 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_kiq_resume(struct amdgpu_device *adev) adev 3775 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ring = &adev->gfx.kiq.ring; adev 3793 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_kcq_resume(struct amdgpu_device *adev) adev 3798 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_cp_compute_enable(adev, true); adev 3800 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 3801 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ring = &adev->gfx.compute_ring[i]; adev 3817 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_kiq_kcq_enable(adev); adev 3822 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_cp_resume(struct amdgpu_device *adev) adev 3827 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!(adev->flags & AMD_IS_APU)) adev 3828 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_gui_idle_interrupt(adev, false); adev 3830 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) { adev 3831 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type != CHIP_ARCTURUS) { adev 3833 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_cp_gfx_load_microcode(adev); adev 3838 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_cp_compute_load_microcode(adev); adev 3843 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_kiq_resume(adev); adev 3847 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type != CHIP_ARCTURUS) { adev 3848 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_cp_gfx_resume(adev); adev 3853 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_kcq_resume(adev); adev 3857 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type != CHIP_ARCTURUS) { adev 3858 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ring = &adev->gfx.gfx_ring[0]; adev 3864 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 3865 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ring = &adev->gfx.compute_ring[i]; adev 3869 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_gui_idle_interrupt(adev, true); adev 3874 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_cp_enable(struct amdgpu_device *adev, bool enable) adev 3876 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type != CHIP_ARCTURUS) adev 3877 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_cp_gfx_enable(adev, enable); adev 3878 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_cp_compute_enable(adev, enable); adev 3884 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3886 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!amdgpu_sriov_vf(adev)) adev 3887 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_init_golden_registers(adev); adev 3889 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_constants_init(adev); adev 3891 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_csb_vram_pin(adev); adev 3895 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = adev->gfx.rlc.funcs->resume(adev); adev 3899 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_cp_resume(adev); adev 3903 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type != CHIP_ARCTURUS) { adev 3904 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_ngg_en(adev); adev 3912 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_kcq_disable(struct amdgpu_device *adev) adev 3915 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; adev 3917 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_ring_alloc(kiq_ring, 6 * adev->gfx.num_compute_rings); adev 3921 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 3922 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[i]; adev 3944 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3946 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_irq_put(adev, &adev->gfx.cp_ecc_error_irq, 0); adev 3947 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0); adev 3948 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0); adev 3951 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_kcq_disable(adev); adev 3953 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (amdgpu_sriov_vf(adev)) { adev 3954 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_cp_gfx_enable(adev, false); adev 3967 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!adev->in_gpu_reset && !adev->in_suspend) { adev 3968 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->srbm_mutex); adev 3969 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, adev->gfx.kiq.ring.me, adev 3970 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.kiq.ring.pipe, adev 3971 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.kiq.ring.queue, 0); adev 3972 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_kiq_fini_register(&adev->gfx.kiq.ring); adev 3973 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, 0, 0, 0, 0); adev 3974 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->srbm_mutex); adev 3977 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_cp_enable(adev, false); adev 3978 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.funcs->stop(adev); adev 3980 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_csb_vram_unpin(adev); adev 3997 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4009 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4011 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 4023 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4053 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.funcs->stop(adev); adev 4055 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type != CHIP_ARCTURUS) adev 4057 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_cp_gfx_enable(adev, false); adev 4060 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_cp_compute_enable(adev, false); adev 4065 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dev_info(adev->dev, "GRBM_SOFT_RESET=0x%08X\n", tmp); adev 4082 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev) adev 4086 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_off_ctrl(adev, false); adev 4087 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->gfx.gpu_clock_mutex); adev 4091 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->gfx.gpu_clock_mutex); adev 4092 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_off_ctrl(adev, true); adev 4102 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 4220 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_do_edc_gds_workarounds(struct amdgpu_device *adev) adev 4222 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[0]; adev 4233 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmGDS_VMID0_SIZE, adev->gds.gds_size); adev 4245 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gds.gds_size); adev 4249 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 4255 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (i >= adev->usec_timeout) adev 4263 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_do_edc_gpr_workarounds(struct amdgpu_device *adev) adev 4265 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_ring *ring = &adev->gfx.compute_ring[0]; adev 4273 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX)) adev 4292 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_ib_get(adev, NULL, total_size, &ib); adev 4379 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->grbm_idx_mutex); adev 4383 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_select_se_sh(adev, j, 0x0, k); adev 4389 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 4392 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ib_free(adev, &ib, NULL); adev 4400 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4402 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type == CHIP_ARCTURUS) adev 4403 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.num_gfx_rings = 0; adev 4405 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.num_gfx_rings = GFX9_NUM_GFX_RINGS; adev 4406 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.num_compute_rings = AMDGPU_MAX_COMPUTE_RINGS; adev 4407 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_set_ring_funcs(adev); adev 4408 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_set_irq_funcs(adev); adev 4409 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_set_gds_init(adev); adev 4410 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_set_rlc_funcs(adev); adev 4415 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_process_ras_data_cb(struct amdgpu_device *adev, adev 4421 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4422 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct ras_common_if **ras_if = &adev->gfx.ras_if; adev 4438 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX)) { adev 4439 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ras_feature_enable_on_boot(adev, &ras_block, 0); adev 4443 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_do_edc_gds_workarounds(adev); adev 4448 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = gfx_v9_0_do_edc_gpr_workarounds(adev); adev 4458 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_ras_feature_enable_on_boot(adev, *ras_if, 1); adev 4462 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ras_request_reset_on_boot(adev, adev 4479 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_ras_feature_enable_on_boot(adev, *ras_if, 1); adev 4482 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ras_request_reset_on_boot(adev, adev 4492 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_ras_interrupt_add_handler(adev, &ih_info); adev 4496 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ras_debugfs_create(adev, &fs_info); adev 4498 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_ras_sysfs_create(adev, &fs_info); adev 4502 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_irq_get(adev, &adev->gfx.cp_ecc_error_irq, 0); adev 4508 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ras_sysfs_remove(adev, *ras_if); adev 4510 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ras_debugfs_remove(adev, *ras_if); adev 4511 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ras_interrupt_remove_handler(adev, &ih_info); adev 4513 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ras_feature_enable(adev, *ras_if, 0); adev 4522 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4525 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0); adev 4529 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c r = amdgpu_irq_get(adev, &adev->gfx.priv_inst_irq, 0); adev 4540 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static bool gfx_v9_0_is_rlc_enabled(struct amdgpu_device *adev) adev 4552 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_set_safe_mode(struct amdgpu_device *adev) adev 4562 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 4569 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_unset_safe_mode(struct amdgpu_device *adev) adev 4577 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_update_gfx_cg_power_gating(struct amdgpu_device *adev, adev 4580 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 4582 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (is_support_sw_smu(adev) && !enable) adev 4583 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c smu_set_gfx_cgpg(&adev->smu, enable); adev 4585 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if ((adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) && enable) { adev 4586 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_gfx_cg_power_gating(adev, true); adev 4587 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PIPELINE) adev 4588 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_gfx_pipeline_powergating(adev, true); adev 4590 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_gfx_cg_power_gating(adev, false); adev 4591 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_gfx_pipeline_powergating(adev, false); adev 4594 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 4597 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_update_gfx_mg_power_gating(struct amdgpu_device *adev, adev 4603 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if ((adev->pg_flags & AMD_PG_SUPPORT_GFX_SMG) && enable) adev 4604 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_gfx_static_mg_power_gating(adev, true); adev 4606 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_gfx_static_mg_power_gating(adev, false); adev 4608 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if ((adev->pg_flags & AMD_PG_SUPPORT_GFX_DMG) && enable) adev 4609 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_gfx_dynamic_mg_power_gating(adev, true); adev 4611 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_gfx_dynamic_mg_power_gating(adev, false); adev 4616 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 4621 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 4624 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGCG)) { adev 4628 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type != CHIP_VEGA12) adev 4642 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGLS) { adev 4644 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_RLC_LS) { adev 4651 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CP_LS) { adev 4662 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type != CHIP_VEGA12) adev 4688 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 4691 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev, adev 4696 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type == CHIP_ARCTURUS) adev 4699 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 4702 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_3D_CGCG)) { adev 4716 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_3D_CGLS) adev 4739 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 4742 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev, adev 4747 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 4749 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGCG)) { adev 4753 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGLS) adev 4764 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type == CHIP_ARCTURUS) adev 4770 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGLS) adev 4791 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 4794 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_update_gfx_clock_gating(struct amdgpu_device *adev, adev 4801 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_update_medium_grain_clock_gating(adev, enable); adev 4803 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_update_3d_clock_gating(adev, enable); adev 4805 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_update_coarse_grain_clock_gating(adev, enable); adev 4810 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_update_coarse_grain_clock_gating(adev, enable); adev 4812 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_update_3d_clock_gating(adev, enable); adev 4814 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_update_medium_grain_clock_gating(adev, enable); adev 4836 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4839 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c switch (adev->asic_type) { adev 4843 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_off_ctrl(adev, false); adev 4845 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->pg_flags & AMD_PG_SUPPORT_RLC_SMU_HS) { adev 4846 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_sck_slow_down_on_power_up(adev, true); adev 4847 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_sck_slow_down_on_power_down(adev, true); adev 4849 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_sck_slow_down_on_power_up(adev, false); adev 4850 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_sck_slow_down_on_power_down(adev, false); adev 4853 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->pg_flags & AMD_PG_SUPPORT_CP) adev 4854 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_cp_power_gating(adev, true); adev 4856 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_enable_cp_power_gating(adev, false); adev 4859 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (is_support_sw_smu(adev) && enable) adev 4860 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c smu_set_gfx_cgpg(&adev->smu, enable); adev 4861 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_update_gfx_cg_power_gating(adev, enable); adev 4864 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_update_gfx_mg_power_gating(adev, enable); adev 4867 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_off_ctrl(adev, true); adev 4870 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_gfx_off_ctrl(adev, enable); adev 4882 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4884 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (amdgpu_sriov_vf(adev)) adev 4887 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c switch (adev->asic_type) { adev 4894 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_update_gfx_clock_gating(adev, adev 4905 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 4908 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (amdgpu_sriov_vf(adev)) adev 4935 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type != CHIP_ARCTURUS) { adev 4949 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c return ring->adev->wb.wb[ring->rptr_offs]; /* gfx9 is 32bit rptr*/ adev 4954 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 4959 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c wptr = atomic64_read((atomic64_t *)&adev->wb.wb[ring->wptr_offs]); adev 4970 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 4974 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c atomic64_set((atomic64_t*)&adev->wb.wb[ring->wptr_offs], ring->wptr); adev 4984 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 4986 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio_funcs->hdp_flush_reg; adev 5006 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->nbio_funcs->get_hdp_flush_req_offset(adev), adev 5007 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->nbio_funcs->get_hdp_flush_done_offset(adev), adev 5026 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (amdgpu_sriov_vf(ring->adev) && (ib->flags & AMDGPU_IB_FLAG_PREEMPT)) { adev 5065 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); adev 5139 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c return ring->adev->wb.wb[ring->rptr_offs]; /* gfx9 hardware is 32bit rptr */ adev 5148 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c wptr = atomic64_read((atomic64_t *)&ring->adev->wb.wb[ring->wptr_offs]); adev 5157 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 5161 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c pipe_num = ring->me * adev->gfx.mec.num_pipe_per_mec + ring->pipe; adev 5173 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_pipe_reserve_resources(struct amdgpu_device *adev, adev 5181 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->gfx.pipe_reserve_mutex); adev 5182 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c pipe = amdgpu_gfx_mec_queue_to_bit(adev, ring->me, ring->pipe, 0); adev 5184 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c set_bit(pipe, adev->gfx.pipe_reserve_bitmap); adev 5186 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c clear_bit(pipe, adev->gfx.pipe_reserve_bitmap); adev 5188 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!bitmap_weight(adev->gfx.pipe_reserve_bitmap, AMDGPU_MAX_COMPUTE_QUEUES)) { adev 5190 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_gfx_rings; ++i) adev 5191 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_ring_set_pipe_percent(&adev->gfx.gfx_ring[i], adev 5194 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_compute_rings; ++i) adev 5195 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_ring_set_pipe_percent(&adev->gfx.compute_ring[i], adev 5199 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_gfx_rings; ++i) { adev 5200 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c iring = &adev->gfx.gfx_ring[i]; adev 5201 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c pipe = amdgpu_gfx_mec_queue_to_bit(adev, adev 5205 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c reserve = test_bit(pipe, adev->gfx.pipe_reserve_bitmap); adev 5209 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_compute_rings; ++i) { adev 5210 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c iring = &adev->gfx.compute_ring[i]; adev 5211 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c pipe = amdgpu_gfx_mec_queue_to_bit(adev, adev 5215 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c reserve = test_bit(pipe, adev->gfx.pipe_reserve_bitmap); adev 5220 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->gfx.pipe_reserve_mutex); adev 5223 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_hqd_set_priority(struct amdgpu_device *adev, adev 5230 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->srbm_mutex); adev 5231 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0); adev 5236 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c soc15_grbm_select(adev, 0, 0, 0, 0); adev 5237 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->srbm_mutex); adev 5243 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 5249 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_hqd_set_priority(adev, ring, acquire); adev 5250 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_pipe_reserve_resources(adev, ring, acquire); adev 5255 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 5259 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c atomic64_set((atomic64_t*)&adev->wb.wb[ring->wptr_offs], ring->wptr); adev 5269 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 5306 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c csa_addr = amdgpu_csa_vaddr(ring->adev); adev 5324 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c csa_addr = amdgpu_csa_vaddr(ring->adev); adev 5350 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (amdgpu_sriov_vf(ring->adev)) adev 5407 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 5415 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, lower_32_bits(adev->wb.gpu_addr + adev 5416 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->virt.reg_val_offs * 4)); adev 5417 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ring_write(ring, upper_32_bits(adev->wb.gpu_addr + adev 5418 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->virt.reg_val_offs * 4)); adev 5455 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 5457 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.me_fw_write_wait : adev->gfx.mec_fw_write_wait; adev 5469 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct amdgpu_device *adev = ring->adev; adev 5479 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, adev 5494 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_set_compute_eop_interrupt_state(struct amdgpu_device *adev, adev 5547 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_set_priv_reg_fault_state(struct amdgpu_device *adev, adev 5566 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_set_priv_inst_fault_state(struct amdgpu_device *adev, adev 5592 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_set_cp_ecc_error_state(struct amdgpu_device *adev, adev 5623 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_set_eop_interrupt_state(struct amdgpu_device *adev, adev 5630 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_set_gfx_eop_interrupt_state(adev, state); adev 5633 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_set_compute_eop_interrupt_state(adev, 1, 0, state); adev 5636 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_set_compute_eop_interrupt_state(adev, 1, 1, state); adev 5639 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_set_compute_eop_interrupt_state(adev, 1, 2, state); adev 5642 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_set_compute_eop_interrupt_state(adev, 1, 3, state); adev 5645 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_set_compute_eop_interrupt_state(adev, 2, 0, state); adev 5648 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_set_compute_eop_interrupt_state(adev, 2, 1, state); adev 5651 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_set_compute_eop_interrupt_state(adev, 2, 2, state); adev 5654 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_set_compute_eop_interrupt_state(adev, 2, 3, state); adev 5662 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_eop_irq(struct amdgpu_device *adev, adev 5677 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_fence_process(&adev->gfx.gfx_ring[0]); adev 5681 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 5682 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ring = &adev->gfx.compute_ring[i]; adev 5694 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_fault(struct amdgpu_device *adev, adev 5707 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c drm_sched_fault(&adev->gfx.gfx_ring[0].sched); adev 5711 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) { adev 5712 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ring = &adev->gfx.compute_ring[i]; adev 5721 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_priv_reg_irq(struct amdgpu_device *adev, adev 5726 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_fault(adev, entry); adev 5730 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_priv_inst_irq(struct amdgpu_device *adev, adev 5735 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_fault(adev, entry); adev 5739 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_process_ras_data_cb(struct amdgpu_device *adev, adev 5744 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c kgd2kfd_set_sram_ecc_flag(adev->kfd.dev); adev 5745 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->gfx.funcs->query_ras_error_count) adev 5746 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.funcs->query_ras_error_count(adev, err_data); adev 5747 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ras_reset_gpu(adev, 0); adev 6048 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_ras_error_inject(struct amdgpu_device *adev, adev 6055 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type != CHIP_VEGA20) adev 6087 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->grbm_idx_mutex); adev 6088 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ret = psp_ras_trigger_error(&adev->psp, &block_info); adev 6089 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 6094 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_query_ras_error_count(struct amdgpu_device *adev, adev 6103 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->asic_type != CHIP_VEGA20) adev 6109 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->grbm_idx_mutex); adev 6110 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (se_id = 0; se_id < adev->gfx.config.max_shader_engines; se_id++) { adev 6121 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_select_se_sh(adev, se_id, 0, adev 6125 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->reg_offset[gfx_ras_edc_regs[i].ip] adev 6153 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 6154 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 6159 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_cp_ecc_error_irq(struct amdgpu_device *adev, adev 6163 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c struct ras_common_if *ras_if = adev->gfx.ras_if; adev 6174 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c amdgpu_ras_interrupt_dispatch(adev, &ih_data); adev 6311 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_set_ring_funcs(struct amdgpu_device *adev) adev 6315 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.kiq.ring.funcs = &gfx_v9_0_ring_funcs_kiq; adev 6317 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_gfx_rings; i++) adev 6318 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.gfx_ring[i].funcs = &gfx_v9_0_ring_funcs_gfx; adev 6320 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.num_compute_rings; i++) adev 6321 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.compute_ring[i].funcs = &gfx_v9_0_ring_funcs_compute; adev 6345 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_set_irq_funcs(struct amdgpu_device *adev) adev 6347 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.eop_irq.num_types = AMDGPU_CP_IRQ_LAST; adev 6348 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.eop_irq.funcs = &gfx_v9_0_eop_irq_funcs; adev 6350 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.priv_reg_irq.num_types = 1; adev 6351 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.priv_reg_irq.funcs = &gfx_v9_0_priv_reg_irq_funcs; adev 6353 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.priv_inst_irq.num_types = 1; adev 6354 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.priv_inst_irq.funcs = &gfx_v9_0_priv_inst_irq_funcs; adev 6356 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.cp_ecc_error_irq.num_types = 2; /*C5 ECC error and C9 FUE error*/ adev 6357 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.cp_ecc_error_irq.funcs = &gfx_v9_0_cp_ecc_error_irq_funcs; adev 6360 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_set_rlc_funcs(struct amdgpu_device *adev) adev 6362 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c switch (adev->asic_type) { adev 6369 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.rlc.funcs = &gfx_v9_0_rlc_funcs; adev 6376 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_set_gds_init(struct amdgpu_device *adev) adev 6379 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c switch (adev->asic_type) { adev 6383 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gds.gds_size = 0x10000; adev 6387 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gds.gds_size = 0x1000; adev 6390 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gds.gds_size = 0x10000; adev 6394 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c switch (adev->asic_type) { adev 6397 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gds.gds_compute_max_wave_id = 0x7ff; adev 6400 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gds.gds_compute_max_wave_id = 0x27f; adev 6403 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->rev_id >= 0x8) adev 6404 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gds.gds_compute_max_wave_id = 0x77; /* raven2 */ adev 6406 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gds.gds_compute_max_wave_id = 0x15f; /* raven1 */ adev 6409 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gds.gds_compute_max_wave_id = 0xfff; adev 6413 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gds.gds_compute_max_wave_id = 0x7ff; adev 6417 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gds.gws_size = 64; adev 6418 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gds.oa_size = 16; adev 6421 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_set_user_cu_inactive_bitmap(struct amdgpu_device *adev, adev 6435 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static u32 gfx_v9_0_get_cu_active_bitmap(struct amdgpu_device *adev) adev 6445 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_cu_per_sh); adev 6450 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static int gfx_v9_0_get_cu_info(struct amdgpu_device *adev, adev 6457 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (!adev || !cu_info) adev 6463 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (adev->gfx.config.max_shader_engines * adev 6464 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.max_sh_per_se > 16) adev 6468 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.max_shader_engines, adev 6469 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev->gfx.config.max_sh_per_se); adev 6471 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_lock(&adev->grbm_idx_mutex); adev 6472 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { adev 6473 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { adev 6477 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_select_se_sh(adev, i, j, 0xffffffff); adev 6479 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev, disable_masks[i * adev->gfx.config.max_sh_per_se + j]); adev 6480 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c bitmap = gfx_v9_0_get_cu_active_bitmap(adev); adev 6496 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) { adev 6498 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c if (counter < adev->gfx.config.max_cu_per_sh) adev 6510 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 6511 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 29 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.h void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num); adev 31 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.h uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev); adev 32 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.h int gfx_v9_0_get_cu_info(struct amdgpu_device *adev, struct amdgpu_cu_info *cu_info); adev 33 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c u64 gfxhub_v1_0_get_mc_fb_offset(struct amdgpu_device *adev) adev 38 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c void gfxhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid, adev 52 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c static void gfxhub_v1_0_init_gart_aperture_regs(struct amdgpu_device *adev) adev 54 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); adev 56 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c gfxhub_v1_0_setup_vm_pt_regs(adev, 0, pt_base); adev 59 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c (u32)(adev->gmc.gart_start >> 12)); adev 61 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c (u32)(adev->gmc.gart_start >> 44)); adev 64 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c (u32)(adev->gmc.gart_end >> 12)); adev 66 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c (u32)(adev->gmc.gart_end >> 44)); adev 69 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c static void gfxhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev) adev 75 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); adev 76 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); adev 80 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18); adev 82 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c if (adev->asic_type == CHIP_RAVEN && adev->rev_id >= 0x8) adev 90 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c max((adev->gmc.fb_end >> 18) + 0x1, adev 91 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c adev->gmc.agp_end >> 18)); adev 94 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18); adev 97 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start adev 98 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c + adev->vm_manager.vram_base_offset; adev 106 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c (u32)(adev->dummy_page_addr >> 12)); adev 108 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c (u32)((u64)adev->dummy_page_addr >> 44)); adev 114 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c static void gfxhub_v1_0_init_tlb_regs(struct amdgpu_device *adev) adev 135 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c static void gfxhub_v1_0_init_cache_regs(struct amdgpu_device *adev) adev 157 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c if (adev->gmc.translate_further) { adev 174 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c static void gfxhub_v1_0_enable_system_domain(struct amdgpu_device *adev) adev 184 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c static void gfxhub_v1_0_disable_identity_aperture(struct amdgpu_device *adev) adev 201 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c static void gfxhub_v1_0_setup_vmid_config(struct amdgpu_device *adev) adev 207 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c num_level = adev->vm_manager.num_level; adev 208 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c block_size = adev->vm_manager.block_size; adev 209 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c if (adev->gmc.translate_further) adev 245 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c lower_32_bits(adev->vm_manager.max_pfn - 1)); adev 247 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c upper_32_bits(adev->vm_manager.max_pfn - 1)); adev 251 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c static void gfxhub_v1_0_program_invalidation(struct amdgpu_device *adev) adev 263 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c int gfxhub_v1_0_gart_enable(struct amdgpu_device *adev) adev 265 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c if (amdgpu_sriov_vf(adev)) { adev 272 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c adev->gmc.vram_start >> 24); adev 274 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c adev->gmc.vram_end >> 24); adev 278 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c gfxhub_v1_0_init_gart_aperture_regs(adev); adev 279 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c gfxhub_v1_0_init_system_aperture_regs(adev); adev 280 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c gfxhub_v1_0_init_tlb_regs(adev); adev 281 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c gfxhub_v1_0_init_cache_regs(adev); adev 283 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c gfxhub_v1_0_enable_system_domain(adev); adev 284 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c gfxhub_v1_0_disable_identity_aperture(adev); adev 285 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c gfxhub_v1_0_setup_vmid_config(adev); adev 286 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c gfxhub_v1_0_program_invalidation(adev); adev 291 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c void gfxhub_v1_0_gart_disable(struct amdgpu_device *adev) adev 320 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c void gfxhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev, adev 358 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c void gfxhub_v1_0_init(struct amdgpu_device *adev) adev 360 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c struct amdgpu_vmhub *hub = &adev->vmhub[AMDGPU_GFXHUB_0]; adev 27 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.h int gfxhub_v1_0_gart_enable(struct amdgpu_device *adev); adev 28 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.h void gfxhub_v1_0_gart_disable(struct amdgpu_device *adev); adev 29 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.h void gfxhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev, adev 31 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.h void gfxhub_v1_0_init(struct amdgpu_device *adev); adev 32 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.h u64 gfxhub_v1_0_get_mc_fb_offset(struct amdgpu_device *adev); adev 33 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.h void gfxhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid, adev 31 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c int gfxhub_v1_1_get_xgmi_info(struct amdgpu_device *adev) adev 39 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c adev->gmc.xgmi.num_physical_nodes = max_region + 1; adev 40 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c if (adev->gmc.xgmi.num_physical_nodes > 4) adev 43 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c adev->gmc.xgmi.physical_node_id = adev 45 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c if (adev->gmc.xgmi.physical_node_id > 3) adev 47 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c adev->gmc.xgmi.node_segment_size = REG_GET_FIELD( adev 27 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.h int gfxhub_v1_1_get_xgmi_info(struct amdgpu_device *adev); adev 34 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c u64 gfxhub_v2_0_get_fb_location(struct amdgpu_device *adev) adev 44 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c u64 gfxhub_v2_0_get_mc_fb_offset(struct amdgpu_device *adev) adev 49 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c static void gfxhub_v2_0_init_gart_pt_regs(struct amdgpu_device *adev) adev 51 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c uint64_t value = amdgpu_gmc_pd_addr(adev->gart.bo); adev 61 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c static void gfxhub_v2_0_init_gart_aperture_regs(struct amdgpu_device *adev) adev 63 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c gfxhub_v2_0_init_gart_pt_regs(adev); adev 66 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c (u32)(adev->gmc.gart_start >> 12)); adev 68 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c (u32)(adev->gmc.gart_start >> 44)); adev 71 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c (u32)(adev->gmc.gart_end >> 12)); adev 73 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c (u32)(adev->gmc.gart_end >> 44)); adev 76 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c static void gfxhub_v2_0_init_system_aperture_regs(struct amdgpu_device *adev) adev 87 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c adev->gmc.vram_start >> 18); adev 89 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c adev->gmc.vram_end >> 18); adev 92 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start adev 93 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c + adev->vm_manager.vram_base_offset; adev 101 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c (u32)(adev->dummy_page_addr >> 12)); adev 103 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c (u32)((u64)adev->dummy_page_addr >> 44)); adev 110 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c static void gfxhub_v2_0_init_tlb_regs(struct amdgpu_device *adev) adev 130 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c static void gfxhub_v2_0_init_cache_regs(struct amdgpu_device *adev) adev 154 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c if (adev->gmc.translate_further) { adev 171 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c static void gfxhub_v2_0_enable_system_domain(struct amdgpu_device *adev) adev 181 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c static void gfxhub_v2_0_disable_identity_aperture(struct amdgpu_device *adev) adev 198 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c static void gfxhub_v2_0_setup_vmid_config(struct amdgpu_device *adev) adev 207 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c adev->vm_manager.num_level); adev 224 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c adev->vm_manager.block_size - 9); adev 233 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c lower_32_bits(adev->vm_manager.max_pfn - 1)); adev 235 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c upper_32_bits(adev->vm_manager.max_pfn - 1)); adev 239 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c static void gfxhub_v2_0_program_invalidation(struct amdgpu_device *adev) adev 251 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c int gfxhub_v2_0_gart_enable(struct amdgpu_device *adev) adev 253 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c if (amdgpu_sriov_vf(adev)) { adev 260 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c adev->gmc.vram_start >> 24); adev 262 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c adev->gmc.vram_end >> 24); adev 266 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c gfxhub_v2_0_init_gart_aperture_regs(adev); adev 267 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c gfxhub_v2_0_init_system_aperture_regs(adev); adev 268 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c gfxhub_v2_0_init_tlb_regs(adev); adev 269 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c gfxhub_v2_0_init_cache_regs(adev); adev 271 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c gfxhub_v2_0_enable_system_domain(adev); adev 272 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c gfxhub_v2_0_disable_identity_aperture(adev); adev 273 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c gfxhub_v2_0_setup_vmid_config(adev); adev 274 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c gfxhub_v2_0_program_invalidation(adev); adev 279 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c void gfxhub_v2_0_gart_disable(struct amdgpu_device *adev) adev 306 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c void gfxhub_v2_0_set_fault_enable_default(struct amdgpu_device *adev, adev 343 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c void gfxhub_v2_0_init(struct amdgpu_device *adev) adev 345 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c struct amdgpu_vmhub *hub = &adev->vmhub[AMDGPU_GFXHUB_0]; adev 27 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.h u64 gfxhub_v2_0_get_fb_location(struct amdgpu_device *adev); adev 28 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.h int gfxhub_v2_0_gart_enable(struct amdgpu_device *adev); adev 29 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.h void gfxhub_v2_0_gart_disable(struct amdgpu_device *adev); adev 30 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.h void gfxhub_v2_0_set_fault_enable_default(struct amdgpu_device *adev, adev 32 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.h void gfxhub_v2_0_init(struct amdgpu_device *adev); adev 33 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.h u64 gfxhub_v2_0_get_mc_fb_offset(struct amdgpu_device *adev); adev 58 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_vm_fault_interrupt_state(struct amdgpu_device *adev, adev 84 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c hub = &adev->vmhub[AMDGPU_MMHUB_0]; adev 93 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c hub = &adev->vmhub[AMDGPU_GFXHUB_0]; adev 103 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c hub = &adev->vmhub[AMDGPU_MMHUB_0]; adev 112 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c hub = &adev->vmhub[AMDGPU_GFXHUB_0]; adev 127 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static int gmc_v10_0_process_interrupt(struct amdgpu_device *adev, adev 131 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_vmhub *hub = &adev->vmhub[entry->vmid_src]; adev 138 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c if (!amdgpu_sriov_vf(adev)) { adev 155 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c amdgpu_vm_get_task_info(adev, entry->pasid, &task_info); adev 157 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c dev_err(adev->dev, adev 164 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c dev_err(adev->dev, " in page starting at address 0x%016llx from client %d\n", adev 166 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c if (!amdgpu_sriov_vf(adev)) { adev 167 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c dev_err(adev->dev, adev 170 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c dev_err(adev->dev, "\t MORE_FAULTS: 0x%lx\n", adev 173 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c dev_err(adev->dev, "\t WALKER_ERROR: 0x%lx\n", adev 176 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c dev_err(adev->dev, "\t PERMISSION_FAULTS: 0x%lx\n", adev 179 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c dev_err(adev->dev, "\t MAPPING_ERROR: 0x%lx\n", adev 182 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c dev_err(adev->dev, "\t RW: 0x%lx\n", adev 196 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static void gmc_v10_0_set_irq_funcs(struct amdgpu_device *adev) adev 198 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.vm_fault.num_types = 1; adev 199 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.vm_fault.funcs = &gmc_v10_0_irq_funcs; adev 229 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static void gmc_v10_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid, adev 232 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_vmhub *hub = &adev->vmhub[vmhub]; adev 239 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c spin_lock(&adev->gmc.invalidate_lock); adev 250 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 258 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c if (i >= adev->usec_timeout) adev 272 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 290 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c spin_unlock(&adev->gmc.invalidate_lock); adev 292 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c if (i < adev->usec_timeout) adev 306 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, adev 309 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring; adev 316 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->nbio_funcs->hdp_flush(adev, NULL); adev 318 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c mutex_lock(&adev->mman.gtt_window_lock); adev 321 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_flush_vm_hub(adev, vmid, AMDGPU_MMHUB_0, 0); adev 322 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c mutex_unlock(&adev->mman.gtt_window_lock); adev 328 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c if (!adev->mman.buffer_funcs_enabled || adev 329 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c !adev->ib_pool_ready || adev 330 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->in_gpu_reset) { adev 331 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_flush_vm_hub(adev, vmid, AMDGPU_GFXHUB_0, 0); adev 332 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c mutex_unlock(&adev->mman.gtt_window_lock); adev 341 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = amdgpu_job_alloc_with_ib(adev, 16 * 4, &job); adev 345 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gart.bo); adev 349 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = amdgpu_job_submit(job, &adev->mman.entity, adev 354 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c mutex_unlock(&adev->mman.gtt_window_lock); adev 365 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c mutex_unlock(&adev->mman.gtt_window_lock); adev 372 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub]; adev 415 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_device *adev = ring->adev; adev 457 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static uint64_t gmc_v10_0_get_vm_pte_flags(struct amdgpu_device *adev, adev 496 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static void gmc_v10_0_get_vm_pde(struct amdgpu_device *adev, int level, adev 500 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c *addr = adev->vm_manager.vram_base_offset + *addr - adev 501 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.vram_start; adev 504 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c if (!adev->gmc.translate_further) adev 528 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static void gmc_v10_0_set_gmc_funcs(struct amdgpu_device *adev) adev 530 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c if (adev->gmc.gmc_funcs == NULL) adev 531 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.gmc_funcs = &gmc_v10_0_gmc_funcs; adev 536 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 538 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_set_gmc_funcs(adev); adev 539 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_set_irq_funcs(adev); adev 541 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.shared_aperture_start = 0x2000000000000000ULL; adev 542 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.shared_aperture_end = adev 543 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.shared_aperture_start + (4ULL << 30) - 1; adev 544 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.private_aperture_start = 0x1000000000000000ULL; adev 545 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.private_aperture_end = adev 546 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.private_aperture_start + (4ULL << 30) - 1; adev 553 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 557 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c for(i = 0; i < adev->num_rings; ++i) { adev 558 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_ring *ring = adev->rings[i]; adev 562 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c dev_info(adev->dev, "ring %u(%s) uses VM inv eng %u on hub %u\n", adev 571 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); adev 574 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static void gmc_v10_0_vram_gtt_location(struct amdgpu_device *adev, adev 579 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c if (!amdgpu_sriov_vf(adev)) adev 580 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c base = gfxhub_v2_0_get_fb_location(adev); adev 582 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c amdgpu_gmc_vram_location(adev, &adev->gmc, base); adev 583 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c amdgpu_gmc_gart_location(adev, mc); adev 586 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->vm_manager.vram_base_offset = gfxhub_v2_0_get_mc_fb_offset(adev); adev 598 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static int gmc_v10_0_mc_init(struct amdgpu_device *adev) adev 603 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.vram_width = amdgpu_atomfirmware_get_vram_width(adev); adev 608 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.vram_width = numchan * chansize; adev 612 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.aper_base = pci_resource_start(adev->pdev, 0); adev 613 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.aper_size = pci_resource_len(adev->pdev, 0); adev 616 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.mc_vram_size = adev 617 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->nbio_funcs->get_memsize(adev) * 1024ULL * 1024ULL; adev 618 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.real_vram_size = adev->gmc.mc_vram_size; adev 619 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.visible_vram_size = adev->gmc.aper_size; adev 622 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size) adev 623 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.visible_vram_size = adev->gmc.real_vram_size; adev 627 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c switch (adev->asic_type) { adev 632 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.gart_size = 512ULL << 20; adev 636 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.gart_size = (u64)amdgpu_gart_size << 20; adev 638 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_vram_gtt_location(adev, &adev->gmc); adev 643 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static int gmc_v10_0_gart_init(struct amdgpu_device *adev) adev 647 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c if (adev->gart.bo) { adev 653 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = amdgpu_gart_init(adev); adev 657 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gart.table_size = adev->gart.num_gpu_pages * 8; adev 658 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_NV10(MTYPE_UC) | adev 661 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c return amdgpu_gart_table_vram_alloc(adev); adev 664 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static unsigned gmc_v10_0_get_vbios_fb_size(struct amdgpu_device *adev) adev 683 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c if ((adev->gmc.real_vram_size - size) < (8 * 1024 * 1024)) { adev 697 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 699 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gfxhub_v2_0_init(adev); adev 700 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c mmhub_v2_0_init(adev); adev 702 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c spin_lock_init(&adev->gmc.invalidate_lock); adev 704 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.vram_type = amdgpu_atomfirmware_get_vram_type(adev); adev 705 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c switch (adev->asic_type) { adev 709 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->num_vmhubs = 2; adev 715 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48); adev 722 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VMC, adev 724 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c &adev->gmc.vm_fault); adev 725 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_UTCL2, adev 727 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c &adev->gmc.vm_fault); adev 735 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */ adev 742 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.stolen_size = 0; adev 744 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.stolen_size = 9 * 1024 *1024; adev 746 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(44)); adev 752 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = gmc_v10_0_mc_init(adev); adev 756 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gmc.stolen_size = gmc_v10_0_get_vbios_fb_size(adev); adev 759 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = amdgpu_bo_init(adev); adev 763 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = gmc_v10_0_gart_init(adev); adev 773 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->vm_manager.id_mgr[AMDGPU_GFXHUB_0].num_ids = AMDGPU_NUM_OF_VMIDS; adev 774 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->vm_manager.id_mgr[AMDGPU_MMHUB_0].num_ids = AMDGPU_NUM_OF_VMIDS; adev 776 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c amdgpu_vm_manager_init(adev); adev 788 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static void gmc_v10_0_gart_fini(struct amdgpu_device *adev) adev 790 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c amdgpu_gart_table_vram_free(adev); adev 791 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c amdgpu_gart_fini(adev); adev 796 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 798 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c amdgpu_vm_manager_fini(adev); adev 799 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_gart_fini(adev); adev 800 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c amdgpu_gem_force_release(adev); adev 801 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c amdgpu_bo_fini(adev); adev 806 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static void gmc_v10_0_init_golden_registers(struct amdgpu_device *adev) adev 808 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c switch (adev->asic_type) { adev 823 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static int gmc_v10_0_gart_enable(struct amdgpu_device *adev) adev 829 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c if (adev->gart.bo == NULL) { adev 830 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c dev_err(adev->dev, "No VRAM object for PCIE GART.\n"); adev 834 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = amdgpu_gart_table_vram_pin(adev); adev 838 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = gfxhub_v2_0_gart_enable(adev); adev 842 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = mmhub_v2_0_gart_enable(adev); adev 854 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->nbio_funcs->hdp_flush(adev, NULL); adev 859 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gfxhub_v2_0_set_fault_enable_default(adev, value); adev 860 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c mmhub_v2_0_set_fault_enable_default(adev, value); adev 861 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_flush_gpu_tlb(adev, 0, AMDGPU_MMHUB_0, 0); adev 862 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_flush_gpu_tlb(adev, 0, AMDGPU_GFXHUB_0, 0); adev 865 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c (unsigned)(adev->gmc.gart_size >> 20), adev 866 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c (unsigned long long)amdgpu_bo_gpu_offset(adev->gart.bo)); adev 868 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c adev->gart.ready = true; adev 876 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 879 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_init_golden_registers(adev); adev 881 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = gmc_v10_0_gart_enable(adev); adev 895 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c static void gmc_v10_0_gart_disable(struct amdgpu_device *adev) adev 897 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gfxhub_v2_0_gart_disable(adev); adev 898 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c mmhub_v2_0_gart_disable(adev); adev 899 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c amdgpu_gart_table_vram_unpin(adev); adev 904 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 906 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c if (amdgpu_sriov_vf(adev)) { adev 912 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0); adev 913 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_gart_disable(adev); adev 920 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 922 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_hw_fini(adev); adev 930 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 932 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = gmc_v10_0_hw_init(adev); adev 936 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c amdgpu_vmid_reset_all(adev); adev 962 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 964 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c r = mmhub_v2_0_set_clockgating(adev, state); adev 968 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c return athub_v2_0_set_clockgating(adev, state); adev 973 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 975 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c mmhub_v2_0_get_clockgating(adev, flags); adev 977 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c athub_v2_0_get_clockgating(adev, flags); adev 44 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static void gmc_v6_0_set_gmc_funcs(struct amdgpu_device *adev); adev 45 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static void gmc_v6_0_set_irq_funcs(struct amdgpu_device *adev); adev 75 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static void gmc_v6_0_mc_stop(struct amdgpu_device *adev) adev 79 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_wait_for_idle((void *)adev); adev 95 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static void gmc_v6_0_mc_resume(struct amdgpu_device *adev) adev 109 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static int gmc_v6_0_init_microcode(struct amdgpu_device *adev) adev 118 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c switch (adev->asic_type) { adev 145 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c err = request_firmware(&adev->gmc.fw, fw_name, adev->dev); adev 149 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c err = amdgpu_ucode_validate(adev->gmc.fw); adev 153 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_err(adev->dev, adev 156 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c release_firmware(adev->gmc.fw); adev 157 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.fw = NULL; adev 162 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static int gmc_v6_0_mc_load_microcode(struct amdgpu_device *adev) adev 170 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c if (!adev->gmc.fw) adev 173 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data; adev 177 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version); adev 180 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c (adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); adev 183 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); adev 209 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 214 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 225 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static void gmc_v6_0_vram_gtt_location(struct amdgpu_device *adev, adev 231 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c amdgpu_gmc_vram_location(adev, mc, base); adev 232 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c amdgpu_gmc_gart_location(adev, mc); adev 235 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static void gmc_v6_0_mc_program(struct amdgpu_device *adev) adev 249 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c if (gmc_v6_0_wait_for_idle((void *)adev)) { adev 250 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_warn(adev->dev, "Wait for MC idle timedout !\n"); adev 253 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c if (adev->mode_info.num_crtc) { adev 268 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.vram_start >> 12); adev 270 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.vram_end >> 12); adev 272 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->vram_scratch.gpu_addr >> 12); adev 277 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c if (gmc_v6_0_wait_for_idle((void *)adev)) { adev 278 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_warn(adev->dev, "Wait for MC idle timedout !\n"); adev 282 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static int gmc_v6_0_mc_init(struct amdgpu_device *adev) adev 328 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.vram_width = numchan * chansize; adev 330 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.mc_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL; adev 331 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.real_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL; adev 333 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c if (!(adev->flags & AMD_IS_APU)) { adev 334 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c r = amdgpu_device_resize_fb_bar(adev); adev 338 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.aper_base = pci_resource_start(adev->pdev, 0); adev 339 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.aper_size = pci_resource_len(adev->pdev, 0); adev 340 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.visible_vram_size = adev->gmc.aper_size; adev 344 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c switch (adev->asic_type) { adev 347 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.gart_size = 256ULL << 20; adev 353 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.gart_size = 1024ULL << 20; adev 357 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.gart_size = (u64)amdgpu_gart_size << 20; adev 360 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_vram_gtt_location(adev, &adev->gmc); adev 365 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static void gmc_v6_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, adev 389 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static uint64_t gmc_v6_0_get_vm_pte_flags(struct amdgpu_device *adev, adev 404 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static void gmc_v6_0_get_vm_pde(struct amdgpu_device *adev, int level, adev 410 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static void gmc_v6_0_set_fault_enable_default(struct amdgpu_device *adev, adev 437 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static void gmc_v6_0_set_prt(struct amdgpu_device *adev, bool enable) adev 441 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c if (enable && !adev->gmc.prt_warning) { adev 442 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_warn(adev->dev, "Disabling VM faults because of PRT request!\n"); adev 443 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.prt_warning = true; adev 463 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c uint32_t high = adev->vm_manager.max_pfn - adev 486 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static int gmc_v6_0_gart_enable(struct amdgpu_device *adev) adev 492 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c if (adev->gart.bo == NULL) { adev 493 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_err(adev->dev, "No VRAM object for PCIE GART.\n"); adev 496 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c r = amdgpu_gart_table_vram_pin(adev); adev 500 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c table_addr = amdgpu_bo_gpu_offset(adev->gart.bo); adev 522 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c field = adev->vm_manager.fragment_size; adev 528 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->gmc.gart_start >> 12); adev 529 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->gmc.gart_end >> 12); adev 532 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c (u32)(adev->dummy_page_addr >> 12)); adev 546 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn - 1); adev 562 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c (u32)(adev->dummy_page_addr >> 12)); adev 567 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c ((adev->vm_manager.block_size - 9) adev 570 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_set_fault_enable_default(adev, false); adev 572 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_set_fault_enable_default(adev, true); adev 574 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_flush_gpu_tlb(adev, 0, 0, 0); adev 575 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_info(adev->dev, "PCIE GART of %uM enabled (table at 0x%016llX).\n", adev 576 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c (unsigned)(adev->gmc.gart_size >> 20), adev 578 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gart.ready = true; adev 582 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static int gmc_v6_0_gart_init(struct amdgpu_device *adev) adev 586 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c if (adev->gart.bo) { adev 587 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_warn(adev->dev, "gmc_v6_0 PCIE GART already initialized\n"); adev 590 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c r = amdgpu_gart_init(adev); adev 593 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gart.table_size = adev->gart.num_gpu_pages * 8; adev 594 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gart.gart_pte_flags = 0; adev 595 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c return amdgpu_gart_table_vram_alloc(adev); adev 598 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static void gmc_v6_0_gart_disable(struct amdgpu_device *adev) adev 628 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c amdgpu_gart_table_vram_unpin(adev); adev 631 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static void gmc_v6_0_vm_decode_fault(struct amdgpu_device *adev, adev 644 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_err(adev->dev, "VM fault (0x%02x, vmid %d) at page %u, %s from '%s' (0x%08x) (%d)\n", adev 800 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 802 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_set_gmc_funcs(adev); adev 803 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_set_irq_funcs(adev); adev 810 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 812 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c amdgpu_bo_late_init(adev); adev 815 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); adev 820 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static unsigned gmc_v6_0_get_vbios_fb_size(struct amdgpu_device *adev) adev 834 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c if ((adev->gmc.real_vram_size - size) < (8 * 1024 * 1024)) adev 842 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 844 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->num_vmhubs = 1; adev 846 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c if (adev->flags & AMD_IS_APU) { adev 847 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN; adev 851 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.vram_type = gmc_v6_0_convert_vram_type(tmp); adev 854 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 146, &adev->gmc.vm_fault); adev 858 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 147, &adev->gmc.vm_fault); adev 862 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c amdgpu_vm_adjust_size(adev, 64, 9, 1, 40); adev 864 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.mc_mask = 0xffffffffffULL; adev 866 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(44)); adev 868 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_warn(adev->dev, "amdgpu: No suitable DMA available.\n"); adev 871 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->need_swiotlb = drm_need_swiotlb(44); adev 873 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c r = gmc_v6_0_init_microcode(adev); adev 875 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_err(adev->dev, "Failed to load mc firmware!\n"); adev 879 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c r = gmc_v6_0_mc_init(adev); adev 883 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.stolen_size = gmc_v6_0_get_vbios_fb_size(adev); adev 885 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c r = amdgpu_bo_init(adev); adev 889 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c r = gmc_v6_0_gart_init(adev); adev 899 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->vm_manager.id_mgr[0].num_ids = AMDGPU_NUM_OF_VMIDS; adev 900 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c amdgpu_vm_manager_init(adev); adev 903 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c if (adev->flags & AMD_IS_APU) { adev 907 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->vm_manager.vram_base_offset = tmp; adev 909 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->vm_manager.vram_base_offset = 0; adev 917 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 919 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c amdgpu_gem_force_release(adev); adev 920 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c amdgpu_vm_manager_fini(adev); adev 921 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c amdgpu_gart_table_vram_free(adev); adev 922 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c amdgpu_bo_fini(adev); adev 923 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c amdgpu_gart_fini(adev); adev 924 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c release_firmware(adev->gmc.fw); adev 925 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.fw = NULL; adev 933 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 935 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_mc_program(adev); adev 937 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c if (!(adev->flags & AMD_IS_APU)) { adev 938 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c r = gmc_v6_0_mc_load_microcode(adev); adev 940 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_err(adev->dev, "Failed to load MC firmware!\n"); adev 945 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c r = gmc_v6_0_gart_enable(adev); adev 954 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 956 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0); adev 957 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_gart_disable(adev); adev 964 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 966 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_hw_fini(adev); adev 974 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 976 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c r = gmc_v6_0_hw_init(adev); adev 980 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c amdgpu_vmid_reset_all(adev); adev 987 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1000 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1002 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 1013 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1023 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c if (!(adev->flags & AMD_IS_APU)) adev 1029 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_mc_stop(adev); adev 1030 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c if (gmc_v6_0_wait_for_idle(adev)) { adev 1031 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_warn(adev->dev, "Wait for GMC idle timed out !\n"); adev 1037 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 1049 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_mc_resume(adev); adev 1056 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static int gmc_v6_0_vm_fault_interrupt_state(struct amdgpu_device *adev, adev 1093 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static int gmc_v6_0_process_interrupt(struct amdgpu_device *adev, adev 1107 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_set_fault_enable_default(adev, false); adev 1110 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_err(adev->dev, "GPU fault detected: %d 0x%08x\n", adev 1112 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_err(adev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", adev 1114 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c dev_err(adev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", adev 1116 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c gmc_v6_0_vm_decode_fault(adev, status, addr, 0); adev 1164 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static void gmc_v6_0_set_gmc_funcs(struct amdgpu_device *adev) adev 1166 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.gmc_funcs = &gmc_v6_0_gmc_funcs; adev 1169 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c static void gmc_v6_0_set_irq_funcs(struct amdgpu_device *adev) adev 1171 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.vm_fault.num_types = 1; adev 1172 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c adev->gmc.vm_fault.funcs = &gmc_v6_0_irq_funcs; adev 53 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_set_gmc_funcs(struct amdgpu_device *adev); adev 54 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_set_irq_funcs(struct amdgpu_device *adev); adev 74 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_init_golden_registers(struct amdgpu_device *adev) adev 76 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c switch (adev->asic_type) { adev 78 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_device_program_register_sequence(adev, adev 81 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_device_program_register_sequence(adev, adev 90 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_mc_stop(struct amdgpu_device *adev) adev 94 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_wait_for_idle((void *)adev); adev 109 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_mc_resume(struct amdgpu_device *adev) adev 132 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static int gmc_v7_0_init_microcode(struct amdgpu_device *adev) adev 140 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c switch (adev->asic_type) { adev 159 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c err = request_firmware(&adev->gmc.fw, fw_name, adev->dev); adev 162 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c err = amdgpu_ucode_validate(adev->gmc.fw); adev 167 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c release_firmware(adev->gmc.fw); adev 168 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.fw = NULL; adev 181 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static int gmc_v7_0_mc_load_microcode(struct amdgpu_device *adev) adev 189 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (!adev->gmc.fw) adev 192 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data; adev 195 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version); adev 198 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c (adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); adev 201 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); adev 225 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 231 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 242 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_vram_gtt_location(struct amdgpu_device *adev, adev 248 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_gmc_vram_location(adev, mc, base); adev 249 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_gmc_gart_location(adev, mc); adev 260 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_mc_program(struct amdgpu_device *adev) adev 275 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (gmc_v7_0_wait_for_idle((void *)adev)) { adev 276 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c dev_warn(adev->dev, "Wait for MC idle timedout !\n"); adev 278 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (adev->mode_info.num_crtc) { adev 291 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.vram_start >> 12); adev 293 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.vram_end >> 12); adev 295 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->vram_scratch.gpu_addr >> 12); adev 299 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (gmc_v7_0_wait_for_idle((void *)adev)) { adev 300 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c dev_warn(adev->dev, "Wait for MC idle timedout !\n"); adev 322 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static int gmc_v7_0_mc_init(struct amdgpu_device *adev) adev 326 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.vram_width = amdgpu_atombios_get_vram_width(adev); adev 327 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (!adev->gmc.vram_width) { adev 369 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.vram_width = numchan * chansize; adev 372 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.mc_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL; adev 373 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.real_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL; adev 375 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (!(adev->flags & AMD_IS_APU)) { adev 376 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c r = amdgpu_device_resize_fb_bar(adev); adev 380 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.aper_base = pci_resource_start(adev->pdev, 0); adev 381 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.aper_size = pci_resource_len(adev->pdev, 0); adev 384 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (adev->flags & AMD_IS_APU) { adev 385 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22; adev 386 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.aper_size = adev->gmc.real_vram_size; adev 391 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.visible_vram_size = adev->gmc.aper_size; adev 392 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size) adev 393 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.visible_vram_size = adev->gmc.real_vram_size; adev 397 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c switch (adev->asic_type) { adev 400 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.gart_size = 256ULL << 20; adev 408 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.gart_size = 1024ULL << 20; adev 413 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.gart_size = (u64)amdgpu_gart_size << 20; adev 416 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_vram_gtt_location(adev, &adev->gmc); adev 436 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, adev 466 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static uint64_t gmc_v7_0_get_vm_pte_flags(struct amdgpu_device *adev, adev 481 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_get_vm_pde(struct amdgpu_device *adev, int level, adev 493 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_set_fault_enable_default(struct amdgpu_device *adev, adev 520 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_set_prt(struct amdgpu_device *adev, bool enable) adev 524 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (enable && !adev->gmc.prt_warning) { adev 525 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c dev_warn(adev->dev, "Disabling VM faults because of PRT request!\n"); adev 526 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.prt_warning = true; adev 548 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c uint32_t high = adev->vm_manager.max_pfn - adev 582 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static int gmc_v7_0_gart_enable(struct amdgpu_device *adev) adev 588 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (adev->gart.bo == NULL) { adev 589 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c dev_err(adev->dev, "No VRAM object for PCIE GART.\n"); adev 592 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c r = amdgpu_gart_table_vram_pin(adev); adev 596 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c table_addr = amdgpu_bo_gpu_offset(adev->gart.bo); adev 620 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c field = adev->vm_manager.fragment_size; adev 627 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->gmc.gart_start >> 12); adev 628 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->gmc.gart_end >> 12); adev 631 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c (u32)(adev->dummy_page_addr >> 12)); adev 649 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn - 1); adev 661 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c (u32)(adev->dummy_page_addr >> 12)); adev 667 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->vm_manager.block_size - 9); adev 670 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_set_fault_enable_default(adev, false); adev 672 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_set_fault_enable_default(adev, true); adev 674 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (adev->asic_type == CHIP_KAVERI) { adev 680 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_flush_gpu_tlb(adev, 0, 0, 0); adev 682 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c (unsigned)(adev->gmc.gart_size >> 20), adev 684 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gart.ready = true; adev 688 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static int gmc_v7_0_gart_init(struct amdgpu_device *adev) adev 692 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (adev->gart.bo) { adev 697 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c r = amdgpu_gart_init(adev); adev 700 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gart.table_size = adev->gart.num_gpu_pages * 8; adev 701 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gart.gart_pte_flags = 0; adev 702 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c return amdgpu_gart_table_vram_alloc(adev); adev 712 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_gart_disable(struct amdgpu_device *adev) adev 730 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_gart_table_vram_unpin(adev); adev 742 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_vm_decode_fault(struct amdgpu_device *adev, u32 status, adev 755 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c dev_err(adev->dev, "VM fault (0x%02x, vmid %d, pasid %d) at page %u, %s from '%s' (0x%08x) (%d)\n", adev 799 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_enable_mc_ls(struct amdgpu_device *adev, adev 807 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_LS)) adev 816 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_enable_mc_mgcg(struct amdgpu_device *adev, adev 824 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_MGCG)) adev 833 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_enable_bif_mgls(struct amdgpu_device *adev, adev 840 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_LS)) { adev 856 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_enable_hdp_mgcg(struct amdgpu_device *adev, adev 863 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_HDP_MGCG)) adev 872 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_enable_hdp_ls(struct amdgpu_device *adev, adev 879 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_HDP_LS)) adev 912 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 914 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_set_gmc_funcs(adev); adev 915 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_set_irq_funcs(adev); adev 917 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.shared_aperture_start = 0x2000000000000000ULL; adev 918 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.shared_aperture_end = adev 919 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.shared_aperture_start + (4ULL << 30) - 1; adev 920 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.private_aperture_start = adev 921 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.shared_aperture_end + 1; adev 922 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.private_aperture_end = adev 923 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.private_aperture_start + (4ULL << 30) - 1; adev 930 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 932 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_bo_late_init(adev); adev 935 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); adev 940 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static unsigned gmc_v7_0_get_vbios_fb_size(struct amdgpu_device *adev) adev 954 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if ((adev->gmc.real_vram_size - size) < (8 * 1024 * 1024)) adev 962 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 964 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->num_vmhubs = 1; adev 966 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (adev->flags & AMD_IS_APU) { adev 967 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN; adev 971 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.vram_type = gmc_v7_0_convert_vram_type(tmp); adev 974 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_PAGE_INV_FAULT, &adev->gmc.vm_fault); adev 978 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_MEM_PROT_FAULT, &adev->gmc.vm_fault); adev 986 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_vm_adjust_size(adev, 64, 9, 1, 40); adev 992 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.mc_mask = 0xffffffffffULL; /* 40 bit MC */ adev 994 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(40)); adev 999 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->need_swiotlb = drm_need_swiotlb(40); adev 1001 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c r = gmc_v7_0_init_microcode(adev); adev 1007 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c r = gmc_v7_0_mc_init(adev); adev 1011 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.stolen_size = gmc_v7_0_get_vbios_fb_size(adev); adev 1014 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c r = amdgpu_bo_init(adev); adev 1018 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c r = gmc_v7_0_gart_init(adev); adev 1028 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->vm_manager.id_mgr[0].num_ids = AMDGPU_NUM_OF_VMIDS; adev 1029 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_vm_manager_init(adev); adev 1032 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (adev->flags & AMD_IS_APU) { adev 1036 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->vm_manager.vram_base_offset = tmp; adev 1038 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->vm_manager.vram_base_offset = 0; adev 1041 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.vm_fault_info = kmalloc(sizeof(struct kfd_vm_fault_info), adev 1043 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (!adev->gmc.vm_fault_info) adev 1045 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c atomic_set(&adev->gmc.vm_fault_info_updated, 0); adev 1052 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1054 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_gem_force_release(adev); adev 1055 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_vm_manager_fini(adev); adev 1056 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c kfree(adev->gmc.vm_fault_info); adev 1057 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_gart_table_vram_free(adev); adev 1058 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_bo_fini(adev); adev 1059 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_gart_fini(adev); adev 1060 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c release_firmware(adev->gmc.fw); adev 1061 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.fw = NULL; adev 1069 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1071 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_init_golden_registers(adev); adev 1073 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_mc_program(adev); adev 1075 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (!(adev->flags & AMD_IS_APU)) { adev 1076 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c r = gmc_v7_0_mc_load_microcode(adev); adev 1083 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c r = gmc_v7_0_gart_enable(adev); adev 1092 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1094 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0); adev 1095 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_gart_disable(adev); adev 1102 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1104 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_hw_fini(adev); adev 1112 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1114 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c r = gmc_v7_0_hw_init(adev); adev 1118 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c amdgpu_vmid_reset_all(adev); adev 1125 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1139 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1141 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 1158 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1168 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (!(adev->flags & AMD_IS_APU)) adev 1174 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_mc_stop(adev); adev 1175 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (gmc_v7_0_wait_for_idle((void *)adev)) { adev 1176 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c dev_warn(adev->dev, "Wait for GMC idle timed out !\n"); adev 1182 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 1195 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_mc_resume(adev); adev 1202 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static int gmc_v7_0_vm_fault_interrupt_state(struct amdgpu_device *adev, adev 1243 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static int gmc_v7_0_process_interrupt(struct amdgpu_device *adev, adev 1259 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_set_fault_enable_default(adev, false); adev 1262 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c dev_err(adev->dev, "GPU fault detected: %d 0x%08x\n", adev 1264 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c dev_err(adev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", adev 1266 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c dev_err(adev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", adev 1268 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_vm_decode_fault(adev, status, addr, mc_client, adev 1274 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (amdgpu_amdkfd_is_kfd_vmid(adev, vmid) adev 1275 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c && !atomic_read(&adev->gmc.vm_fault_info_updated)) { adev 1276 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c struct kfd_vm_fault_info *info = adev->gmc.vm_fault_info; adev 1292 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c atomic_set(&adev->gmc.vm_fault_info_updated, 1); adev 1302 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1307 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c if (!(adev->flags & AMD_IS_APU)) { adev 1308 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_enable_mc_mgcg(adev, gate); adev 1309 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_enable_mc_ls(adev, gate); adev 1311 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_enable_bif_mgls(adev, gate); adev 1312 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_enable_hdp_mgcg(adev, gate); adev 1313 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c gmc_v7_0_enable_hdp_ls(adev, gate); adev 1355 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_set_gmc_funcs(struct amdgpu_device *adev) adev 1357 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.gmc_funcs = &gmc_v7_0_gmc_funcs; adev 1360 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c static void gmc_v7_0_set_irq_funcs(struct amdgpu_device *adev) adev 1362 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.vm_fault.num_types = 1; adev 1363 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c adev->gmc.vm_fault.funcs = &gmc_v7_0_irq_funcs; adev 54 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_set_gmc_funcs(struct amdgpu_device *adev); adev 55 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_set_irq_funcs(struct amdgpu_device *adev); adev 129 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_init_golden_registers(struct amdgpu_device *adev) adev 131 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c switch (adev->asic_type) { adev 133 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_device_program_register_sequence(adev, adev 136 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_device_program_register_sequence(adev, adev 141 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_device_program_register_sequence(adev, adev 144 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_device_program_register_sequence(adev, adev 151 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_device_program_register_sequence(adev, adev 156 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_device_program_register_sequence(adev, adev 161 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_device_program_register_sequence(adev, adev 166 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_device_program_register_sequence(adev, adev 169 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_device_program_register_sequence(adev, adev 178 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_mc_stop(struct amdgpu_device *adev) adev 182 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_wait_for_idle(adev); adev 197 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_mc_resume(struct amdgpu_device *adev) adev 220 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static int gmc_v8_0_init_microcode(struct amdgpu_device *adev) adev 228 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c switch (adev->asic_type) { adev 233 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (((adev->pdev->device == 0x67ef) && adev 234 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c ((adev->pdev->revision == 0xe0) || adev 235 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (adev->pdev->revision == 0xe5))) || adev 236 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c ((adev->pdev->device == 0x67ff) && adev 237 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c ((adev->pdev->revision == 0xcf) || adev 238 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (adev->pdev->revision == 0xef) || adev 239 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (adev->pdev->revision == 0xff)))) adev 241 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c else if ((adev->pdev->device == 0x67ef) && adev 242 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (adev->pdev->revision == 0xe2)) adev 248 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if ((adev->pdev->device == 0x67df) && adev 249 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c ((adev->pdev->revision == 0xe1) || adev 250 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (adev->pdev->revision == 0xf7))) adev 256 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (((adev->pdev->device == 0x6987) && adev 257 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c ((adev->pdev->revision == 0xc0) || adev 258 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (adev->pdev->revision == 0xc3))) || adev 259 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c ((adev->pdev->device == 0x6981) && adev 260 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c ((adev->pdev->revision == 0x00) || adev 261 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (adev->pdev->revision == 0x01) || adev 262 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (adev->pdev->revision == 0x10)))) adev 276 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c err = request_firmware(&adev->gmc.fw, fw_name, adev->dev); adev 279 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c err = amdgpu_ucode_validate(adev->gmc.fw); adev 284 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c release_firmware(adev->gmc.fw); adev 285 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.fw = NULL; adev 298 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static int gmc_v8_0_tonga_mc_load_microcode(struct amdgpu_device *adev) adev 311 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (amdgpu_sriov_bios(adev)) adev 314 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (!adev->gmc.fw) adev 317 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data; adev 320 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version); adev 323 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); adev 326 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); adev 350 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 356 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 367 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static int gmc_v8_0_polaris_mc_load_microcode(struct amdgpu_device *adev) adev 380 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (amdgpu_sriov_bios(adev)) adev 383 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (!adev->gmc.fw) adev 386 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data; adev 389 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version); adev 392 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); adev 395 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); adev 420 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 430 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_vram_gtt_location(struct amdgpu_device *adev, adev 435 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (!amdgpu_sriov_vf(adev)) adev 439 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_gmc_vram_location(adev, mc, base); adev 440 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_gmc_gart_location(adev, mc); adev 451 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_mc_program(struct amdgpu_device *adev) adev 466 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (gmc_v8_0_wait_for_idle((void *)adev)) { adev 467 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c dev_warn(adev->dev, "Wait for MC idle timedout !\n"); adev 469 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (adev->mode_info.num_crtc) { adev 482 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.vram_start >> 12); adev 484 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.vram_end >> 12); adev 486 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->vram_scratch.gpu_addr >> 12); adev 488 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (amdgpu_sriov_vf(adev)) { adev 489 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = ((adev->gmc.vram_end >> 24) & 0xFFFF) << 16; adev 490 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp |= ((adev->gmc.vram_start >> 24) & 0xFFFF); adev 493 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c WREG32(mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8)); adev 501 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (gmc_v8_0_wait_for_idle((void *)adev)) { adev 502 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c dev_warn(adev->dev, "Wait for MC idle timedout !\n"); adev 524 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static int gmc_v8_0_mc_init(struct amdgpu_device *adev) adev 528 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.vram_width = amdgpu_atombios_get_vram_width(adev); adev 529 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (!adev->gmc.vram_width) { adev 571 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.vram_width = numchan * chansize; adev 574 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.mc_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL; adev 575 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.real_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL; adev 577 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (!(adev->flags & AMD_IS_APU)) { adev 578 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c r = amdgpu_device_resize_fb_bar(adev); adev 582 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.aper_base = pci_resource_start(adev->pdev, 0); adev 583 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.aper_size = pci_resource_len(adev->pdev, 0); adev 586 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (adev->flags & AMD_IS_APU) { adev 587 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22; adev 588 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.aper_size = adev->gmc.real_vram_size; adev 593 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.visible_vram_size = adev->gmc.aper_size; adev 594 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size) adev 595 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.visible_vram_size = adev->gmc.real_vram_size; adev 599 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c switch (adev->asic_type) { adev 605 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.gart_size = 256ULL << 20; adev 611 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.gart_size = 1024ULL << 20; adev 615 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.gart_size = (u64)amdgpu_gart_size << 20; adev 618 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_vram_gtt_location(adev, &adev->gmc); adev 638 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, adev 689 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static uint64_t gmc_v8_0_get_vm_pte_flags(struct amdgpu_device *adev, adev 706 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_get_vm_pde(struct amdgpu_device *adev, int level, adev 718 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_set_fault_enable_default(struct amdgpu_device *adev, adev 747 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_set_prt(struct amdgpu_device *adev, bool enable) adev 751 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (enable && !adev->gmc.prt_warning) { adev 752 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c dev_warn(adev->dev, "Disabling VM faults because of PRT request!\n"); adev 753 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.prt_warning = true; adev 775 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c uint32_t high = adev->vm_manager.max_pfn - adev 809 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static int gmc_v8_0_gart_enable(struct amdgpu_device *adev) adev 815 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (adev->gart.bo == NULL) { adev 816 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c dev_err(adev->dev, "No VRAM object for PCIE GART.\n"); adev 819 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c r = amdgpu_gart_table_vram_pin(adev); adev 823 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c table_addr = amdgpu_bo_gpu_offset(adev->gart.bo); adev 848 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c field = adev->vm_manager.fragment_size; adev 870 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->gmc.gart_start >> 12); adev 871 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->gmc.gart_end >> 12); adev 874 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (u32)(adev->dummy_page_addr >> 12)); adev 892 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn - 1); adev 904 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (u32)(adev->dummy_page_addr >> 12)); adev 917 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->vm_manager.block_size - 9); adev 920 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_set_fault_enable_default(adev, false); adev 922 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_set_fault_enable_default(adev, true); adev 924 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_flush_gpu_tlb(adev, 0, 0, 0); adev 926 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (unsigned)(adev->gmc.gart_size >> 20), adev 928 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gart.ready = true; adev 932 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static int gmc_v8_0_gart_init(struct amdgpu_device *adev) adev 936 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (adev->gart.bo) { adev 941 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c r = amdgpu_gart_init(adev); adev 944 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gart.table_size = adev->gart.num_gpu_pages * 8; adev 945 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gart.gart_pte_flags = AMDGPU_PTE_EXECUTABLE; adev 946 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c return amdgpu_gart_table_vram_alloc(adev); adev 956 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_gart_disable(struct amdgpu_device *adev) adev 974 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_gart_table_vram_unpin(adev); adev 986 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_vm_decode_fault(struct amdgpu_device *adev, u32 status, adev 999 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c dev_err(adev->dev, "VM fault (0x%02x, vmid %d, pasid %d) at page %u, %s from '%s' (0x%08x) (%d)\n", adev 1030 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1032 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_set_gmc_funcs(adev); adev 1033 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_set_irq_funcs(adev); adev 1035 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.shared_aperture_start = 0x2000000000000000ULL; adev 1036 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.shared_aperture_end = adev 1037 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.shared_aperture_start + (4ULL << 30) - 1; adev 1038 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.private_aperture_start = adev 1039 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.shared_aperture_end + 1; adev 1040 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.private_aperture_end = adev 1041 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.private_aperture_start + (4ULL << 30) - 1; adev 1048 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1050 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_bo_late_init(adev); adev 1053 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); adev 1058 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static unsigned gmc_v8_0_get_vbios_fb_size(struct amdgpu_device *adev) adev 1072 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if ((adev->gmc.real_vram_size - size) < (8 * 1024 * 1024)) adev 1082 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1084 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->num_vmhubs = 1; adev 1086 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (adev->flags & AMD_IS_APU) { adev 1087 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN; adev 1091 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if ((adev->asic_type == CHIP_FIJI) || adev 1092 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c (adev->asic_type == CHIP_VEGAM)) adev 1097 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.vram_type = gmc_v8_0_convert_vram_type(tmp); adev 1100 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_PAGE_INV_FAULT, &adev->gmc.vm_fault); adev 1104 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_MEM_PROT_FAULT, &adev->gmc.vm_fault); adev 1112 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_vm_adjust_size(adev, 64, 9, 1, 40); adev 1118 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.mc_mask = 0xffffffffffULL; /* 40 bit MC */ adev 1120 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(40)); adev 1125 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->need_swiotlb = drm_need_swiotlb(40); adev 1127 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c r = gmc_v8_0_init_microcode(adev); adev 1133 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c r = gmc_v8_0_mc_init(adev); adev 1137 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.stolen_size = gmc_v8_0_get_vbios_fb_size(adev); adev 1140 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c r = amdgpu_bo_init(adev); adev 1144 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c r = gmc_v8_0_gart_init(adev); adev 1154 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->vm_manager.id_mgr[0].num_ids = AMDGPU_NUM_OF_VMIDS; adev 1155 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_vm_manager_init(adev); adev 1158 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (adev->flags & AMD_IS_APU) { adev 1162 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->vm_manager.vram_base_offset = tmp; adev 1164 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->vm_manager.vram_base_offset = 0; adev 1167 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.vm_fault_info = kmalloc(sizeof(struct kfd_vm_fault_info), adev 1169 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (!adev->gmc.vm_fault_info) adev 1171 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c atomic_set(&adev->gmc.vm_fault_info_updated, 0); adev 1178 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1180 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_gem_force_release(adev); adev 1181 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_vm_manager_fini(adev); adev 1182 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c kfree(adev->gmc.vm_fault_info); adev 1183 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_gart_table_vram_free(adev); adev 1184 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_bo_fini(adev); adev 1185 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_gart_fini(adev); adev 1186 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c release_firmware(adev->gmc.fw); adev 1187 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.fw = NULL; adev 1195 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1197 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_init_golden_registers(adev); adev 1199 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_mc_program(adev); adev 1201 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (adev->asic_type == CHIP_TONGA) { adev 1202 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c r = gmc_v8_0_tonga_mc_load_microcode(adev); adev 1207 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c } else if (adev->asic_type == CHIP_POLARIS11 || adev 1208 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->asic_type == CHIP_POLARIS10 || adev 1209 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->asic_type == CHIP_POLARIS12) { adev 1210 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c r = gmc_v8_0_polaris_mc_load_microcode(adev); adev 1217 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c r = gmc_v8_0_gart_enable(adev); adev 1226 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1228 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0); adev 1229 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_gart_disable(adev); adev 1236 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1238 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_hw_fini(adev); adev 1246 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1248 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c r = gmc_v8_0_hw_init(adev); adev 1252 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_vmid_reset_all(adev); adev 1259 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1273 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1275 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 1294 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1303 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (!(adev->flags & AMD_IS_APU)) adev 1308 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.srbm_soft_reset = srbm_soft_reset; adev 1311 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.srbm_soft_reset = 0; adev 1318 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1320 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (!adev->gmc.srbm_soft_reset) adev 1323 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_mc_stop(adev); adev 1324 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (gmc_v8_0_wait_for_idle(adev)) { adev 1325 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c dev_warn(adev->dev, "Wait for GMC idle timed out !\n"); adev 1333 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1336 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (!adev->gmc.srbm_soft_reset) adev 1338 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c srbm_soft_reset = adev->gmc.srbm_soft_reset; adev 1345 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 1364 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1366 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (!adev->gmc.srbm_soft_reset) adev 1369 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_mc_resume(adev); adev 1373 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static int gmc_v8_0_vm_fault_interrupt_state(struct amdgpu_device *adev, adev 1415 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static int gmc_v8_0_process_interrupt(struct amdgpu_device *adev, adev 1421 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (amdgpu_sriov_vf(adev)) { adev 1422 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c dev_err(adev->dev, "GPU fault detected: %d 0x%08x\n", adev 1424 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c dev_err(adev->dev, " Can't decode VM fault info here on SRIOV VF\n"); adev 1438 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_set_fault_enable_default(adev, false); adev 1444 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c amdgpu_vm_get_task_info(adev, entry->pasid, &task_info); adev 1446 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c dev_err(adev->dev, "GPU fault detected: %d 0x%08x for process %s pid %d thread %s pid %d\n", adev 1449 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c dev_err(adev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", adev 1451 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c dev_err(adev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", adev 1453 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c gmc_v8_0_vm_decode_fault(adev, status, addr, mc_client, adev 1459 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (amdgpu_amdkfd_is_kfd_vmid(adev, vmid) adev 1460 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c && !atomic_read(&adev->gmc.vm_fault_info_updated)) { adev 1461 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct kfd_vm_fault_info *info = adev->gmc.vm_fault_info; adev 1477 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c atomic_set(&adev->gmc.vm_fault_info_updated, 1); adev 1483 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void fiji_update_mc_medium_grain_clock_gating(struct amdgpu_device *adev, adev 1488 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_MGCG)) { adev 1563 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void fiji_update_mc_light_sleep(struct amdgpu_device *adev, adev 1568 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_LS)) { adev 1646 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1648 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (amdgpu_sriov_vf(adev)) adev 1651 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c switch (adev->asic_type) { adev 1653 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c fiji_update_mc_medium_grain_clock_gating(adev, adev 1655 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c fiji_update_mc_light_sleep(adev, adev 1672 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1675 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c if (amdgpu_sriov_vf(adev)) adev 1723 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_set_gmc_funcs(struct amdgpu_device *adev) adev 1725 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.gmc_funcs = &gmc_v8_0_gmc_funcs; adev 1728 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c static void gmc_v8_0_set_irq_funcs(struct amdgpu_device *adev) adev 1730 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.vm_fault.num_types = 1; adev 1731 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c adev->gmc.vm_fault.funcs = &gmc_v8_0_irq_funcs; adev 201 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static int gmc_v9_0_ecc_interrupt_state(struct amdgpu_device *adev, adev 246 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static int gmc_v9_0_process_ras_data_cb(struct amdgpu_device *adev, adev 250 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c kgd2kfd_set_sram_ecc_flag(adev->kfd.dev); adev 251 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->umc.funcs->query_ras_error_count) adev 252 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->umc.funcs->query_ras_error_count(adev, err_data); adev 256 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->umc.funcs->query_ras_error_address) adev 257 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->umc.funcs->query_ras_error_address(adev, err_data); adev 261 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_reset_gpu(adev, 0); adev 266 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static int gmc_v9_0_process_ecc_irq(struct amdgpu_device *adev, adev 270 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct ras_common_if *ras_if = adev->gmc.umc_ras_if; adev 280 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_interrupt_dispatch(adev, &ih_data); adev 284 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static int gmc_v9_0_vm_fault_interrupt_state(struct amdgpu_device *adev, adev 302 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c for (j = 0; j < adev->num_vmhubs; j++) { adev 303 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c hub = &adev->vmhub[j]; adev 313 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c for (j = 0; j < adev->num_vmhubs; j++) { adev 314 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c hub = &adev->vmhub[j]; adev 329 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static int gmc_v9_0_process_interrupt(struct amdgpu_device *adev, adev 342 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (retry_fault && amdgpu_gmc_filter_faults(adev, addr, entry->pasid, adev 348 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c hub = &adev->vmhub[AMDGPU_MMHUB_0]; adev 351 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c hub = &adev->vmhub[AMDGPU_MMHUB_1]; adev 354 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c hub = &adev->vmhub[AMDGPU_GFXHUB_0]; adev 358 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (!amdgpu_sriov_vf(adev)) { adev 375 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_vm_get_task_info(adev, entry->pasid, &task_info); adev 377 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c dev_err(adev->dev, adev 384 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c dev_err(adev->dev, " in page starting at address 0x%016llx from client %d\n", adev 386 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (!amdgpu_sriov_vf(adev)) { adev 387 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c dev_err(adev->dev, adev 390 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c dev_err(adev->dev, "\t MORE_FAULTS: 0x%lx\n", adev 393 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c dev_err(adev->dev, "\t WALKER_ERROR: 0x%lx\n", adev 396 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c dev_err(adev->dev, "\t PERMISSION_FAULTS: 0x%lx\n", adev 399 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c dev_err(adev->dev, "\t MAPPING_ERROR: 0x%lx\n", adev 402 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c dev_err(adev->dev, "\t RW: 0x%lx\n", adev 423 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static void gmc_v9_0_set_irq_funcs(struct amdgpu_device *adev) adev 425 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.vm_fault.num_types = 1; adev 426 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.vm_fault.funcs = &gmc_v9_0_irq_funcs; adev 428 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.ecc_irq.num_types = 1; adev 429 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.ecc_irq.funcs = &gmc_v9_0_ecc_funcs; adev 458 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static bool gmc_v9_0_use_invalidate_semaphore(struct amdgpu_device *adev, adev 463 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c (!amdgpu_sriov_vf(adev)) && adev 464 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c (!(adev->asic_type == CHIP_RAVEN && adev 465 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->rev_id < 0x8 && adev 466 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->pdev->device == 0x15d8))); adev 485 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, adev 488 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c bool use_semaphore = gmc_v9_0_use_invalidate_semaphore(adev, vmhub); adev 493 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c BUG_ON(vmhub >= adev->num_vmhubs); adev 495 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c hub = &adev->vmhub[vmhub]; adev 501 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->gfx.kiq.ring.sched.ready && adev 502 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev)) && adev 503 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c !adev->in_gpu_reset) { adev 507 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_virt_kiq_reg_write_reg_wait(adev, req, ack, inv_req, adev 512 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c spin_lock(&adev->gmc.invalidate_lock); adev 523 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c for (j = 0; j < adev->usec_timeout; j++) { adev 531 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (j >= adev->usec_timeout) adev 544 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c for (j = 0; j < adev->usec_timeout; j++) { adev 559 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c spin_unlock(&adev->gmc.invalidate_lock); adev 561 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (j < adev->usec_timeout) adev 570 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c bool use_semaphore = gmc_v9_0_use_invalidate_semaphore(ring->adev, ring->funcs->vmhub); adev 571 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct amdgpu_device *adev = ring->adev; adev 572 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct amdgpu_vmhub *hub = &adev->vmhub[ring->funcs->vmhub]; adev 613 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct amdgpu_device *adev = ring->adev; adev 660 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static uint64_t gmc_v9_0_get_vm_pte_flags(struct amdgpu_device *adev, adev 700 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static void gmc_v9_0_get_vm_pde(struct amdgpu_device *adev, int level, adev 704 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c *addr = adev->vm_manager.vram_base_offset + *addr - adev 705 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.vram_start; adev 708 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (!adev->gmc.translate_further) adev 732 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static void gmc_v9_0_set_gmc_funcs(struct amdgpu_device *adev) adev 734 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.gmc_funcs = &gmc_v9_0_gmc_funcs; adev 737 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev) adev 739 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c switch (adev->asic_type) { adev 741 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->umc.max_ras_err_cnt_per_query = UMC_V6_1_TOTAL_CHANNEL_NUM; adev 742 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->umc.channel_inst_num = UMC_V6_1_CHANNEL_INSTANCE_NUM; adev 743 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->umc.umc_inst_num = UMC_V6_1_UMC_INSTANCE_NUM; adev 744 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->umc.channel_offs = UMC_V6_1_PER_CHANNEL_OFFSET; adev 745 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->umc.channel_idx_tbl = &umc_v6_1_channel_idx_tbl[0][0]; adev 746 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->umc.funcs = &umc_v6_1_funcs; adev 753 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static void gmc_v9_0_set_mmhub_funcs(struct amdgpu_device *adev) adev 755 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c switch (adev->asic_type) { adev 757 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->mmhub_funcs = &mmhub_v1_0_funcs; adev 766 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 768 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_set_gmc_funcs(adev); adev 769 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_set_irq_funcs(adev); adev 770 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_set_umc_funcs(adev); adev 771 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_set_mmhub_funcs(adev); adev 773 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.shared_aperture_start = 0x2000000000000000ULL; adev 774 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.shared_aperture_end = adev 775 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.shared_aperture_start + (4ULL << 30) - 1; adev 776 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.private_aperture_start = 0x1000000000000000ULL; adev 777 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.private_aperture_end = adev 778 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.private_aperture_start + (4ULL << 30) - 1; adev 783 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static bool gmc_v9_0_keep_stolen_memory(struct amdgpu_device *adev) adev 795 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c switch (adev->asic_type) { adev 808 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static int gmc_v9_0_allocate_vm_inv_eng(struct amdgpu_device *adev) adev 817 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c for (i = 0; i < adev->num_rings; ++i) { adev 818 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ring = adev->rings[i]; adev 823 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c dev_err(adev->dev, "no VM inv eng for ring %s\n", adev 831 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c dev_info(adev->dev, "ring %s uses VM inv eng %u on hub %u\n", adev 841 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 849 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ras_if = &adev->gmc.umc_ras_if; adev 851 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ras_if = &adev->gmc.mmhub_ras_if; adev 855 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (!amdgpu_ras_is_supported(adev, ras_block->block)) { adev 856 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_feature_enable_on_boot(adev, ras_block, 0); adev 866 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_ras_feature_enable_on_boot(adev, *ras_if, 1); adev 870 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_request_reset_on_boot(adev, adev 887 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_ras_feature_enable_on_boot(adev, *ras_if, 1); adev 890 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_request_reset_on_boot(adev, adev 901 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_ras_interrupt_add_handler(adev, &ih_info); adev 906 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_debugfs_create(adev, fs_info); adev 908 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_ras_sysfs_create(adev, fs_info); adev 913 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_irq_get(adev, &adev->gmc.ecc_irq, 0); adev 920 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_sysfs_remove(adev, *ras_if); adev 922 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_debugfs_remove(adev, *ras_if); adev 924 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_interrupt_remove_handler(adev, &ih_info); adev 926 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_feature_enable(adev, *ras_if, 0); adev 970 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 973 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (!gmc_v9_0_keep_stolen_memory(adev)) adev 974 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_bo_late_init(adev); adev 976 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = gmc_v9_0_allocate_vm_inv_eng(adev); adev 980 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (!amdgpu_sriov_vf(adev)) { adev 981 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c switch (adev->asic_type) { adev 984 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_atomfirmware_mem_ecc_supported(adev); adev 987 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->df_funcs->enable_ecc_force_par_wr_rmw) adev 988 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->df_funcs->enable_ecc_force_par_wr_rmw(adev, false); adev 993 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_atomfirmware_sram_ecc_supported(adev); adev 1009 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); adev 1012 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev, adev 1017 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->asic_type == CHIP_ARCTURUS) adev 1018 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c base = mmhub_v9_4_get_fb_location(adev); adev 1019 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c else if (!amdgpu_sriov_vf(adev)) adev 1020 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c base = mmhub_v1_0_get_fb_location(adev); adev 1023 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size; adev 1024 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_gmc_vram_location(adev, mc, base); adev 1025 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_gmc_gart_location(adev, mc); adev 1026 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_gmc_agp_location(adev, mc); adev 1028 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->vm_manager.vram_base_offset = gfxhub_v1_0_get_mc_fb_offset(adev); adev 1031 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->vm_manager.vram_base_offset += adev 1032 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size; adev 1044 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static int gmc_v9_0_mc_init(struct amdgpu_device *adev) adev 1049 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (amdgpu_sriov_vf(adev)) { adev 1054 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.vram_width = 2048; adev 1056 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.vram_width = amdgpu_atomfirmware_get_vram_width(adev); adev 1059 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (!adev->gmc.vram_width) { adev 1061 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->flags & AMD_IS_APU) adev 1066 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c numchan = adev->df_funcs->get_hbm_channel_number(adev); adev 1067 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.vram_width = numchan * chansize; adev 1071 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.mc_vram_size = adev 1072 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->nbio_funcs->get_memsize(adev) * 1024ULL * 1024ULL; adev 1073 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.real_vram_size = adev->gmc.mc_vram_size; adev 1075 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (!(adev->flags & AMD_IS_APU)) { adev 1076 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_device_resize_fb_bar(adev); adev 1080 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.aper_base = pci_resource_start(adev->pdev, 0); adev 1081 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.aper_size = pci_resource_len(adev->pdev, 0); adev 1084 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->flags & AMD_IS_APU) { adev 1085 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.aper_base = gfxhub_v1_0_get_mc_fb_offset(adev); adev 1086 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.aper_size = adev->gmc.real_vram_size; adev 1090 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.visible_vram_size = adev->gmc.aper_size; adev 1091 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size) adev 1092 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.visible_vram_size = adev->gmc.real_vram_size; adev 1096 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c switch (adev->asic_type) { adev 1102 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.gart_size = 512ULL << 20; adev 1106 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.gart_size = 1024ULL << 20; adev 1110 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.gart_size = (u64)amdgpu_gart_size << 20; adev 1113 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_vram_gtt_location(adev, &adev->gmc); adev 1118 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static int gmc_v9_0_gart_init(struct amdgpu_device *adev) adev 1122 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->gart.bo) { adev 1127 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_gart_init(adev); adev 1130 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gart.table_size = adev->gart.num_gpu_pages * 8; adev 1131 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_VG10(MTYPE_UC) | adev 1133 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c return amdgpu_gart_table_vram_alloc(adev); adev 1136 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev) adev 1145 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (gmc_v9_0_keep_stolen_memory(adev)) adev 1154 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c switch (adev->asic_type) { adev 1176 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if ((adev->gmc.real_vram_size - size) < (8 * 1024 * 1024)) adev 1185 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1187 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gfxhub_v1_0_init(adev); adev 1188 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->asic_type == CHIP_ARCTURUS) adev 1189 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c mmhub_v9_4_init(adev); adev 1191 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c mmhub_v1_0_init(adev); adev 1193 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c spin_lock_init(&adev->gmc.invalidate_lock); adev 1195 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.vram_type = amdgpu_atomfirmware_get_vram_type(adev); adev 1196 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c switch (adev->asic_type) { adev 1198 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->num_vmhubs = 2; adev 1200 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->rev_id == 0x0 || adev->rev_id == 0x1) { adev 1201 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48); adev 1204 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_vm_adjust_size(adev, 128 * 1024 + 512, 9, 2, 48); adev 1205 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.translate_further = adev 1206 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->vm_manager.num_level > 1; adev 1213 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->num_vmhubs = 2; adev 1222 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (amdgpu_sriov_vf(adev)) adev 1223 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 47); adev 1225 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48); adev 1228 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->num_vmhubs = 3; adev 1231 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48); adev 1238 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VMC, VMC_1_0__SRCID__VM_FAULT, adev 1239 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c &adev->gmc.vm_fault); adev 1243 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->asic_type == CHIP_ARCTURUS) { adev 1244 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VMC1, VMC_1_0__SRCID__VM_FAULT, adev 1245 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c &adev->gmc.vm_fault); adev 1250 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_UTCL2, UTCL2_1_0__SRCID__FAULT, adev 1251 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c &adev->gmc.vm_fault); adev 1257 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DF, 0, adev 1258 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c &adev->gmc.ecc_irq); adev 1266 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */ adev 1268 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(44)); adev 1273 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->need_swiotlb = drm_need_swiotlb(44); adev 1275 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->gmc.xgmi.supported) { adev 1276 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = gfxhub_v1_1_get_xgmi_info(adev); adev 1281 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = gmc_v9_0_mc_init(adev); adev 1285 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.stolen_size = gmc_v9_0_get_vbios_fb_size(adev); adev 1288 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_bo_init(adev); adev 1292 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = gmc_v9_0_gart_init(adev); adev 1302 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->vm_manager.id_mgr[AMDGPU_GFXHUB_0].num_ids = AMDGPU_NUM_OF_VMIDS; adev 1303 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->vm_manager.id_mgr[AMDGPU_MMHUB_0].num_ids = AMDGPU_NUM_OF_VMIDS; adev 1304 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->vm_manager.id_mgr[AMDGPU_MMHUB_1].num_ids = AMDGPU_NUM_OF_VMIDS; adev 1306 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_vm_manager_init(adev); adev 1313 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1316 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__UMC) && adev 1317 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.umc_ras_if) { adev 1318 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct ras_common_if *ras_if = adev->gmc.umc_ras_if; adev 1324 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_debugfs_remove(adev, ras_if); adev 1325 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_sysfs_remove(adev, ras_if); adev 1327 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_interrupt_remove_handler(adev, &ih_info); adev 1328 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_feature_enable(adev, ras_if, 0); adev 1332 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__MMHUB) && adev 1333 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.mmhub_ras_if) { adev 1334 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct ras_common_if *ras_if = adev->gmc.mmhub_ras_if; adev 1337 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_debugfs_remove(adev, ras_if); adev 1338 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_sysfs_remove(adev, ras_if); adev 1339 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_ras_feature_enable(adev, ras_if, 0); adev 1343 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_gem_force_release(adev); adev 1344 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_vm_manager_fini(adev); adev 1346 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (gmc_v9_0_keep_stolen_memory(adev)) adev 1347 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_bo_free_kernel(&adev->stolen_vga_memory, NULL, &stolen_vga_buf); adev 1349 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_gart_table_vram_free(adev); adev 1350 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_bo_fini(adev); adev 1351 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_gart_fini(adev); adev 1356 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static void gmc_v9_0_init_golden_registers(struct amdgpu_device *adev) adev 1359 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c switch (adev->asic_type) { adev 1361 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (amdgpu_sriov_vf(adev)) adev 1365 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c soc15_program_register_sequence(adev, adev 1368 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c soc15_program_register_sequence(adev, adev 1376 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c soc15_program_register_sequence(adev, adev 1392 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static void gmc_v9_0_restore_registers(struct amdgpu_device *adev) adev 1394 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->asic_type == CHIP_RAVEN) adev 1395 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c WREG32(mmDCHUBBUB_SDPIF_MMIO_CNTRL_0, adev->gmc.sdpif_register); adev 1403 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static int gmc_v9_0_gart_enable(struct amdgpu_device *adev) adev 1409 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_device_program_register_sequence(adev, adev 1413 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->gart.bo == NULL) { adev 1414 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c dev_err(adev->dev, "No VRAM object for PCIE GART.\n"); adev 1417 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = amdgpu_gart_table_vram_pin(adev); adev 1421 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c switch (adev->asic_type) { adev 1424 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c mmhub_v1_0_update_power_gating(adev, true); adev 1430 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = gfxhub_v1_0_gart_enable(adev); adev 1434 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->asic_type == CHIP_ARCTURUS) adev 1435 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = mmhub_v9_4_gart_enable(adev); adev 1437 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = mmhub_v1_0_gart_enable(adev); adev 1446 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8)); adev 1447 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40)); adev 1450 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->nbio_funcs->hdp_flush(adev, NULL); adev 1457 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gfxhub_v1_0_set_fault_enable_default(adev, value); adev 1458 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->asic_type == CHIP_ARCTURUS) adev 1459 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c mmhub_v9_4_set_fault_enable_default(adev, value); adev 1461 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c mmhub_v1_0_set_fault_enable_default(adev, value); adev 1463 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c for (i = 0; i < adev->num_vmhubs; ++i) adev 1464 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_flush_gpu_tlb(adev, 0, i, 0); adev 1467 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c (unsigned)(adev->gmc.gart_size >> 20), adev 1468 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c (unsigned long long)amdgpu_bo_gpu_offset(adev->gart.bo)); adev 1469 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gart.ready = true; adev 1476 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1479 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_init_golden_registers(adev); adev 1481 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->mode_info.num_crtc) { adev 1489 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = gmc_v9_0_gart_enable(adev); adev 1502 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static void gmc_v9_0_save_registers(struct amdgpu_device *adev) adev 1504 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->asic_type == CHIP_RAVEN) adev 1505 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c adev->gmc.sdpif_register = RREG32(mmDCHUBBUB_SDPIF_MMIO_CNTRL_0); adev 1515 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c static void gmc_v9_0_gart_disable(struct amdgpu_device *adev) adev 1517 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gfxhub_v1_0_gart_disable(adev); adev 1518 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->asic_type == CHIP_ARCTURUS) adev 1519 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c mmhub_v9_4_gart_disable(adev); adev 1521 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c mmhub_v1_0_gart_disable(adev); adev 1522 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_gart_table_vram_unpin(adev); adev 1527 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1529 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (amdgpu_sriov_vf(adev)) { adev 1535 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0); adev 1536 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0); adev 1537 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_gart_disable(adev); adev 1545 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1547 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = gmc_v9_0_hw_fini(adev); adev 1551 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_save_registers(adev); adev 1559 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1561 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_restore_registers(adev); adev 1562 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c r = gmc_v9_0_hw_init(adev); adev 1566 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c amdgpu_vmid_reset_all(adev); adev 1592 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1594 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->asic_type == CHIP_ARCTURUS) adev 1595 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c mmhub_v9_4_set_clockgating(adev, state); adev 1597 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c mmhub_v1_0_set_clockgating(adev, state); adev 1599 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c athub_v1_0_set_clockgating(adev, state); adev 1606 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1608 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c if (adev->asic_type == CHIP_ARCTURUS) adev 1609 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c mmhub_v9_4_get_clockgating(adev, flags); adev 1611 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c mmhub_v1_0_get_clockgating(adev, flags); adev 1613 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c athub_v1_0_get_clockgating(adev, flags); adev 41 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h void gfxhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid, adev 43 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h void mmhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid, adev 45 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h void mmhub_v9_4_setup_vm_pt_regs(struct amdgpu_device *adev, int hubid, adev 51 drivers/gpu/drm/amd/amdgpu/iceland_ih.c static void iceland_ih_set_interrupt_funcs(struct amdgpu_device *adev); adev 60 drivers/gpu/drm/amd/amdgpu/iceland_ih.c static void iceland_ih_enable_interrupts(struct amdgpu_device *adev) adev 69 drivers/gpu/drm/amd/amdgpu/iceland_ih.c adev->irq.ih.enabled = true; adev 79 drivers/gpu/drm/amd/amdgpu/iceland_ih.c static void iceland_ih_disable_interrupts(struct amdgpu_device *adev) adev 91 drivers/gpu/drm/amd/amdgpu/iceland_ih.c adev->irq.ih.enabled = false; adev 92 drivers/gpu/drm/amd/amdgpu/iceland_ih.c adev->irq.ih.rptr = 0; adev 106 drivers/gpu/drm/amd/amdgpu/iceland_ih.c static int iceland_ih_irq_init(struct amdgpu_device *adev) adev 108 drivers/gpu/drm/amd/amdgpu/iceland_ih.c struct amdgpu_ih_ring *ih = &adev->irq.ih; adev 113 drivers/gpu/drm/amd/amdgpu/iceland_ih.c iceland_ih_disable_interrupts(adev); adev 116 drivers/gpu/drm/amd/amdgpu/iceland_ih.c WREG32(mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); adev 127 drivers/gpu/drm/amd/amdgpu/iceland_ih.c WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8); adev 129 drivers/gpu/drm/amd/amdgpu/iceland_ih.c rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4); adev 151 drivers/gpu/drm/amd/amdgpu/iceland_ih.c if (adev->irq.msi_enabled) adev 155 drivers/gpu/drm/amd/amdgpu/iceland_ih.c pci_set_master(adev->pdev); adev 158 drivers/gpu/drm/amd/amdgpu/iceland_ih.c iceland_ih_enable_interrupts(adev); adev 170 drivers/gpu/drm/amd/amdgpu/iceland_ih.c static void iceland_ih_irq_disable(struct amdgpu_device *adev) adev 172 drivers/gpu/drm/amd/amdgpu/iceland_ih.c iceland_ih_disable_interrupts(adev); adev 189 drivers/gpu/drm/amd/amdgpu/iceland_ih.c static u32 iceland_ih_get_wptr(struct amdgpu_device *adev, adev 202 drivers/gpu/drm/amd/amdgpu/iceland_ih.c dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", adev 220 drivers/gpu/drm/amd/amdgpu/iceland_ih.c static void iceland_ih_decode_iv(struct amdgpu_device *adev, adev 251 drivers/gpu/drm/amd/amdgpu/iceland_ih.c static void iceland_ih_set_rptr(struct amdgpu_device *adev, adev 259 drivers/gpu/drm/amd/amdgpu/iceland_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 262 drivers/gpu/drm/amd/amdgpu/iceland_ih.c ret = amdgpu_irq_add_domain(adev); adev 266 drivers/gpu/drm/amd/amdgpu/iceland_ih.c iceland_ih_set_interrupt_funcs(adev); adev 274 drivers/gpu/drm/amd/amdgpu/iceland_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 276 drivers/gpu/drm/amd/amdgpu/iceland_ih.c r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, false); adev 280 drivers/gpu/drm/amd/amdgpu/iceland_ih.c r = amdgpu_irq_init(adev); adev 287 drivers/gpu/drm/amd/amdgpu/iceland_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 289 drivers/gpu/drm/amd/amdgpu/iceland_ih.c amdgpu_irq_fini(adev); adev 290 drivers/gpu/drm/amd/amdgpu/iceland_ih.c amdgpu_ih_ring_fini(adev, &adev->irq.ih); adev 291 drivers/gpu/drm/amd/amdgpu/iceland_ih.c amdgpu_irq_remove_domain(adev); adev 299 drivers/gpu/drm/amd/amdgpu/iceland_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 301 drivers/gpu/drm/amd/amdgpu/iceland_ih.c r = iceland_ih_irq_init(adev); adev 310 drivers/gpu/drm/amd/amdgpu/iceland_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 312 drivers/gpu/drm/amd/amdgpu/iceland_ih.c iceland_ih_irq_disable(adev); adev 319 drivers/gpu/drm/amd/amdgpu/iceland_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 321 drivers/gpu/drm/amd/amdgpu/iceland_ih.c return iceland_ih_hw_fini(adev); adev 326 drivers/gpu/drm/amd/amdgpu/iceland_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 328 drivers/gpu/drm/amd/amdgpu/iceland_ih.c return iceland_ih_hw_init(adev); adev 333 drivers/gpu/drm/amd/amdgpu/iceland_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 346 drivers/gpu/drm/amd/amdgpu/iceland_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 348 drivers/gpu/drm/amd/amdgpu/iceland_ih.c for (i = 0; i < adev->usec_timeout; i++) { adev 361 drivers/gpu/drm/amd/amdgpu/iceland_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 371 drivers/gpu/drm/amd/amdgpu/iceland_ih.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 423 drivers/gpu/drm/amd/amdgpu/iceland_ih.c static void iceland_ih_set_interrupt_funcs(struct amdgpu_device *adev) adev 425 drivers/gpu/drm/amd/amdgpu/iceland_ih.c adev->irq.ih_funcs = &iceland_ih_funcs; adev 46 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_dpm_set_irq_funcs(struct amdgpu_device *adev); adev 47 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_enable_nb_dpm(struct amdgpu_device *adev, adev 49 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_init_graphics_levels(struct amdgpu_device *adev); adev 50 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_calculate_ds_divider(struct amdgpu_device *adev); adev 51 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_calculate_nbps_level_settings(struct amdgpu_device *adev); adev 52 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_calculate_dpm_settings(struct amdgpu_device *adev); adev 53 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_enable_new_levels(struct amdgpu_device *adev); adev 54 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_program_nbps_index_settings(struct amdgpu_device *adev, adev 56 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_set_enabled_level(struct amdgpu_device *adev, u32 level); adev 57 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_set_enabled_levels(struct amdgpu_device *adev); adev 58 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_force_dpm_highest(struct amdgpu_device *adev); adev 59 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_force_dpm_lowest(struct amdgpu_device *adev); adev 60 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_apply_state_adjust_rules(struct amdgpu_device *adev, adev 63 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_set_thermal_temperature_range(struct amdgpu_device *adev, adev 65 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_init_fps_limits(struct amdgpu_device *adev); adev 67 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_dpm_powergate_samu(struct amdgpu_device *adev, bool gate); adev 68 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_dpm_powergate_acp(struct amdgpu_device *adev, bool gate); adev 71 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static u32 kv_convert_vid2_to_vid7(struct amdgpu_device *adev, adev 76 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; adev 93 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static u32 kv_convert_vid7_to_vid2(struct amdgpu_device *adev, adev 98 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; adev 117 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void sumo_take_smu_control(struct amdgpu_device *adev, bool enable) adev 136 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void sumo_construct_sclk_voltage_mapping_table(struct amdgpu_device *adev, adev 158 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void sumo_construct_vid_mapping_table(struct amdgpu_device *adev, adev 377 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static struct kv_power_info *kv_get_pi(struct amdgpu_device *adev) adev 379 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = adev->pm.dpm.priv; adev 385 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_program_local_cac_table(struct amdgpu_device *adev, adev 410 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_program_pt_config_registers(struct amdgpu_device *adev, adev 459 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_do_enable_didt(struct amdgpu_device *adev, bool enable) adev 461 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 501 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_enable_didt(struct amdgpu_device *adev, bool enable) adev 503 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 510 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 513 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_program_pt_config_registers(adev, didt_config_kv); adev 515 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 520 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_do_enable_didt(adev, enable); adev 522 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 529 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_initialize_hardware_cac_manager(struct amdgpu_device *adev) adev 531 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 536 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_program_local_cac_table(adev, sx_local_cac_cfg_kv, sx0_cac_config_reg); adev 540 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_program_local_cac_table(adev, mc0_local_cac_cfg_kv, mc0_cac_config_reg); adev 544 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_program_local_cac_table(adev, mc1_local_cac_cfg_kv, mc1_cac_config_reg); adev 548 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_program_local_cac_table(adev, mc2_local_cac_cfg_kv, mc2_cac_config_reg); adev 552 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_program_local_cac_table(adev, mc3_local_cac_cfg_kv, mc3_cac_config_reg); adev 556 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_program_local_cac_table(adev, cpl_local_cac_cfg_kv, cpl_cac_config_reg); adev 561 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_enable_smc_cac(struct amdgpu_device *adev, bool enable) adev 563 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 568 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_EnableCac); adev 574 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_DisableCac); adev 582 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_process_firmware_header(struct amdgpu_device *adev) adev 584 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 588 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_read_smc_sram_dword(adev, SMU7_FIRMWARE_HEADER_LOCATION + adev 595 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_read_smc_sram_dword(adev, SMU7_FIRMWARE_HEADER_LOCATION + adev 605 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_enable_dpm_voltage_scaling(struct amdgpu_device *adev) adev 607 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 612 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 621 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_set_dpm_interval(struct amdgpu_device *adev) adev 623 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 628 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 637 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_set_dpm_boot_state(struct amdgpu_device *adev) adev 639 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 642 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 651 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_program_vc(struct amdgpu_device *adev) adev 656 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_clear_vc(struct amdgpu_device *adev) adev 661 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_set_divider_value(struct amdgpu_device *adev, adev 664 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 668 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_atombios_get_clock_dividers(adev, COMPUTE_ENGINE_PLL_PARAM, adev 679 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static u16 kv_convert_8bit_index_to_voltage(struct amdgpu_device *adev, adev 685 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static u16 kv_convert_2bit_index_to_voltage(struct amdgpu_device *adev, adev 688 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 689 drivers/gpu/drm/amd/amdgpu/kv_dpm.c u32 vid_8bit = kv_convert_vid2_to_vid7(adev, adev 693 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return kv_convert_8bit_index_to_voltage(adev, (u16)vid_8bit); adev 697 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_set_vid(struct amdgpu_device *adev, u32 index, u32 vid) adev 699 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 703 drivers/gpu/drm/amd/amdgpu/kv_dpm.c cpu_to_be32(kv_convert_2bit_index_to_voltage(adev, vid)); adev 708 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_set_at(struct amdgpu_device *adev, u32 index, u32 at) adev 710 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 717 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_dpm_power_level_enable(struct amdgpu_device *adev, adev 720 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 725 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_start_dpm(struct amdgpu_device *adev) adev 732 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_smc_dpm_enable(adev, true); adev 735 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_stop_dpm(struct amdgpu_device *adev) adev 737 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_smc_dpm_enable(adev, false); adev 740 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_start_am(struct amdgpu_device *adev) adev 751 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_reset_am(struct amdgpu_device *adev) adev 761 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_freeze_sclk_dpm(struct amdgpu_device *adev, bool freeze) adev 763 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return amdgpu_kv_notify_message_to_smu(adev, freeze ? adev 767 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_force_lowest_valid(struct amdgpu_device *adev) adev 769 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return kv_force_dpm_lowest(adev); adev 772 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_unforce_levels(struct amdgpu_device *adev) adev 774 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) adev 775 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_NoForcedLevel); adev 777 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return kv_set_enabled_levels(adev); adev 780 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_update_sclk_t(struct amdgpu_device *adev) adev 782 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 789 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 798 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_program_bootup_state(struct amdgpu_device *adev) adev 800 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 803 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; adev 812 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_power_level_enable(adev, i, true); adev 826 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_power_level_enable(adev, i, true); adev 831 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_enable_auto_thermal_throttling(struct amdgpu_device *adev) adev 833 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 838 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 847 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_upload_dpm_settings(struct amdgpu_device *adev) adev 849 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 852 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 862 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 876 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static u32 kv_get_clk_bypass(struct amdgpu_device *adev, u32 clk) adev 878 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 901 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_populate_uvd_table(struct amdgpu_device *adev) adev 903 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 905 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; adev 924 drivers/gpu/drm/amd/amdgpu/kv_dpm.c (u8)kv_get_clk_bypass(adev, table->entries[i].vclk); adev 926 drivers/gpu/drm/amd/amdgpu/kv_dpm.c (u8)kv_get_clk_bypass(adev, table->entries[i].dclk); adev 928 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_atombios_get_clock_dividers(adev, COMPUTE_ENGINE_PLL_PARAM, adev 934 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_atombios_get_clock_dividers(adev, COMPUTE_ENGINE_PLL_PARAM, adev 943 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 953 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 961 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 972 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_populate_vce_table(struct amdgpu_device *adev) adev 974 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 978 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; adev 994 drivers/gpu/drm/amd/amdgpu/kv_dpm.c (u8)kv_get_clk_bypass(adev, table->entries[i].evclk); adev 996 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_atombios_get_clock_dividers(adev, COMPUTE_ENGINE_PLL_PARAM, adev 1005 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1016 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1025 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1035 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_populate_samu_table(struct amdgpu_device *adev) adev 1037 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1039 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; adev 1057 drivers/gpu/drm/amd/amdgpu/kv_dpm.c (u8)kv_get_clk_bypass(adev, table->entries[i].clk); adev 1059 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_atombios_get_clock_dividers(adev, COMPUTE_ENGINE_PLL_PARAM, adev 1068 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1079 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1088 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1101 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_populate_acp_table(struct amdgpu_device *adev) adev 1103 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1105 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; adev 1118 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_atombios_get_clock_dividers(adev, COMPUTE_ENGINE_PLL_PARAM, adev 1127 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1138 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1147 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1159 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_calculate_dfs_bypass_settings(struct amdgpu_device *adev) adev 1161 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1164 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; adev 1209 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_enable_ulv(struct amdgpu_device *adev, bool enable) adev 1211 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return amdgpu_kv_notify_message_to_smu(adev, enable ? adev 1215 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_reset_acp_boot_level(struct amdgpu_device *adev) adev 1217 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1222 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_update_current_ps(struct amdgpu_device *adev, adev 1226 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1231 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.current_ps = &pi->current_rps; adev 1234 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_update_requested_ps(struct amdgpu_device *adev, adev 1238 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1243 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.requested_ps = &pi->requested_rps; adev 1248 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1249 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1253 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_smc_bapm_enable(adev, enable); adev 1259 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_dpm_enable(struct amdgpu_device *adev) adev 1261 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1264 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_process_firmware_header(adev); adev 1269 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_init_fps_limits(adev); adev 1270 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_init_graphics_levels(adev); adev 1271 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_program_bootup_state(adev); adev 1276 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_calculate_dfs_bypass_settings(adev); adev 1277 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_upload_dpm_settings(adev); adev 1282 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_populate_uvd_table(adev); adev 1287 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_populate_vce_table(adev); adev 1292 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_populate_samu_table(adev); adev 1297 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_populate_acp_table(adev); adev 1302 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_program_vc(adev); adev 1304 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_initialize_hardware_cac_manager(adev); adev 1306 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_start_am(adev); adev 1308 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_enable_auto_thermal_throttling(adev); adev 1314 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_enable_dpm_voltage_scaling(adev); adev 1319 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_set_dpm_interval(adev); adev 1324 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_set_dpm_boot_state(adev); adev 1329 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_enable_ulv(adev, true); adev 1334 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_start_dpm(adev); adev 1335 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_enable_didt(adev, true); adev 1340 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_enable_smc_cac(adev, true); adev 1346 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_reset_acp_boot_level(adev); adev 1348 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_smc_bapm_enable(adev, false); adev 1354 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->irq.installed && adev 1355 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_is_internal_thermal_sensor(adev->pm.int_thermal_type)) { adev 1356 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_set_thermal_temperature_range(adev, KV_TEMP_RANGE_MIN, KV_TEMP_RANGE_MAX); adev 1361 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_irq_get(adev, &adev->pm.dpm.thermal.irq, adev 1363 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_irq_get(adev, &adev->pm.dpm.thermal.irq, adev 1370 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_dpm_disable(struct amdgpu_device *adev) adev 1372 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1374 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq, adev 1376 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq, adev 1379 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_smc_bapm_enable(adev, false); adev 1381 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->asic_type == CHIP_MULLINS) adev 1382 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_enable_nb_dpm(adev, false); adev 1385 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_powergate_acp(adev, false); adev 1386 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_powergate_samu(adev, false); adev 1388 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerON); adev 1390 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_UVDPowerON); adev 1392 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_enable_smc_cac(adev, false); adev 1393 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_enable_didt(adev, false); adev 1394 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_clear_vc(adev); adev 1395 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_stop_dpm(adev); adev 1396 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_enable_ulv(adev, false); adev 1397 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_reset_am(adev); adev 1399 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_update_current_ps(adev, adev->pm.dpm.boot_ps); adev 1403 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_write_smc_soft_register(struct amdgpu_device *adev, adev 1406 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1408 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return amdgpu_kv_copy_bytes_to_smc(adev, pi->soft_regs_start + reg_offset, adev 1412 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_read_smc_soft_register(struct amdgpu_device *adev, adev 1415 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1417 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return amdgpu_kv_read_smc_sram_dword(adev, pi->soft_regs_start + reg_offset, adev 1422 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_init_sclk_t(struct amdgpu_device *adev) adev 1424 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1429 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_init_fps_limits(struct amdgpu_device *adev) adev 1431 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1439 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1448 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1458 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_init_powergate_state(struct amdgpu_device *adev) adev 1460 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1469 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_enable_uvd_dpm(struct amdgpu_device *adev, bool enable) adev 1471 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return amdgpu_kv_notify_message_to_smu(adev, enable ? adev 1475 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_enable_vce_dpm(struct amdgpu_device *adev, bool enable) adev 1477 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return amdgpu_kv_notify_message_to_smu(adev, enable ? adev 1481 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_enable_samu_dpm(struct amdgpu_device *adev, bool enable) adev 1483 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return amdgpu_kv_notify_message_to_smu(adev, enable ? adev 1487 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_enable_acp_dpm(struct amdgpu_device *adev, bool enable) adev 1489 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return amdgpu_kv_notify_message_to_smu(adev, enable ? adev 1493 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_update_uvd_dpm(struct amdgpu_device *adev, bool gate) adev 1495 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1497 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; adev 1513 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1521 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_send_msg_to_smc_with_parameter(adev, adev 1526 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return kv_enable_uvd_dpm(adev, !gate); adev 1529 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static u8 kv_get_vce_boot_level(struct amdgpu_device *adev, u32 evclk) adev 1533 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; adev 1543 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_update_vce_dpm(struct amdgpu_device *adev, adev 1547 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1549 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; adev 1556 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->vce_boot_level = kv_get_vce_boot_level(adev, amdgpu_new_state->evclk); adev 1558 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1568 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_send_msg_to_smc_with_parameter(adev, adev 1571 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_enable_vce_dpm(adev, true); adev 1573 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_enable_vce_dpm(adev, false); adev 1579 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_update_samu_dpm(struct amdgpu_device *adev, bool gate) adev 1581 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1583 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; adev 1592 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1602 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_send_msg_to_smc_with_parameter(adev, adev 1607 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return kv_enable_samu_dpm(adev, !gate); adev 1610 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static u8 kv_get_acp_boot_level(struct amdgpu_device *adev) adev 1614 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; adev 1627 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_update_acp_boot_level(struct amdgpu_device *adev) adev 1629 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1633 drivers/gpu/drm/amd/amdgpu/kv_dpm.c acp_boot_level = kv_get_acp_boot_level(adev); adev 1636 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_send_msg_to_smc_with_parameter(adev, adev 1643 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_update_acp_dpm(struct amdgpu_device *adev, bool gate) adev 1645 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1647 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; adev 1654 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->acp_boot_level = kv_get_acp_boot_level(adev); adev 1656 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1666 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_send_msg_to_smc_with_parameter(adev, adev 1671 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return kv_enable_acp_dpm(adev, !gate); adev 1676 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1677 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1684 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD, adev 1686 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_update_uvd_dpm(adev, gate); adev 1689 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_UVDPowerOFF); adev 1693 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_UVDPowerON); adev 1695 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_update_uvd_dpm(adev, gate); adev 1697 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD, adev 1704 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1705 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1712 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE, adev 1714 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_enable_vce_dpm(adev, false); adev 1716 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerOFF); adev 1719 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerON); adev 1720 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_enable_vce_dpm(adev, true); adev 1722 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE, adev 1728 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_dpm_powergate_samu(struct amdgpu_device *adev, bool gate) adev 1730 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1738 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_update_samu_dpm(adev, true); adev 1740 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_SAMPowerOFF); adev 1743 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_SAMPowerON); adev 1744 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_update_samu_dpm(adev, false); adev 1748 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_dpm_powergate_acp(struct amdgpu_device *adev, bool gate) adev 1750 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1755 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) adev 1761 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_update_acp_dpm(adev, true); adev 1763 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_ACPPowerOFF); adev 1766 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_ACPPowerON); adev 1767 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_update_acp_dpm(adev, false); adev 1771 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_set_valid_clock_range(struct amdgpu_device *adev, adev 1775 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1778 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; adev 1833 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_update_dfs_bypass_settings(struct amdgpu_device *adev, adev 1837 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1844 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_copy_bytes_to_smc(adev, adev 1856 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_enable_nb_dpm(struct amdgpu_device *adev, adev 1859 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1864 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_NBDPM_Enable); adev 1870 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_NBDPM_Disable); adev 1883 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1886 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_force_dpm_highest(adev); adev 1890 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_force_dpm_lowest(adev); adev 1894 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_unforce_levels(adev); adev 1899 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.forced_level = level; adev 1906 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1907 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1908 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_ps requested_ps = *adev->pm.dpm.requested_ps; adev 1911 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_update_requested_ps(adev, new_ps); adev 1913 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_apply_state_adjust_rules(adev, adev 1922 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1923 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 1929 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_smc_bapm_enable(adev, adev->pm.ac_power); adev 1936 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) { adev 1938 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_set_valid_clock_range(adev, new_ps); adev 1939 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_update_dfs_bypass_settings(adev, new_ps); adev 1940 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_calculate_ds_divider(adev); adev 1945 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_calculate_nbps_level_settings(adev); adev 1946 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_calculate_dpm_settings(adev); adev 1947 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_force_lowest_valid(adev); adev 1948 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_enable_new_levels(adev); adev 1949 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_upload_dpm_settings(adev); adev 1950 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_program_nbps_index_settings(adev, new_ps); adev 1951 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_unforce_levels(adev); adev 1952 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_set_enabled_levels(adev); adev 1953 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_force_lowest_valid(adev); adev 1954 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_unforce_levels(adev); adev 1956 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_update_vce_dpm(adev, new_ps, old_ps); adev 1961 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_update_sclk_t(adev); adev 1962 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->asic_type == CHIP_MULLINS) adev 1963 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_enable_nb_dpm(adev, true); adev 1967 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_set_valid_clock_range(adev, new_ps); adev 1968 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_update_dfs_bypass_settings(adev, new_ps); adev 1969 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_calculate_ds_divider(adev); adev 1974 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_calculate_nbps_level_settings(adev); adev 1975 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_calculate_dpm_settings(adev); adev 1976 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_freeze_sclk_dpm(adev, true); adev 1977 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_upload_dpm_settings(adev); adev 1978 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_program_nbps_index_settings(adev, new_ps); adev 1979 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_freeze_sclk_dpm(adev, false); adev 1980 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_set_enabled_levels(adev); adev 1981 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_update_vce_dpm(adev, new_ps, old_ps); adev 1986 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_update_acp_boot_level(adev); adev 1987 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_update_sclk_t(adev); adev 1988 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_enable_nb_dpm(adev, true); adev 1997 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1998 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2001 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_update_current_ps(adev, new_ps); adev 2004 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_dpm_setup_asic(struct amdgpu_device *adev) adev 2006 drivers/gpu/drm/amd/amdgpu/kv_dpm.c sumo_take_smu_control(adev, true); adev 2007 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_init_powergate_state(adev); adev 2008 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_init_sclk_t(adev); adev 2012 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_dpm_reset_asic(struct amdgpu_device *adev) adev 2014 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2016 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) { adev 2017 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_force_lowest_valid(adev); adev 2018 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_init_graphics_levels(adev); adev 2019 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_program_bootup_state(adev); adev 2020 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_upload_dpm_settings(adev); adev 2021 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_force_lowest_valid(adev); adev 2022 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_unforce_levels(adev); adev 2024 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_init_graphics_levels(adev); adev 2025 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_program_bootup_state(adev); adev 2026 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_freeze_sclk_dpm(adev, true); adev 2027 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_upload_dpm_settings(adev); adev 2028 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_freeze_sclk_dpm(adev, false); adev 2029 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_set_enabled_level(adev, pi->graphics_boot_level); adev 2034 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_construct_max_power_limits_table(struct amdgpu_device *adev, adev 2037 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2044 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_convert_2bit_index_to_voltage(adev, adev 2051 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_patch_voltage_values(struct amdgpu_device *adev) adev 2055 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; adev 2057 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; adev 2059 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; adev 2061 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; adev 2066 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_convert_8bit_index_to_voltage(adev, adev 2073 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_convert_8bit_index_to_voltage(adev, adev 2080 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_convert_8bit_index_to_voltage(adev, adev 2087 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_convert_8bit_index_to_voltage(adev, adev 2093 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_construct_boot_state(struct amdgpu_device *adev) adev 2095 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2107 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_force_dpm_highest(struct amdgpu_device *adev) adev 2112 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_dpm_get_enable_mask(adev, &enable_mask); adev 2121 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) adev 2122 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return amdgpu_kv_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_DPM_ForceState, i); adev 2124 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return kv_set_enabled_level(adev, i); adev 2127 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_force_dpm_lowest(struct amdgpu_device *adev) adev 2132 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_kv_dpm_get_enable_mask(adev, &enable_mask); adev 2141 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) adev 2142 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return amdgpu_kv_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_DPM_ForceState, i); adev 2144 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return kv_set_enabled_level(adev, i); adev 2147 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static u8 kv_get_sleep_divider_id_from_clock(struct amdgpu_device *adev, adev 2150 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2170 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_get_high_voltage_limit(struct amdgpu_device *adev, int *limit) adev 2172 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2174 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; adev 2180 drivers/gpu/drm/amd/amdgpu/kv_dpm.c (kv_convert_8bit_index_to_voltage(adev, table->entries[i].v) <= adev 2192 drivers/gpu/drm/amd/amdgpu/kv_dpm.c (kv_convert_2bit_index_to_voltage(adev, table->entries[i].vid_2bit) <= adev 2204 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_apply_state_adjust_rules(struct amdgpu_device *adev, adev 2209 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2215 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; adev 2218 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; adev 2221 drivers/gpu/drm/amd/amdgpu/kv_dpm.c new_rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; adev 2222 drivers/gpu/drm/amd/amdgpu/kv_dpm.c new_rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; adev 2248 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk) adev 2249 drivers/gpu/drm/amd/amdgpu/kv_dpm.c sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk; adev 2263 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_convert_8bit_index_to_voltage(adev, ps->levels[i].vddc_index))) { adev 2264 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_get_high_voltage_limit(adev, &limit); adev 2275 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_convert_8bit_index_to_voltage(adev, ps->levels[i].vddc_index))) { adev 2276 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_get_high_voltage_limit(adev, &limit); adev 2297 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) { adev 2310 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->video_start || (adev->pm.dpm.new_active_crtc_count >= 3) || adev 2320 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_dpm_power_level_enabled_for_throttle(struct amdgpu_device *adev, adev 2323 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2328 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_calculate_ds_divider(struct amdgpu_device *adev) adev 2330 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2339 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_get_sleep_divider_id_from_clock(adev, adev 2346 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_calculate_nbps_level_settings(struct amdgpu_device *adev) adev 2348 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2352 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; adev 2358 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) { adev 2369 drivers/gpu/drm/amd/amdgpu/kv_dpm.c (adev->pm.dpm.new_active_crtc_count >= 3) || pi->video_start); adev 2400 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_calculate_dpm_settings(struct amdgpu_device *adev) adev 2402 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2414 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_init_graphics_levels(struct amdgpu_device *adev) adev 2416 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2419 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; adev 2428 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_convert_8bit_index_to_voltage(adev, table->entries[i].v))) adev 2431 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_set_divider_value(adev, i, table->entries[i].clk); adev 2432 drivers/gpu/drm/amd/amdgpu/kv_dpm.c vid_2bit = kv_convert_vid7_to_vid2(adev, adev 2435 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_set_vid(adev, i, vid_2bit); adev 2436 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_set_at(adev, i, pi->at[i]); adev 2437 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_power_level_enabled_for_throttle(adev, i, true); adev 2448 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_convert_2bit_index_to_voltage(adev, table->entries[i].vid_2bit)) adev 2451 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_set_divider_value(adev, i, table->entries[i].sclk_frequency); adev 2452 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_set_vid(adev, i, table->entries[i].vid_2bit); adev 2453 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_set_at(adev, i, pi->at[i]); adev 2454 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_power_level_enabled_for_throttle(adev, i, true); adev 2460 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_power_level_enable(adev, i, false); adev 2463 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_enable_new_levels(struct amdgpu_device *adev) adev 2465 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2470 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_power_level_enable(adev, i, true); adev 2474 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_set_enabled_level(struct amdgpu_device *adev, u32 level) adev 2478 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return amdgpu_kv_send_msg_to_smc_with_parameter(adev, adev 2483 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_set_enabled_levels(struct amdgpu_device *adev) adev 2485 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2491 drivers/gpu/drm/amd/amdgpu/kv_dpm.c return amdgpu_kv_send_msg_to_smc_with_parameter(adev, adev 2496 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_program_nbps_index_settings(struct amdgpu_device *adev, adev 2500 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2503 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) adev 2520 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_set_thermal_temperature_range(struct amdgpu_device *adev, adev 2543 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.thermal.min_temp = low_temp; adev 2544 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.thermal.max_temp = high_temp; adev 2558 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_parse_sys_info_table(struct amdgpu_device *adev) adev 2560 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2561 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 2608 drivers/gpu/drm/amd/amdgpu/kv_dpm.c sumo_construct_sclk_voltage_mapping_table(adev, adev 2612 drivers/gpu/drm/amd/amdgpu/kv_dpm.c sumo_construct_vid_mapping_table(adev, adev 2616 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_construct_max_power_limits_table(adev, adev 2617 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac); adev 2643 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_patch_boot_state(struct amdgpu_device *adev, adev 2646 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2652 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_parse_pplib_non_clock_info(struct amdgpu_device *adev, adev 2672 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.boot_ps = rps; adev 2673 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_patch_boot_state(adev, ps); adev 2676 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.uvd_ps = rps; adev 2679 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_parse_pplib_clock_info(struct amdgpu_device *adev, adev 2683 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2701 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_parse_power_table(struct amdgpu_device *adev) adev 2703 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 2723 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_add_thermal_controller(adev); adev 2735 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, adev 2738 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (!adev->pm.dpm.ps) adev 2749 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kfree(adev->pm.dpm.ps); adev 2752 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.ps[i].ps_priv = ps; adev 2764 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_parse_pplib_clock_info(adev, adev 2765 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.ps[i], k, adev 2769 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_parse_pplib_non_clock_info(adev, &adev->pm.dpm.ps[i], adev 2774 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.num_ps = state_array->ucNumEntries; adev 2777 drivers/gpu/drm/amd/amdgpu/kv_dpm.c for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) { adev 2779 drivers/gpu/drm/amd/amdgpu/kv_dpm.c clock_array_index = adev->pm.dpm.vce_states[i].clk_idx; adev 2784 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.vce_states[i].sclk = sclk; adev 2785 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.vce_states[i].mclk = 0; adev 2791 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_dpm_init(struct amdgpu_device *adev) adev 2799 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.priv = pi; adev 2801 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_get_platform_caps(adev); adev 2805 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_parse_extended_power_table(adev); adev 2826 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->pm.pp_feature & PP_SCLK_DEEP_SLEEP_MASK) adev 2840 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->caps_uvd_pg = (adev->pg_flags & AMD_PG_SUPPORT_UVD) ? true : false; adev 2842 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->caps_vce_pg = (adev->pg_flags & AMD_PG_SUPPORT_VCE) ? true : false; adev 2843 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->caps_samu_pg = (adev->pg_flags & AMD_PG_SUPPORT_SAMU) ? true : false; adev 2844 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->caps_acp_pg = (adev->pg_flags & AMD_PG_SUPPORT_ACP) ? true : false; adev 2847 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_parse_sys_info_table(adev); adev 2851 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_patch_voltage_values(adev); adev 2852 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_construct_boot_state(adev); adev 2854 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_parse_power_table(adev); adev 2867 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2868 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2883 drivers/gpu/drm/amd/amdgpu/kv_dpm.c vddc = kv_convert_8bit_index_to_voltage(adev, (u16)tmp); adev 2897 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2906 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_convert_8bit_index_to_voltage(adev, pl->vddc_index)); adev 2908 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_dpm_print_ps_status(adev, rps); adev 2911 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_dpm_fini(struct amdgpu_device *adev) adev 2915 drivers/gpu/drm/amd/amdgpu/kv_dpm.c for (i = 0; i < adev->pm.dpm.num_ps; i++) { adev 2916 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kfree(adev->pm.dpm.ps[i].ps_priv); adev 2918 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kfree(adev->pm.dpm.ps); adev 2919 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kfree(adev->pm.dpm.priv); adev 2920 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_free_extended_power_table(adev); adev 2930 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2931 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2942 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2943 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 2953 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2969 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2971 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->powerplay.pp_funcs = &kv_dpm_funcs; adev 2972 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->powerplay.pp_handle = adev; adev 2973 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_set_irq_funcs(adev); adev 2981 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2983 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (!adev->pm.dpm_enabled) adev 2986 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_powergate_acp(adev, true); adev 2987 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_powergate_samu(adev, true); adev 2995 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2997 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 230, adev 2998 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.thermal.irq); adev 3002 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 231, adev 3003 drivers/gpu/drm/amd/amdgpu/kv_dpm.c &adev->pm.dpm.thermal.irq); adev 3008 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; adev 3009 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; adev 3010 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.forced_level = AMD_DPM_FORCED_LEVEL_AUTO; adev 3011 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.default_sclk = adev->clock.default_sclk; adev 3012 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.default_mclk = adev->clock.default_mclk; adev 3013 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.current_sclk = adev->clock.default_sclk; adev 3014 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.current_mclk = adev->clock.default_mclk; adev 3015 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.int_thermal_type = THERMAL_TYPE_NONE; adev 3020 drivers/gpu/drm/amd/amdgpu/kv_dpm.c INIT_WORK(&adev->pm.dpm.thermal.work, amdgpu_dpm_thermal_work_handler); adev 3021 drivers/gpu/drm/amd/amdgpu/kv_dpm.c mutex_lock(&adev->pm.mutex); adev 3022 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_dpm_init(adev); adev 3025 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps = adev->pm.dpm.boot_ps; adev 3027 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_pm_print_power_states(adev); adev 3028 drivers/gpu/drm/amd/amdgpu/kv_dpm.c mutex_unlock(&adev->pm.mutex); adev 3034 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_fini(adev); adev 3035 drivers/gpu/drm/amd/amdgpu/kv_dpm.c mutex_unlock(&adev->pm.mutex); adev 3042 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3044 drivers/gpu/drm/amd/amdgpu/kv_dpm.c flush_work(&adev->pm.dpm.thermal.work); adev 3046 drivers/gpu/drm/amd/amdgpu/kv_dpm.c mutex_lock(&adev->pm.mutex); adev 3047 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_fini(adev); adev 3048 drivers/gpu/drm/amd/amdgpu/kv_dpm.c mutex_unlock(&adev->pm.mutex); adev 3056 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3061 drivers/gpu/drm/amd/amdgpu/kv_dpm.c mutex_lock(&adev->pm.mutex); adev 3062 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_setup_asic(adev); adev 3063 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_dpm_enable(adev); adev 3065 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm_enabled = false; adev 3067 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm_enabled = true; adev 3068 drivers/gpu/drm/amd/amdgpu/kv_dpm.c mutex_unlock(&adev->pm.mutex); adev 3069 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_pm_compute_clocks(adev); adev 3075 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3077 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->pm.dpm_enabled) { adev 3078 drivers/gpu/drm/amd/amdgpu/kv_dpm.c mutex_lock(&adev->pm.mutex); adev 3079 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_disable(adev); adev 3080 drivers/gpu/drm/amd/amdgpu/kv_dpm.c mutex_unlock(&adev->pm.mutex); adev 3088 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3090 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->pm.dpm_enabled) { adev 3091 drivers/gpu/drm/amd/amdgpu/kv_dpm.c mutex_lock(&adev->pm.mutex); adev 3093 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_disable(adev); adev 3095 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps = adev->pm.dpm.boot_ps; adev 3096 drivers/gpu/drm/amd/amdgpu/kv_dpm.c mutex_unlock(&adev->pm.mutex); adev 3104 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3106 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->pm.dpm_enabled) { adev 3108 drivers/gpu/drm/amd/amdgpu/kv_dpm.c mutex_lock(&adev->pm.mutex); adev 3109 drivers/gpu/drm/amd/amdgpu/kv_dpm.c kv_dpm_setup_asic(adev); adev 3110 drivers/gpu/drm/amd/amdgpu/kv_dpm.c ret = kv_dpm_enable(adev); adev 3112 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm_enabled = false; adev 3114 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm_enabled = true; adev 3115 drivers/gpu/drm/amd/amdgpu/kv_dpm.c mutex_unlock(&adev->pm.mutex); adev 3116 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev->pm.dpm_enabled) adev 3117 drivers/gpu/drm/amd/amdgpu/kv_dpm.c amdgpu_pm_compute_clocks(adev); adev 3138 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_dpm_set_interrupt_state(struct amdgpu_device *adev, adev 3186 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static int kv_dpm_process_interrupt(struct amdgpu_device *adev, adev 3198 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.thermal.high_to_low = false; adev 3203 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.thermal.high_to_low = true; adev 3211 drivers/gpu/drm/amd/amdgpu/kv_dpm.c schedule_work(&adev->pm.dpm.thermal.work); adev 3247 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3249 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (adev == NULL || cps == NULL || rps == NULL || equal == NULL) adev 3283 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3284 drivers/gpu/drm/amd/amdgpu/kv_dpm.c struct kv_power_info *pi = kv_get_pi(adev); adev 3306 drivers/gpu/drm/amd/amdgpu/kv_dpm.c *((uint32_t *)value) = kv_dpm_get_temp(adev); adev 3378 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static void kv_dpm_set_irq_funcs(struct amdgpu_device *adev) adev 3380 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.thermal.irq.num_types = AMDGPU_THERMAL_IRQ_LAST; adev 3381 drivers/gpu/drm/amd/amdgpu/kv_dpm.c adev->pm.dpm.thermal.irq.funcs = &kv_dpm_irq_funcs; adev 217 drivers/gpu/drm/amd/amdgpu/kv_dpm.h int amdgpu_kv_notify_message_to_smu(struct amdgpu_device *adev, u32 id); adev 218 drivers/gpu/drm/amd/amdgpu/kv_dpm.h int amdgpu_kv_dpm_get_enable_mask(struct amdgpu_device *adev, u32 *enable_mask); adev 219 drivers/gpu/drm/amd/amdgpu/kv_dpm.h int amdgpu_kv_send_msg_to_smc_with_parameter(struct amdgpu_device *adev, adev 221 drivers/gpu/drm/amd/amdgpu/kv_dpm.h int amdgpu_kv_read_smc_sram_dword(struct amdgpu_device *adev, u32 smc_address, adev 223 drivers/gpu/drm/amd/amdgpu/kv_dpm.h int amdgpu_kv_smc_dpm_enable(struct amdgpu_device *adev, bool enable); adev 224 drivers/gpu/drm/amd/amdgpu/kv_dpm.h int amdgpu_kv_smc_bapm_enable(struct amdgpu_device *adev, bool enable); adev 225 drivers/gpu/drm/amd/amdgpu/kv_dpm.h int amdgpu_kv_copy_bytes_to_smc(struct amdgpu_device *adev, adev 32 drivers/gpu/drm/amd/amdgpu/kv_smc.c int amdgpu_kv_notify_message_to_smu(struct amdgpu_device *adev, u32 id) adev 39 drivers/gpu/drm/amd/amdgpu/kv_smc.c for (i = 0; i < adev->usec_timeout; i++) { adev 56 drivers/gpu/drm/amd/amdgpu/kv_smc.c int amdgpu_kv_dpm_get_enable_mask(struct amdgpu_device *adev, u32 *enable_mask) adev 60 drivers/gpu/drm/amd/amdgpu/kv_smc.c ret = amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_SCLKDPM_GetEnabledMask); adev 68 drivers/gpu/drm/amd/amdgpu/kv_smc.c int amdgpu_kv_send_msg_to_smc_with_parameter(struct amdgpu_device *adev, adev 74 drivers/gpu/drm/amd/amdgpu/kv_smc.c return amdgpu_kv_notify_message_to_smu(adev, msg); adev 77 drivers/gpu/drm/amd/amdgpu/kv_smc.c static int kv_set_smc_sram_address(struct amdgpu_device *adev, adev 92 drivers/gpu/drm/amd/amdgpu/kv_smc.c int amdgpu_kv_read_smc_sram_dword(struct amdgpu_device *adev, u32 smc_address, adev 97 drivers/gpu/drm/amd/amdgpu/kv_smc.c ret = kv_set_smc_sram_address(adev, smc_address, limit); adev 105 drivers/gpu/drm/amd/amdgpu/kv_smc.c int amdgpu_kv_smc_dpm_enable(struct amdgpu_device *adev, bool enable) adev 108 drivers/gpu/drm/amd/amdgpu/kv_smc.c return amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_DPM_Enable); adev 110 drivers/gpu/drm/amd/amdgpu/kv_smc.c return amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_DPM_Disable); adev 113 drivers/gpu/drm/amd/amdgpu/kv_smc.c int amdgpu_kv_smc_bapm_enable(struct amdgpu_device *adev, bool enable) adev 116 drivers/gpu/drm/amd/amdgpu/kv_smc.c return amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_EnableBAPM); adev 118 drivers/gpu/drm/amd/amdgpu/kv_smc.c return amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_DisableBAPM); adev 121 drivers/gpu/drm/amd/amdgpu/kv_smc.c int amdgpu_kv_copy_bytes_to_smc(struct amdgpu_device *adev, adev 138 drivers/gpu/drm/amd/amdgpu/kv_smc.c ret = kv_set_smc_sram_address(adev, addr, limit); adev 164 drivers/gpu/drm/amd/amdgpu/kv_smc.c ret = kv_set_smc_sram_address(adev, addr, limit); adev 177 drivers/gpu/drm/amd/amdgpu/kv_smc.c ret = kv_set_smc_sram_address(adev, addr, limit); adev 192 drivers/gpu/drm/amd/amdgpu/kv_smc.c ret = kv_set_smc_sram_address(adev, addr, limit); adev 210 drivers/gpu/drm/amd/amdgpu/kv_smc.c ret = kv_set_smc_sram_address(adev, addr, limit); adev 65 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c static int mes_v10_1_init_microcode(struct amdgpu_device *adev) adev 72 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c switch (adev->asic_type) { adev 81 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c err = request_firmware(&adev->mes.fw, fw_name, adev->dev); adev 85 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c err = amdgpu_ucode_validate(adev->mes.fw); adev 87 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c release_firmware(adev->mes.fw); adev 88 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c adev->mes.fw = NULL; adev 92 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c mes_hdr = (const struct mes_firmware_header_v1_0 *)adev->mes.fw->data; adev 93 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c adev->mes.ucode_fw_version = le32_to_cpu(mes_hdr->mes_ucode_version); adev 94 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c adev->mes.ucode_fw_version = adev 96 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c adev->mes.uc_start_addr = adev 99 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c adev->mes.data_start_addr = adev 106 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c static void mes_v10_1_free_microcode(struct amdgpu_device *adev) adev 108 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c release_firmware(adev->mes.fw); adev 109 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c adev->mes.fw = NULL; adev 112 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c static int mes_v10_1_allocate_ucode_buffer(struct amdgpu_device *adev) adev 120 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c adev->mes.fw->data; adev 122 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c fw_data = (const __le32 *)(adev->mes.fw->data + adev 126 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c r = amdgpu_bo_create_reserved(adev, fw_size, adev 128 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c &adev->mes.ucode_fw_obj, adev 129 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c &adev->mes.ucode_fw_gpu_addr, adev 130 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c (void **)&adev->mes.ucode_fw_ptr); adev 132 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c dev_err(adev->dev, "(%d) failed to create mes fw bo\n", r); adev 136 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c memcpy(adev->mes.ucode_fw_ptr, fw_data, fw_size); adev 138 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c amdgpu_bo_kunmap(adev->mes.ucode_fw_obj); adev 139 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c amdgpu_bo_unreserve(adev->mes.ucode_fw_obj); adev 144 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c static int mes_v10_1_allocate_ucode_data_buffer(struct amdgpu_device *adev) adev 152 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c adev->mes.fw->data; adev 154 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c fw_data = (const __le32 *)(adev->mes.fw->data + adev 158 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c r = amdgpu_bo_create_reserved(adev, fw_size, adev 160 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c &adev->mes.data_fw_obj, adev 161 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c &adev->mes.data_fw_gpu_addr, adev 162 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c (void **)&adev->mes.data_fw_ptr); adev 164 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c dev_err(adev->dev, "(%d) failed to create mes data fw bo\n", r); adev 168 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c memcpy(adev->mes.data_fw_ptr, fw_data, fw_size); adev 170 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c amdgpu_bo_kunmap(adev->mes.data_fw_obj); adev 171 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c amdgpu_bo_unreserve(adev->mes.data_fw_obj); adev 176 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c static void mes_v10_1_free_ucode_buffers(struct amdgpu_device *adev) adev 178 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c amdgpu_bo_free_kernel(&adev->mes.data_fw_obj, adev 179 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c &adev->mes.data_fw_gpu_addr, adev 180 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c (void **)&adev->mes.data_fw_ptr); adev 182 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c amdgpu_bo_free_kernel(&adev->mes.ucode_fw_obj, adev 183 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c &adev->mes.ucode_fw_gpu_addr, adev 184 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c (void **)&adev->mes.ucode_fw_ptr); adev 187 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c static void mes_v10_1_enable(struct amdgpu_device *adev, bool enable) adev 198 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c (uint32_t)(adev->mes.uc_start_addr) >> 2); adev 221 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c static int mes_v10_1_load_microcode(struct amdgpu_device *adev) adev 226 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c if (!adev->mes.fw) adev 229 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c r = mes_v10_1_allocate_ucode_buffer(adev); adev 233 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c r = mes_v10_1_allocate_ucode_data_buffer(adev); adev 235 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c mes_v10_1_free_ucode_buffers(adev); adev 239 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c mes_v10_1_enable(adev, false); adev 243 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c mutex_lock(&adev->srbm_mutex); adev 245 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c nv_grbm_select(adev, 3, 0, 0, 0); adev 249 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c (uint32_t)(adev->mes.uc_start_addr) >> 2); adev 253 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c lower_32_bits(adev->mes.ucode_fw_gpu_addr)); adev 255 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c upper_32_bits(adev->mes.ucode_fw_gpu_addr)); adev 262 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c lower_32_bits(adev->mes.data_fw_gpu_addr)); adev 264 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c upper_32_bits(adev->mes.data_fw_gpu_addr)); adev 280 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c nv_grbm_select(adev, 0, 0, 0, 0); adev 281 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c mutex_unlock(&adev->srbm_mutex); adev 289 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 291 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c r = mes_v10_1_init_microcode(adev); adev 300 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 302 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c mes_v10_1_free_microcode(adev); adev 310 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 312 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) { adev 313 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c r = mes_v10_1_load_microcode(adev); adev 323 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c mes_v10_1_enable(adev, true); adev 330 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 332 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c mes_v10_1_enable(adev, false); adev 334 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) adev 335 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c mes_v10_1_free_ucode_buffers(adev); adev 41 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c u64 mmhub_v1_0_get_fb_location(struct amdgpu_device *adev) adev 52 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c adev->gmc.fb_start = base; adev 53 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c adev->gmc.fb_end = top; adev 58 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c void mmhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid, adev 72 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c static void mmhub_v1_0_init_gart_aperture_regs(struct amdgpu_device *adev) adev 74 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); adev 76 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c mmhub_v1_0_setup_vm_pt_regs(adev, 0, pt_base); adev 79 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c (u32)(adev->gmc.gart_start >> 12)); adev 81 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c (u32)(adev->gmc.gart_start >> 44)); adev 84 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c (u32)(adev->gmc.gart_end >> 12)); adev 86 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c (u32)(adev->gmc.gart_end >> 44)); adev 89 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c static void mmhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev) adev 96 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); adev 97 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); adev 101 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18); adev 103 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (adev->asic_type == CHIP_RAVEN && adev->rev_id >= 0x8) adev 111 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c max((adev->gmc.fb_end >> 18) + 0x1, adev 112 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c adev->gmc.agp_end >> 18)); adev 115 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18); adev 117 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (amdgpu_sriov_vf(adev)) adev 121 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start + adev 122 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c adev->vm_manager.vram_base_offset; adev 130 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c (u32)(adev->dummy_page_addr >> 12)); adev 132 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c (u32)((u64)adev->dummy_page_addr >> 44)); adev 140 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c static void mmhub_v1_0_init_tlb_regs(struct amdgpu_device *adev) adev 161 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c static void mmhub_v1_0_init_cache_regs(struct amdgpu_device *adev) adev 165 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (amdgpu_sriov_vf(adev)) adev 185 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (adev->gmc.translate_further) { adev 202 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c static void mmhub_v1_0_enable_system_domain(struct amdgpu_device *adev) adev 212 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c static void mmhub_v1_0_disable_identity_aperture(struct amdgpu_device *adev) adev 214 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (amdgpu_sriov_vf(adev)) adev 233 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c static void mmhub_v1_0_setup_vmid_config(struct amdgpu_device *adev) adev 239 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c num_level = adev->vm_manager.num_level; adev 240 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c block_size = adev->vm_manager.block_size; adev 241 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (adev->gmc.translate_further) adev 277 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c lower_32_bits(adev->vm_manager.max_pfn - 1)); adev 279 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c upper_32_bits(adev->vm_manager.max_pfn - 1)); adev 283 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c static void mmhub_v1_0_program_invalidation(struct amdgpu_device *adev) adev 295 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c void mmhub_v1_0_update_power_gating(struct amdgpu_device *adev, adev 298 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (amdgpu_sriov_vf(adev)) adev 301 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (enable && adev->pg_flags & AMD_PG_SUPPORT_MMHUB) { adev 302 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->set_powergating_by_smu) adev 303 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GMC, true); adev 308 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c int mmhub_v1_0_gart_enable(struct amdgpu_device *adev) adev 310 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (amdgpu_sriov_vf(adev)) { adev 317 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c adev->gmc.vram_start >> 24); adev 319 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c adev->gmc.vram_end >> 24); adev 323 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c mmhub_v1_0_init_gart_aperture_regs(adev); adev 324 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c mmhub_v1_0_init_system_aperture_regs(adev); adev 325 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c mmhub_v1_0_init_tlb_regs(adev); adev 326 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c mmhub_v1_0_init_cache_regs(adev); adev 328 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c mmhub_v1_0_enable_system_domain(adev); adev 329 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c mmhub_v1_0_disable_identity_aperture(adev); adev 330 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c mmhub_v1_0_setup_vmid_config(adev); adev 331 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c mmhub_v1_0_program_invalidation(adev); adev 336 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c void mmhub_v1_0_gart_disable(struct amdgpu_device *adev) adev 354 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (!amdgpu_sriov_vf(adev)) { adev 369 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c void mmhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev, bool value) adev 373 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (amdgpu_sriov_vf(adev)) adev 411 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c void mmhub_v1_0_init(struct amdgpu_device *adev) adev 413 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c struct amdgpu_vmhub *hub = &adev->vmhub[AMDGPU_MMHUB_0]; adev 436 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c static void mmhub_v1_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 443 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (adev->asic_type != CHIP_RAVEN) { adev 449 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_MGCG)) { adev 459 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (adev->asic_type != CHIP_RAVEN) adev 476 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (adev->asic_type != CHIP_RAVEN) adev 489 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (adev->asic_type != CHIP_RAVEN) adev 495 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (adev->asic_type != CHIP_RAVEN && def2 != data2) adev 499 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c static void mmhub_v1_0_update_medium_grain_light_sleep(struct amdgpu_device *adev, adev 506 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_LS)) adev 515 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c int mmhub_v1_0_set_clockgating(struct amdgpu_device *adev, adev 518 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (amdgpu_sriov_vf(adev)) adev 521 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c switch (adev->asic_type) { adev 527 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c mmhub_v1_0_update_medium_grain_clock_gating(adev, adev 529 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c mmhub_v1_0_update_medium_grain_light_sleep(adev, adev 539 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c void mmhub_v1_0_get_clockgating(struct amdgpu_device *adev, u32 *flags) adev 543 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c if (amdgpu_sriov_vf(adev)) adev 565 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c static void mmhub_v1_0_query_ras_error_count(struct amdgpu_device *adev, adev 28 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.h u64 mmhub_v1_0_get_fb_location(struct amdgpu_device *adev); adev 29 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.h int mmhub_v1_0_gart_enable(struct amdgpu_device *adev); adev 30 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.h void mmhub_v1_0_gart_disable(struct amdgpu_device *adev); adev 31 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.h void mmhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev, adev 33 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.h void mmhub_v1_0_init(struct amdgpu_device *adev); adev 34 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.h int mmhub_v1_0_set_clockgating(struct amdgpu_device *adev, adev 36 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.h void mmhub_v1_0_get_clockgating(struct amdgpu_device *adev, u32 *flags); adev 37 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.h void mmhub_v1_0_update_power_gating(struct amdgpu_device *adev, adev 39 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.h void mmhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid, adev 34 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c static void mmhub_v2_0_init_gart_pt_regs(struct amdgpu_device *adev) adev 36 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c uint64_t value = amdgpu_gmc_pd_addr(adev->gart.bo); adev 45 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c static void mmhub_v2_0_init_gart_aperture_regs(struct amdgpu_device *adev) adev 47 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c mmhub_v2_0_init_gart_pt_regs(adev); adev 50 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c (u32)(adev->gmc.gart_start >> 12)); adev 52 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c (u32)(adev->gmc.gart_start >> 44)); adev 55 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c (u32)(adev->gmc.gart_end >> 12)); adev 57 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c (u32)(adev->gmc.gart_end >> 44)); adev 60 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c static void mmhub_v2_0_init_system_aperture_regs(struct amdgpu_device *adev) adev 72 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c adev->gmc.vram_start >> 18); adev 74 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c adev->gmc.vram_end >> 18); adev 77 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start + adev 78 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c adev->vm_manager.vram_base_offset; adev 86 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c (u32)(adev->dummy_page_addr >> 12)); adev 88 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c (u32)((u64)adev->dummy_page_addr >> 44)); adev 96 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c static void mmhub_v2_0_init_tlb_regs(struct amdgpu_device *adev) adev 116 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c static void mmhub_v2_0_init_cache_regs(struct amdgpu_device *adev) adev 140 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c if (adev->gmc.translate_further) { adev 157 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c static void mmhub_v2_0_enable_system_domain(struct amdgpu_device *adev) adev 167 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c static void mmhub_v2_0_disable_identity_aperture(struct amdgpu_device *adev) adev 187 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c static void mmhub_v2_0_setup_vmid_config(struct amdgpu_device *adev) adev 196 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c adev->vm_manager.num_level); adev 214 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c adev->vm_manager.block_size - 9); adev 223 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c lower_32_bits(adev->vm_manager.max_pfn - 1)); adev 225 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c upper_32_bits(adev->vm_manager.max_pfn - 1)); adev 229 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c static void mmhub_v2_0_program_invalidation(struct amdgpu_device *adev) adev 241 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c int mmhub_v2_0_gart_enable(struct amdgpu_device *adev) adev 243 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c if (amdgpu_sriov_vf(adev)) { adev 250 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c adev->gmc.vram_start >> 24); adev 252 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c adev->gmc.vram_end >> 24); adev 256 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c mmhub_v2_0_init_gart_aperture_regs(adev); adev 257 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c mmhub_v2_0_init_system_aperture_regs(adev); adev 258 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c mmhub_v2_0_init_tlb_regs(adev); adev 259 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c mmhub_v2_0_init_cache_regs(adev); adev 261 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c mmhub_v2_0_enable_system_domain(adev); adev 262 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c mmhub_v2_0_disable_identity_aperture(adev); adev 263 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c mmhub_v2_0_setup_vmid_config(adev); adev 264 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c mmhub_v2_0_program_invalidation(adev); adev 269 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c void mmhub_v2_0_gart_disable(struct amdgpu_device *adev) adev 298 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c void mmhub_v2_0_set_fault_enable_default(struct amdgpu_device *adev, bool value) adev 334 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c void mmhub_v2_0_init(struct amdgpu_device *adev) adev 336 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c struct amdgpu_vmhub *hub = &adev->vmhub[AMDGPU_MMHUB_0]; adev 359 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c static void mmhub_v2_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 368 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_MGCG)) { adev 396 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c static void mmhub_v2_0_update_medium_grain_light_sleep(struct amdgpu_device *adev, adev 403 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_LS)) adev 412 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c int mmhub_v2_0_set_clockgating(struct amdgpu_device *adev, adev 415 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c if (amdgpu_sriov_vf(adev)) adev 418 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c switch (adev->asic_type) { adev 422 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c mmhub_v2_0_update_medium_grain_clock_gating(adev, adev 424 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c mmhub_v2_0_update_medium_grain_light_sleep(adev, adev 434 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c void mmhub_v2_0_get_clockgating(struct amdgpu_device *adev, u32 *flags) adev 438 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c if (amdgpu_sriov_vf(adev)) adev 26 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.h int mmhub_v2_0_gart_enable(struct amdgpu_device *adev); adev 27 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.h void mmhub_v2_0_gart_disable(struct amdgpu_device *adev); adev 28 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.h void mmhub_v2_0_set_fault_enable_default(struct amdgpu_device *adev, adev 30 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.h void mmhub_v2_0_init(struct amdgpu_device *adev); adev 31 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.h int mmhub_v2_0_set_clockgating(struct amdgpu_device *adev, adev 33 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.h void mmhub_v2_0_get_clockgating(struct amdgpu_device *adev, u32 *flags); adev 38 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c u64 mmhub_v9_4_get_fb_location(struct amdgpu_device *adev) adev 50 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c adev->gmc.fb_start = base; adev 51 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c adev->gmc.fb_end = top; adev 56 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c void mmhub_v9_4_setup_vm_pt_regs(struct amdgpu_device *adev, int hubid, adev 77 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c static void mmhub_v9_4_init_gart_aperture_regs(struct amdgpu_device *adev, adev 80 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); adev 82 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c mmhub_v9_4_setup_vm_pt_regs(adev, hubid, 0, pt_base); adev 87 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c (u32)(adev->gmc.gart_start >> 12)); adev 91 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c (u32)(adev->gmc.gart_start >> 44)); adev 96 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c (u32)(adev->gmc.gart_end >> 12)); adev 100 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c (u32)(adev->gmc.gart_end >> 44)); adev 103 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c static void mmhub_v9_4_init_system_aperture_regs(struct amdgpu_device *adev, adev 115 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c adev->gmc.agp_end >> 24); adev 118 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c adev->gmc.agp_start >> 24); adev 124 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18); adev 128 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18); adev 131 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start + adev 132 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c adev->vm_manager.vram_base_offset; adev 146 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c (u32)(adev->dummy_page_addr >> 12)); adev 150 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c (u32)((u64)adev->dummy_page_addr >> 44)); adev 161 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c static void mmhub_v9_4_init_tlb_regs(struct amdgpu_device *adev, int hubid) adev 189 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c static void mmhub_v9_4_init_cache_regs(struct amdgpu_device *adev, int hubid) adev 222 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c if (adev->gmc.translate_further) { adev 243 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c static void mmhub_v9_4_enable_system_domain(struct amdgpu_device *adev, adev 256 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c static void mmhub_v9_4_disable_identity_aperture(struct amdgpu_device *adev, adev 281 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c static void mmhub_v9_4_setup_vmid_config(struct amdgpu_device *adev, int hubid) adev 293 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c adev->vm_manager.num_level); adev 311 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c adev->vm_manager.block_size - 9); adev 327 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c lower_32_bits(adev->vm_manager.max_pfn - 1)); adev 331 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c upper_32_bits(adev->vm_manager.max_pfn - 1)); adev 335 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c static void mmhub_v9_4_program_invalidation(struct amdgpu_device *adev, adev 352 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c int mmhub_v9_4_gart_enable(struct amdgpu_device *adev) adev 357 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c if (amdgpu_sriov_vf(adev)) { adev 366 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c adev->gmc.vram_start >> 24); adev 370 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c adev->gmc.vram_end >> 24); adev 374 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c mmhub_v9_4_init_gart_aperture_regs(adev, i); adev 375 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c mmhub_v9_4_init_system_aperture_regs(adev, i); adev 376 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c mmhub_v9_4_init_tlb_regs(adev, i); adev 377 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c mmhub_v9_4_init_cache_regs(adev, i); adev 379 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c mmhub_v9_4_enable_system_domain(adev, i); adev 380 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c mmhub_v9_4_disable_identity_aperture(adev, i); adev 381 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c mmhub_v9_4_setup_vmid_config(adev, i); adev 382 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c mmhub_v9_4_program_invalidation(adev, i); adev 388 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c void mmhub_v9_4_gart_disable(struct amdgpu_device *adev) adev 432 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c void mmhub_v9_4_set_fault_enable_default(struct amdgpu_device *adev, bool value) adev 490 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c void mmhub_v9_4_init(struct amdgpu_device *adev) adev 493 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c {&adev->vmhub[AMDGPU_MMHUB_0], &adev->vmhub[AMDGPU_MMHUB_1]}; adev 532 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c static void mmhub_v9_4_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 544 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_MGCG)) adev 559 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c (adev->cg_flags & AMD_CG_SUPPORT_MC_MGCG)) { adev 589 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c static void mmhub_v9_4_update_medium_grain_light_sleep(struct amdgpu_device *adev, adev 600 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_MC_LS)) adev 611 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c int mmhub_v9_4_set_clockgating(struct amdgpu_device *adev, adev 614 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c if (amdgpu_sriov_vf(adev)) adev 617 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c switch (adev->asic_type) { adev 619 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c mmhub_v9_4_update_medium_grain_clock_gating(adev, adev 621 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c mmhub_v9_4_update_medium_grain_light_sleep(adev, adev 631 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c void mmhub_v9_4_get_clockgating(struct amdgpu_device *adev, u32 *flags) adev 635 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c if (amdgpu_sriov_vf(adev)) adev 26 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.h u64 mmhub_v9_4_get_fb_location(struct amdgpu_device *adev); adev 27 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.h int mmhub_v9_4_gart_enable(struct amdgpu_device *adev); adev 28 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.h void mmhub_v9_4_gart_disable(struct amdgpu_device *adev); adev 29 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.h void mmhub_v9_4_set_fault_enable_default(struct amdgpu_device *adev, adev 31 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.h void mmhub_v9_4_init(struct amdgpu_device *adev); adev 32 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.h int mmhub_v9_4_set_clockgating(struct amdgpu_device *adev, adev 34 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.h void mmhub_v9_4_get_clockgating(struct amdgpu_device *adev, u32 *flags); adev 35 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static void xgpu_ai_mailbox_send_ack(struct amdgpu_device *adev) adev 40 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static void xgpu_ai_mailbox_set_valid(struct amdgpu_device *adev, bool val) adev 54 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static enum idh_event xgpu_ai_mailbox_peek_msg(struct amdgpu_device *adev) adev 61 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static int xgpu_ai_mailbox_rcv_msg(struct amdgpu_device *adev, adev 71 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c xgpu_ai_mailbox_send_ack(adev); adev 76 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static uint8_t xgpu_ai_peek_ack(struct amdgpu_device *adev) { adev 80 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static int xgpu_ai_poll_ack(struct amdgpu_device *adev) adev 99 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static int xgpu_ai_poll_msg(struct amdgpu_device *adev, enum idh_event event) adev 104 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c r = xgpu_ai_mailbox_rcv_msg(adev, event); adev 117 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static void xgpu_ai_mailbox_trans_msg (struct amdgpu_device *adev, adev 130 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c xgpu_ai_mailbox_set_valid(adev, false); adev 131 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c trn = xgpu_ai_peek_ack(adev); adev 151 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c xgpu_ai_mailbox_set_valid(adev, true); adev 154 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c r = xgpu_ai_poll_ack(adev); adev 158 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c xgpu_ai_mailbox_set_valid(adev, false); adev 161 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static int xgpu_ai_get_pp_clk(struct amdgpu_device *adev, u32 type, char *buf) adev 166 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c if (!amdgim_is_hwperf(adev) || buf == NULL) adev 180 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c mutex_lock(&adev->virt.dpm_mutex); adev 182 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c xgpu_ai_mailbox_trans_msg(adev, req, 0, 0, 0); adev 184 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c r = xgpu_ai_poll_msg(adev, IDH_SUCCESS); adev 185 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c if (!r && adev->fw_vram_usage.va != NULL) { adev 189 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c size = strnlen((((char *)adev->virt.fw_reserve.p_pf2vf) + adev 193 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c strcpy(buf,((char *)adev->virt.fw_reserve.p_pf2vf + val)); adev 201 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c r = xgpu_ai_poll_msg(adev, IDH_FAIL); adev 207 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c mutex_unlock(&adev->virt.dpm_mutex); adev 211 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static int xgpu_ai_force_dpm_level(struct amdgpu_device *adev, u32 level) adev 216 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c if (!amdgim_is_hwperf(adev)) adev 219 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c mutex_lock(&adev->virt.dpm_mutex); adev 220 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c xgpu_ai_mailbox_trans_msg(adev, req, level, 0, 0); adev 222 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c r = xgpu_ai_poll_msg(adev, IDH_SUCCESS); adev 226 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c r = xgpu_ai_poll_msg(adev, IDH_FAIL); adev 233 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c mutex_unlock(&adev->virt.dpm_mutex); adev 237 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static int xgpu_ai_send_access_requests(struct amdgpu_device *adev, adev 242 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c xgpu_ai_mailbox_trans_msg(adev, req, 0, 0, 0); adev 248 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c r = xgpu_ai_poll_msg(adev, IDH_READY_TO_ACCESS_GPU); adev 255 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c adev->virt.fw_reserve.checksum_key = adev 264 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static int xgpu_ai_request_reset(struct amdgpu_device *adev) adev 266 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c return xgpu_ai_send_access_requests(adev, IDH_REQ_GPU_RESET_ACCESS); adev 269 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static int xgpu_ai_request_full_gpu_access(struct amdgpu_device *adev, adev 275 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c return xgpu_ai_send_access_requests(adev, req); adev 278 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static int xgpu_ai_release_full_gpu_access(struct amdgpu_device *adev, adev 285 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c r = xgpu_ai_send_access_requests(adev, req); adev 290 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static int xgpu_ai_mailbox_ack_irq(struct amdgpu_device *adev, adev 298 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static int xgpu_ai_set_mailbox_ack_irq(struct amdgpu_device *adev, adev 315 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt); adev 327 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c locked = mutex_trylock(&adev->lock_reset); adev 329 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c adev->in_gpu_reset = 1; adev 332 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c if (xgpu_ai_mailbox_peek_msg(adev) == IDH_FLR_NOTIFICATION_CMPL) adev 341 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c adev->in_gpu_reset = 0; adev 342 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c mutex_unlock(&adev->lock_reset); adev 346 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c if (amdgpu_device_should_recover_gpu(adev) adev 347 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c && adev->sdma_timeout == MAX_SCHEDULE_TIMEOUT) adev 348 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c amdgpu_device_gpu_recover(adev, NULL); adev 351 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static int xgpu_ai_set_mailbox_rcv_irq(struct amdgpu_device *adev, adev 365 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c static int xgpu_ai_mailbox_rcv_irq(struct amdgpu_device *adev, adev 369 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c enum idh_event event = xgpu_ai_mailbox_peek_msg(adev); adev 373 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c if (amdgpu_sriov_runtime(adev)) adev 374 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c schedule_work(&adev->virt.flr_work); adev 377 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c xgpu_ai_mailbox_send_ack(adev); adev 403 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c void xgpu_ai_mailbox_set_irq_funcs(struct amdgpu_device *adev) adev 405 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c adev->virt.ack_irq.num_types = 1; adev 406 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c adev->virt.ack_irq.funcs = &xgpu_ai_mailbox_ack_irq_funcs; adev 407 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c adev->virt.rcv_irq.num_types = 1; adev 408 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c adev->virt.rcv_irq.funcs = &xgpu_ai_mailbox_rcv_irq_funcs; adev 411 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c int xgpu_ai_mailbox_add_irq_id(struct amdgpu_device *adev) adev 415 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_BIF, 135, &adev->virt.rcv_irq); adev 419 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_BIF, 138, &adev->virt.ack_irq); adev 421 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0); adev 428 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c int xgpu_ai_mailbox_get_irq(struct amdgpu_device *adev) adev 432 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c r = amdgpu_irq_get(adev, &adev->virt.rcv_irq, 0); adev 435 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c r = amdgpu_irq_get(adev, &adev->virt.ack_irq, 0); adev 437 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0); adev 441 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c INIT_WORK(&adev->virt.flr_work, xgpu_ai_mailbox_flr_work); adev 446 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c void xgpu_ai_mailbox_put_irq(struct amdgpu_device *adev) adev 448 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c amdgpu_irq_put(adev, &adev->virt.ack_irq, 0); adev 449 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0); adev 58 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h void xgpu_ai_mailbox_set_irq_funcs(struct amdgpu_device *adev); adev 59 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h int xgpu_ai_mailbox_add_irq_id(struct amdgpu_device *adev); adev 60 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h int xgpu_ai_mailbox_get_irq(struct amdgpu_device *adev); adev 61 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h void xgpu_ai_mailbox_put_irq(struct amdgpu_device *adev); adev 277 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c void xgpu_vi_init_golden_registers(struct amdgpu_device *adev) adev 279 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c switch (adev->asic_type) { adev 281 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c amdgpu_device_program_register_sequence(adev, adev 285 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c amdgpu_device_program_register_sequence(adev, adev 289 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c amdgpu_device_program_register_sequence(adev, adev 295 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c amdgpu_device_program_register_sequence(adev, adev 299 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c amdgpu_device_program_register_sequence(adev, adev 303 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c amdgpu_device_program_register_sequence(adev, adev 317 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static void xgpu_vi_mailbox_send_ack(struct amdgpu_device *adev) adev 341 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static void xgpu_vi_mailbox_set_valid(struct amdgpu_device *adev, bool val) adev 351 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static void xgpu_vi_mailbox_trans_msg(struct amdgpu_device *adev, adev 361 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c xgpu_vi_mailbox_set_valid(adev, true); adev 364 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static int xgpu_vi_mailbox_rcv_msg(struct amdgpu_device *adev, adev 382 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c xgpu_vi_mailbox_send_ack(adev); adev 387 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static int xgpu_vi_poll_ack(struct amdgpu_device *adev) adev 409 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static int xgpu_vi_poll_msg(struct amdgpu_device *adev, enum idh_event event) adev 413 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c r = xgpu_vi_mailbox_rcv_msg(adev, event); adev 423 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c r = xgpu_vi_mailbox_rcv_msg(adev, event); adev 429 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static int xgpu_vi_send_access_requests(struct amdgpu_device *adev, adev 434 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c xgpu_vi_mailbox_trans_msg(adev, request); adev 437 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c r = xgpu_vi_poll_ack(adev); adev 441 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c xgpu_vi_mailbox_set_valid(adev, false); adev 447 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c r = xgpu_vi_poll_msg(adev, IDH_READY_TO_ACCESS_GPU); adev 457 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static int xgpu_vi_request_reset(struct amdgpu_device *adev) adev 459 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c return xgpu_vi_send_access_requests(adev, IDH_REQ_GPU_RESET_ACCESS); adev 462 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static int xgpu_vi_wait_reset_cmpl(struct amdgpu_device *adev) adev 464 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c return xgpu_vi_poll_msg(adev, IDH_FLR_NOTIFICATION_CMPL); adev 467 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static int xgpu_vi_request_full_gpu_access(struct amdgpu_device *adev, adev 473 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c return xgpu_vi_send_access_requests(adev, req); adev 476 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static int xgpu_vi_release_full_gpu_access(struct amdgpu_device *adev, adev 483 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c r = xgpu_vi_send_access_requests(adev, req); adev 489 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static int xgpu_vi_mailbox_ack_irq(struct amdgpu_device *adev, adev 497 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static int xgpu_vi_set_mailbox_ack_irq(struct amdgpu_device *adev, adev 514 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt); adev 517 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c if (xgpu_vi_poll_msg(adev, IDH_FLR_NOTIFICATION_CMPL)) { adev 523 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c if (amdgpu_device_should_recover_gpu(adev)) adev 524 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c amdgpu_device_gpu_recover(adev, NULL); adev 527 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static int xgpu_vi_set_mailbox_rcv_irq(struct amdgpu_device *adev, adev 541 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c static int xgpu_vi_mailbox_rcv_irq(struct amdgpu_device *adev, adev 550 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c r = xgpu_vi_mailbox_rcv_msg(adev, IDH_FLR_NOTIFICATION); adev 554 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c schedule_work(&adev->virt.flr_work); adev 570 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c void xgpu_vi_mailbox_set_irq_funcs(struct amdgpu_device *adev) adev 572 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c adev->virt.ack_irq.num_types = 1; adev 573 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c adev->virt.ack_irq.funcs = &xgpu_vi_mailbox_ack_irq_funcs; adev 574 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c adev->virt.rcv_irq.num_types = 1; adev 575 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c adev->virt.rcv_irq.funcs = &xgpu_vi_mailbox_rcv_irq_funcs; adev 578 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c int xgpu_vi_mailbox_add_irq_id(struct amdgpu_device *adev) adev 582 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 135, &adev->virt.rcv_irq); adev 586 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 138, &adev->virt.ack_irq); adev 588 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0); adev 595 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c int xgpu_vi_mailbox_get_irq(struct amdgpu_device *adev) adev 599 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c r = amdgpu_irq_get(adev, &adev->virt.rcv_irq, 0); adev 602 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c r = amdgpu_irq_get(adev, &adev->virt.ack_irq, 0); adev 604 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0); adev 608 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c INIT_WORK(&adev->virt.flr_work, xgpu_vi_mailbox_flr_work); adev 613 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c void xgpu_vi_mailbox_put_irq(struct amdgpu_device *adev) adev 615 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c amdgpu_irq_put(adev, &adev->virt.ack_irq, 0); adev 616 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c amdgpu_irq_put(adev, &adev->virt.rcv_irq, 0); adev 51 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.h void xgpu_vi_init_golden_registers(struct amdgpu_device *adev); adev 52 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.h void xgpu_vi_mailbox_set_irq_funcs(struct amdgpu_device *adev); adev 53 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.h int xgpu_vi_mailbox_add_irq_id(struct amdgpu_device *adev); adev 54 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.h int xgpu_vi_mailbox_get_irq(struct amdgpu_device *adev); adev 55 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.h void xgpu_vi_mailbox_put_irq(struct amdgpu_device *adev); adev 36 drivers/gpu/drm/amd/amdgpu/navi10_ih.c static void navi10_ih_set_interrupt_funcs(struct amdgpu_device *adev); adev 45 drivers/gpu/drm/amd/amdgpu/navi10_ih.c static void navi10_ih_enable_interrupts(struct amdgpu_device *adev) adev 52 drivers/gpu/drm/amd/amdgpu/navi10_ih.c adev->irq.ih.enabled = true; adev 62 drivers/gpu/drm/amd/amdgpu/navi10_ih.c static void navi10_ih_disable_interrupts(struct amdgpu_device *adev) adev 72 drivers/gpu/drm/amd/amdgpu/navi10_ih.c adev->irq.ih.enabled = false; adev 73 drivers/gpu/drm/amd/amdgpu/navi10_ih.c adev->irq.ih.rptr = 0; adev 110 drivers/gpu/drm/amd/amdgpu/navi10_ih.c static int navi10_ih_irq_init(struct amdgpu_device *adev) adev 112 drivers/gpu/drm/amd/amdgpu/navi10_ih.c struct amdgpu_ih_ring *ih = &adev->irq.ih; adev 118 drivers/gpu/drm/amd/amdgpu/navi10_ih.c navi10_ih_disable_interrupts(adev); adev 120 drivers/gpu/drm/amd/amdgpu/navi10_ih.c adev->nbio_funcs->ih_control(adev); adev 129 drivers/gpu/drm/amd/amdgpu/navi10_ih.c !!adev->irq.msi_enabled); adev 131 drivers/gpu/drm/amd/amdgpu/navi10_ih.c if (unlikely(adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT)) { adev 165 drivers/gpu/drm/amd/amdgpu/navi10_ih.c adev->nbio_funcs->ih_doorbell_range(adev, ih->use_doorbell, adev 177 drivers/gpu/drm/amd/amdgpu/navi10_ih.c pci_set_master(adev->pdev); adev 180 drivers/gpu/drm/amd/amdgpu/navi10_ih.c navi10_ih_enable_interrupts(adev); adev 192 drivers/gpu/drm/amd/amdgpu/navi10_ih.c static void navi10_ih_irq_disable(struct amdgpu_device *adev) adev 194 drivers/gpu/drm/amd/amdgpu/navi10_ih.c navi10_ih_disable_interrupts(adev); adev 210 drivers/gpu/drm/amd/amdgpu/navi10_ih.c static u32 navi10_ih_get_wptr(struct amdgpu_device *adev, adev 231 drivers/gpu/drm/amd/amdgpu/navi10_ih.c dev_warn(adev->dev, "IH ring buffer overflow " adev 252 drivers/gpu/drm/amd/amdgpu/navi10_ih.c static void navi10_ih_decode_iv(struct amdgpu_device *adev, adev 294 drivers/gpu/drm/amd/amdgpu/navi10_ih.c static void navi10_ih_set_rptr(struct amdgpu_device *adev, adev 307 drivers/gpu/drm/amd/amdgpu/navi10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 309 drivers/gpu/drm/amd/amdgpu/navi10_ih.c navi10_ih_set_interrupt_funcs(adev); adev 316 drivers/gpu/drm/amd/amdgpu/navi10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 323 drivers/gpu/drm/amd/amdgpu/navi10_ih.c (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) ? false : true; adev 324 drivers/gpu/drm/amd/amdgpu/navi10_ih.c r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 256 * 1024, use_bus_addr); adev 328 drivers/gpu/drm/amd/amdgpu/navi10_ih.c adev->irq.ih.use_doorbell = true; adev 329 drivers/gpu/drm/amd/amdgpu/navi10_ih.c adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1; adev 331 drivers/gpu/drm/amd/amdgpu/navi10_ih.c r = amdgpu_irq_init(adev); adev 338 drivers/gpu/drm/amd/amdgpu/navi10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 340 drivers/gpu/drm/amd/amdgpu/navi10_ih.c amdgpu_irq_fini(adev); adev 341 drivers/gpu/drm/amd/amdgpu/navi10_ih.c amdgpu_ih_ring_fini(adev, &adev->irq.ih); adev 349 drivers/gpu/drm/amd/amdgpu/navi10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 351 drivers/gpu/drm/amd/amdgpu/navi10_ih.c r = navi10_ih_irq_init(adev); adev 360 drivers/gpu/drm/amd/amdgpu/navi10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 362 drivers/gpu/drm/amd/amdgpu/navi10_ih.c navi10_ih_irq_disable(adev); adev 369 drivers/gpu/drm/amd/amdgpu/navi10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 371 drivers/gpu/drm/amd/amdgpu/navi10_ih.c return navi10_ih_hw_fini(adev); adev 376 drivers/gpu/drm/amd/amdgpu/navi10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 378 drivers/gpu/drm/amd/amdgpu/navi10_ih.c return navi10_ih_hw_init(adev); adev 399 drivers/gpu/drm/amd/amdgpu/navi10_ih.c static void navi10_ih_update_clockgating_state(struct amdgpu_device *adev, adev 404 drivers/gpu/drm/amd/amdgpu/navi10_ih.c if (adev->cg_flags & AMD_CG_SUPPORT_IH_CG) { adev 427 drivers/gpu/drm/amd/amdgpu/navi10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 429 drivers/gpu/drm/amd/amdgpu/navi10_ih.c navi10_ih_update_clockgating_state(adev, adev 442 drivers/gpu/drm/amd/amdgpu/navi10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 474 drivers/gpu/drm/amd/amdgpu/navi10_ih.c static void navi10_ih_set_interrupt_funcs(struct amdgpu_device *adev) adev 476 drivers/gpu/drm/amd/amdgpu/navi10_ih.c if (adev->irq.ih_funcs == NULL) adev 477 drivers/gpu/drm/amd/amdgpu/navi10_ih.c adev->irq.ih_funcs = &navi10_ih_funcs; adev 30 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c int navi10_reg_base_init(struct amdgpu_device *adev) adev 35 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); adev 36 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); adev 37 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); adev 38 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i])); adev 39 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i])); adev 40 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); adev 41 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i])); adev 42 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(VCN_BASE.instance[i])); adev 43 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[DF_HWIP][i] = (uint32_t *)(&(DF_BASE.instance[i])); adev 44 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[DCE_HWIP][i] = (uint32_t *)(&(DCN_BASE.instance[i])); adev 45 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); adev 46 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); adev 47 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); adev 48 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); adev 49 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i])); adev 50 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[CLK_HWIP][i] = (uint32_t *)(&(CLK_BASE.instance[i])); adev 30 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c int navi12_reg_base_init(struct amdgpu_device *adev) adev 35 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); adev 36 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); adev 37 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); adev 38 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i])); adev 39 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIF0_BASE.instance[i])); adev 40 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); adev 41 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i])); adev 42 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(UVD0_BASE.instance[i])); adev 43 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[DF_HWIP][i] = (uint32_t *)(&(DF_BASE.instance[i])); adev 44 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[DCE_HWIP][i] = (uint32_t *)(&(DMU_BASE.instance[i])); adev 45 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); adev 46 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); adev 47 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); adev 48 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); adev 49 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i])); adev 50 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[CLK_HWIP][i] = (uint32_t *)(&(CLK_BASE.instance[i])); adev 30 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c int navi14_reg_base_init(struct amdgpu_device *adev) adev 35 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); adev 36 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); adev 37 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); adev 38 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i])); adev 39 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIF0_BASE.instance[i])); adev 40 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); adev 41 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i])); adev 42 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(UVD0_BASE.instance[i])); adev 43 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[DF_HWIP][i] = (uint32_t *)(&(DF_BASE.instance[i])); adev 44 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[DCE_HWIP][i] = (uint32_t *)(&(DMU_BASE.instance[i])); adev 45 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); adev 46 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); adev 47 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); adev 48 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); adev 49 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i])); adev 50 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[CLK_HWIP][i] = (uint32_t *)(&(CLK_BASE.instance[i])); adev 35 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static u32 nbio_v2_3_get_rev_id(struct amdgpu_device *adev) adev 45 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static void nbio_v2_3_mc_access_enable(struct amdgpu_device *adev, bool enable) adev 55 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static void nbio_v2_3_hdp_flush(struct amdgpu_device *adev, adev 65 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static u32 nbio_v2_3_get_memsize(struct amdgpu_device *adev) adev 70 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static void nbio_v2_3_sdma_doorbell_range(struct amdgpu_device *adev, int instance, adev 94 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static void nbio_v2_3_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, adev 114 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static void nbio_v2_3_enable_doorbell_aperture(struct amdgpu_device *adev, adev 121 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static void nbio_v2_3_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, adev 135 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c lower_32_bits(adev->doorbell.base)); adev 137 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c upper_32_bits(adev->doorbell.base)); adev 145 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static void nbio_v2_3_ih_doorbell_range(struct amdgpu_device *adev, adev 165 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static void nbio_v2_3_ih_control(struct amdgpu_device *adev) adev 170 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); adev 187 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static void nbio_v2_3_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 193 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_MGCG)) { adev 213 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static void nbio_v2_3_update_medium_grain_light_sleep(struct amdgpu_device *adev, adev 219 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_LS)) { adev 233 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static void nbio_v2_3_get_clockgating_state(struct amdgpu_device *adev, adev 249 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static u32 nbio_v2_3_get_hdp_flush_req_offset(struct amdgpu_device *adev) adev 254 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static u32 nbio_v2_3_get_hdp_flush_done_offset(struct amdgpu_device *adev) adev 259 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static u32 nbio_v2_3_get_pcie_index_offset(struct amdgpu_device *adev) adev 264 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static u32 nbio_v2_3_get_pcie_data_offset(struct amdgpu_device *adev) adev 284 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static void nbio_v2_3_detect_hw_virt(struct amdgpu_device *adev) adev 290 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF; adev 293 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV; adev 297 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE; adev 301 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c static void nbio_v2_3_init_registers(struct amdgpu_device *adev) adev 33 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static u32 nbio_v6_1_get_rev_id(struct amdgpu_device *adev) adev 43 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static void nbio_v6_1_mc_access_enable(struct amdgpu_device *adev, bool enable) adev 53 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static void nbio_v6_1_hdp_flush(struct amdgpu_device *adev, adev 65 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static u32 nbio_v6_1_get_memsize(struct amdgpu_device *adev) adev 70 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static void nbio_v6_1_sdma_doorbell_range(struct amdgpu_device *adev, int instance, adev 88 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static void nbio_v6_1_enable_doorbell_aperture(struct amdgpu_device *adev, adev 94 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static void nbio_v6_1_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, adev 105 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c lower_32_bits(adev->doorbell.base)); adev 107 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c upper_32_bits(adev->doorbell.base)); adev 114 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static void nbio_v6_1_ih_doorbell_range(struct amdgpu_device *adev, adev 129 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static void nbio_v6_1_ih_control(struct amdgpu_device *adev) adev 134 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); adev 145 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static void nbio_v6_1_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 151 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_MGCG)) { adev 173 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static void nbio_v6_1_update_medium_grain_light_sleep(struct amdgpu_device *adev, adev 179 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_LS)) { adev 193 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static void nbio_v6_1_get_clockgating_state(struct amdgpu_device *adev, adev 209 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static u32 nbio_v6_1_get_hdp_flush_req_offset(struct amdgpu_device *adev) adev 214 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static u32 nbio_v6_1_get_hdp_flush_done_offset(struct amdgpu_device *adev) adev 219 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static u32 nbio_v6_1_get_pcie_index_offset(struct amdgpu_device *adev) adev 224 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static u32 nbio_v6_1_get_pcie_data_offset(struct amdgpu_device *adev) adev 244 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static void nbio_v6_1_detect_hw_virt(struct amdgpu_device *adev) adev 250 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF; adev 253 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV; adev 257 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE; adev 261 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c static void nbio_v6_1_init_registers(struct amdgpu_device *adev) adev 36 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_v7_0_remap_hdp_registers(struct amdgpu_device *adev) adev 39 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL); adev 41 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL); adev 44 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static u32 nbio_v7_0_get_rev_id(struct amdgpu_device *adev) adev 54 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_v7_0_mc_access_enable(struct amdgpu_device *adev, bool enable) adev 63 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_v7_0_hdp_flush(struct amdgpu_device *adev, adev 67 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); adev 69 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); adev 72 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static u32 nbio_v7_0_get_memsize(struct amdgpu_device *adev) adev 77 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instance, adev 94 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_v7_0_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, adev 114 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_v7_0_enable_doorbell_aperture(struct amdgpu_device *adev, adev 120 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_v7_0_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, adev 126 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_v7_0_ih_doorbell_range(struct amdgpu_device *adev, adev 140 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static uint32_t nbio_7_0_read_syshub_ind_mmr(struct amdgpu_device *adev, uint32_t offset) adev 150 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_7_0_write_syshub_ind_mmr(struct amdgpu_device *adev, uint32_t offset, adev 157 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_v7_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 165 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_MGCG)) adev 174 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c def = data = nbio_7_0_read_syshub_ind_mmr(adev, ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SOCCLK); adev 176 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_MGCG)) adev 182 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c nbio_7_0_write_syshub_ind_mmr(adev, ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SOCCLK, data); adev 185 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c def = data = nbio_7_0_read_syshub_ind_mmr(adev, ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SHUBCLK); adev 187 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_MGCG)) adev 193 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c nbio_7_0_write_syshub_ind_mmr(adev, ixSYSHUB_MMREG_IND_SYSHUB_MGCG_CTRL_SHUBCLK, data); adev 196 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_v7_0_update_medium_grain_light_sleep(struct amdgpu_device *adev, adev 202 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_LS)) { adev 216 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_v7_0_get_clockgating_state(struct amdgpu_device *adev, adev 232 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_v7_0_ih_control(struct amdgpu_device *adev) adev 237 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); adev 248 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static u32 nbio_v7_0_get_hdp_flush_req_offset(struct amdgpu_device *adev) adev 253 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static u32 nbio_v7_0_get_hdp_flush_done_offset(struct amdgpu_device *adev) adev 258 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static u32 nbio_v7_0_get_pcie_index_offset(struct amdgpu_device *adev) adev 263 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static u32 nbio_v7_0_get_pcie_data_offset(struct amdgpu_device *adev) adev 283 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_v7_0_detect_hw_virt(struct amdgpu_device *adev) adev 286 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE; adev 289 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c static void nbio_v7_0_init_registers(struct amdgpu_device *adev) adev 53 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static void nbio_v7_4_remap_hdp_registers(struct amdgpu_device *adev) adev 56 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL); adev 58 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL); adev 61 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static u32 nbio_v7_4_get_rev_id(struct amdgpu_device *adev) adev 71 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static void nbio_v7_4_mc_access_enable(struct amdgpu_device *adev, bool enable) adev 80 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static void nbio_v7_4_hdp_flush(struct amdgpu_device *adev, adev 84 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); adev 86 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0); adev 89 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static u32 nbio_v7_4_get_memsize(struct amdgpu_device *adev) adev 94 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static void nbio_v7_4_sdma_doorbell_range(struct amdgpu_device *adev, int instance, adev 125 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static void nbio_v7_4_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, adev 151 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static void nbio_v7_4_enable_doorbell_aperture(struct amdgpu_device *adev, adev 157 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static void nbio_v7_4_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, adev 168 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c lower_32_bits(adev->doorbell.base)); adev 170 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c upper_32_bits(adev->doorbell.base)); adev 176 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static void nbio_v7_4_ih_doorbell_range(struct amdgpu_device *adev, adev 191 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static void nbio_v7_4_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 197 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static void nbio_v7_4_update_medium_grain_light_sleep(struct amdgpu_device *adev, adev 203 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_LS)) { adev 217 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static void nbio_v7_4_get_clockgating_state(struct amdgpu_device *adev, adev 233 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static void nbio_v7_4_ih_control(struct amdgpu_device *adev) adev 238 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); adev 249 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static u32 nbio_v7_4_get_hdp_flush_req_offset(struct amdgpu_device *adev) adev 254 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static u32 nbio_v7_4_get_hdp_flush_done_offset(struct amdgpu_device *adev) adev 259 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static u32 nbio_v7_4_get_pcie_index_offset(struct amdgpu_device *adev) adev 264 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static u32 nbio_v7_4_get_pcie_data_offset(struct amdgpu_device *adev) adev 290 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static void nbio_v7_4_detect_hw_virt(struct amdgpu_device *adev) adev 296 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF; adev 299 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV; adev 303 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE; adev 307 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c static void nbio_v7_4_init_registers(struct amdgpu_device *adev) adev 62 drivers/gpu/drm/amd/amdgpu/nv.c static u32 nv_pcie_rreg(struct amdgpu_device *adev, u32 reg) adev 66 drivers/gpu/drm/amd/amdgpu/nv.c address = adev->nbio_funcs->get_pcie_index_offset(adev); adev 67 drivers/gpu/drm/amd/amdgpu/nv.c data = adev->nbio_funcs->get_pcie_data_offset(adev); adev 69 drivers/gpu/drm/amd/amdgpu/nv.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 73 drivers/gpu/drm/amd/amdgpu/nv.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 77 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 81 drivers/gpu/drm/amd/amdgpu/nv.c address = adev->nbio_funcs->get_pcie_index_offset(adev); adev 82 drivers/gpu/drm/amd/amdgpu/nv.c data = adev->nbio_funcs->get_pcie_data_offset(adev); adev 84 drivers/gpu/drm/amd/amdgpu/nv.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 89 drivers/gpu/drm/amd/amdgpu/nv.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 92 drivers/gpu/drm/amd/amdgpu/nv.c static u32 nv_didt_rreg(struct amdgpu_device *adev, u32 reg) adev 100 drivers/gpu/drm/amd/amdgpu/nv.c spin_lock_irqsave(&adev->didt_idx_lock, flags); adev 103 drivers/gpu/drm/amd/amdgpu/nv.c spin_unlock_irqrestore(&adev->didt_idx_lock, flags); adev 107 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_didt_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 114 drivers/gpu/drm/amd/amdgpu/nv.c spin_lock_irqsave(&adev->didt_idx_lock, flags); adev 117 drivers/gpu/drm/amd/amdgpu/nv.c spin_unlock_irqrestore(&adev->didt_idx_lock, flags); adev 120 drivers/gpu/drm/amd/amdgpu/nv.c static u32 nv_get_config_memsize(struct amdgpu_device *adev) adev 122 drivers/gpu/drm/amd/amdgpu/nv.c return adev->nbio_funcs->get_memsize(adev); adev 125 drivers/gpu/drm/amd/amdgpu/nv.c static u32 nv_get_xclk(struct amdgpu_device *adev) adev 127 drivers/gpu/drm/amd/amdgpu/nv.c return adev->clock.spll.reference_freq; adev 131 drivers/gpu/drm/amd/amdgpu/nv.c void nv_grbm_select(struct amdgpu_device *adev, adev 143 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_vga_set_state(struct amdgpu_device *adev, bool state) adev 148 drivers/gpu/drm/amd/amdgpu/nv.c static bool nv_read_disabled_bios(struct amdgpu_device *adev) adev 154 drivers/gpu/drm/amd/amdgpu/nv.c static bool nv_read_bios_from_rom(struct amdgpu_device *adev, adev 184 drivers/gpu/drm/amd/amdgpu/nv.c static uint32_t nv_read_indexed_register(struct amdgpu_device *adev, u32 se_num, adev 189 drivers/gpu/drm/amd/amdgpu/nv.c mutex_lock(&adev->grbm_idx_mutex); adev 191 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); adev 196 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_gfx_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 197 drivers/gpu/drm/amd/amdgpu/nv.c mutex_unlock(&adev->grbm_idx_mutex); adev 201 drivers/gpu/drm/amd/amdgpu/nv.c static uint32_t nv_get_register_value(struct amdgpu_device *adev, adev 206 drivers/gpu/drm/amd/amdgpu/nv.c return nv_read_indexed_register(adev, se_num, sh_num, reg_offset); adev 209 drivers/gpu/drm/amd/amdgpu/nv.c return adev->gfx.config.gb_addr_config; adev 214 drivers/gpu/drm/amd/amdgpu/nv.c static int nv_read_register(struct amdgpu_device *adev, u32 se_num, adev 224 drivers/gpu/drm/amd/amdgpu/nv.c (adev->reg_offset[en->hwip][en->inst][en->seg] + en->reg_offset)) adev 227 drivers/gpu/drm/amd/amdgpu/nv.c *value = nv_get_register_value(adev, adev 236 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_gpu_pci_config_reset(struct amdgpu_device *adev) adev 240 drivers/gpu/drm/amd/amdgpu/nv.c dev_info(adev->dev, "GPU pci config reset\n"); adev 243 drivers/gpu/drm/amd/amdgpu/nv.c pci_clear_master(adev->pdev); adev 245 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_pci_config_reset(adev); adev 250 drivers/gpu/drm/amd/amdgpu/nv.c for (i = 0; i < adev->usec_timeout; i++) { adev 251 drivers/gpu/drm/amd/amdgpu/nv.c u32 memsize = nbio_v2_3_get_memsize(adev); adev 260 drivers/gpu/drm/amd/amdgpu/nv.c static int nv_asic_mode1_reset(struct amdgpu_device *adev) adev 265 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_atombios_scratch_regs_engine_hung(adev, true); adev 267 drivers/gpu/drm/amd/amdgpu/nv.c dev_info(adev->dev, "GPU mode1 reset\n"); adev 270 drivers/gpu/drm/amd/amdgpu/nv.c pci_clear_master(adev->pdev); adev 272 drivers/gpu/drm/amd/amdgpu/nv.c pci_save_state(adev->pdev); adev 274 drivers/gpu/drm/amd/amdgpu/nv.c ret = psp_gpu_reset(adev); adev 276 drivers/gpu/drm/amd/amdgpu/nv.c dev_err(adev->dev, "GPU mode1 reset failed\n"); adev 278 drivers/gpu/drm/amd/amdgpu/nv.c pci_restore_state(adev->pdev); adev 281 drivers/gpu/drm/amd/amdgpu/nv.c for (i = 0; i < adev->usec_timeout; i++) { adev 282 drivers/gpu/drm/amd/amdgpu/nv.c u32 memsize = adev->nbio_funcs->get_memsize(adev); adev 289 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_atombios_scratch_regs_engine_hung(adev, false); adev 295 drivers/gpu/drm/amd/amdgpu/nv.c nv_asic_reset_method(struct amdgpu_device *adev) adev 297 drivers/gpu/drm/amd/amdgpu/nv.c struct smu_context *smu = &adev->smu; adev 305 drivers/gpu/drm/amd/amdgpu/nv.c static int nv_asic_reset(struct amdgpu_device *adev) adev 310 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_atombios_scratch_regs_engine_hung(adev, true); adev 312 drivers/gpu/drm/amd/amdgpu/nv.c nv_gpu_pci_config_reset(adev); adev 314 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_atombios_scratch_regs_engine_hung(adev, false); adev 317 drivers/gpu/drm/amd/amdgpu/nv.c struct smu_context *smu = &adev->smu; adev 319 drivers/gpu/drm/amd/amdgpu/nv.c if (nv_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) { adev 320 drivers/gpu/drm/amd/amdgpu/nv.c if (!adev->in_suspend) adev 321 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_inc_vram_lost(adev); adev 324 drivers/gpu/drm/amd/amdgpu/nv.c if (!adev->in_suspend) adev 325 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_inc_vram_lost(adev); adev 326 drivers/gpu/drm/amd/amdgpu/nv.c ret = nv_asic_mode1_reset(adev); adev 332 drivers/gpu/drm/amd/amdgpu/nv.c static int nv_set_uvd_clocks(struct amdgpu_device *adev, u32 vclk, u32 dclk) adev 338 drivers/gpu/drm/amd/amdgpu/nv.c static int nv_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) adev 344 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_pcie_gen3_enable(struct amdgpu_device *adev) adev 346 drivers/gpu/drm/amd/amdgpu/nv.c if (pci_is_root_bus(adev->pdev->bus)) adev 352 drivers/gpu/drm/amd/amdgpu/nv.c if (!(adev->pm.pcie_gen_mask & (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 | adev 359 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_program_aspm(struct amdgpu_device *adev) adev 368 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_enable_doorbell_aperture(struct amdgpu_device *adev, adev 371 drivers/gpu/drm/amd/amdgpu/nv.c adev->nbio_funcs->enable_doorbell_aperture(adev, enable); adev 372 drivers/gpu/drm/amd/amdgpu/nv.c adev->nbio_funcs->enable_doorbell_selfring_aperture(adev, enable); adev 384 drivers/gpu/drm/amd/amdgpu/nv.c static int nv_reg_base_init(struct amdgpu_device *adev) adev 389 drivers/gpu/drm/amd/amdgpu/nv.c r = amdgpu_discovery_reg_base_init(adev); adev 400 drivers/gpu/drm/amd/amdgpu/nv.c switch (adev->asic_type) { adev 402 drivers/gpu/drm/amd/amdgpu/nv.c navi10_reg_base_init(adev); adev 405 drivers/gpu/drm/amd/amdgpu/nv.c navi14_reg_base_init(adev); adev 408 drivers/gpu/drm/amd/amdgpu/nv.c navi12_reg_base_init(adev); adev 417 drivers/gpu/drm/amd/amdgpu/nv.c int nv_set_ip_blocks(struct amdgpu_device *adev) adev 422 drivers/gpu/drm/amd/amdgpu/nv.c r = nv_reg_base_init(adev); adev 426 drivers/gpu/drm/amd/amdgpu/nv.c adev->nbio_funcs = &nbio_v2_3_funcs; adev 428 drivers/gpu/drm/amd/amdgpu/nv.c adev->nbio_funcs->detect_hw_virt(adev); adev 430 drivers/gpu/drm/amd/amdgpu/nv.c switch (adev->asic_type) { adev 433 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &nv_common_ip_block); adev 434 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &gmc_v10_0_ip_block); adev 435 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block); adev 436 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block); adev 437 drivers/gpu/drm/amd/amdgpu/nv.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP && adev 438 drivers/gpu/drm/amd/amdgpu/nv.c is_support_sw_smu(adev)) adev 439 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); adev 440 drivers/gpu/drm/amd/amdgpu/nv.c if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) adev 441 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 443 drivers/gpu/drm/amd/amdgpu/nv.c else if (amdgpu_device_has_dc_support(adev)) adev 444 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &dm_ip_block); adev 446 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block); adev 447 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &sdma_v5_0_ip_block); adev 448 drivers/gpu/drm/amd/amdgpu/nv.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT && adev 449 drivers/gpu/drm/amd/amdgpu/nv.c is_support_sw_smu(adev)) adev 450 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); adev 451 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block); adev 452 drivers/gpu/drm/amd/amdgpu/nv.c if (adev->enable_mes) adev 453 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &mes_v10_1_ip_block); adev 456 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &nv_common_ip_block); adev 457 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &gmc_v10_0_ip_block); adev 458 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block); adev 459 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block); adev 460 drivers/gpu/drm/amd/amdgpu/nv.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP && adev 461 drivers/gpu/drm/amd/amdgpu/nv.c is_support_sw_smu(adev)) adev 462 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); adev 463 drivers/gpu/drm/amd/amdgpu/nv.c if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) adev 464 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 466 drivers/gpu/drm/amd/amdgpu/nv.c else if (amdgpu_device_has_dc_support(adev)) adev 467 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &dm_ip_block); adev 469 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block); adev 470 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &sdma_v5_0_ip_block); adev 471 drivers/gpu/drm/amd/amdgpu/nv.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT && adev 472 drivers/gpu/drm/amd/amdgpu/nv.c is_support_sw_smu(adev)) adev 473 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); adev 474 drivers/gpu/drm/amd/amdgpu/nv.c amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block); adev 483 drivers/gpu/drm/amd/amdgpu/nv.c static uint32_t nv_get_rev_id(struct amdgpu_device *adev) adev 485 drivers/gpu/drm/amd/amdgpu/nv.c return adev->nbio_funcs->get_rev_id(adev); adev 488 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_flush_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring) adev 490 drivers/gpu/drm/amd/amdgpu/nv.c adev->nbio_funcs->hdp_flush(adev, ring); adev 493 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_invalidate_hdp(struct amdgpu_device *adev, adev 504 drivers/gpu/drm/amd/amdgpu/nv.c static bool nv_need_full_reset(struct amdgpu_device *adev) adev 509 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_get_pcie_usage(struct amdgpu_device *adev, adev 516 drivers/gpu/drm/amd/amdgpu/nv.c static bool nv_need_reset_on_init(struct amdgpu_device *adev) adev 521 drivers/gpu/drm/amd/amdgpu/nv.c if (adev->flags & AMD_IS_APU) adev 535 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_init_doorbell_index(struct amdgpu_device *adev) adev 537 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.kiq = AMDGPU_NAVI10_DOORBELL_KIQ; adev 538 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.mec_ring0 = AMDGPU_NAVI10_DOORBELL_MEC_RING0; adev 539 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.mec_ring1 = AMDGPU_NAVI10_DOORBELL_MEC_RING1; adev 540 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.mec_ring2 = AMDGPU_NAVI10_DOORBELL_MEC_RING2; adev 541 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.mec_ring3 = AMDGPU_NAVI10_DOORBELL_MEC_RING3; adev 542 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.mec_ring4 = AMDGPU_NAVI10_DOORBELL_MEC_RING4; adev 543 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.mec_ring5 = AMDGPU_NAVI10_DOORBELL_MEC_RING5; adev 544 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.mec_ring6 = AMDGPU_NAVI10_DOORBELL_MEC_RING6; adev 545 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.mec_ring7 = AMDGPU_NAVI10_DOORBELL_MEC_RING7; adev 546 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.userqueue_start = AMDGPU_NAVI10_DOORBELL_USERQUEUE_START; adev 547 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.userqueue_end = AMDGPU_NAVI10_DOORBELL_USERQUEUE_END; adev 548 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.gfx_ring0 = AMDGPU_NAVI10_DOORBELL_GFX_RING0; adev 549 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.gfx_ring1 = AMDGPU_NAVI10_DOORBELL_GFX_RING1; adev 550 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.sdma_engine[0] = AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE0; adev 551 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.sdma_engine[1] = AMDGPU_NAVI10_DOORBELL_sDMA_ENGINE1; adev 552 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.ih = AMDGPU_NAVI10_DOORBELL_IH; adev 553 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.vcn.vcn_ring0_1 = AMDGPU_NAVI10_DOORBELL64_VCN0_1; adev 554 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.vcn.vcn_ring2_3 = AMDGPU_NAVI10_DOORBELL64_VCN2_3; adev 555 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.vcn.vcn_ring4_5 = AMDGPU_NAVI10_DOORBELL64_VCN4_5; adev 556 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.vcn.vcn_ring6_7 = AMDGPU_NAVI10_DOORBELL64_VCN6_7; adev 557 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.first_non_cp = AMDGPU_NAVI10_DOORBELL64_FIRST_NON_CP; adev 558 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.last_non_cp = AMDGPU_NAVI10_DOORBELL64_LAST_NON_CP; adev 560 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.max_assignment = AMDGPU_NAVI10_DOORBELL_MAX_ASSIGNMENT << 1; adev 561 drivers/gpu/drm/amd/amdgpu/nv.c adev->doorbell_index.sdma_doorbell_range = 20; adev 586 drivers/gpu/drm/amd/amdgpu/nv.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 588 drivers/gpu/drm/amd/amdgpu/nv.c adev->smc_rreg = NULL; adev 589 drivers/gpu/drm/amd/amdgpu/nv.c adev->smc_wreg = NULL; adev 590 drivers/gpu/drm/amd/amdgpu/nv.c adev->pcie_rreg = &nv_pcie_rreg; adev 591 drivers/gpu/drm/amd/amdgpu/nv.c adev->pcie_wreg = &nv_pcie_wreg; adev 594 drivers/gpu/drm/amd/amdgpu/nv.c adev->uvd_ctx_rreg = NULL; adev 595 drivers/gpu/drm/amd/amdgpu/nv.c adev->uvd_ctx_wreg = NULL; adev 597 drivers/gpu/drm/amd/amdgpu/nv.c adev->didt_rreg = &nv_didt_rreg; adev 598 drivers/gpu/drm/amd/amdgpu/nv.c adev->didt_wreg = &nv_didt_wreg; adev 600 drivers/gpu/drm/amd/amdgpu/nv.c adev->asic_funcs = &nv_asic_funcs; adev 602 drivers/gpu/drm/amd/amdgpu/nv.c adev->rev_id = nv_get_rev_id(adev); adev 603 drivers/gpu/drm/amd/amdgpu/nv.c adev->external_rev_id = 0xff; adev 604 drivers/gpu/drm/amd/amdgpu/nv.c switch (adev->asic_type) { adev 606 drivers/gpu/drm/amd/amdgpu/nv.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 620 drivers/gpu/drm/amd/amdgpu/nv.c adev->pg_flags = AMD_PG_SUPPORT_VCN | adev 623 drivers/gpu/drm/amd/amdgpu/nv.c adev->external_rev_id = adev->rev_id + 0x1; adev 626 drivers/gpu/drm/amd/amdgpu/nv.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 640 drivers/gpu/drm/amd/amdgpu/nv.c adev->pg_flags = AMD_PG_SUPPORT_VCN | adev 642 drivers/gpu/drm/amd/amdgpu/nv.c adev->external_rev_id = adev->rev_id + 20; adev 645 drivers/gpu/drm/amd/amdgpu/nv.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 660 drivers/gpu/drm/amd/amdgpu/nv.c adev->pg_flags = AMD_PG_SUPPORT_VCN | adev 667 drivers/gpu/drm/amd/amdgpu/nv.c if (amdgpu_sriov_vf(adev)) adev 668 drivers/gpu/drm/amd/amdgpu/nv.c adev->rev_id = 0; adev 669 drivers/gpu/drm/amd/amdgpu/nv.c adev->external_rev_id = adev->rev_id + 0xa; adev 696 drivers/gpu/drm/amd/amdgpu/nv.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 699 drivers/gpu/drm/amd/amdgpu/nv.c nv_pcie_gen3_enable(adev); adev 701 drivers/gpu/drm/amd/amdgpu/nv.c nv_program_aspm(adev); adev 703 drivers/gpu/drm/amd/amdgpu/nv.c adev->nbio_funcs->init_registers(adev); adev 705 drivers/gpu/drm/amd/amdgpu/nv.c nv_enable_doorbell_aperture(adev, true); adev 712 drivers/gpu/drm/amd/amdgpu/nv.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 715 drivers/gpu/drm/amd/amdgpu/nv.c nv_enable_doorbell_aperture(adev, false); adev 722 drivers/gpu/drm/amd/amdgpu/nv.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 724 drivers/gpu/drm/amd/amdgpu/nv.c return nv_common_hw_fini(adev); adev 729 drivers/gpu/drm/amd/amdgpu/nv.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 731 drivers/gpu/drm/amd/amdgpu/nv.c return nv_common_hw_init(adev); adev 749 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_update_hdp_mem_power_gating(struct amdgpu_device *adev, adev 755 drivers/gpu/drm/amd/amdgpu/nv.c if (!(adev->cg_flags & (AMD_CG_SUPPORT_HDP_LS | adev 792 drivers/gpu/drm/amd/amdgpu/nv.c if (adev->cg_flags & AMD_CG_SUPPORT_HDP_LS) { adev 799 drivers/gpu/drm/amd/amdgpu/nv.c } else if (adev->cg_flags & AMD_CG_SUPPORT_HDP_DS) { adev 806 drivers/gpu/drm/amd/amdgpu/nv.c } else if (adev->cg_flags & AMD_CG_SUPPORT_HDP_SD) { adev 822 drivers/gpu/drm/amd/amdgpu/nv.c static void nv_update_hdp_clock_gating(struct amdgpu_device *adev, adev 827 drivers/gpu/drm/amd/amdgpu/nv.c if (!(adev->cg_flags & AMD_CG_SUPPORT_HDP_MGCG)) adev 856 drivers/gpu/drm/amd/amdgpu/nv.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 858 drivers/gpu/drm/amd/amdgpu/nv.c if (amdgpu_sriov_vf(adev)) adev 861 drivers/gpu/drm/amd/amdgpu/nv.c switch (adev->asic_type) { adev 865 drivers/gpu/drm/amd/amdgpu/nv.c adev->nbio_funcs->update_medium_grain_clock_gating(adev, adev 867 drivers/gpu/drm/amd/amdgpu/nv.c adev->nbio_funcs->update_medium_grain_light_sleep(adev, adev 869 drivers/gpu/drm/amd/amdgpu/nv.c nv_update_hdp_mem_power_gating(adev, adev 871 drivers/gpu/drm/amd/amdgpu/nv.c nv_update_hdp_clock_gating(adev, adev 889 drivers/gpu/drm/amd/amdgpu/nv.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 892 drivers/gpu/drm/amd/amdgpu/nv.c if (amdgpu_sriov_vf(adev)) adev 895 drivers/gpu/drm/amd/amdgpu/nv.c adev->nbio_funcs->get_clockgating_state(adev, flags); adev 29 drivers/gpu/drm/amd/amdgpu/nv.h void nv_grbm_select(struct amdgpu_device *adev, adev 31 drivers/gpu/drm/amd/amdgpu/nv.h int nv_set_ip_blocks(struct amdgpu_device *adev); adev 32 drivers/gpu/drm/amd/amdgpu/nv.h int navi10_reg_base_init(struct amdgpu_device *adev); adev 33 drivers/gpu/drm/amd/amdgpu/nv.h int navi14_reg_base_init(struct amdgpu_device *adev); adev 34 drivers/gpu/drm/amd/amdgpu/nv.h int navi12_reg_base_init(struct amdgpu_device *adev); adev 46 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c struct amdgpu_device *adev = psp->adev; adev 54 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c switch (adev->asic_type) { adev 56 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c if (adev->rev_id >= 0x8) adev 58 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c else if (adev->pdev->device == 0x15d8) adev 67 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c err = request_firmware(&adev->psp.asd_fw, fw_name, adev->dev); adev 71 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c err = amdgpu_ucode_validate(adev->psp.asd_fw); adev 75 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.asd_fw->data; adev 76 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c adev->psp.asd_fw_version = le32_to_cpu(hdr->header.ucode_version); adev 77 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c adev->psp.asd_feature_version = le32_to_cpu(hdr->ucode_feature_version); adev 78 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c adev->psp.asd_ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes); adev 79 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c adev->psp.asd_start_addr = (uint8_t *)hdr + adev 85 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c dev_err(adev->dev, adev 88 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c release_firmware(adev->psp.asd_fw); adev 89 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c adev->psp.asd_fw = NULL; adev 100 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c struct amdgpu_device *adev = psp->adev; adev 108 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c ret = amdgpu_bo_create_kernel(adev, ring->ring_size, PAGE_SIZE, adev 110 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c &adev->firmware.rbuf, adev 127 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c struct amdgpu_device *adev = psp->adev; adev 158 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c struct amdgpu_device *adev = psp->adev; adev 179 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c struct amdgpu_device *adev = psp->adev; adev 185 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c amdgpu_bo_free_kernel(&adev->firmware.rbuf, adev 202 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c struct amdgpu_device *adev = psp->adev; adev 240 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c psp_v10_0_sram_map(struct amdgpu_device *adev, adev 336 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c struct amdgpu_device *adev = psp->adev; adev 338 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c err = psp_v10_0_sram_map(adev, &fw_sram_reg_val, &fw_sram_addr_reg_offset, adev 63 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c struct amdgpu_device *adev = psp->adev; adev 75 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c switch (adev->asic_type) { adev 96 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c err = request_firmware(&adev->psp.sos_fw, fw_name, adev->dev); adev 100 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c err = amdgpu_ucode_validate(adev->psp.sos_fw); adev 104 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c sos_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.sos_fw->data; adev 109 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.sos_fw_version = le32_to_cpu(sos_hdr->header.ucode_version); adev 110 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.sos_feature_version = le32_to_cpu(sos_hdr->ucode_feature_version); adev 111 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.sos_bin_size = le32_to_cpu(sos_hdr->sos_size_bytes); adev 112 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.sys_bin_size = le32_to_cpu(sos_hdr->sos_offset_bytes); adev 113 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.sys_start_addr = (uint8_t *)sos_hdr + adev 115 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.sos_start_addr = (uint8_t *)adev->psp.sys_start_addr + adev 118 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c sos_hdr_v1_1 = (const struct psp_firmware_header_v1_1 *)adev->psp.sos_fw->data; adev 119 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.toc_bin_size = le32_to_cpu(sos_hdr_v1_1->toc_size_bytes); adev 120 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.toc_start_addr = (uint8_t *)adev->psp.sys_start_addr + adev 122 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.kdb_bin_size = le32_to_cpu(sos_hdr_v1_1->kdb_size_bytes); adev 123 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.kdb_start_addr = (uint8_t *)adev->psp.sys_start_addr + adev 127 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c sos_hdr_v1_2 = (const struct psp_firmware_header_v1_2 *)adev->psp.sos_fw->data; adev 128 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.kdb_bin_size = le32_to_cpu(sos_hdr_v1_2->kdb_size_bytes); adev 129 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.kdb_start_addr = (uint8_t *)adev->psp.sys_start_addr + adev 134 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c dev_err(adev->dev, adev 141 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c err = request_firmware(&adev->psp.asd_fw, fw_name, adev->dev); adev 145 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c err = amdgpu_ucode_validate(adev->psp.asd_fw); adev 149 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c asd_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.asd_fw->data; adev 150 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.asd_fw_version = le32_to_cpu(asd_hdr->header.ucode_version); adev 151 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.asd_feature_version = le32_to_cpu(asd_hdr->ucode_feature_version); adev 152 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.asd_ucode_size = le32_to_cpu(asd_hdr->header.ucode_size_bytes); adev 153 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.asd_start_addr = (uint8_t *)asd_hdr + adev 156 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c switch (adev->asic_type) { adev 159 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev); adev 161 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c release_firmware(adev->psp.ta_fw); adev 162 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.ta_fw = NULL; adev 163 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c dev_info(adev->dev, adev 166 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c err = amdgpu_ucode_validate(adev->psp.ta_fw); adev 170 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c ta_hdr = (const struct ta_firmware_header_v1_0 *)adev->psp.ta_fw->data; adev 171 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.ta_xgmi_ucode_version = le32_to_cpu(ta_hdr->ta_xgmi_ucode_version); adev 172 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.ta_xgmi_ucode_size = le32_to_cpu(ta_hdr->ta_xgmi_size_bytes); adev 173 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.ta_xgmi_start_addr = (uint8_t *)ta_hdr + adev 175 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version); adev 176 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.ta_ras_ucode_version = le32_to_cpu(ta_hdr->ta_ras_ucode_version); adev 177 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.ta_ras_ucode_size = le32_to_cpu(ta_hdr->ta_ras_size_bytes); adev 178 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.ta_ras_start_addr = (uint8_t *)adev->psp.ta_xgmi_start_addr + adev 194 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c release_firmware(adev->psp.ta_fw); adev 195 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.ta_fw = NULL; adev 197 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c release_firmware(adev->psp.asd_fw); adev 198 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.asd_fw = NULL; adev 200 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c dev_err(adev->dev, adev 202 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c release_firmware(adev->psp.sos_fw); adev 203 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c adev->psp.sos_fw = NULL; adev 212 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c struct amdgpu_device *adev = psp->adev; adev 221 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c dev_info(adev->dev, "sos fw version = 0x%x.\n", psp->sos_fw_version); adev 254 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c struct amdgpu_device *adev = psp->adev; adev 263 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c dev_info(adev->dev, "sos fw version = 0x%x.\n", psp->sos_fw_version); adev 298 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c struct amdgpu_device *adev = psp->adev; adev 337 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c struct amdgpu_device *adev = psp->adev; adev 371 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c struct amdgpu_device *adev = psp->adev; adev 381 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c ret = amdgpu_bo_create_kernel(adev, ring->ring_size, PAGE_SIZE, adev 383 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c &adev->firmware.rbuf, adev 396 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c if (amdgpu_sriov_vf(psp->adev) && psp->sos_fw_version > 0x80045) adev 405 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c struct amdgpu_device *adev = psp->adev; adev 435 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c struct amdgpu_device *adev = psp->adev; adev 494 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c struct amdgpu_device *adev = psp->adev; adev 500 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c amdgpu_bo_free_kernel(&adev->firmware.rbuf, adev 517 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c struct amdgpu_device *adev = psp->adev; adev 564 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c psp_v11_0_sram_map(struct amdgpu_device *adev, adev 613 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c if (adev->asic_type < CHIP_NAVI10) { adev 617 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c *sram_addr_reg_offset = adev->reg_offset[GC_HWIP][0][1] + mmRLC_GPM_UCODE_ADDR_NV10; adev 618 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c *sram_data_reg_offset = adev->reg_offset[GC_HWIP][0][1] + mmRLC_GPM_UCODE_DATA_NV10; adev 624 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c if (adev->asic_type < CHIP_NAVI10) { adev 628 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c *sram_addr_reg_offset = adev->reg_offset[GC_HWIP][0][1] + mmSDMA0_UCODE_ADDR_NV10; adev 629 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c *sram_data_reg_offset = adev->reg_offset[GC_HWIP][0][1] + mmSDMA0_UCODE_DATA_NV10; adev 670 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c struct amdgpu_device *adev = psp->adev; adev 672 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c err = psp_v11_0_sram_map(adev, &fw_sram_reg_val, &fw_sram_addr_reg_offset, adev 699 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c struct amdgpu_device *adev = psp->adev; adev 46 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c struct amdgpu_device *adev = psp->adev; adev 54 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c switch (adev->asic_type) { adev 63 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c err = request_firmware(&adev->psp.asd_fw, fw_name, adev->dev); adev 67 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c err = amdgpu_ucode_validate(adev->psp.asd_fw); adev 71 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c asd_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.asd_fw->data; adev 72 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c adev->psp.asd_fw_version = le32_to_cpu(asd_hdr->header.ucode_version); adev 73 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c adev->psp.asd_feature_version = le32_to_cpu(asd_hdr->ucode_feature_version); adev 74 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c adev->psp.asd_ucode_size = le32_to_cpu(asd_hdr->header.ucode_size_bytes); adev 75 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c adev->psp.asd_start_addr = (uint8_t *)asd_hdr + adev 81 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c release_firmware(adev->psp.asd_fw); adev 82 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c adev->psp.asd_fw = NULL; adev 91 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c struct amdgpu_device *adev = psp->adev; adev 135 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c struct amdgpu_device *adev = psp->adev; adev 174 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c struct amdgpu_device *adev = psp->adev; adev 208 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c struct amdgpu_device *adev = psp->adev; adev 218 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c ret = amdgpu_bo_create_kernel(adev, ring->ring_size, PAGE_SIZE, adev 220 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c &adev->firmware.rbuf, adev 233 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c if (amdgpu_sriov_vf(psp->adev) && psp->sos_fw_version > 0x80045) adev 244 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c struct amdgpu_device *adev = psp->adev; adev 295 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c struct amdgpu_device *adev = psp->adev; adev 324 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c struct amdgpu_device *adev = psp->adev; adev 330 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c amdgpu_bo_free_kernel(&adev->firmware.rbuf, adev 347 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c struct amdgpu_device *adev = psp->adev; adev 394 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c psp_v12_0_sram_map(struct amdgpu_device *adev, adev 490 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c struct amdgpu_device *adev = psp->adev; adev 492 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c err = psp_v12_0_sram_map(adev, &fw_sram_reg_val, &fw_sram_addr_reg_offset, adev 519 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c struct amdgpu_device *adev = psp->adev; adev 61 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c struct amdgpu_device *adev = psp->adev; adev 69 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c switch (adev->asic_type) { adev 80 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c err = request_firmware(&adev->psp.sos_fw, fw_name, adev->dev); adev 84 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c err = amdgpu_ucode_validate(adev->psp.sos_fw); adev 88 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.sos_fw->data; adev 89 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c adev->psp.sos_fw_version = le32_to_cpu(hdr->header.ucode_version); adev 90 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c adev->psp.sos_feature_version = le32_to_cpu(hdr->ucode_feature_version); adev 91 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c adev->psp.sos_bin_size = le32_to_cpu(hdr->sos_size_bytes); adev 92 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c adev->psp.sys_bin_size = le32_to_cpu(hdr->header.ucode_size_bytes) - adev 94 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c adev->psp.sys_start_addr = (uint8_t *)hdr + adev 96 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c adev->psp.sos_start_addr = (uint8_t *)adev->psp.sys_start_addr + adev 100 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c err = request_firmware(&adev->psp.asd_fw, fw_name, adev->dev); adev 104 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c err = amdgpu_ucode_validate(adev->psp.asd_fw); adev 108 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.asd_fw->data; adev 109 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c adev->psp.asd_fw_version = le32_to_cpu(hdr->header.ucode_version); adev 110 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c adev->psp.asd_feature_version = le32_to_cpu(hdr->ucode_feature_version); adev 111 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c adev->psp.asd_ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes); adev 112 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c adev->psp.asd_start_addr = (uint8_t *)hdr + adev 118 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c dev_err(adev->dev, adev 121 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c release_firmware(adev->psp.sos_fw); adev 122 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c adev->psp.sos_fw = NULL; adev 123 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c release_firmware(adev->psp.asd_fw); adev 124 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c adev->psp.asd_fw = NULL; adev 134 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c struct amdgpu_device *adev = psp->adev; adev 171 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c static bool psp_v3_1_match_version(struct amdgpu_device *adev, uint32_t ver) adev 175 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c if (ver == adev->psp.sos_fw_version) adev 183 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c if (sos_old_versions[i] == adev->psp.sos_fw_version) adev 194 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c struct amdgpu_device *adev = psp->adev; adev 232 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c if (!psp_v3_1_match_version(adev, ver)) adev 243 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c struct amdgpu_device *adev = psp->adev; adev 251 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c ret = amdgpu_bo_create_kernel(adev, ring->ring_size, PAGE_SIZE, adev 253 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c &adev->firmware.rbuf, adev 266 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c struct amdgpu_device *adev = psp->adev; adev 301 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c struct amdgpu_device *adev = psp->adev; adev 364 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c struct amdgpu_device *adev = psp->adev; adev 400 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c struct amdgpu_device *adev = psp->adev; adev 406 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c amdgpu_bo_free_kernel(&adev->firmware.rbuf, adev 423 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c struct amdgpu_device *adev = psp->adev; adev 472 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c psp_v3_1_sram_map(struct amdgpu_device *adev, adev 568 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c struct amdgpu_device *adev = psp->adev; adev 570 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c err = psp_v3_1_sram_map(adev, &fw_sram_reg_val, &fw_sram_addr_reg_offset, adev 595 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c struct amdgpu_device *adev = psp->adev; adev 606 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c struct amdgpu_device *adev = psp->adev; adev 638 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c if (amdgpu_sriov_vf(psp->adev)) adev 52 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static void sdma_v2_4_set_ring_funcs(struct amdgpu_device *adev); adev 53 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static void sdma_v2_4_set_buffer_funcs(struct amdgpu_device *adev); adev 54 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static void sdma_v2_4_set_vm_pte_funcs(struct amdgpu_device *adev); adev 55 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static void sdma_v2_4_set_irq_funcs(struct amdgpu_device *adev); adev 97 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static void sdma_v2_4_init_golden_registers(struct amdgpu_device *adev) adev 99 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c switch (adev->asic_type) { adev 101 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c amdgpu_device_program_register_sequence(adev, adev 104 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c amdgpu_device_program_register_sequence(adev, adev 113 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static void sdma_v2_4_free_microcode(struct amdgpu_device *adev) adev 116 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 117 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c release_firmware(adev->sdma.instance[i].fw); adev 118 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->sdma.instance[i].fw = NULL; adev 131 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static int sdma_v2_4_init_microcode(struct amdgpu_device *adev) adev 142 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c switch (adev->asic_type) { adev 149 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 154 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); adev 157 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); adev 160 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; adev 161 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version); adev 162 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); adev 163 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c if (adev->sdma.instance[i].feature_version >= 20) adev 164 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->sdma.instance[i].burst_nop = true; adev 166 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU) { adev 167 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i]; adev 169 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c info->fw = adev->sdma.instance[i].fw; adev 171 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->firmware.fw_size += adev 179 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 180 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c release_firmware(adev->sdma.instance[i].fw); adev 181 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->sdma.instance[i].fw = NULL; adev 197 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c return ring->adev->wb.wb[ring->rptr_offs] >> 2; adev 209 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_device *adev = ring->adev; adev 224 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_device *adev = ring->adev; adev 339 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static void sdma_v2_4_gfx_stop(struct amdgpu_device *adev) adev 341 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_ring *sdma0 = &adev->sdma.instance[0].ring; adev 342 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_ring *sdma1 = &adev->sdma.instance[1].ring; adev 346 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c if ((adev->mman.buffer_funcs_ring == sdma0) || adev 347 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c (adev->mman.buffer_funcs_ring == sdma1)) adev 348 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c amdgpu_ttm_set_buffer_funcs_status(adev, false); adev 350 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 369 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static void sdma_v2_4_rlc_stop(struct amdgpu_device *adev) adev 382 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static void sdma_v2_4_enable(struct amdgpu_device *adev, bool enable) adev 388 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c sdma_v2_4_gfx_stop(adev); adev 389 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c sdma_v2_4_rlc_stop(adev); adev 392 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 410 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static int sdma_v2_4_gfx_resume(struct amdgpu_device *adev) adev 418 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 419 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c ring = &adev->sdma.instance[i].ring; adev 422 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c mutex_lock(&adev->srbm_mutex); adev 424 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c vi_srbm_select(adev, 0, 0, 0, j); adev 429 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c vi_srbm_select(adev, 0, 0, 0, 0); adev 430 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c mutex_unlock(&adev->srbm_mutex); adev 433 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->gfx.config.gb_addr_config & 0x70); adev 456 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c upper_32_bits(adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFF); adev 458 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c lower_32_bits(adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFC); adev 483 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c sdma_v2_4_enable(adev, true); adev 484 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 485 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c ring = &adev->sdma.instance[i].ring; adev 490 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c if (adev->mman.buffer_funcs_ring == ring) adev 491 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c amdgpu_ttm_set_buffer_funcs_status(adev, true); adev 505 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static int sdma_v2_4_rlc_resume(struct amdgpu_device *adev) adev 520 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static int sdma_v2_4_start(struct amdgpu_device *adev) adev 525 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c sdma_v2_4_enable(adev, false); adev 528 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c r = sdma_v2_4_gfx_resume(adev); adev 531 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c r = sdma_v2_4_rlc_resume(adev); adev 549 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_device *adev = ring->adev; adev 556 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c r = amdgpu_device_wb_get(adev, &index); adev 560 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c gpu_addr = adev->wb.gpu_addr + (index * 4); adev 562 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->wb.wb[index] = cpu_to_le32(tmp); adev 576 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c for (i = 0; i < adev->usec_timeout; i++) { adev 577 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c tmp = le32_to_cpu(adev->wb.wb[index]); adev 583 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c if (i >= adev->usec_timeout) adev 587 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c amdgpu_device_wb_free(adev, index); adev 601 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_device *adev = ring->adev; adev 609 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c r = amdgpu_device_wb_get(adev, &index); adev 613 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c gpu_addr = adev->wb.gpu_addr + (index * 4); adev 615 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->wb.wb[index] = cpu_to_le32(tmp); adev 617 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c r = amdgpu_ib_get(adev, NULL, 256, &ib); adev 643 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c tmp = le32_to_cpu(adev->wb.wb[index]); adev 650 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c amdgpu_ib_free(adev, &ib, NULL); adev 653 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c amdgpu_device_wb_free(adev, index); adev 826 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 828 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->sdma.num_instances = SDMA_MAX_INSTANCE; adev 830 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c sdma_v2_4_set_ring_funcs(adev); adev 831 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c sdma_v2_4_set_buffer_funcs(adev); adev 832 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c sdma_v2_4_set_vm_pte_funcs(adev); adev 833 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c sdma_v2_4_set_irq_funcs(adev); adev 842 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 845 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SDMA_TRAP, adev 846 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c &adev->sdma.trap_irq); adev 851 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 241, adev 852 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c &adev->sdma.illegal_inst_irq); adev 857 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SDMA_SRBM_WRITE, adev 858 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c &adev->sdma.illegal_inst_irq); adev 862 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c r = sdma_v2_4_init_microcode(adev); adev 868 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 869 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c ring = &adev->sdma.instance[i].ring; adev 873 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c r = amdgpu_ring_init(adev, ring, 1024, adev 874 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c &adev->sdma.trap_irq, adev 887 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 890 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c for (i = 0; i < adev->sdma.num_instances; i++) adev 891 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c amdgpu_ring_fini(&adev->sdma.instance[i].ring); adev 893 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c sdma_v2_4_free_microcode(adev); adev 900 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 902 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c sdma_v2_4_init_golden_registers(adev); adev 904 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c r = sdma_v2_4_start(adev); adev 913 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 915 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c sdma_v2_4_enable(adev, false); adev 922 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 924 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c return sdma_v2_4_hw_fini(adev); adev 929 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 931 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c return sdma_v2_4_hw_init(adev); adev 936 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 950 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 952 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c for (i = 0; i < adev->usec_timeout; i++) { adev 966 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 987 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 1004 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static int sdma_v2_4_set_trap_irq_state(struct amdgpu_device *adev, adev 1050 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static int sdma_v2_4_process_trap_irq(struct amdgpu_device *adev, adev 1063 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c amdgpu_fence_process(&adev->sdma.instance[0].ring); adev 1076 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c amdgpu_fence_process(&adev->sdma.instance[1].ring); adev 1090 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static int sdma_v2_4_process_illegal_inst_irq(struct amdgpu_device *adev, adev 1101 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c drm_sched_fault(&adev->sdma.instance[instance_id].ring.sched); adev 1162 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static void sdma_v2_4_set_ring_funcs(struct amdgpu_device *adev) adev 1166 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1167 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->sdma.instance[i].ring.funcs = &sdma_v2_4_ring_funcs; adev 1168 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->sdma.instance[i].ring.me = i; adev 1181 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static void sdma_v2_4_set_irq_funcs(struct amdgpu_device *adev) adev 1183 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST; adev 1184 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->sdma.trap_irq.funcs = &sdma_v2_4_trap_irq_funcs; adev 1185 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->sdma.illegal_inst_irq.funcs = &sdma_v2_4_illegal_inst_irq_funcs; adev 1247 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static void sdma_v2_4_set_buffer_funcs(struct amdgpu_device *adev) adev 1249 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->mman.buffer_funcs = &sdma_v2_4_buffer_funcs; adev 1250 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; adev 1261 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c static void sdma_v2_4_set_vm_pte_funcs(struct amdgpu_device *adev) adev 1266 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->vm_manager.vm_pte_funcs = &sdma_v2_4_vm_pte_funcs; adev 1267 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1268 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c sched = &adev->sdma.instance[i].ring.sched; adev 1269 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->vm_manager.vm_pte_rqs[i] = adev 1272 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c adev->vm_manager.vm_pte_num_rqs = adev->sdma.num_instances; adev 52 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static void sdma_v3_0_set_ring_funcs(struct amdgpu_device *adev); adev 53 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static void sdma_v3_0_set_buffer_funcs(struct amdgpu_device *adev); adev 54 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static void sdma_v3_0_set_vm_pte_funcs(struct amdgpu_device *adev); adev 55 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static void sdma_v3_0_set_irq_funcs(struct amdgpu_device *adev); adev 198 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static void sdma_v3_0_init_golden_registers(struct amdgpu_device *adev) adev 200 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c switch (adev->asic_type) { adev 202 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_device_program_register_sequence(adev, adev 205 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_device_program_register_sequence(adev, adev 210 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_device_program_register_sequence(adev, adev 213 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_device_program_register_sequence(adev, adev 220 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_device_program_register_sequence(adev, adev 225 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_device_program_register_sequence(adev, adev 230 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_device_program_register_sequence(adev, adev 233 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_device_program_register_sequence(adev, adev 238 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_device_program_register_sequence(adev, adev 241 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_device_program_register_sequence(adev, adev 250 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static void sdma_v3_0_free_microcode(struct amdgpu_device *adev) adev 253 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 254 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c release_firmware(adev->sdma.instance[i].fw); adev 255 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->sdma.instance[i].fw = NULL; adev 268 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static int sdma_v3_0_init_microcode(struct amdgpu_device *adev) adev 279 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c switch (adev->asic_type) { adev 307 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 312 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); adev 315 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); adev 318 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; adev 319 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version); adev 320 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); adev 321 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c if (adev->sdma.instance[i].feature_version >= 20) adev 322 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->sdma.instance[i].burst_nop = true; adev 324 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i]; adev 326 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c info->fw = adev->sdma.instance[i].fw; adev 328 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->firmware.fw_size += adev 335 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 336 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c release_firmware(adev->sdma.instance[i].fw); adev 337 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->sdma.instance[i].fw = NULL; adev 353 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c return ring->adev->wb.wb[ring->rptr_offs] >> 2; adev 365 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = ring->adev; adev 370 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c wptr = ring->adev->wb.wb[ring->wptr_offs] >> 2; adev 387 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = ring->adev; adev 390 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c u32 *wb = (u32 *)&adev->wb.wb[ring->wptr_offs]; adev 395 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c u32 *wb = (u32 *)&adev->wb.wb[ring->wptr_offs]; adev 513 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static void sdma_v3_0_gfx_stop(struct amdgpu_device *adev) adev 515 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_ring *sdma0 = &adev->sdma.instance[0].ring; adev 516 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_ring *sdma1 = &adev->sdma.instance[1].ring; adev 520 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c if ((adev->mman.buffer_funcs_ring == sdma0) || adev 521 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c (adev->mman.buffer_funcs_ring == sdma1)) adev 522 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_ttm_set_buffer_funcs_status(adev, false); adev 524 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 543 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static void sdma_v3_0_rlc_stop(struct amdgpu_device *adev) adev 556 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static void sdma_v3_0_ctx_switch_enable(struct amdgpu_device *adev, bool enable) adev 585 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 617 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static void sdma_v3_0_enable(struct amdgpu_device *adev, bool enable) adev 623 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_gfx_stop(adev); adev 624 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_rlc_stop(adev); adev 627 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 645 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static int sdma_v3_0_gfx_resume(struct amdgpu_device *adev) adev 655 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 656 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c ring = &adev->sdma.instance[i].ring; adev 660 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c mutex_lock(&adev->srbm_mutex); adev 662 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c vi_srbm_select(adev, 0, 0, 0, j); adev 667 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c vi_srbm_select(adev, 0, 0, 0, 0); adev 668 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c mutex_unlock(&adev->srbm_mutex); adev 671 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->gfx.config.gb_addr_config & 0x70); adev 695 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c upper_32_bits(adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFF); adev 697 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c lower_32_bits(adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFC); adev 716 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 752 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_enable(adev, true); adev 754 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_ctx_switch_enable(adev, true); adev 756 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 757 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c ring = &adev->sdma.instance[i].ring; adev 762 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c if (adev->mman.buffer_funcs_ring == ring) adev 763 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_ttm_set_buffer_funcs_status(adev, true); adev 777 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static int sdma_v3_0_rlc_resume(struct amdgpu_device *adev) adev 791 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static int sdma_v3_0_start(struct amdgpu_device *adev) adev 796 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_ctx_switch_enable(adev, false); adev 797 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_enable(adev, false); adev 800 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c r = sdma_v3_0_gfx_resume(adev); adev 803 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c r = sdma_v3_0_rlc_resume(adev); adev 821 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = ring->adev; adev 828 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c r = amdgpu_device_wb_get(adev, &index); adev 832 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c gpu_addr = adev->wb.gpu_addr + (index * 4); adev 834 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->wb.wb[index] = cpu_to_le32(tmp); adev 848 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 849 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c tmp = le32_to_cpu(adev->wb.wb[index]); adev 855 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c if (i >= adev->usec_timeout) adev 859 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_device_wb_free(adev, index); adev 873 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = ring->adev; adev 881 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c r = amdgpu_device_wb_get(adev, &index); adev 885 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c gpu_addr = adev->wb.gpu_addr + (index * 4); adev 887 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->wb.wb[index] = cpu_to_le32(tmp); adev 889 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c r = amdgpu_ib_get(adev, NULL, 256, &ib); adev 915 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c tmp = le32_to_cpu(adev->wb.wb[index]); adev 921 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_ib_free(adev, &ib, NULL); adev 924 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_device_wb_free(adev, index); adev 1097 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1099 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c switch (adev->asic_type) { adev 1101 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->sdma.num_instances = 1; adev 1104 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->sdma.num_instances = SDMA_MAX_INSTANCE; adev 1108 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_set_ring_funcs(adev); adev 1109 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_set_buffer_funcs(adev); adev 1110 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_set_vm_pte_funcs(adev); adev 1111 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_set_irq_funcs(adev); adev 1120 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1123 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SDMA_TRAP, adev 1124 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c &adev->sdma.trap_irq); adev 1129 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 241, adev 1130 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c &adev->sdma.illegal_inst_irq); adev 1135 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SDMA_SRBM_WRITE, adev 1136 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c &adev->sdma.illegal_inst_irq); adev 1140 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c r = sdma_v3_0_init_microcode(adev); adev 1146 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1147 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c ring = &adev->sdma.instance[i].ring; adev 1149 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c if (!amdgpu_sriov_vf(adev)) { adev 1151 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c ring->doorbell_index = adev->doorbell_index.sdma_engine[i]; adev 1157 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c r = amdgpu_ring_init(adev, ring, 1024, adev 1158 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c &adev->sdma.trap_irq, adev 1171 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1174 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) adev 1175 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_ring_fini(&adev->sdma.instance[i].ring); adev 1177 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_free_microcode(adev); adev 1184 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1186 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_init_golden_registers(adev); adev 1188 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c r = sdma_v3_0_start(adev); adev 1197 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1199 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_ctx_switch_enable(adev, false); adev 1200 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_enable(adev, false); adev 1207 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1209 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c return sdma_v3_0_hw_fini(adev); adev 1214 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1216 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c return sdma_v3_0_hw_init(adev); adev 1221 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1235 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1237 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 1250 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1261 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->sdma.srbm_soft_reset = srbm_soft_reset; adev 1264 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->sdma.srbm_soft_reset = 0; adev 1271 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1274 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c if (!adev->sdma.srbm_soft_reset) adev 1277 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c srbm_soft_reset = adev->sdma.srbm_soft_reset; adev 1281 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_ctx_switch_enable(adev, false); adev 1282 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_enable(adev, false); adev 1290 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1293 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c if (!adev->sdma.srbm_soft_reset) adev 1296 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c srbm_soft_reset = adev->sdma.srbm_soft_reset; adev 1300 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_gfx_resume(adev); adev 1301 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_rlc_resume(adev); adev 1309 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1313 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c if (!adev->sdma.srbm_soft_reset) adev 1316 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c srbm_soft_reset = adev->sdma.srbm_soft_reset; adev 1321 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 1338 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static int sdma_v3_0_set_trap_irq_state(struct amdgpu_device *adev, adev 1384 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static int sdma_v3_0_process_trap_irq(struct amdgpu_device *adev, adev 1397 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_fence_process(&adev->sdma.instance[0].ring); adev 1410 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c amdgpu_fence_process(&adev->sdma.instance[1].ring); adev 1424 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static int sdma_v3_0_process_illegal_inst_irq(struct amdgpu_device *adev, adev 1435 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c drm_sched_fault(&adev->sdma.instance[instance_id].ring.sched); adev 1440 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev, adev 1446 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG)) { adev 1447 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1461 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1479 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev, adev 1485 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_LS)) { adev 1486 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1494 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1507 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1509 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c if (amdgpu_sriov_vf(adev)) adev 1512 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c switch (adev->asic_type) { adev 1516 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_update_sdma_medium_grain_clock_gating(adev, adev 1518 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_update_sdma_medium_grain_light_sleep(adev, adev 1535 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1538 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c if (amdgpu_sriov_vf(adev)) adev 1600 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static void sdma_v3_0_set_ring_funcs(struct amdgpu_device *adev) adev 1604 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1605 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->sdma.instance[i].ring.funcs = &sdma_v3_0_ring_funcs; adev 1606 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->sdma.instance[i].ring.me = i; adev 1619 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static void sdma_v3_0_set_irq_funcs(struct amdgpu_device *adev) adev 1621 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST; adev 1622 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->sdma.trap_irq.funcs = &sdma_v3_0_trap_irq_funcs; adev 1623 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->sdma.illegal_inst_irq.funcs = &sdma_v3_0_illegal_inst_irq_funcs; adev 1685 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static void sdma_v3_0_set_buffer_funcs(struct amdgpu_device *adev) adev 1687 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->mman.buffer_funcs = &sdma_v3_0_buffer_funcs; adev 1688 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; adev 1699 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c static void sdma_v3_0_set_vm_pte_funcs(struct amdgpu_device *adev) adev 1704 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->vm_manager.vm_pte_funcs = &sdma_v3_0_vm_pte_funcs; adev 1705 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1706 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sched = &adev->sdma.instance[i].ring.sched; adev 1707 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->vm_manager.vm_pte_rqs[i] = adev 1710 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c adev->vm_manager.vm_pte_num_rqs = adev->sdma.num_instances; adev 77 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c WREG32(sdma_v4_0_get_reg_offset(adev, (instance), (offset)), value) adev 79 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c RREG32(sdma_v4_0_get_reg_offset(adev, (instance), (offset))) adev 81 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_set_ring_funcs(struct amdgpu_device *adev); adev 82 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_set_buffer_funcs(struct amdgpu_device *adev); adev 83 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_set_vm_pte_funcs(struct amdgpu_device *adev); adev 84 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_set_irq_funcs(struct amdgpu_device *adev); adev 260 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static u32 sdma_v4_0_get_reg_offset(struct amdgpu_device *adev, adev 265 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c return (adev->reg_offset[SDMA0_HWIP][0][0] + offset); adev 267 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c return (adev->reg_offset[SDMA1_HWIP][0][0] + offset); adev 269 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c return (adev->reg_offset[SDMA2_HWIP][0][1] + offset); adev 271 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c return (adev->reg_offset[SDMA3_HWIP][0][1] + offset); adev 273 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c return (adev->reg_offset[SDMA4_HWIP][0][1] + offset); adev 275 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c return (adev->reg_offset[SDMA5_HWIP][0][1] + offset); adev 277 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c return (adev->reg_offset[SDMA6_HWIP][0][1] + offset); adev 279 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c return (adev->reg_offset[SDMA7_HWIP][0][1] + offset); adev 336 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_init_golden_registers(struct amdgpu_device *adev) adev 338 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c switch (adev->asic_type) { adev 340 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c soc15_program_register_sequence(adev, adev 343 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c soc15_program_register_sequence(adev, adev 348 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c soc15_program_register_sequence(adev, adev 351 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c soc15_program_register_sequence(adev, adev 356 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c soc15_program_register_sequence(adev, adev 359 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c soc15_program_register_sequence(adev, adev 362 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c soc15_program_register_sequence(adev, adev 367 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c soc15_program_register_sequence(adev, adev 372 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c soc15_program_register_sequence(adev, adev 375 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->rev_id >= 8) adev 376 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c soc15_program_register_sequence(adev, adev 380 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c soc15_program_register_sequence(adev, adev 385 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c soc15_program_register_sequence(adev, adev 413 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_destroy_inst_ctx(struct amdgpu_device *adev) adev 417 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 418 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->sdma.instance[i].fw != NULL) adev 419 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c release_firmware(adev->sdma.instance[i].fw); adev 423 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->asic_type == CHIP_ARCTURUS) adev 427 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c memset((void*)adev->sdma.instance, 0, adev 443 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static int sdma_v4_0_init_microcode(struct amdgpu_device *adev) adev 453 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c switch (adev->asic_type) { adev 464 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->rev_id >= 8) adev 466 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c else if (adev->pdev->device == 0x15d8) adev 483 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c err = request_firmware(&adev->sdma.instance[0].fw, fw_name, adev->dev); adev 487 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c err = sdma_v4_0_init_inst_ctx(&adev->sdma.instance[0]); adev 491 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 1; i < adev->sdma.num_instances; i++) { adev 492 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->asic_type == CHIP_ARCTURUS) { adev 495 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c memcpy((void*)&adev->sdma.instance[i], adev 496 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c (void*)&adev->sdma.instance[0], adev 502 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); adev 506 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c err = sdma_v4_0_init_inst_ctx(&adev->sdma.instance[i]); adev 513 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->firmware.load_type == AMDGPU_FW_LOAD_PSP ? "true" : "false"); adev 515 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 516 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 517 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i]; adev 519 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c info->fw = adev->sdma.instance[i].fw; adev 521 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->firmware.fw_size += adev 529 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_destroy_inst_ctx(adev); adev 546 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c rptr = ((u64 *)&ring->adev->wb.wb[ring->rptr_offs]); adev 561 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = ring->adev; adev 566 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c wptr = READ_ONCE(*((u64 *)&adev->wb.wb[ring->wptr_offs])); adev 588 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = ring->adev; adev 592 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c u64 *wb = (u64 *)&adev->wb.wb[ring->wptr_offs]; adev 630 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = ring->adev; adev 635 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c wptr = READ_ONCE(*((u64 *)&adev->wb.wb[ring->wptr_offs])); adev 654 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = ring->adev; adev 657 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c u64 *wb = (u64 *)&adev->wb.wb[ring->wptr_offs]; adev 748 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = ring->adev; adev 750 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio_funcs->hdp_flush_reg; adev 755 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->nbio_funcs->get_hdp_flush_done_offset(adev), adev 756 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->nbio_funcs->get_hdp_flush_req_offset(adev), adev 806 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_gfx_stop(struct amdgpu_device *adev) adev 812 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 813 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma[i] = &adev->sdma.instance[i].ring; adev 815 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if ((adev->mman.buffer_funcs_ring == sdma[i]) && unset != 1) { adev 816 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ttm_set_buffer_funcs_status(adev, false); adev 838 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_rlc_stop(struct amdgpu_device *adev) adev 850 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_page_stop(struct amdgpu_device *adev) adev 857 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 858 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma[i] = &adev->sdma.instance[i].page; adev 860 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if ((adev->mman.buffer_funcs_ring == sdma[i]) && adev 862 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ttm_set_buffer_funcs_status(adev, false); adev 887 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_ctx_switch_enable(struct amdgpu_device *adev, bool enable) adev 916 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 938 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_enable(struct amdgpu_device *adev, bool enable) adev 944 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_gfx_stop(adev); adev 945 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_rlc_stop(adev); adev 946 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->sdma.has_page_queue) adev 947 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_page_stop(adev); adev 950 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 983 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_gfx_resume(struct amdgpu_device *adev, unsigned int i) adev 985 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_ring *ring = &adev->sdma.instance[i].ring; adev 1006 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c upper_32_bits(adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFF); adev 1008 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c lower_32_bits(adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFC); adev 1038 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 1046 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c F32_POLL_ENABLE, amdgpu_sriov_vf(adev)? 1 : 0); adev 1073 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_page_resume(struct amdgpu_device *adev, unsigned int i) adev 1075 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_ring *ring = &adev->sdma.instance[i].page; adev 1096 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c upper_32_bits(adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFF); adev 1098 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c lower_32_bits(adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFC); adev 1129 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 1137 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c F32_POLL_ENABLE, amdgpu_sriov_vf(adev)? 1 : 0); adev 1156 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_1_update_power_gating(struct amdgpu_device *adev, bool enable) adev 1160 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (enable && (adev->pg_flags & AMD_PG_SUPPORT_SDMA)) { adev 1176 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_1_init_power_gating(struct amdgpu_device *adev) adev 1203 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_init_pg(struct amdgpu_device *adev) adev 1205 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (!(adev->pg_flags & AMD_PG_SUPPORT_SDMA)) adev 1208 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c switch (adev->asic_type) { adev 1211 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_1_init_power_gating(adev); adev 1212 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_1_update_power_gating(adev, true); adev 1227 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static int sdma_v4_0_rlc_resume(struct amdgpu_device *adev) adev 1229 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_init_pg(adev); adev 1242 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static int sdma_v4_0_load_microcode(struct amdgpu_device *adev) adev 1250 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_enable(adev, false); adev 1252 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1253 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (!adev->sdma.instance[i].fw) adev 1256 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; adev 1261 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c (adev->sdma.instance[i].fw->data + adev 1271 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.instance[i].fw_version); adev 1285 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static int sdma_v4_0_start(struct amdgpu_device *adev) adev 1290 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (amdgpu_sriov_vf(adev)) { adev 1291 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_ctx_switch_enable(adev, false); adev 1292 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_enable(adev, false); adev 1295 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) { adev 1296 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = sdma_v4_0_load_microcode(adev); adev 1302 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_enable(adev, true); adev 1304 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_ctx_switch_enable(adev, true); adev 1308 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1312 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_gfx_resume(adev, i); adev 1313 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->sdma.has_page_queue) adev 1314 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_page_resume(adev, i); adev 1321 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (!amdgpu_sriov_vf(adev)) { adev 1329 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (amdgpu_sriov_vf(adev)) { adev 1330 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_ctx_switch_enable(adev, true); adev 1331 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_enable(adev, true); adev 1333 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = sdma_v4_0_rlc_resume(adev); adev 1338 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1339 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ring = &adev->sdma.instance[i].ring; adev 1345 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->sdma.has_page_queue) { adev 1346 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_ring *page = &adev->sdma.instance[i].page; adev 1352 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->mman.buffer_funcs_ring == page) adev 1353 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ttm_set_buffer_funcs_status(adev, true); adev 1356 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->mman.buffer_funcs_ring == ring) adev 1357 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ttm_set_buffer_funcs_status(adev, true); adev 1374 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = ring->adev; adev 1381 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = amdgpu_device_wb_get(adev, &index); adev 1385 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c gpu_addr = adev->wb.gpu_addr + (index * 4); adev 1387 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->wb.wb[index] = cpu_to_le32(tmp); adev 1401 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 1402 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c tmp = le32_to_cpu(adev->wb.wb[index]); adev 1408 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (i >= adev->usec_timeout) adev 1412 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_device_wb_free(adev, index); adev 1426 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = ring->adev; adev 1434 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = amdgpu_device_wb_get(adev, &index); adev 1438 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c gpu_addr = adev->wb.gpu_addr + (index * 4); adev 1440 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->wb.wb[index] = cpu_to_le32(tmp); adev 1442 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = amdgpu_ib_get(adev, NULL, 256, &ib); adev 1468 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c tmp = le32_to_cpu(adev->wb.wb[index]); adev 1475 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ib_free(adev, &ib, NULL); adev 1478 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_device_wb_free(adev, index); adev 1644 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static bool sdma_v4_0_fw_support_paging_queue(struct amdgpu_device *adev) adev 1646 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c uint fw_version = adev->sdma.instance[0].fw_version; adev 1648 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c switch (adev->asic_type) { adev 1663 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1666 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->asic_type == CHIP_RAVEN || adev->asic_type == CHIP_RENOIR) adev 1667 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.num_instances = 1; adev 1668 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c else if (adev->asic_type == CHIP_ARCTURUS) adev 1669 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.num_instances = 8; adev 1671 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.num_instances = 2; adev 1673 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = sdma_v4_0_init_microcode(adev); adev 1680 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if ((adev->asic_type == CHIP_VEGA10) && amdgpu_sriov_vf((adev))) adev 1681 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.has_page_queue = false; adev 1682 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c else if (sdma_v4_0_fw_support_paging_queue(adev)) adev 1683 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.has_page_queue = true; adev 1685 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_set_ring_funcs(adev); adev 1686 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_set_buffer_funcs(adev); adev 1687 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_set_vm_pte_funcs(adev); adev 1688 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_set_irq_funcs(adev); adev 1693 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static int sdma_v4_0_process_ras_data_cb(struct amdgpu_device *adev, adev 1699 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1700 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct ras_common_if **ras_if = &adev->sdma.ras_if; adev 1716 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA)) { adev 1717 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ras_feature_enable_on_boot(adev, &ras_block, 0); adev 1727 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = amdgpu_ras_feature_enable_on_boot(adev, *ras_if, 1); adev 1731 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ras_request_reset_on_boot(adev, adev 1748 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = amdgpu_ras_feature_enable_on_boot(adev, *ras_if, 1); adev 1751 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ras_request_reset_on_boot(adev, adev 1761 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = amdgpu_ras_interrupt_add_handler(adev, &ih_info); adev 1765 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ras_debugfs_create(adev, &fs_info); adev 1767 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = amdgpu_ras_sysfs_create(adev, &fs_info); adev 1771 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1772 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = amdgpu_irq_get(adev, &adev->sdma.ecc_irq, adev 1780 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ras_sysfs_remove(adev, *ras_if); adev 1782 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ras_debugfs_remove(adev, *ras_if); adev 1783 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ras_interrupt_remove_handler(adev, &ih_info); adev 1785 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ras_feature_enable(adev, *ras_if, 0); adev 1796 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1799 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1800 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = amdgpu_irq_add_id(adev, sdma_v4_0_seq_to_irq_id(i), adev 1802 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c &adev->sdma.trap_irq); adev 1808 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1809 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = amdgpu_irq_add_id(adev, sdma_v4_0_seq_to_irq_id(i), adev 1811 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c &adev->sdma.ecc_irq); adev 1816 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1817 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ring = &adev->sdma.instance[i].ring; adev 1825 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ring->doorbell_index = adev->doorbell_index.sdma_engine[i] << 1; adev 1828 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = amdgpu_ring_init(adev, ring, 1024, &adev->sdma.trap_irq, adev 1833 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->sdma.has_page_queue) { adev 1834 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ring = &adev->sdma.instance[i].page; adev 1841 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ring->doorbell_index = adev->doorbell_index.sdma_engine[i] << 1; adev 1845 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = amdgpu_ring_init(adev, ring, 1024, adev 1846 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c &adev->sdma.trap_irq, adev 1858 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1861 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA) && adev 1862 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.ras_if) { adev 1863 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct ras_common_if *ras_if = adev->sdma.ras_if; adev 1869 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ras_debugfs_remove(adev, ras_if); adev 1870 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ras_sysfs_remove(adev, ras_if); adev 1872 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ras_interrupt_remove_handler(adev, &ih_info); adev 1873 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ras_feature_enable(adev, ras_if, 0); adev 1877 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1878 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ring_fini(&adev->sdma.instance[i].ring); adev 1879 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->sdma.has_page_queue) adev 1880 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ring_fini(&adev->sdma.instance[i].page); adev 1883 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_destroy_inst_ctx(adev); adev 1891 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1893 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if ((adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs && adev 1894 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->powerplay.pp_funcs->set_powergating_by_smu) || adev 1895 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->asic_type == CHIP_RENOIR) adev 1896 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, false); adev 1898 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (!amdgpu_sriov_vf(adev)) adev 1899 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_init_golden_registers(adev); adev 1901 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c r = sdma_v4_0_start(adev); adev 1908 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1911 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (amdgpu_sriov_vf(adev)) adev 1914 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1915 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_irq_put(adev, &adev->sdma.ecc_irq, adev 1919 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_ctx_switch_enable(adev, false); adev 1920 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_enable(adev, false); adev 1922 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if ((adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs adev 1923 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c && adev->powerplay.pp_funcs->set_powergating_by_smu) || adev 1924 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->asic_type == CHIP_RENOIR) adev 1925 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, true); adev 1932 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1934 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c return sdma_v4_0_hw_fini(adev); adev 1939 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1941 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c return sdma_v4_0_hw_init(adev); adev 1946 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1949 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1963 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1965 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 1966 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (j = 0; j < adev->sdma.num_instances; j++) { adev 1971 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (j == adev->sdma.num_instances) adev 1985 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static int sdma_v4_0_set_trap_irq_state(struct amdgpu_device *adev, adev 2000 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static int sdma_v4_0_process_trap_irq(struct amdgpu_device *adev, adev 2010 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_fence_process(&adev->sdma.instance[instance].ring); adev 2013 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->asic_type == CHIP_VEGA20) adev 2014 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_fence_process(&adev->sdma.instance[instance].page); adev 2020 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->asic_type != CHIP_VEGA20) adev 2021 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_fence_process(&adev->sdma.instance[instance].page); adev 2027 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static int sdma_v4_0_process_ras_data_cb(struct amdgpu_device *adev, adev 2049 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c kgd2kfd_set_sram_ecc_flag(adev->kfd.dev); adev 2051 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ras_reset_gpu(adev, 0); adev 2056 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static int sdma_v4_0_process_ecc_irq(struct amdgpu_device *adev, adev 2060 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct ras_common_if *ras_if = adev->sdma.ras_if; adev 2070 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c amdgpu_ras_interrupt_dispatch(adev, &ih_data); adev 2074 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static int sdma_v4_0_process_illegal_inst_irq(struct amdgpu_device *adev, adev 2088 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c drm_sched_fault(&adev->sdma.instance[instance].ring.sched); adev 2094 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static int sdma_v4_0_set_ecc_irq_state(struct amdgpu_device *adev, adev 2110 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev, adev 2116 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG)) { adev 2117 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 2131 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 2149 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev, adev 2155 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_LS)) { adev 2156 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 2164 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 2177 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2179 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (amdgpu_sriov_vf(adev)) adev 2182 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c switch (adev->asic_type) { adev 2189 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_update_medium_grain_clock_gating(adev, adev 2191 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_update_medium_grain_light_sleep(adev, adev 2203 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2205 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c switch (adev->asic_type) { adev 2207 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_1_update_power_gating(adev, adev 2219 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2222 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (amdgpu_sriov_vf(adev)) adev 2386 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_set_ring_funcs(struct amdgpu_device *adev) adev 2390 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 2391 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->asic_type == CHIP_ARCTURUS && i >= 5) adev 2392 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.instance[i].ring.funcs = adev 2395 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.instance[i].ring.funcs = adev 2397 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.instance[i].ring.me = i; adev 2398 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->sdma.has_page_queue) { adev 2399 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->asic_type == CHIP_ARCTURUS && i >= 5) adev 2400 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.instance[i].page.funcs = adev 2403 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.instance[i].page.funcs = adev 2405 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.instance[i].page.me = i; adev 2426 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_set_irq_funcs(struct amdgpu_device *adev) adev 2428 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c switch (adev->sdma.num_instances) { adev 2430 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1; adev 2431 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1; adev 2434 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST; adev 2435 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_LAST; adev 2439 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE2; adev 2440 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE2; adev 2443 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.trap_irq.funcs = &sdma_v4_0_trap_irq_funcs; adev 2444 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.illegal_inst_irq.funcs = &sdma_v4_0_illegal_inst_irq_funcs; adev 2445 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->sdma.ecc_irq.funcs = &sdma_v4_0_ecc_irq_funcs; adev 2507 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_set_buffer_funcs(struct amdgpu_device *adev) adev 2509 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->mman.buffer_funcs = &sdma_v4_0_buffer_funcs; adev 2510 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->sdma.has_page_queue) adev 2511 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].page; adev 2513 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; adev 2524 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c static void sdma_v4_0_set_vm_pte_funcs(struct amdgpu_device *adev) adev 2529 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->vm_manager.vm_pte_funcs = &sdma_v4_0_vm_pte_funcs; adev 2530 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 2531 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c if (adev->sdma.has_page_queue) adev 2532 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sched = &adev->sdma.instance[i].page.sched; adev 2534 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sched = &adev->sdma.instance[i].ring.sched; adev 2535 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->vm_manager.vm_pte_rqs[i] = adev 2538 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c adev->vm_manager.vm_pte_num_rqs = adev->sdma.num_instances; adev 59 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_set_ring_funcs(struct amdgpu_device *adev); adev 60 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_set_buffer_funcs(struct amdgpu_device *adev); adev 61 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_set_vm_pte_funcs(struct amdgpu_device *adev); adev 62 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_set_irq_funcs(struct amdgpu_device *adev); adev 106 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static u32 sdma_v5_0_get_reg_offset(struct amdgpu_device *adev, u32 instance, u32 internal_offset) adev 112 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c base = adev->reg_offset[GC_HWIP][0][1]; adev 116 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c base = adev->reg_offset[GC_HWIP][0][0]; adev 124 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_init_golden_registers(struct amdgpu_device *adev) adev 126 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c switch (adev->asic_type) { adev 128 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c soc15_program_register_sequence(adev, adev 131 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c soc15_program_register_sequence(adev, adev 136 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c soc15_program_register_sequence(adev, adev 139 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c soc15_program_register_sequence(adev, adev 144 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c soc15_program_register_sequence(adev, adev 147 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c soc15_program_register_sequence(adev, adev 168 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static int sdma_v5_0_init_microcode(struct amdgpu_device *adev) adev 179 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c switch (adev->asic_type) { adev 193 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 198 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); adev 201 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); adev 204 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; adev 205 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version); adev 206 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); adev 207 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (adev->sdma.instance[i].feature_version >= 20) adev 208 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->sdma.instance[i].burst_nop = true; adev 210 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->firmware.load_type == AMDGPU_FW_LOAD_PSP ? "true" : "false"); adev 212 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 213 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i]; adev 215 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c info->fw = adev->sdma.instance[i].fw; adev 217 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->firmware.fw_size += adev 224 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 225 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c release_firmware(adev->sdma.instance[i].fw); adev 226 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->sdma.instance[i].fw = NULL; adev 273 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c rptr = ((u64 *)&ring->adev->wb.wb[ring->rptr_offs]); adev 288 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = ring->adev; adev 294 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c wptr = ((u64 *)&adev->wb.wb[ring->wptr_offs]); adev 302 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c lowbit = RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR)) >> 2; adev 303 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c highbit = RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI)) >> 2; adev 324 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = ring->adev; adev 336 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr << 2); adev 337 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->wb.wb[ring->wptr_offs + 1] = upper_32_bits(ring->wptr << 2); adev 349 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR), adev 351 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI), adev 426 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = ring->adev; adev 428 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio_funcs->hdp_flush_reg; adev 438 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c amdgpu_ring_write(ring, (adev->nbio_funcs->get_hdp_flush_done_offset(adev)) << 2); adev 439 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c amdgpu_ring_write(ring, (adev->nbio_funcs->get_hdp_flush_req_offset(adev)) << 2); adev 459 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = ring->adev; adev 483 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if ((flags & AMDGPU_FENCE_FLAG_INT) && adev->pdev->device != 0x50) { adev 498 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_gfx_stop(struct amdgpu_device *adev) adev 500 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_ring *sdma0 = &adev->sdma.instance[0].ring; adev 501 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_ring *sdma1 = &adev->sdma.instance[1].ring; adev 505 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if ((adev->mman.buffer_funcs_ring == sdma0) || adev 506 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c (adev->mman.buffer_funcs_ring == sdma1)) adev 507 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c amdgpu_ttm_set_buffer_funcs_status(adev, false); adev 509 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 510 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c rb_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL)); adev 512 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl); adev 513 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c ib_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); adev 515 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); adev 529 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_rlc_stop(struct amdgpu_device *adev) adev 542 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_ctx_switch_enable(struct amdgpu_device *adev, bool enable) adev 571 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 572 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c f32_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL)); adev 576 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_PHASE0_QUANTUM), adev 578 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_PHASE1_QUANTUM), adev 580 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_PHASE2_QUANTUM), adev 583 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL), f32_cntl); adev 596 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_enable(struct amdgpu_device *adev, bool enable) adev 602 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_gfx_stop(adev); adev 603 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_rlc_stop(adev); adev 606 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 607 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c f32_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL)); adev 609 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), f32_cntl); adev 621 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static int sdma_v5_0_gfx_resume(struct amdgpu_device *adev) adev 634 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 635 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c ring = &adev->sdma.instance[i].ring; adev 638 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL), 0); adev 642 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c rb_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL)); adev 649 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl); adev 652 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR), 0); adev 653 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_HI), 0); adev 654 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), 0); adev 655 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI), 0); adev 658 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); adev 659 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO), adev 661 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI), adev 663 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c wptr_poll_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, adev 668 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL), adev 672 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_ADDR_HI), adev 673 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c upper_32_bits(adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFF); adev 674 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_ADDR_LO), adev 675 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c lower_32_bits(adev->wb.gpu_addr + wb_offset) & 0xFFFFFFFC); adev 679 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE), ring->gpu_addr >> 8); adev 680 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE_HI), ring->gpu_addr >> 40); adev 685 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 1); adev 687 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (!amdgpu_sriov_vf(adev)) { /* only bare-metal use register write for wptr */ adev 688 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), lower_32_bits(ring->wptr) << 2); adev 689 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI), upper_32_bits(ring->wptr) << 2); adev 692 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c doorbell = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL)); adev 693 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c doorbell_offset = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL_OFFSET)); adev 702 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL), doorbell); adev 703 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL_OFFSET), doorbell_offset); adev 705 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->nbio_funcs->sdma_doorbell_range(adev, i, ring->use_doorbell, adev 708 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (amdgpu_sriov_vf(adev)) adev 712 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 0); adev 715 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL)); adev 720 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL), temp); adev 723 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_CNTL)); adev 726 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_CNTL), temp); adev 729 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE)); adev 733 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE), temp); adev 735 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (!amdgpu_sriov_vf(adev)) { adev 737 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL)); adev 739 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), temp); adev 744 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl); adev 746 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c ib_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); adev 752 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); adev 756 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (amdgpu_sriov_vf(adev)) { /* bare-metal sequence doesn't need below to lines */ adev 757 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_ctx_switch_enable(adev, true); adev 758 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_enable(adev, true); adev 767 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (adev->mman.buffer_funcs_ring == ring) adev 768 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c amdgpu_ttm_set_buffer_funcs_status(adev, true); adev 782 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static int sdma_v5_0_rlc_resume(struct amdgpu_device *adev) adev 795 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static int sdma_v5_0_load_microcode(struct amdgpu_device *adev) adev 803 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_enable(adev, false); adev 805 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 806 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (!adev->sdma.instance[i].fw) adev 809 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; adev 814 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c (adev->sdma.instance[i].fw->data + adev 817 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UCODE_ADDR), 0); adev 822 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UCODE_DATA), le32_to_cpup(fw_data++)); adev 825 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UCODE_ADDR), adev->sdma.instance[i].fw_version); adev 839 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static int sdma_v5_0_start(struct amdgpu_device *adev) adev 843 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (amdgpu_sriov_vf(adev)) { adev 844 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_ctx_switch_enable(adev, false); adev 845 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_enable(adev, false); adev 848 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c r = sdma_v5_0_gfx_resume(adev); adev 852 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) { adev 853 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c r = sdma_v5_0_load_microcode(adev); adev 858 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (amdgpu_emu_mode == 1 && adev->pdev->device == 0x4d) adev 863 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_enable(adev, true); adev 865 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_ctx_switch_enable(adev, true); adev 868 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c r = sdma_v5_0_gfx_resume(adev); adev 871 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c r = sdma_v5_0_rlc_resume(adev); adev 887 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = ring->adev; adev 894 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c r = amdgpu_device_wb_get(adev, &index); adev 896 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c dev_err(adev->dev, "(%d) failed to allocate wb slot\n", r); adev 900 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c gpu_addr = adev->wb.gpu_addr + (index * 4); adev 902 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->wb.wb[index] = cpu_to_le32(tmp); adev 907 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c amdgpu_device_wb_free(adev, index); adev 919 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 920 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c tmp = le32_to_cpu(adev->wb.wb[index]); adev 929 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (i < adev->usec_timeout) { adev 939 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c amdgpu_device_wb_free(adev, index); adev 954 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = ring->adev; adev 962 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c r = amdgpu_device_wb_get(adev, &index); adev 964 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c dev_err(adev->dev, "(%ld) failed to allocate wb slot\n", r); adev 968 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c gpu_addr = adev->wb.gpu_addr + (index * 4); adev 970 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->wb.wb[index] = cpu_to_le32(tmp); adev 972 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c r = amdgpu_ib_get(adev, NULL, 256, &ib); adev 1002 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c tmp = le32_to_cpu(adev->wb.wb[index]); adev 1012 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c amdgpu_ib_free(adev, &ib, NULL); adev 1015 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c amdgpu_device_wb_free(adev, index); adev 1207 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1209 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->sdma.num_instances = 2; adev 1211 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_set_ring_funcs(adev); adev 1212 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_set_buffer_funcs(adev); adev 1213 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_set_vm_pte_funcs(adev); adev 1214 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_set_irq_funcs(adev); adev 1224 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1227 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_SDMA0, adev 1229 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c &adev->sdma.trap_irq); adev 1234 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_SDMA1, adev 1236 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c &adev->sdma.trap_irq); adev 1240 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c r = sdma_v5_0_init_microcode(adev); adev 1246 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1247 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c ring = &adev->sdma.instance[i].ring; adev 1255 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c (adev->doorbell_index.sdma_engine[0] << 1) //get DWORD offset adev 1256 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c : (adev->doorbell_index.sdma_engine[1] << 1); // get DWORD offset adev 1259 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c r = amdgpu_ring_init(adev, ring, 1024, adev 1260 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c &adev->sdma.trap_irq, adev 1273 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1276 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->sdma.num_instances; i++) adev 1277 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c amdgpu_ring_fini(&adev->sdma.instance[i].ring); adev 1285 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1287 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_init_golden_registers(adev); adev 1289 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c r = sdma_v5_0_start(adev); adev 1296 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1298 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (amdgpu_sriov_vf(adev)) adev 1301 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_ctx_switch_enable(adev, false); adev 1302 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_enable(adev, false); adev 1309 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1311 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c return sdma_v5_0_hw_fini(adev); adev 1316 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1318 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c return sdma_v5_0_hw_init(adev); adev 1323 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1326 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1327 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c u32 tmp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_STATUS_REG)); adev 1340 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1342 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 1343 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma0 = RREG32(sdma_v5_0_get_reg_offset(adev, 0, mmSDMA0_STATUS_REG)); adev 1344 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma1 = RREG32(sdma_v5_0_get_reg_offset(adev, 1, mmSDMA0_STATUS_REG)); adev 1363 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = ring->adev; adev 1387 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 1394 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (i >= adev->usec_timeout) { adev 1407 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static int sdma_v5_0_set_trap_irq_state(struct amdgpu_device *adev, adev 1415 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_get_reg_offset(adev, 0, mmSDMA0_CNTL) : adev 1416 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_get_reg_offset(adev, 1, mmSDMA0_CNTL); adev 1426 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static int sdma_v5_0_process_trap_irq(struct amdgpu_device *adev, adev 1435 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c amdgpu_fence_process(&adev->sdma.instance[0].ring); adev 1451 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c amdgpu_fence_process(&adev->sdma.instance[1].ring); adev 1468 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static int sdma_v5_0_process_illegal_inst_irq(struct amdgpu_device *adev, adev 1475 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_update_medium_grain_clock_gating(struct amdgpu_device *adev, adev 1481 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1482 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG)) { adev 1484 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c def = data = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL)); adev 1494 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL), data); adev 1497 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c def = data = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL)); adev 1507 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL), data); adev 1512 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_update_medium_grain_light_sleep(struct amdgpu_device *adev, adev 1518 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1519 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_LS)) { adev 1521 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c def = data = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL)); adev 1524 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data); adev 1528 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c def = data = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL)); adev 1531 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data); adev 1540 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1542 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (amdgpu_sriov_vf(adev)) adev 1545 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c switch (adev->asic_type) { adev 1549 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_update_medium_grain_clock_gating(adev, adev 1551 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_update_medium_grain_light_sleep(adev, adev 1569 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1572 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (amdgpu_sriov_vf(adev)) adev 1576 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c data = RREG32(sdma_v5_0_get_reg_offset(adev, 0, mmSDMA0_CLK_CTRL)); adev 1581 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c data = RREG32(sdma_v5_0_get_reg_offset(adev, 0, mmSDMA0_POWER_CNTL)); adev 1640 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_set_ring_funcs(struct amdgpu_device *adev) adev 1644 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1645 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->sdma.instance[i].ring.funcs = &sdma_v5_0_ring_funcs; adev 1646 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->sdma.instance[i].ring.me = i; adev 1659 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_set_irq_funcs(struct amdgpu_device *adev) adev 1661 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE0 + adev 1662 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->sdma.num_instances; adev 1663 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->sdma.trap_irq.funcs = &sdma_v5_0_trap_irq_funcs; adev 1664 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->sdma.illegal_inst_irq.funcs = &sdma_v5_0_illegal_inst_irq_funcs; adev 1726 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_set_buffer_funcs(struct amdgpu_device *adev) adev 1728 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (adev->mman.buffer_funcs == NULL) { adev 1729 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->mman.buffer_funcs = &sdma_v5_0_buffer_funcs; adev 1730 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; adev 1741 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c static void sdma_v5_0_set_vm_pte_funcs(struct amdgpu_device *adev) adev 1746 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c if (adev->vm_manager.vm_pte_funcs == NULL) { adev 1747 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->vm_manager.vm_pte_funcs = &sdma_v5_0_vm_pte_funcs; adev 1748 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1749 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sched = &adev->sdma.instance[i].ring.sched; adev 1750 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->vm_manager.vm_pte_rqs[i] = adev 1753 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c adev->vm_manager.vm_pte_num_rqs = adev->sdma.num_instances; adev 904 drivers/gpu/drm/amd/amdgpu/si.c static u32 si_pcie_rreg(struct amdgpu_device *adev, u32 reg) adev 909 drivers/gpu/drm/amd/amdgpu/si.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 913 drivers/gpu/drm/amd/amdgpu/si.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 917 drivers/gpu/drm/amd/amdgpu/si.c static void si_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 921 drivers/gpu/drm/amd/amdgpu/si.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 926 drivers/gpu/drm/amd/amdgpu/si.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 929 drivers/gpu/drm/amd/amdgpu/si.c static u32 si_pciep_rreg(struct amdgpu_device *adev, u32 reg) adev 934 drivers/gpu/drm/amd/amdgpu/si.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 938 drivers/gpu/drm/amd/amdgpu/si.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 942 drivers/gpu/drm/amd/amdgpu/si.c static void si_pciep_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 946 drivers/gpu/drm/amd/amdgpu/si.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 951 drivers/gpu/drm/amd/amdgpu/si.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 954 drivers/gpu/drm/amd/amdgpu/si.c static u32 si_smc_rreg(struct amdgpu_device *adev, u32 reg) adev 959 drivers/gpu/drm/amd/amdgpu/si.c spin_lock_irqsave(&adev->smc_idx_lock, flags); adev 962 drivers/gpu/drm/amd/amdgpu/si.c spin_unlock_irqrestore(&adev->smc_idx_lock, flags); adev 966 drivers/gpu/drm/amd/amdgpu/si.c static void si_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 970 drivers/gpu/drm/amd/amdgpu/si.c spin_lock_irqsave(&adev->smc_idx_lock, flags); adev 973 drivers/gpu/drm/amd/amdgpu/si.c spin_unlock_irqrestore(&adev->smc_idx_lock, flags); adev 1017 drivers/gpu/drm/amd/amdgpu/si.c static uint32_t si_get_register_value(struct amdgpu_device *adev, adev 1028 drivers/gpu/drm/amd/amdgpu/si.c return adev->gfx.config.rb_config[se_idx][sh_idx].rb_backend_disable; adev 1030 drivers/gpu/drm/amd/amdgpu/si.c return adev->gfx.config.rb_config[se_idx][sh_idx].user_rb_backend_disable; adev 1032 drivers/gpu/drm/amd/amdgpu/si.c return adev->gfx.config.rb_config[se_idx][sh_idx].raster_config; adev 1035 drivers/gpu/drm/amd/amdgpu/si.c mutex_lock(&adev->grbm_idx_mutex); adev 1037 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); adev 1042 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_gfx_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 1043 drivers/gpu/drm/amd/amdgpu/si.c mutex_unlock(&adev->grbm_idx_mutex); adev 1050 drivers/gpu/drm/amd/amdgpu/si.c return adev->gfx.config.gb_addr_config; adev 1052 drivers/gpu/drm/amd/amdgpu/si.c return adev->gfx.config.mc_arb_ramcfg; adev 1086 drivers/gpu/drm/amd/amdgpu/si.c return adev->gfx.config.tile_mode_array[idx]; adev 1092 drivers/gpu/drm/amd/amdgpu/si.c static int si_read_register(struct amdgpu_device *adev, u32 se_num, adev 1104 drivers/gpu/drm/amd/amdgpu/si.c *value = si_get_register_value(adev, indexed, se_num, sh_num, adev 1111 drivers/gpu/drm/amd/amdgpu/si.c static bool si_read_disabled_bios(struct amdgpu_device *adev) adev 1121 drivers/gpu/drm/amd/amdgpu/si.c if (adev->mode_info.num_crtc) { adev 1130 drivers/gpu/drm/amd/amdgpu/si.c if (adev->mode_info.num_crtc) { adev 1143 drivers/gpu/drm/amd/amdgpu/si.c r = amdgpu_read_bios(adev); adev 1147 drivers/gpu/drm/amd/amdgpu/si.c if (adev->mode_info.num_crtc) { adev 1159 drivers/gpu/drm/amd/amdgpu/si.c static bool si_read_bios_from_rom(struct amdgpu_device *adev, adev 1170 drivers/gpu/drm/amd/amdgpu/si.c if (adev->flags & AMD_IS_APU) adev 1184 drivers/gpu/drm/amd/amdgpu/si.c static int si_asic_reset(struct amdgpu_device *adev) adev 1190 drivers/gpu/drm/amd/amdgpu/si.c si_asic_reset_method(struct amdgpu_device *adev) adev 1195 drivers/gpu/drm/amd/amdgpu/si.c static u32 si_get_config_memsize(struct amdgpu_device *adev) adev 1200 drivers/gpu/drm/amd/amdgpu/si.c static void si_vga_set_state(struct amdgpu_device *adev, bool state) adev 1214 drivers/gpu/drm/amd/amdgpu/si.c static u32 si_get_xclk(struct amdgpu_device *adev) adev 1216 drivers/gpu/drm/amd/amdgpu/si.c u32 reference_clock = adev->clock.spll.reference_freq; adev 1231 drivers/gpu/drm/amd/amdgpu/si.c static int si_set_uvd_clocks(struct amdgpu_device *adev, u32 vclk, u32 dclk) adev 1236 drivers/gpu/drm/amd/amdgpu/si.c static void si_detect_hw_virtualization(struct amdgpu_device *adev) adev 1239 drivers/gpu/drm/amd/amdgpu/si.c adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE; adev 1242 drivers/gpu/drm/amd/amdgpu/si.c static void si_flush_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring) adev 1252 drivers/gpu/drm/amd/amdgpu/si.c static void si_invalidate_hdp(struct amdgpu_device *adev, adev 1263 drivers/gpu/drm/amd/amdgpu/si.c static bool si_need_full_reset(struct amdgpu_device *adev) adev 1269 drivers/gpu/drm/amd/amdgpu/si.c static bool si_need_reset_on_init(struct amdgpu_device *adev) adev 1274 drivers/gpu/drm/amd/amdgpu/si.c static int si_get_pcie_lanes(struct amdgpu_device *adev) adev 1278 drivers/gpu/drm/amd/amdgpu/si.c if (adev->flags & AMD_IS_APU) adev 1299 drivers/gpu/drm/amd/amdgpu/si.c static void si_set_pcie_lanes(struct amdgpu_device *adev, int lanes) adev 1303 drivers/gpu/drm/amd/amdgpu/si.c if (adev->flags & AMD_IS_APU) adev 1339 drivers/gpu/drm/amd/amdgpu/si.c static void si_get_pcie_usage(struct amdgpu_device *adev, uint64_t *count0, adev 1349 drivers/gpu/drm/amd/amdgpu/si.c if (adev->flags & AMD_IS_APU) adev 1385 drivers/gpu/drm/amd/amdgpu/si.c static uint64_t si_get_pcie_replay_count(struct amdgpu_device *adev) adev 1419 drivers/gpu/drm/amd/amdgpu/si.c static uint32_t si_get_rev_id(struct amdgpu_device *adev) adev 1427 drivers/gpu/drm/amd/amdgpu/si.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1429 drivers/gpu/drm/amd/amdgpu/si.c adev->smc_rreg = &si_smc_rreg; adev 1430 drivers/gpu/drm/amd/amdgpu/si.c adev->smc_wreg = &si_smc_wreg; adev 1431 drivers/gpu/drm/amd/amdgpu/si.c adev->pcie_rreg = &si_pcie_rreg; adev 1432 drivers/gpu/drm/amd/amdgpu/si.c adev->pcie_wreg = &si_pcie_wreg; adev 1433 drivers/gpu/drm/amd/amdgpu/si.c adev->pciep_rreg = &si_pciep_rreg; adev 1434 drivers/gpu/drm/amd/amdgpu/si.c adev->pciep_wreg = &si_pciep_wreg; adev 1435 drivers/gpu/drm/amd/amdgpu/si.c adev->uvd_ctx_rreg = NULL; adev 1436 drivers/gpu/drm/amd/amdgpu/si.c adev->uvd_ctx_wreg = NULL; adev 1437 drivers/gpu/drm/amd/amdgpu/si.c adev->didt_rreg = NULL; adev 1438 drivers/gpu/drm/amd/amdgpu/si.c adev->didt_wreg = NULL; adev 1440 drivers/gpu/drm/amd/amdgpu/si.c adev->asic_funcs = &si_asic_funcs; adev 1442 drivers/gpu/drm/amd/amdgpu/si.c adev->rev_id = si_get_rev_id(adev); adev 1443 drivers/gpu/drm/amd/amdgpu/si.c adev->external_rev_id = 0xFF; adev 1444 drivers/gpu/drm/amd/amdgpu/si.c switch (adev->asic_type) { adev 1446 drivers/gpu/drm/amd/amdgpu/si.c adev->cg_flags = adev 1460 drivers/gpu/drm/amd/amdgpu/si.c adev->pg_flags = 0; adev 1461 drivers/gpu/drm/amd/amdgpu/si.c adev->external_rev_id = (adev->rev_id == 0) ? 1 : adev 1462 drivers/gpu/drm/amd/amdgpu/si.c (adev->rev_id == 1) ? 5 : 6; adev 1465 drivers/gpu/drm/amd/amdgpu/si.c adev->cg_flags = adev 1481 drivers/gpu/drm/amd/amdgpu/si.c adev->pg_flags = 0; adev 1482 drivers/gpu/drm/amd/amdgpu/si.c adev->external_rev_id = adev->rev_id + 20; adev 1486 drivers/gpu/drm/amd/amdgpu/si.c adev->cg_flags = adev 1502 drivers/gpu/drm/amd/amdgpu/si.c adev->pg_flags = 0; adev 1504 drivers/gpu/drm/amd/amdgpu/si.c adev->external_rev_id = adev->rev_id + 40; adev 1507 drivers/gpu/drm/amd/amdgpu/si.c adev->cg_flags = adev 1522 drivers/gpu/drm/amd/amdgpu/si.c adev->pg_flags = 0; adev 1523 drivers/gpu/drm/amd/amdgpu/si.c adev->external_rev_id = 60; adev 1526 drivers/gpu/drm/amd/amdgpu/si.c adev->cg_flags = adev 1540 drivers/gpu/drm/amd/amdgpu/si.c adev->pg_flags = 0; adev 1541 drivers/gpu/drm/amd/amdgpu/si.c adev->external_rev_id = 70; adev 1562 drivers/gpu/drm/amd/amdgpu/si.c static void si_init_golden_registers(struct amdgpu_device *adev) adev 1564 drivers/gpu/drm/amd/amdgpu/si.c switch (adev->asic_type) { adev 1566 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1569 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1572 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1575 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1580 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1583 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1586 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1591 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1594 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1597 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1600 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1605 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1608 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1611 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1616 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1619 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1622 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_program_register_sequence(adev, adev 1633 drivers/gpu/drm/amd/amdgpu/si.c static void si_pcie_gen3_enable(struct amdgpu_device *adev) adev 1635 drivers/gpu/drm/amd/amdgpu/si.c struct pci_dev *root = adev->pdev->bus->self; adev 1641 drivers/gpu/drm/amd/amdgpu/si.c if (pci_is_root_bus(adev->pdev->bus)) adev 1647 drivers/gpu/drm/amd/amdgpu/si.c if (adev->flags & AMD_IS_APU) adev 1650 drivers/gpu/drm/amd/amdgpu/si.c if (!(adev->pm.pcie_gen_mask & (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 | adev 1657 drivers/gpu/drm/amd/amdgpu/si.c if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) { adev 1663 drivers/gpu/drm/amd/amdgpu/si.c } else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2) { adev 1675 drivers/gpu/drm/amd/amdgpu/si.c gpu_pos = pci_pcie_cap(adev->pdev); adev 1679 drivers/gpu/drm/amd/amdgpu/si.c if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) { adev 1686 drivers/gpu/drm/amd/amdgpu/si.c pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, &gpu_cfg); adev 1692 drivers/gpu/drm/amd/amdgpu/si.c pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, tmp16); adev 1709 drivers/gpu/drm/amd/amdgpu/si.c pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_DEVSTA, &tmp16); adev 1714 drivers/gpu/drm/amd/amdgpu/si.c pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, &gpu_cfg); adev 1717 drivers/gpu/drm/amd/amdgpu/si.c pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &gpu_cfg2); adev 1734 drivers/gpu/drm/amd/amdgpu/si.c pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, &tmp16); adev 1737 drivers/gpu/drm/amd/amdgpu/si.c pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL, tmp16); adev 1744 drivers/gpu/drm/amd/amdgpu/si.c pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &tmp16); adev 1747 drivers/gpu/drm/amd/amdgpu/si.c pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, tmp16); adev 1760 drivers/gpu/drm/amd/amdgpu/si.c pci_read_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, &tmp16); adev 1762 drivers/gpu/drm/amd/amdgpu/si.c if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) adev 1764 drivers/gpu/drm/amd/amdgpu/si.c else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2) adev 1768 drivers/gpu/drm/amd/amdgpu/si.c pci_write_config_word(adev->pdev, gpu_pos + PCI_EXP_LNKCTL2, tmp16); adev 1774 drivers/gpu/drm/amd/amdgpu/si.c for (i = 0; i < adev->usec_timeout; i++) { adev 1782 drivers/gpu/drm/amd/amdgpu/si.c static inline u32 si_pif_phy0_rreg(struct amdgpu_device *adev, u32 reg) adev 1787 drivers/gpu/drm/amd/amdgpu/si.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 1790 drivers/gpu/drm/amd/amdgpu/si.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 1794 drivers/gpu/drm/amd/amdgpu/si.c static inline void si_pif_phy0_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 1798 drivers/gpu/drm/amd/amdgpu/si.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 1801 drivers/gpu/drm/amd/amdgpu/si.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 1804 drivers/gpu/drm/amd/amdgpu/si.c static inline u32 si_pif_phy1_rreg(struct amdgpu_device *adev, u32 reg) adev 1809 drivers/gpu/drm/amd/amdgpu/si.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 1812 drivers/gpu/drm/amd/amdgpu/si.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 1816 drivers/gpu/drm/amd/amdgpu/si.c static inline void si_pif_phy1_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 1820 drivers/gpu/drm/amd/amdgpu/si.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 1823 drivers/gpu/drm/amd/amdgpu/si.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 1825 drivers/gpu/drm/amd/amdgpu/si.c static void si_program_aspm(struct amdgpu_device *adev) adev 1834 drivers/gpu/drm/amd/amdgpu/si.c if (adev->flags & AMD_IS_APU) adev 1867 drivers/gpu/drm/amd/amdgpu/si.c orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_0); adev 1871 drivers/gpu/drm/amd/amdgpu/si.c si_pif_phy0_wreg(adev,PB0_PIF_PWRDOWN_0, data); adev 1873 drivers/gpu/drm/amd/amdgpu/si.c orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_1); adev 1877 drivers/gpu/drm/amd/amdgpu/si.c si_pif_phy0_wreg(adev,PB0_PIF_PWRDOWN_1, data); adev 1879 drivers/gpu/drm/amd/amdgpu/si.c orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_0); adev 1883 drivers/gpu/drm/amd/amdgpu/si.c si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_0, data); adev 1885 drivers/gpu/drm/amd/amdgpu/si.c orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_1); adev 1889 drivers/gpu/drm/amd/amdgpu/si.c si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_1, data); adev 1891 drivers/gpu/drm/amd/amdgpu/si.c if ((adev->asic_type != CHIP_OLAND) && (adev->asic_type != CHIP_HAINAN)) { adev 1892 drivers/gpu/drm/amd/amdgpu/si.c orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_0); adev 1895 drivers/gpu/drm/amd/amdgpu/si.c si_pif_phy0_wreg(adev,PB0_PIF_PWRDOWN_0, data); adev 1897 drivers/gpu/drm/amd/amdgpu/si.c orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_1); adev 1900 drivers/gpu/drm/amd/amdgpu/si.c si_pif_phy0_wreg(adev,PB0_PIF_PWRDOWN_1, data); adev 1902 drivers/gpu/drm/amd/amdgpu/si.c orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_2); adev 1905 drivers/gpu/drm/amd/amdgpu/si.c si_pif_phy0_wreg(adev,PB0_PIF_PWRDOWN_2, data); adev 1907 drivers/gpu/drm/amd/amdgpu/si.c orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_3); adev 1910 drivers/gpu/drm/amd/amdgpu/si.c si_pif_phy0_wreg(adev,PB0_PIF_PWRDOWN_3, data); adev 1912 drivers/gpu/drm/amd/amdgpu/si.c orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_0); adev 1915 drivers/gpu/drm/amd/amdgpu/si.c si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_0, data); adev 1917 drivers/gpu/drm/amd/amdgpu/si.c orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_1); adev 1920 drivers/gpu/drm/amd/amdgpu/si.c si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_1, data); adev 1922 drivers/gpu/drm/amd/amdgpu/si.c orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_2); adev 1925 drivers/gpu/drm/amd/amdgpu/si.c si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_2, data); adev 1927 drivers/gpu/drm/amd/amdgpu/si.c orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_3); adev 1930 drivers/gpu/drm/amd/amdgpu/si.c si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_3, data); adev 1938 drivers/gpu/drm/amd/amdgpu/si.c orig = data = si_pif_phy0_rreg(adev,PB0_PIF_CNTL); adev 1940 drivers/gpu/drm/amd/amdgpu/si.c if ((adev->asic_type == CHIP_OLAND) || (adev->asic_type == CHIP_HAINAN)) adev 1943 drivers/gpu/drm/amd/amdgpu/si.c si_pif_phy0_wreg(adev,PB0_PIF_CNTL, data); adev 1945 drivers/gpu/drm/amd/amdgpu/si.c orig = data = si_pif_phy1_rreg(adev,PB1_PIF_CNTL); adev 1947 drivers/gpu/drm/amd/amdgpu/si.c if ((adev->asic_type == CHIP_OLAND) || (adev->asic_type == CHIP_HAINAN)) adev 1950 drivers/gpu/drm/amd/amdgpu/si.c si_pif_phy1_wreg(adev,PB1_PIF_CNTL, data); adev 1953 drivers/gpu/drm/amd/amdgpu/si.c !pci_is_root_bus(adev->pdev->bus)) { adev 1954 drivers/gpu/drm/amd/amdgpu/si.c struct pci_dev *root = adev->pdev->bus->self; adev 2029 drivers/gpu/drm/amd/amdgpu/si.c static void si_fix_pci_max_read_req_size(struct amdgpu_device *adev) adev 2034 drivers/gpu/drm/amd/amdgpu/si.c readrq = pcie_get_readrq(adev->pdev); adev 2037 drivers/gpu/drm/amd/amdgpu/si.c pcie_set_readrq(adev->pdev, 512); adev 2042 drivers/gpu/drm/amd/amdgpu/si.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2044 drivers/gpu/drm/amd/amdgpu/si.c si_fix_pci_max_read_req_size(adev); adev 2045 drivers/gpu/drm/amd/amdgpu/si.c si_init_golden_registers(adev); adev 2046 drivers/gpu/drm/amd/amdgpu/si.c si_pcie_gen3_enable(adev); adev 2047 drivers/gpu/drm/amd/amdgpu/si.c si_program_aspm(adev); adev 2059 drivers/gpu/drm/amd/amdgpu/si.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2061 drivers/gpu/drm/amd/amdgpu/si.c return si_common_hw_fini(adev); adev 2066 drivers/gpu/drm/amd/amdgpu/si.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2068 drivers/gpu/drm/amd/amdgpu/si.c return si_common_hw_init(adev); adev 2124 drivers/gpu/drm/amd/amdgpu/si.c int si_set_ip_blocks(struct amdgpu_device *adev) adev 2126 drivers/gpu/drm/amd/amdgpu/si.c si_detect_hw_virtualization(adev); adev 2128 drivers/gpu/drm/amd/amdgpu/si.c switch (adev->asic_type) { adev 2132 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &si_common_ip_block); adev 2133 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block); adev 2134 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &si_ih_ip_block); adev 2135 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); adev 2136 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &si_dma_ip_block); adev 2137 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &si_smu_ip_block); adev 2138 drivers/gpu/drm/amd/amdgpu/si.c if (adev->enable_virtual_display) adev 2139 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 2141 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &dce_v6_0_ip_block); adev 2146 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &si_common_ip_block); adev 2147 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block); adev 2148 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &si_ih_ip_block); adev 2149 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); adev 2150 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &si_dma_ip_block); adev 2151 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &si_smu_ip_block); adev 2152 drivers/gpu/drm/amd/amdgpu/si.c if (adev->enable_virtual_display) adev 2153 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 2155 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &dce_v6_4_ip_block); adev 2161 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &si_common_ip_block); adev 2162 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block); adev 2163 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &si_ih_ip_block); adev 2164 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); adev 2165 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &si_dma_ip_block); adev 2166 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &si_smu_ip_block); adev 2167 drivers/gpu/drm/amd/amdgpu/si.c if (adev->enable_virtual_display) adev 2168 drivers/gpu/drm/amd/amdgpu/si.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 29 drivers/gpu/drm/amd/amdgpu/si.h void si_srbm_select(struct amdgpu_device *adev, adev 31 drivers/gpu/drm/amd/amdgpu/si.h int si_set_ip_blocks(struct amdgpu_device *adev); adev 36 drivers/gpu/drm/amd/amdgpu/si_dma.c static void si_dma_set_ring_funcs(struct amdgpu_device *adev); adev 37 drivers/gpu/drm/amd/amdgpu/si_dma.c static void si_dma_set_buffer_funcs(struct amdgpu_device *adev); adev 38 drivers/gpu/drm/amd/amdgpu/si_dma.c static void si_dma_set_vm_pte_funcs(struct amdgpu_device *adev); adev 39 drivers/gpu/drm/amd/amdgpu/si_dma.c static void si_dma_set_irq_funcs(struct amdgpu_device *adev); adev 43 drivers/gpu/drm/amd/amdgpu/si_dma.c return ring->adev->wb.wb[ring->rptr_offs>>2]; adev 48 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = ring->adev; adev 49 drivers/gpu/drm/amd/amdgpu/si_dma.c u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; adev 56 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = ring->adev; adev 57 drivers/gpu/drm/amd/amdgpu/si_dma.c u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; adev 112 drivers/gpu/drm/amd/amdgpu/si_dma.c static void si_dma_stop(struct amdgpu_device *adev) adev 118 drivers/gpu/drm/amd/amdgpu/si_dma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 119 drivers/gpu/drm/amd/amdgpu/si_dma.c ring = &adev->sdma.instance[i].ring; adev 125 drivers/gpu/drm/amd/amdgpu/si_dma.c if (adev->mman.buffer_funcs_ring == ring) adev 126 drivers/gpu/drm/amd/amdgpu/si_dma.c amdgpu_ttm_set_buffer_funcs_status(adev, false); adev 131 drivers/gpu/drm/amd/amdgpu/si_dma.c static int si_dma_start(struct amdgpu_device *adev) adev 138 drivers/gpu/drm/amd/amdgpu/si_dma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 139 drivers/gpu/drm/amd/amdgpu/si_dma.c ring = &adev->sdma.instance[i].ring; adev 156 drivers/gpu/drm/amd/amdgpu/si_dma.c rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); adev 186 drivers/gpu/drm/amd/amdgpu/si_dma.c if (adev->mman.buffer_funcs_ring == ring) adev 187 drivers/gpu/drm/amd/amdgpu/si_dma.c amdgpu_ttm_set_buffer_funcs_status(adev, true); adev 204 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = ring->adev; adev 211 drivers/gpu/drm/amd/amdgpu/si_dma.c r = amdgpu_device_wb_get(adev, &index); adev 215 drivers/gpu/drm/amd/amdgpu/si_dma.c gpu_addr = adev->wb.gpu_addr + (index * 4); adev 217 drivers/gpu/drm/amd/amdgpu/si_dma.c adev->wb.wb[index] = cpu_to_le32(tmp); adev 229 drivers/gpu/drm/amd/amdgpu/si_dma.c for (i = 0; i < adev->usec_timeout; i++) { adev 230 drivers/gpu/drm/amd/amdgpu/si_dma.c tmp = le32_to_cpu(adev->wb.wb[index]); adev 236 drivers/gpu/drm/amd/amdgpu/si_dma.c if (i >= adev->usec_timeout) adev 240 drivers/gpu/drm/amd/amdgpu/si_dma.c amdgpu_device_wb_free(adev, index); adev 254 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = ring->adev; adev 262 drivers/gpu/drm/amd/amdgpu/si_dma.c r = amdgpu_device_wb_get(adev, &index); adev 266 drivers/gpu/drm/amd/amdgpu/si_dma.c gpu_addr = adev->wb.gpu_addr + (index * 4); adev 268 drivers/gpu/drm/amd/amdgpu/si_dma.c adev->wb.wb[index] = cpu_to_le32(tmp); adev 270 drivers/gpu/drm/amd/amdgpu/si_dma.c r = amdgpu_ib_get(adev, NULL, 256, &ib); adev 290 drivers/gpu/drm/amd/amdgpu/si_dma.c tmp = le32_to_cpu(adev->wb.wb[index]); adev 297 drivers/gpu/drm/amd/amdgpu/si_dma.c amdgpu_ib_free(adev, &ib, NULL); adev 300 drivers/gpu/drm/amd/amdgpu/si_dma.c amdgpu_device_wb_free(adev, index); adev 468 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 470 drivers/gpu/drm/amd/amdgpu/si_dma.c adev->sdma.num_instances = 2; adev 472 drivers/gpu/drm/amd/amdgpu/si_dma.c si_dma_set_ring_funcs(adev); adev 473 drivers/gpu/drm/amd/amdgpu/si_dma.c si_dma_set_buffer_funcs(adev); adev 474 drivers/gpu/drm/amd/amdgpu/si_dma.c si_dma_set_vm_pte_funcs(adev); adev 475 drivers/gpu/drm/amd/amdgpu/si_dma.c si_dma_set_irq_funcs(adev); adev 484 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 487 drivers/gpu/drm/amd/amdgpu/si_dma.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 224, adev 488 drivers/gpu/drm/amd/amdgpu/si_dma.c &adev->sdma.trap_irq); adev 493 drivers/gpu/drm/amd/amdgpu/si_dma.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 244, adev 494 drivers/gpu/drm/amd/amdgpu/si_dma.c &adev->sdma.trap_irq); adev 498 drivers/gpu/drm/amd/amdgpu/si_dma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 499 drivers/gpu/drm/amd/amdgpu/si_dma.c ring = &adev->sdma.instance[i].ring; adev 503 drivers/gpu/drm/amd/amdgpu/si_dma.c r = amdgpu_ring_init(adev, ring, 1024, adev 504 drivers/gpu/drm/amd/amdgpu/si_dma.c &adev->sdma.trap_irq, adev 517 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 520 drivers/gpu/drm/amd/amdgpu/si_dma.c for (i = 0; i < adev->sdma.num_instances; i++) adev 521 drivers/gpu/drm/amd/amdgpu/si_dma.c amdgpu_ring_fini(&adev->sdma.instance[i].ring); adev 528 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 530 drivers/gpu/drm/amd/amdgpu/si_dma.c return si_dma_start(adev); adev 535 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 537 drivers/gpu/drm/amd/amdgpu/si_dma.c si_dma_stop(adev); adev 544 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 546 drivers/gpu/drm/amd/amdgpu/si_dma.c return si_dma_hw_fini(adev); adev 551 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 553 drivers/gpu/drm/amd/amdgpu/si_dma.c return si_dma_hw_init(adev); adev 558 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 570 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 572 drivers/gpu/drm/amd/amdgpu/si_dma.c for (i = 0; i < adev->usec_timeout; i++) { adev 586 drivers/gpu/drm/amd/amdgpu/si_dma.c static int si_dma_set_trap_irq_state(struct amdgpu_device *adev, adev 632 drivers/gpu/drm/amd/amdgpu/si_dma.c static int si_dma_process_trap_irq(struct amdgpu_device *adev, adev 637 drivers/gpu/drm/amd/amdgpu/si_dma.c amdgpu_fence_process(&adev->sdma.instance[0].ring); adev 639 drivers/gpu/drm/amd/amdgpu/si_dma.c amdgpu_fence_process(&adev->sdma.instance[1].ring); adev 649 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 653 drivers/gpu/drm/amd/amdgpu/si_dma.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG)) { adev 654 drivers/gpu/drm/amd/amdgpu/si_dma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 666 drivers/gpu/drm/amd/amdgpu/si_dma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 691 drivers/gpu/drm/amd/amdgpu/si_dma.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 744 drivers/gpu/drm/amd/amdgpu/si_dma.c static void si_dma_set_ring_funcs(struct amdgpu_device *adev) adev 748 drivers/gpu/drm/amd/amdgpu/si_dma.c for (i = 0; i < adev->sdma.num_instances; i++) adev 749 drivers/gpu/drm/amd/amdgpu/si_dma.c adev->sdma.instance[i].ring.funcs = &si_dma_ring_funcs; adev 757 drivers/gpu/drm/amd/amdgpu/si_dma.c static void si_dma_set_irq_funcs(struct amdgpu_device *adev) adev 759 drivers/gpu/drm/amd/amdgpu/si_dma.c adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST; adev 760 drivers/gpu/drm/amd/amdgpu/si_dma.c adev->sdma.trap_irq.funcs = &si_dma_trap_irq_funcs; adev 821 drivers/gpu/drm/amd/amdgpu/si_dma.c static void si_dma_set_buffer_funcs(struct amdgpu_device *adev) adev 823 drivers/gpu/drm/amd/amdgpu/si_dma.c adev->mman.buffer_funcs = &si_dma_buffer_funcs; adev 824 drivers/gpu/drm/amd/amdgpu/si_dma.c adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; adev 835 drivers/gpu/drm/amd/amdgpu/si_dma.c static void si_dma_set_vm_pte_funcs(struct amdgpu_device *adev) adev 840 drivers/gpu/drm/amd/amdgpu/si_dma.c adev->vm_manager.vm_pte_funcs = &si_dma_vm_pte_funcs; adev 841 drivers/gpu/drm/amd/amdgpu/si_dma.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 842 drivers/gpu/drm/amd/amdgpu/si_dma.c sched = &adev->sdma.instance[i].ring.sched; adev 843 drivers/gpu/drm/amd/amdgpu/si_dma.c adev->vm_manager.vm_pte_rqs[i] = adev 846 drivers/gpu/drm/amd/amdgpu/si_dma.c adev->vm_manager.vm_pte_num_rqs = adev->sdma.num_instances; adev 1833 drivers/gpu/drm/amd/amdgpu/si_dpm.c static struct rv7xx_power_info *rv770_get_pi(struct amdgpu_device *adev); adev 1834 drivers/gpu/drm/amd/amdgpu/si_dpm.c static struct evergreen_power_info *evergreen_get_pi(struct amdgpu_device *adev); adev 1835 drivers/gpu/drm/amd/amdgpu/si_dpm.c static struct ni_power_info *ni_get_pi(struct amdgpu_device *adev); adev 1838 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_voltage_value(struct amdgpu_device *adev, adev 1841 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_get_std_voltage_value(struct amdgpu_device *adev, adev 1844 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_write_smc_soft_register(struct amdgpu_device *adev, adev 1846 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_convert_power_level_to_smc(struct amdgpu_device *adev, adev 1849 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_calculate_sclk_params(struct amdgpu_device *adev, adev 1853 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_thermal_start_smc_fan_control(struct amdgpu_device *adev); adev 1854 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_fan_ctrl_set_default_mode(struct amdgpu_device *adev); adev 1855 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_dpm_set_irq_funcs(struct amdgpu_device *adev); adev 1857 drivers/gpu/drm/amd/amdgpu/si_dpm.c static struct si_power_info *si_get_pi(struct amdgpu_device *adev) adev 1859 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *pi = adev->pm.dpm.priv; adev 1890 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_calculate_leakage_for_v_and_t(struct amdgpu_device *adev, adev 1918 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_calculate_leakage_for_v(struct amdgpu_device *adev, adev 1929 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_update_dte_from_pl2(struct amdgpu_device *adev, adev 1932 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 p_limit1 = adev->pm.dpm.tdp_limit; adev 1933 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 p_limit2 = adev->pm.dpm.near_tdp_limit; adev 1959 drivers/gpu/drm/amd/amdgpu/si_dpm.c static struct rv7xx_power_info *rv770_get_pi(struct amdgpu_device *adev) adev 1961 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = adev->pm.dpm.priv; adev 1966 drivers/gpu/drm/amd/amdgpu/si_dpm.c static struct ni_power_info *ni_get_pi(struct amdgpu_device *adev) adev 1968 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *pi = adev->pm.dpm.priv; adev 1980 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_initialize_powertune_defaults(struct amdgpu_device *adev) adev 1982 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); adev 1983 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 1986 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->asic_type == CHIP_TAHITI) { adev 1993 drivers/gpu/drm/amd/amdgpu/si_dpm.c switch (adev->pdev->device) { adev 2020 drivers/gpu/drm/amd/amdgpu/si_dpm.c } else if (adev->asic_type == CHIP_PITCAIRN) { adev 2026 drivers/gpu/drm/amd/amdgpu/si_dpm.c switch (adev->pdev->device) { adev 2046 drivers/gpu/drm/amd/amdgpu/si_dpm.c } else if (adev->asic_type == CHIP_VERDE) { adev 2051 drivers/gpu/drm/amd/amdgpu/si_dpm.c switch (adev->pdev->device) { adev 2098 drivers/gpu/drm/amd/amdgpu/si_dpm.c } else if (adev->asic_type == CHIP_OLAND) { adev 2104 drivers/gpu/drm/amd/amdgpu/si_dpm.c switch (adev->pdev->device) { adev 2137 drivers/gpu/drm/amd/amdgpu/si_dpm.c } else if (adev->asic_type == CHIP_HAINAN) { adev 2160 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_update_dte_from_pl2(adev, &si_pi->dte_data); adev 2184 drivers/gpu/drm/amd/amdgpu/si_dpm.c static u32 si_get_smc_power_scaling_factor(struct amdgpu_device *adev) adev 2189 drivers/gpu/drm/amd/amdgpu/si_dpm.c static u32 si_calculate_cac_wintime(struct amdgpu_device *adev) adev 2196 drivers/gpu/drm/amd/amdgpu/si_dpm.c xclk = amdgpu_asic_get_xclk(adev); adev 2214 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_calculate_adjusted_tdp_limits(struct amdgpu_device *adev, adev 2222 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (tdp_adjustment > (u32)adev->pm.dpm.tdp_od_limit) adev 2225 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_tdp_limit = ((100 + 100) * adev->pm.dpm.tdp_limit) / 100; adev 2228 drivers/gpu/drm/amd/amdgpu/si_dpm.c *tdp_limit = ((100 + tdp_adjustment) * adev->pm.dpm.tdp_limit) / 100; adev 2229 drivers/gpu/drm/amd/amdgpu/si_dpm.c *near_tdp_limit = adev->pm.dpm.near_tdp_limit_adjusted + (*tdp_limit - adev->pm.dpm.tdp_limit); adev 2231 drivers/gpu/drm/amd/amdgpu/si_dpm.c *tdp_limit = ((100 - tdp_adjustment) * adev->pm.dpm.tdp_limit) / 100; adev 2232 drivers/gpu/drm/amd/amdgpu/si_dpm.c adjustment_delta = adev->pm.dpm.tdp_limit - *tdp_limit; adev 2233 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adjustment_delta < adev->pm.dpm.near_tdp_limit_adjusted) adev 2234 drivers/gpu/drm/amd/amdgpu/si_dpm.c *near_tdp_limit = adev->pm.dpm.near_tdp_limit_adjusted - adjustment_delta; adev 2247 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_smc_tdp_limits(struct amdgpu_device *adev, adev 2250 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); adev 2251 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 2256 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_ppm_table *ppm = adev->pm.dpm.dyn_state.ppm_table; adev 2257 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 scaling_factor = si_get_smc_power_scaling_factor(adev); adev 2267 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_calculate_adjusted_tdp_limits(adev, adev 2269 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.tdp_adjustment, adev 2282 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_copy_bytes_to_smc(adev, adev 2301 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_copy_bytes_to_smc(adev, si_pi->papm_cfg_table_start, adev 2312 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_smc_tdp_limits_2(struct amdgpu_device *adev, adev 2315 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); adev 2316 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 2320 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 scaling_factor = si_get_smc_power_scaling_factor(adev); adev 2326 drivers/gpu/drm/amd/amdgpu/si_dpm.c cpu_to_be32(si_scale_power_for_smc(adev->pm.dpm.near_tdp_limit_adjusted, scaling_factor) * 1000); adev 2328 drivers/gpu/drm/amd/amdgpu/si_dpm.c cpu_to_be32(si_scale_power_for_smc((adev->pm.dpm.near_tdp_limit_adjusted * SISLANDS_DPM2_TDP_SAFE_LIMIT_PERCENT) / 100, scaling_factor) * 1000); adev 2330 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_copy_bytes_to_smc(adev, adev 2344 drivers/gpu/drm/amd/amdgpu/si_dpm.c static u16 si_calculate_power_efficiency_ratio(struct amdgpu_device *adev, adev 2366 drivers/gpu/drm/amd/amdgpu/si_dpm.c static bool si_should_disable_uvd_powertune(struct amdgpu_device *adev, adev 2369 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 2378 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *evergreen_get_pi(struct amdgpu_device *adev) adev 2380 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *pi = adev->pm.dpm.priv; adev 2385 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_power_containment_values(struct amdgpu_device *adev, adev 2389 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 2390 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); adev 2413 drivers/gpu/drm/amd/amdgpu/si_dpm.c disable_uvd_power_tune = si_should_disable_uvd_powertune(adev, amdgpu_state); adev 2447 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_voltage_value(adev, &eg_pi->vddc_voltage_table, adev 2452 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_get_std_voltage_value(adev, &vddc, &prev_std_vddc); adev 2456 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_voltage_value(adev, &eg_pi->vddc_voltage_table, adev 2461 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_get_std_voltage_value(adev, &vddc, &curr_std_vddc); adev 2465 drivers/gpu/drm/amd/amdgpu/si_dpm.c pwr_efficiency_ratio = si_calculate_power_efficiency_ratio(adev, adev 2478 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_sq_ramping_values(struct amdgpu_device *adev, adev 2482 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); adev 2494 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.sq_ramping_threshold == 0) adev 2516 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((state->performance_levels[i].sclk >= adev->pm.dpm.sq_ramping_threshold) && adev 2535 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_enable_power_containment(struct amdgpu_device *adev, adev 2539 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); adev 2545 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (!si_should_disable_uvd_powertune(adev, amdgpu_new_state)) { adev 2546 drivers/gpu/drm/amd/amdgpu/si_dpm.c smc_result = amdgpu_si_send_msg_to_smc(adev, PPSMC_TDPClampingActive); adev 2555 drivers/gpu/drm/amd/amdgpu/si_dpm.c smc_result = amdgpu_si_send_msg_to_smc(adev, PPSMC_TDPClampingInactive); adev 2565 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_initialize_smc_dte_tables(struct amdgpu_device *adev) adev 2567 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 2623 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_copy_bytes_to_smc(adev, si_pi->dte_table_start, adev 2632 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_get_cac_std_voltage_max_min(struct amdgpu_device *adev, adev 2635 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 2637 drivers/gpu/drm/amd/amdgpu/si_dpm.c &adev->pm.dpm.dyn_state.cac_leakage_table; adev 2676 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_init_dte_leakage_table(struct amdgpu_device *adev, adev 2681 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 2689 drivers/gpu/drm/amd/amdgpu/si_dpm.c scaling_factor = si_get_smc_power_scaling_factor(adev); adev 2697 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_calculate_leakage_for_v_and_t(adev, adev 2716 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_init_simplified_leakage_table(struct amdgpu_device *adev, adev 2720 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 2727 drivers/gpu/drm/amd/amdgpu/si_dpm.c scaling_factor = si_get_smc_power_scaling_factor(adev); adev 2732 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_calculate_leakage_for_v(adev, adev 2751 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_initialize_smc_cac_tables(struct amdgpu_device *adev) adev 2753 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); adev 2754 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 2760 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 ticks_per_us = amdgpu_asic_get_xclk(adev) / 100; adev 2773 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_pi->dyn_powertune_data.cac_leakage = adev->pm.dpm.cac_leakage; adev 2776 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_pi->dyn_powertune_data.wintime = si_calculate_cac_wintime(adev); adev 2781 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_get_cac_std_voltage_max_min(adev, &vddc_max, &vddc_min); adev 2791 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_init_dte_leakage_table(adev, cac_tables, adev 2795 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_init_simplified_leakage_table(adev, cac_tables, adev 2800 drivers/gpu/drm/amd/amdgpu/si_dpm.c load_line_slope = ((u32)adev->pm.dpm.load_line_slope << SMC_SISLANDS_SCALE_R) / 100; adev 2816 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_copy_bytes_to_smc(adev, si_pi->cac_table_start, adev 2824 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_ticks_per_us, ticks_per_us); adev 2837 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_program_cac_config_registers(struct amdgpu_device *adev, adev 2876 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_initialize_hardware_cac_manager(struct amdgpu_device *adev) adev 2878 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); adev 2879 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 2886 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_program_cac_config_registers(adev, si_pi->lcac_config); adev 2889 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_program_cac_config_registers(adev, si_pi->cac_override); adev 2892 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_program_cac_config_registers(adev, si_pi->cac_weights); adev 2899 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_enable_smc_cac(struct amdgpu_device *adev, adev 2903 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); adev 2904 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 2910 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (!si_should_disable_uvd_powertune(adev, amdgpu_new_state)) { adev 2912 drivers/gpu/drm/amd/amdgpu/si_dpm.c smc_result = amdgpu_si_send_msg_to_smc(adev, PPSMC_CACLongTermAvgEnable); adev 2917 drivers/gpu/drm/amd/amdgpu/si_dpm.c smc_result = amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_EnableCac); adev 2926 drivers/gpu/drm/amd/amdgpu/si_dpm.c smc_result = amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_EnableDTE); adev 2933 drivers/gpu/drm/amd/amdgpu/si_dpm.c smc_result = amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_DisableDTE); adev 2935 drivers/gpu/drm/amd/amdgpu/si_dpm.c smc_result = amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_DisableCac); adev 2940 drivers/gpu/drm/amd/amdgpu/si_dpm.c smc_result = amdgpu_si_send_msg_to_smc(adev, PPSMC_CACLongTermAvgDisable); adev 2946 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_init_smc_spll_table(struct amdgpu_device *adev) adev 2948 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); adev 2949 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 2967 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_calculate_sclk_params(adev, sclk, &sclk_params); adev 3004 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_copy_bytes_to_smc(adev, si_pi->spll_table_start, adev 3017 drivers/gpu/drm/amd/amdgpu/si_dpm.c static u16 si_get_lower_of_leakage_and_vce_voltage(struct amdgpu_device *adev, adev 3021 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 3035 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_get_vce_clock_voltage(struct amdgpu_device *adev, adev 3041 drivers/gpu/drm/amd/amdgpu/si_dpm.c &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; adev 3062 drivers/gpu/drm/amd/amdgpu/si_dpm.c *voltage = si_get_lower_of_leakage_and_vce_voltage(adev, *voltage); adev 3069 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3070 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 vblank_time = amdgpu_dpm_get_vblank_time(adev); adev 3072 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 switch_limit = adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5 ? 450 : 0; adev 3081 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int ni_copy_and_switch_arb_sets(struct amdgpu_device *adev, adev 3146 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void ni_update_current_ps(struct amdgpu_device *adev, adev 3150 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 3151 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); adev 3156 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.current_ps = &eg_pi->current_rps; adev 3159 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void ni_update_requested_ps(struct amdgpu_device *adev, adev 3163 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 3164 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); adev 3169 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.requested_ps = &eg_pi->requested_rps; adev 3172 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void ni_set_uvd_clock_before_set_eng_clock(struct amdgpu_device *adev, adev 3187 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_asic_set_uvd_clocks(adev, new_ps->vclk, new_ps->dclk); adev 3190 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void ni_set_uvd_clock_after_set_eng_clock(struct amdgpu_device *adev, adev 3205 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_asic_set_uvd_clocks(adev, new_ps->vclk, new_ps->dclk); adev 3236 drivers/gpu/drm/amd/amdgpu/si_dpm.c static u32 btc_get_valid_mclk(struct amdgpu_device *adev, adev 3239 drivers/gpu/drm/amd/amdgpu/si_dpm.c return btc_find_valid_clock(&adev->pm.dpm.dyn_state.valid_mclk_values, adev 3243 drivers/gpu/drm/amd/amdgpu/si_dpm.c static u32 btc_get_valid_sclk(struct amdgpu_device *adev, adev 3246 drivers/gpu/drm/amd/amdgpu/si_dpm.c return btc_find_valid_clock(&adev->pm.dpm.dyn_state.valid_sclk_values, adev 3287 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void btc_adjust_clock_combinations(struct amdgpu_device *adev, adev 3299 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > adev->pm.dpm.dyn_state.mclk_sclk_ratio) adev 3300 drivers/gpu/drm/amd/amdgpu/si_dpm.c pl->sclk = btc_get_valid_sclk(adev, adev 3303 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pm.dpm.dyn_state.mclk_sclk_ratio - 1)) / adev 3304 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.mclk_sclk_ratio); adev 3306 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((pl->sclk - pl->mclk) > adev->pm.dpm.dyn_state.sclk_mclk_delta) adev 3307 drivers/gpu/drm/amd/amdgpu/si_dpm.c pl->mclk = btc_get_valid_mclk(adev, adev 3310 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.sclk_mclk_delta); adev 3314 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void btc_apply_voltage_delta_rules(struct amdgpu_device *adev, adev 3318 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 3325 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((*vddc - *vddci) > adev->pm.dpm.dyn_state.vddc_vddci_delta) { adev 3327 drivers/gpu/drm/amd/amdgpu/si_dpm.c (*vddc - adev->pm.dpm.dyn_state.vddc_vddci_delta)); adev 3331 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((*vddci - *vddc) > adev->pm.dpm.dyn_state.vddc_vddci_delta) { adev 3333 drivers/gpu/drm/amd/amdgpu/si_dpm.c (*vddci - adev->pm.dpm.dyn_state.vddc_vddci_delta)); adev 3394 drivers/gpu/drm/amd/amdgpu/si_dpm.c static u8 rv770_get_memory_module_index(struct amdgpu_device *adev) adev 3399 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void rv770_get_max_vddc(struct amdgpu_device *adev) adev 3401 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 3404 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (amdgpu_atombios_get_max_vddc(adev, 0, 0, &vddc)) adev 3410 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void rv770_get_engine_memory_ss(struct amdgpu_device *adev) adev 3412 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 3415 drivers/gpu/drm/amd/amdgpu/si_dpm.c pi->sclk_ss = amdgpu_atombios_get_asic_ss_info(adev, &ss, adev 3417 drivers/gpu/drm/amd/amdgpu/si_dpm.c pi->mclk_ss = amdgpu_atombios_get_asic_ss_info(adev, &ss, adev 3427 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_apply_state_adjust_rules(struct amdgpu_device *adev, adev 3440 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->asic_type == CHIP_HAINAN) { adev 3441 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((adev->pdev->revision == 0x81) || adev 3442 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->revision == 0x83) || adev 3443 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->revision == 0xC3) || adev 3444 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6664) || adev 3445 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6665) || adev 3446 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6667)) { adev 3449 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((adev->pdev->revision == 0xC3) || adev 3450 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6665)) { adev 3454 drivers/gpu/drm/amd/amdgpu/si_dpm.c } else if (adev->asic_type == CHIP_OLAND) { adev 3455 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((adev->pdev->revision == 0xC7) || adev 3456 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->revision == 0x80) || adev 3457 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->revision == 0x81) || adev 3458 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->revision == 0x83) || adev 3459 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->revision == 0x87) || adev 3460 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6604) || adev 3461 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6605)) { adev 3467 drivers/gpu/drm/amd/amdgpu/si_dpm.c rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; adev 3468 drivers/gpu/drm/amd/amdgpu/si_dpm.c rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; adev 3469 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_get_vce_clock_voltage(adev, rps->evclk, rps->ecclk, adev 3476 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((adev->pm.dpm.new_active_crtc_count > 1) || adev 3477 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_dpm_vblank_too_short(adev)) adev 3485 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.ac_power) adev 3486 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; adev 3488 drivers/gpu/drm/amd/amdgpu/si_dpm.c max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; adev 3494 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.ac_power == false) { adev 3508 drivers/gpu/drm/amd/amdgpu/si_dpm.c btc_get_max_clock_from_voltage_dependency_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk, adev 3510 drivers/gpu/drm/amd/amdgpu/si_dpm.c btc_get_max_clock_from_voltage_dependency_table(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk, adev 3512 drivers/gpu/drm/amd/amdgpu/si_dpm.c btc_get_max_clock_from_voltage_dependency_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk, adev 3557 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk) adev 3558 drivers/gpu/drm/amd/amdgpu/si_dpm.c sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk; adev 3559 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (mclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk) adev 3560 drivers/gpu/drm/amd/amdgpu/si_dpm.c mclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk; adev 3608 drivers/gpu/drm/amd/amdgpu/si_dpm.c btc_adjust_clock_combinations(adev, max_limits, adev 3614 drivers/gpu/drm/amd/amdgpu/si_dpm.c btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk, adev 3617 drivers/gpu/drm/amd/amdgpu/si_dpm.c btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk, adev 3620 drivers/gpu/drm/amd/amdgpu/si_dpm.c btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk, adev 3623 drivers/gpu/drm/amd/amdgpu/si_dpm.c btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, adev 3624 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->clock.current_dispclk, adev 3629 drivers/gpu/drm/amd/amdgpu/si_dpm.c btc_apply_voltage_delta_rules(adev, adev 3637 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ps->performance_levels[i].vddc > adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) adev 3643 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_read_smc_soft_register(struct amdgpu_device *adev, adev 3646 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 3648 drivers/gpu/drm/amd/amdgpu/si_dpm.c return amdgpu_si_read_smc_sram_dword(adev, adev 3654 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_write_smc_soft_register(struct amdgpu_device *adev, adev 3657 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 3659 drivers/gpu/drm/amd/amdgpu/si_dpm.c return amdgpu_si_write_smc_sram_dword(adev, adev 3664 drivers/gpu/drm/amd/amdgpu/si_dpm.c static bool si_is_special_1gb_platform(struct amdgpu_device *adev) adev 3685 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((adev->pdev->device == 0x6819) && adev 3692 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_get_leakage_vddc(struct amdgpu_device *adev) adev 3694 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 3699 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_atombios_get_leakage_vddc_based_on_leakage_idx(adev, &vddc, SISLANDS_LEAKAGE_INDEX0 + i); adev 3711 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_get_leakage_voltage_from_leakage_index(struct amdgpu_device *adev, adev 3714 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 3738 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_set_dpm_event_sources(struct amdgpu_device *adev, u32 sources) adev 3740 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 3773 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_enable_auto_throttle_source(struct amdgpu_device *adev, adev 3777 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 3782 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_set_dpm_event_sources(adev, pi->active_auto_throttle_sources); adev 3787 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_set_dpm_event_sources(adev, pi->active_auto_throttle_sources); adev 3792 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_start_dpm(struct amdgpu_device *adev) adev 3797 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_stop_dpm(struct amdgpu_device *adev) adev 3802 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_enable_sclk_control(struct amdgpu_device *adev, bool enable) adev 3812 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_notify_hardware_of_thermal_state(struct amdgpu_device *adev, adev 3818 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_EnableThermalInterrupt); adev 3827 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_notify_hardware_vpu_recovery_event(struct amdgpu_device *adev) adev 3829 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_tdr_is_about_to_happen, true); adev 3834 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_notify_hw_of_powersource(struct amdgpu_device *adev, bool ac_power) adev 3837 drivers/gpu/drm/amd/amdgpu/si_dpm.c return (amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_RunningOnAC) == PPSMC_Result_OK) ? adev 3844 drivers/gpu/drm/amd/amdgpu/si_dpm.c static PPSMC_Result si_send_msg_to_smc_with_parameter(struct amdgpu_device *adev, adev 3848 drivers/gpu/drm/amd/amdgpu/si_dpm.c return amdgpu_si_send_msg_to_smc(adev, msg); adev 3851 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_restrict_performance_levels_before_switch(struct amdgpu_device *adev) adev 3853 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_NoForcedLevel) != PPSMC_Result_OK) adev 3856 drivers/gpu/drm/amd/amdgpu/si_dpm.c return (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetEnabledLevels, 1) == PPSMC_Result_OK) ? adev 3863 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 3864 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_ps *rps = adev->pm.dpm.current_ps; adev 3869 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetEnabledLevels, levels) != PPSMC_Result_OK) adev 3872 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetForcedLevels, 1) != PPSMC_Result_OK) adev 3875 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK) adev 3878 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetEnabledLevels, 1) != PPSMC_Result_OK) adev 3881 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK) adev 3884 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (si_send_msg_to_smc_with_parameter(adev, PPSMC_MSG_SetEnabledLevels, levels) != PPSMC_Result_OK) adev 3888 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.forced_level = level; adev 3894 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_set_boot_state(struct amdgpu_device *adev) adev 3896 drivers/gpu/drm/amd/amdgpu/si_dpm.c return (amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_SwitchToInitialState) == PPSMC_Result_OK) ? adev 3901 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_set_sw_state(struct amdgpu_device *adev) adev 3903 drivers/gpu/drm/amd/amdgpu/si_dpm.c return (amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_SwitchToSwState) == PPSMC_Result_OK) ? adev 3907 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_halt_smc(struct amdgpu_device *adev) adev 3909 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_Halt) != PPSMC_Result_OK) adev 3912 drivers/gpu/drm/amd/amdgpu/si_dpm.c return (amdgpu_si_wait_for_smc_inactive(adev) == PPSMC_Result_OK) ? adev 3916 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_resume_smc(struct amdgpu_device *adev) adev 3918 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (amdgpu_si_send_msg_to_smc(adev, PPSMC_FlushDataCache) != PPSMC_Result_OK) adev 3921 drivers/gpu/drm/amd/amdgpu/si_dpm.c return (amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_Resume) == PPSMC_Result_OK) ? adev 3925 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_dpm_start_smc(struct amdgpu_device *adev) adev 3927 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_si_program_jump_on_start(adev); adev 3928 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_si_start_smc(adev); adev 3929 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_si_smc_clock(adev, true); adev 3932 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_dpm_stop_smc(struct amdgpu_device *adev) adev 3934 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_si_reset_smc(adev); adev 3935 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_si_smc_clock(adev, false); adev 3938 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_process_firmware_header(struct amdgpu_device *adev) adev 3940 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 3944 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_read_smc_sram_dword(adev, adev 3953 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_read_smc_sram_dword(adev, adev 3962 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_read_smc_sram_dword(adev, adev 3971 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_read_smc_sram_dword(adev, adev 3980 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_read_smc_sram_dword(adev, adev 3989 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_read_smc_sram_dword(adev, adev 3998 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_read_smc_sram_dword(adev, adev 4007 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_read_smc_sram_dword(adev, adev 4016 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_read_smc_sram_dword(adev, adev 4028 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_read_clock_registers(struct amdgpu_device *adev) adev 4030 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 4049 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_enable_thermal_protection(struct amdgpu_device *adev, adev 4058 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_enable_acpi_power_management(struct amdgpu_device *adev) adev 4064 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_enter_ulp_state(struct amdgpu_device *adev) adev 4073 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_exit_ulp_state(struct amdgpu_device *adev) adev 4081 drivers/gpu/drm/amd/amdgpu/si_dpm.c for (i = 0; i < adev->usec_timeout; i++) { adev 4091 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_notify_smc_display_change(struct amdgpu_device *adev, adev 4097 drivers/gpu/drm/amd/amdgpu/si_dpm.c return (amdgpu_si_send_msg_to_smc(adev, msg) == PPSMC_Result_OK) ? adev 4101 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_program_response_times(struct amdgpu_device *adev) adev 4107 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_mvdd_chg_time, 1); adev 4109 drivers/gpu/drm/amd/amdgpu/si_dpm.c voltage_response_time = (u32)adev->pm.dpm.voltage_response_time; adev 4117 drivers/gpu/drm/amd/amdgpu/si_dpm.c reference_clock = amdgpu_asic_get_xclk(adev); adev 4123 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_delay_vreg, vddc_dly); adev 4124 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_delay_acpi, acpi_dly); adev 4125 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_mclk_chg_timeout, vbi_dly); adev 4126 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_mc_block_delay, 0xAA); adev 4129 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_program_ds_registers(struct amdgpu_device *adev) adev 4131 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 4135 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->asic_type == CHIP_TAHITI && adev->rev_id == 0x0) adev 4147 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_program_display_gap(struct amdgpu_device *adev) adev 4153 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.new_active_crtc_count > 0) adev 4158 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.new_active_crtc_count > 1) adev 4168 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((adev->pm.dpm.new_active_crtc_count > 0) && adev 4169 drivers/gpu/drm/amd/amdgpu/si_dpm.c (!(adev->pm.dpm.new_active_crtcs & (1 << pipe)))) { adev 4171 drivers/gpu/drm/amd/amdgpu/si_dpm.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 4172 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.new_active_crtcs & (1 << i)) adev 4175 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (i == adev->mode_info.num_crtc) adev 4189 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_notify_smc_display_change(adev, adev->pm.dpm.new_active_crtc_count > 0); adev 4192 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_enable_spread_spectrum(struct amdgpu_device *adev, bool enable) adev 4194 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 4205 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_setup_bsp(struct amdgpu_device *adev) adev 4207 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 4208 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 xclk = amdgpu_asic_get_xclk(adev); adev 4229 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_program_git(struct amdgpu_device *adev) adev 4234 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_program_tp(struct amdgpu_device *adev) adev 4254 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_program_tpp(struct amdgpu_device *adev) adev 4259 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_program_sstp(struct amdgpu_device *adev) adev 4264 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_enable_display_gap(struct amdgpu_device *adev) adev 4278 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_program_vc(struct amdgpu_device *adev) adev 4280 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 4285 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_clear_vc(struct amdgpu_device *adev) adev 4325 drivers/gpu/drm/amd/amdgpu/si_dpm.c static u8 si_get_strobe_mode_settings(struct amdgpu_device *adev, u32 mclk) adev 4327 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 4334 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5) adev 4345 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_upload_firmware(struct amdgpu_device *adev) adev 4347 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 4349 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_si_reset_smc(adev); adev 4350 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_si_smc_clock(adev, false); adev 4352 drivers/gpu/drm/amd/amdgpu/si_dpm.c return amdgpu_si_load_smc_ucode(adev, si_pi->sram_end); adev 4355 drivers/gpu/drm/amd/amdgpu/si_dpm.c static bool si_validate_phase_shedding_tables(struct amdgpu_device *adev, adev 4382 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_trim_voltage_table_to_fit_state_table(struct amdgpu_device *adev, adev 4399 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_get_svi2_voltage_table(struct amdgpu_device *adev, adev 4420 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_construct_voltage_tables(struct amdgpu_device *adev) adev 4422 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 4423 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 4424 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 4428 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_atombios_get_voltage_table(adev, VOLTAGE_TYPE_VDDC, adev 4434 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_trim_voltage_table_to_fit_state_table(adev, adev 4438 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_get_svi2_voltage_table(adev, adev 4439 drivers/gpu/drm/amd/amdgpu/si_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_mclk, adev 4448 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_atombios_get_voltage_table(adev, VOLTAGE_TYPE_VDDCI, adev 4454 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_trim_voltage_table_to_fit_state_table(adev, adev 4459 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_get_svi2_voltage_table(adev, adev 4460 drivers/gpu/drm/amd/amdgpu/si_dpm.c &adev->pm.dpm.dyn_state.vddci_dependency_on_mclk, adev 4467 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_atombios_get_voltage_table(adev, VOLTAGE_TYPE_MVDDC, adev 4481 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_trim_voltage_table_to_fit_state_table(adev, adev 4487 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_atombios_get_voltage_table(adev, VOLTAGE_TYPE_VDDC, adev 4500 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_populate_smc_voltage_table(struct amdgpu_device *adev, adev 4510 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_smc_voltage_tables(struct amdgpu_device *adev, adev 4513 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 4514 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 4515 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 4519 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svc, adev 4521 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_svi_rework_gpio_id_svd, adev 4523 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_svi_rework_plat_type, adev 4527 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_smc_voltage_table(adev, &eg_pi->vddc_voltage_table, table); adev 4540 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_smc_voltage_table(adev, &eg_pi->vddci_voltage_table, table); adev 4548 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_smc_voltage_table(adev, &si_pi->mvdd_voltage_table, table); adev 4555 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (si_validate_phase_shedding_tables(adev, &si_pi->vddc_phase_shed_table, adev 4556 drivers/gpu/drm/amd/amdgpu/si_dpm.c &adev->pm.dpm.dyn_state.phase_shedding_limits_table)) { adev 4557 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_smc_voltage_table(adev, &si_pi->vddc_phase_shed_table, table); adev 4562 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_phase_shedding_delay, adev 4573 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_voltage_value(struct amdgpu_device *adev, adev 4593 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_mvdd_value(struct amdgpu_device *adev, u32 mclk, adev 4596 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 4597 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 4610 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_get_std_voltage_value(struct amdgpu_device *adev, adev 4618 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.dyn_state.cac_leakage_table.entries) { adev 4619 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_NEW_CAC_VOLTAGE) { adev 4620 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL) adev 4623 drivers/gpu/drm/amd/amdgpu/si_dpm.c for (v_index = 0; (u32)v_index < adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) { adev 4625 drivers/gpu/drm/amd/amdgpu/si_dpm.c (u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { adev 4627 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((u32)v_index < adev->pm.dpm.dyn_state.cac_leakage_table.count) adev 4629 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc; adev 4632 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries[adev->pm.dpm.dyn_state.cac_leakage_table.count-1].vddc; adev 4638 drivers/gpu/drm/amd/amdgpu/si_dpm.c for (v_index = 0; (u32)v_index < adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) { adev 4640 drivers/gpu/drm/amd/amdgpu/si_dpm.c (u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) { adev 4642 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((u32)v_index < adev->pm.dpm.dyn_state.cac_leakage_table.count) adev 4644 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc; adev 4647 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.cac_leakage_table.entries[adev->pm.dpm.dyn_state.cac_leakage_table.count-1].vddc; adev 4653 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((u32)voltage->index < adev->pm.dpm.dyn_state.cac_leakage_table.count) adev 4654 drivers/gpu/drm/amd/amdgpu/si_dpm.c *std_voltage = adev->pm.dpm.dyn_state.cac_leakage_table.entries[voltage->index].vddc; adev 4661 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_std_voltage_value(struct amdgpu_device *adev, adev 4671 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_phase_shedding_value(struct amdgpu_device *adev, adev 4690 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_init_arb_table_index(struct amdgpu_device *adev) adev 4692 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 4696 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_read_smc_sram_dword(adev, si_pi->arb_table_start, adev 4704 drivers/gpu/drm/amd/amdgpu/si_dpm.c return amdgpu_si_write_smc_sram_dword(adev, si_pi->arb_table_start, adev 4708 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_initial_switch_from_arb_f0_to_f1(struct amdgpu_device *adev) adev 4710 drivers/gpu/drm/amd/amdgpu/si_dpm.c return ni_copy_and_switch_arb_sets(adev, MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1); adev 4713 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_reset_to_default(struct amdgpu_device *adev) adev 4715 drivers/gpu/drm/amd/amdgpu/si_dpm.c return (amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_ResetToDefaults) == PPSMC_Result_OK) ? adev 4719 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_force_switch_to_arb_f0(struct amdgpu_device *adev) adev 4721 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 4725 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_read_smc_sram_dword(adev, si_pi->arb_table_start, adev 4735 drivers/gpu/drm/amd/amdgpu/si_dpm.c return ni_copy_and_switch_arb_sets(adev, tmp, MC_CG_ARB_FREQ_F0); adev 4738 drivers/gpu/drm/amd/amdgpu/si_dpm.c static u32 si_calculate_memory_refresh_rate(struct amdgpu_device *adev, adev 4757 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_memory_timing_parameters(struct amdgpu_device *adev, adev 4766 drivers/gpu/drm/amd/amdgpu/si_dpm.c (u8)si_calculate_memory_refresh_rate(adev, pl->sclk); adev 4768 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_atombios_set_engine_dram_timings(adev, adev 4783 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_do_program_memory_timing_parameters(struct amdgpu_device *adev, adev 4787 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 4793 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_memory_timing_parameters(adev, &state->performance_levels[i], &arb_regs); adev 4796 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_copy_bytes_to_smc(adev, adev 4810 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_program_memory_timing_parameters(struct amdgpu_device *adev, adev 4813 drivers/gpu/drm/amd/amdgpu/si_dpm.c return si_do_program_memory_timing_parameters(adev, amdgpu_new_state, adev 4817 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_initial_mvdd_value(struct amdgpu_device *adev, adev 4820 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 4821 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 4824 drivers/gpu/drm/amd/amdgpu/si_dpm.c return si_populate_voltage_value(adev, &si_pi->mvdd_voltage_table, adev 4830 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_smc_initial_state(struct amdgpu_device *adev, adev 4835 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 4836 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 4837 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 4884 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_voltage_value(adev, &eg_pi->vddc_voltage_table, adev 4891 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_get_std_voltage_value(adev, adev 4895 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_std_voltage_value(adev, std_vddc, adev 4901 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_voltage_value(adev, adev 4907 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_phase_shedding_value(adev, adev 4908 drivers/gpu/drm/amd/amdgpu/si_dpm.c &adev->pm.dpm.dyn_state.phase_shedding_limits_table, adev 4914 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_initial_mvdd_value(adev, &table->initialState.levels[0].mvdd); adev 4921 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5) { adev 4923 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_get_strobe_mode_settings(adev, adev 4951 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_smc_acpi_state(struct amdgpu_device *adev, adev 4954 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 4955 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 4956 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 4976 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_voltage_value(adev, &eg_pi->vddc_voltage_table, adev 4981 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_get_std_voltage_value(adev, adev 4984 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_std_voltage_value(adev, std_vddc, adev 4991 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_phase_shedding_value(adev, adev 4992 drivers/gpu/drm/amd/amdgpu/si_dpm.c &adev->pm.dpm.dyn_state.phase_shedding_limits_table, adev 4999 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_voltage_value(adev, &eg_pi->vddc_voltage_table, adev 5004 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_get_std_voltage_value(adev, adev 5008 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_std_voltage_value(adev, std_vddc, adev 5013 drivers/gpu/drm/amd/amdgpu/si_dpm.c (u8)amdgpu_get_pcie_gen_support(adev, adev 5019 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_phase_shedding_value(adev, adev 5020 drivers/gpu/drm/amd/amdgpu/si_dpm.c &adev->pm.dpm.dyn_state.phase_shedding_limits_table, adev 5029 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_voltage_value(adev, &eg_pi->vddci_voltage_table, adev 5073 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_mvdd_value(adev, 0, &table->ACPIState.levels[0].mvdd); adev 5093 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_ulv_state(struct amdgpu_device *adev, adev 5096 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 5097 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 5102 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_convert_power_level_to_smc(adev, &ulv->pl, adev 5124 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_program_ulv_memory_timing_parameters(struct amdgpu_device *adev) adev 5126 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 5131 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_memory_timing_parameters(adev, &ulv->pl, adev 5136 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_ulv_volt_change_delay, adev 5139 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_copy_bytes_to_smc(adev, adev 5150 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_get_mvdd_configuration(struct amdgpu_device *adev) adev 5152 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 5157 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_init_smc_table(struct amdgpu_device *adev) adev 5159 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 5160 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_ps *amdgpu_boot_state = adev->pm.dpm.boot_ps; adev 5167 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_smc_voltage_tables(adev, table); adev 5169 drivers/gpu/drm/amd/amdgpu/si_dpm.c switch (adev->pm.int_thermal_type) { adev 5182 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) adev 5185 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REGULATOR_HOT) { adev 5186 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((adev->pdev->device != 0x6818) && (adev->pdev->device != 0x6819)) adev 5190 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) adev 5193 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5) adev 5196 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REVERT_GPIO5_POLARITY) adev 5199 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_VRHOT_GPIO_CONFIGURABLE) { adev 5201 drivers/gpu/drm/amd/amdgpu/si_dpm.c vr_hot_gpio = adev->pm.dpm.backbias_response_time; adev 5202 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_vr_hot_gpio, adev 5206 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_smc_initial_state(adev, amdgpu_boot_state, table); adev 5210 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_smc_acpi_state(adev, table); adev 5216 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_do_program_memory_timing_parameters(adev, amdgpu_boot_state, adev 5222 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_ulv_state(adev, &table->ULVState); adev 5226 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_program_ulv_memory_timing_parameters(adev); adev 5233 drivers/gpu/drm/amd/amdgpu/si_dpm.c lane_width = amdgpu_get_pcie_lanes(adev); adev 5234 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); adev 5239 drivers/gpu/drm/amd/amdgpu/si_dpm.c return amdgpu_si_copy_bytes_to_smc(adev, si_pi->state_table_start, adev 5244 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_calculate_sclk_params(struct amdgpu_device *adev, adev 5248 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 5249 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 5258 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 reference_clock = adev->clock.spll.reference_freq; adev 5263 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_atombios_get_clock_dividers(adev, COMPUTE_ENGINE_PLL_PARAM, adev 5289 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (amdgpu_atombios_get_asic_ss_info(adev, &ss, adev 5314 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_sclk_value(struct amdgpu_device *adev, adev 5321 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_calculate_sclk_params(adev, engine_clock, &sclk_tmp); adev 5335 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_mclk_value(struct amdgpu_device *adev, adev 5342 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 5343 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 5356 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_atombios_get_memory_pll_dividers(adev, memory_clock, strobe_mode, &mpll_param); adev 5370 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5) { adev 5380 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 reference_clock = adev->clock.mpll.reference_freq; adev 5382 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5) adev 5389 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (amdgpu_atombios_get_asic_ss_info(adev, &ss, adev 5424 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_populate_smc_sp(struct amdgpu_device *adev, adev 5429 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 5439 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_convert_power_level_to_smc(struct amdgpu_device *adev, adev 5443 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 5444 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 5445 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 5457 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_sclk_value(adev, pl->sclk, &level->sclk); adev 5467 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pm.dpm.new_active_crtc_count <= 2)) { adev 5474 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5) { adev 5481 drivers/gpu/drm/amd/amdgpu/si_dpm.c level->strobeMode = si_get_strobe_mode_settings(adev, pl->mclk); adev 5493 drivers/gpu/drm/amd/amdgpu/si_dpm.c level->strobeMode = si_get_strobe_mode_settings(adev, adev 5499 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_mclk_value(adev, adev 5507 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_voltage_value(adev, adev 5514 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_get_std_voltage_value(adev, &level->vddc, &std_vddc); adev 5518 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_std_voltage_value(adev, std_vddc, adev 5524 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_voltage_value(adev, &eg_pi->vddci_voltage_table, adev 5531 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_phase_shedding_value(adev, adev 5532 drivers/gpu/drm/amd/amdgpu/si_dpm.c &adev->pm.dpm.dyn_state.phase_shedding_limits_table, adev 5543 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_mvdd_value(adev, pl->mclk, &level->mvdd); adev 5548 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_smc_t(struct amdgpu_device *adev, adev 5552 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 5597 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_disable_ulv(struct amdgpu_device *adev) adev 5599 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 5603 drivers/gpu/drm/amd/amdgpu/si_dpm.c return (amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_DisableULV) == PPSMC_Result_OK) ? adev 5609 drivers/gpu/drm/amd/amdgpu/si_dpm.c static bool si_is_state_ulv_compatible(struct amdgpu_device *adev, adev 5612 drivers/gpu/drm/amd/amdgpu/si_dpm.c const struct si_power_info *si_pi = si_get_pi(adev); adev 5622 drivers/gpu/drm/amd/amdgpu/si_dpm.c for (i = 0; i < adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count; i++) { adev 5623 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->clock.current_dispclk <= adev 5624 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].clk) { adev 5626 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].v) adev 5637 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_set_power_state_conditionally_enable_ulv(struct amdgpu_device *adev, adev 5640 drivers/gpu/drm/amd/amdgpu/si_dpm.c const struct si_power_info *si_pi = si_get_pi(adev); adev 5644 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (si_is_state_ulv_compatible(adev, amdgpu_new_state)) adev 5645 drivers/gpu/drm/amd/amdgpu/si_dpm.c return (amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_EnableULV) == PPSMC_Result_OK) ? adev 5651 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_convert_power_state_to_smc(struct amdgpu_device *adev, adev 5655 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 5656 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); adev 5657 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 5690 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_convert_power_level_to_smc(adev, &state->performance_levels[i], adev 5714 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, adev 5718 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_smc_sp(adev, amdgpu_state, smc_state); adev 5720 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_power_containment_values(adev, amdgpu_state, smc_state); adev 5724 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_sq_ramping_values(adev, amdgpu_state, smc_state); adev 5728 drivers/gpu/drm/amd/amdgpu/si_dpm.c return si_populate_smc_t(adev, amdgpu_state, smc_state); adev 5731 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_upload_sw_state(struct amdgpu_device *adev, adev 5734 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 5746 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_convert_power_state_to_smc(adev, amdgpu_new_state, smc_state); adev 5750 drivers/gpu/drm/amd/amdgpu/si_dpm.c return amdgpu_si_copy_bytes_to_smc(adev, address, (u8 *)smc_state, adev 5754 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_upload_ulv_state(struct amdgpu_device *adev) adev 5756 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 5768 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_ulv_state(adev, smc_state); adev 5770 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_copy_bytes_to_smc(adev, address, (u8 *)smc_state, adev 5777 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_upload_smc_data(struct amdgpu_device *adev) adev 5782 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.new_active_crtc_count == 0) adev 5785 drivers/gpu/drm/amd/amdgpu/si_dpm.c for (i = 0; i < adev->mode_info.num_crtc; i++) { adev 5786 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.new_active_crtcs & (1 << i)) { adev 5787 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_crtc = adev->mode_info.crtcs[i]; adev 5798 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (si_write_smc_soft_register(adev, adev 5803 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (si_write_smc_soft_register(adev, adev 5808 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (si_write_smc_soft_register(adev, adev 5816 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_set_mc_special_registers(struct amdgpu_device *adev, adev 5845 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->gmc.vram_type != AMDGPU_VRAM_TYPE_GDDR5) adev 5850 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->gmc.vram_type != AMDGPU_VRAM_TYPE_GDDR5) { adev 5987 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_initialize_mc_reg_table(struct amdgpu_device *adev) adev 5989 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 5992 drivers/gpu/drm/amd/amdgpu/si_dpm.c u8 module_index = rv770_get_memory_module_index(adev); adev 6014 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_atombios_init_mc_reg_table(adev, module_index, table); adev 6024 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_set_mc_special_registers(adev, si_table); adev 6037 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_populate_mc_reg_addresses(struct amdgpu_device *adev, adev 6040 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6071 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_convert_mc_reg_table_entry_to_smc(struct amdgpu_device *adev, adev 6075 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6091 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_convert_mc_reg_table_to_smc(struct amdgpu_device *adev, adev 6099 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_convert_mc_reg_table_entry_to_smc(adev, adev 6105 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_populate_mc_reg_table(struct amdgpu_device *adev, adev 6109 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6115 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_seq_index, 1); adev 6117 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_populate_mc_reg_addresses(adev, smc_mc_reg_table); adev 6119 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_convert_mc_reg_table_entry_to_smc(adev, &boot_state->performance_levels[0], adev 6128 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_convert_mc_reg_table_entry_to_smc(adev, &ulv->pl, adev 6136 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_convert_mc_reg_table_to_smc(adev, amdgpu_boot_state, smc_mc_reg_table); adev 6138 drivers/gpu/drm/amd/amdgpu/si_dpm.c return amdgpu_si_copy_bytes_to_smc(adev, si_pi->mc_reg_table_start, adev 6143 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_upload_mc_reg_table(struct amdgpu_device *adev, adev 6147 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6155 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_convert_mc_reg_table_to_smc(adev, amdgpu_new_state, smc_mc_reg_table); adev 6157 drivers/gpu/drm/amd/amdgpu/si_dpm.c return amdgpu_si_copy_bytes_to_smc(adev, address, adev 6163 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_enable_voltage_control(struct amdgpu_device *adev, bool enable) adev 6171 drivers/gpu/drm/amd/amdgpu/si_dpm.c static enum amdgpu_pcie_gen si_get_maximum_link_speed(struct amdgpu_device *adev, adev 6186 drivers/gpu/drm/amd/amdgpu/si_dpm.c static u16 si_get_current_pcie_speed(struct amdgpu_device *adev) adev 6196 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_request_link_speed_change_before_state_change(struct amdgpu_device *adev, adev 6200 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6201 drivers/gpu/drm/amd/amdgpu/si_dpm.c enum amdgpu_pcie_gen target_link_speed = si_get_maximum_link_speed(adev, amdgpu_new_state); adev 6205 drivers/gpu/drm/amd/amdgpu/si_dpm.c current_link_speed = si_get_maximum_link_speed(adev, amdgpu_current_state); adev 6215 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (amdgpu_acpi_pcie_performance_request(adev, PCIE_PERF_REQ_PECI_GEN3, false) == 0) adev 6222 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (amdgpu_acpi_pcie_performance_request(adev, PCIE_PERF_REQ_PECI_GEN2, false) == 0) adev 6227 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_pi->force_pcie_gen = si_get_current_pcie_speed(adev); adev 6236 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_notify_link_speed_change_after_state_change(struct amdgpu_device *adev, adev 6240 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6241 drivers/gpu/drm/amd/amdgpu/si_dpm.c enum amdgpu_pcie_gen target_link_speed = si_get_maximum_link_speed(adev, amdgpu_new_state); adev 6253 drivers/gpu/drm/amd/amdgpu/si_dpm.c (si_get_current_pcie_speed(adev) > 0)) adev 6257 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_acpi_pcie_performance_request(adev, request, false); adev 6263 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_ds_request(struct amdgpu_device *adev, adev 6266 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 6270 drivers/gpu/drm/amd/amdgpu/si_dpm.c return (amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_CancelThrottleOVRDSCLKDS) == adev 6274 drivers/gpu/drm/amd/amdgpu/si_dpm.c return (amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_ThrottleOVRDSCLKDS) == adev 6281 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_set_max_cu_value(struct amdgpu_device *adev) adev 6283 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6285 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->asic_type == CHIP_VERDE) { adev 6286 drivers/gpu/drm/amd/amdgpu/si_dpm.c switch (adev->pdev->device) { adev 6322 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_patch_single_dependency_table_based_on_leakage(struct amdgpu_device *adev, adev 6331 drivers/gpu/drm/amd/amdgpu/si_dpm.c switch (si_get_leakage_voltage_from_leakage_index(adev, adev 6353 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_patch_dependency_tables_based_on_leakage(struct amdgpu_device *adev) adev 6357 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_patch_single_dependency_table_based_on_leakage(adev, adev 6358 drivers/gpu/drm/amd/amdgpu/si_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk); adev 6361 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_patch_single_dependency_table_based_on_leakage(adev, adev 6362 drivers/gpu/drm/amd/amdgpu/si_dpm.c &adev->pm.dpm.dyn_state.vddc_dependency_on_mclk); adev 6365 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_patch_single_dependency_table_based_on_leakage(adev, adev 6366 drivers/gpu/drm/amd/amdgpu/si_dpm.c &adev->pm.dpm.dyn_state.vddci_dependency_on_mclk); adev 6372 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_set_pcie_lane_width_in_smc(struct amdgpu_device *adev, adev 6383 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_set_pcie_lanes(adev, new_lane_width); adev 6384 drivers/gpu/drm/amd/amdgpu/si_dpm.c lane_width = amdgpu_get_pcie_lanes(adev); adev 6385 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); adev 6389 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_dpm_setup_asic(struct amdgpu_device *adev) adev 6391 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_read_clock_registers(adev); adev 6392 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_enable_acpi_power_management(adev); adev 6395 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_thermal_enable_alert(struct amdgpu_device *adev, adev 6405 drivers/gpu/drm/amd/amdgpu/si_dpm.c result = amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_EnableThermalInterrupt); adev 6418 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_thermal_set_temperature_range(struct amdgpu_device *adev, adev 6437 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.thermal.min_temp = low_temp; adev 6438 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.thermal.max_temp = high_temp; adev 6443 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_fan_ctrl_set_static_mode(struct amdgpu_device *adev, u32 mode) adev 6445 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6465 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_thermal_setup_fan_table(struct amdgpu_device *adev) adev 6467 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6477 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.fan.ucode_fan_control = false; adev 6484 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.fan.ucode_fan_control = false; adev 6488 drivers/gpu/drm/amd/amdgpu/si_dpm.c tmp64 = (u64)adev->pm.dpm.fan.pwm_min * duty100; adev 6492 drivers/gpu/drm/amd/amdgpu/si_dpm.c t_diff1 = adev->pm.dpm.fan.t_med - adev->pm.dpm.fan.t_min; adev 6493 drivers/gpu/drm/amd/amdgpu/si_dpm.c t_diff2 = adev->pm.dpm.fan.t_high - adev->pm.dpm.fan.t_med; adev 6495 drivers/gpu/drm/amd/amdgpu/si_dpm.c pwm_diff1 = adev->pm.dpm.fan.pwm_med - adev->pm.dpm.fan.pwm_min; adev 6496 drivers/gpu/drm/amd/amdgpu/si_dpm.c pwm_diff2 = adev->pm.dpm.fan.pwm_high - adev->pm.dpm.fan.pwm_med; adev 6501 drivers/gpu/drm/amd/amdgpu/si_dpm.c fan_table.temp_min = cpu_to_be16((50 + adev->pm.dpm.fan.t_min) / 100); adev 6502 drivers/gpu/drm/amd/amdgpu/si_dpm.c fan_table.temp_med = cpu_to_be16((50 + adev->pm.dpm.fan.t_med) / 100); adev 6503 drivers/gpu/drm/amd/amdgpu/si_dpm.c fan_table.temp_max = cpu_to_be16((50 + adev->pm.dpm.fan.t_max) / 100); adev 6507 drivers/gpu/drm/amd/amdgpu/si_dpm.c fan_table.hys_down = cpu_to_be16(adev->pm.dpm.fan.t_hyst); adev 6511 drivers/gpu/drm/amd/amdgpu/si_dpm.c reference_clock = amdgpu_asic_get_xclk(adev); adev 6513 drivers/gpu/drm/amd/amdgpu/si_dpm.c fan_table.refresh_period = cpu_to_be32((adev->pm.dpm.fan.cycle_delay * adev 6520 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_copy_bytes_to_smc(adev, adev 6528 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.fan.ucode_fan_control = false; adev 6534 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_fan_ctrl_start_smc_fan_control(struct amdgpu_device *adev) adev 6536 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6539 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_send_msg_to_smc(adev, PPSMC_StartFanControl); adev 6548 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_fan_ctrl_stop_smc_fan_control(struct amdgpu_device *adev) adev 6550 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6553 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_si_send_msg_to_smc(adev, PPSMC_StopFanControl); adev 6568 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 6570 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.no_fan) adev 6592 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 6593 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6598 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.no_fan) adev 6625 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 6629 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.fan.ucode_fan_control) adev 6630 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_fan_ctrl_stop_smc_fan_control(adev); adev 6631 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_fan_ctrl_set_static_mode(adev, mode); adev 6634 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.fan.ucode_fan_control) adev 6635 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_thermal_start_smc_fan_control(adev); adev 6637 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_fan_ctrl_set_default_mode(adev); adev 6643 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 6644 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6655 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_fan_ctrl_get_fan_speed_rpm(struct amdgpu_device *adev, adev 6659 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 xclk = amdgpu_asic_get_xclk(adev); adev 6661 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.no_fan) adev 6664 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.fan_pulses_per_revolution == 0) adev 6676 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_fan_ctrl_set_fan_speed_rpm(struct amdgpu_device *adev, adev 6680 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 xclk = amdgpu_asic_get_xclk(adev); adev 6682 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.no_fan) adev 6685 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.fan_pulses_per_revolution == 0) adev 6688 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((speed < adev->pm.fan_min_rpm) || adev 6689 drivers/gpu/drm/amd/amdgpu/si_dpm.c (speed > adev->pm.fan_max_rpm)) adev 6692 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.fan.ucode_fan_control) adev 6693 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_fan_ctrl_stop_smc_fan_control(adev); adev 6700 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_fan_ctrl_set_static_mode(adev, FDO_PWM_MODE_STATIC_RPM); adev 6706 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_fan_ctrl_set_default_mode(struct amdgpu_device *adev) adev 6708 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6723 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_thermal_start_smc_fan_control(struct amdgpu_device *adev) adev 6725 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.fan.ucode_fan_control) { adev 6726 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_fan_ctrl_start_smc_fan_control(adev); adev 6727 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_fan_ctrl_set_static_mode(adev, FDO_PWM_MODE_STATIC); adev 6731 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_thermal_initialize(struct amdgpu_device *adev) adev 6735 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.fan_pulses_per_revolution) { adev 6737 drivers/gpu/drm/amd/amdgpu/si_dpm.c tmp |= EDGE_PER_REV(adev->pm.fan_pulses_per_revolution -1); adev 6746 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_thermal_start_thermal_controller(struct amdgpu_device *adev) adev 6750 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_thermal_initialize(adev); adev 6751 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_thermal_set_temperature_range(adev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); adev 6754 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_thermal_enable_alert(adev, true); adev 6757 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.fan.ucode_fan_control) { adev 6758 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_halt_smc(adev); adev 6761 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_thermal_setup_fan_table(adev); adev 6764 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_resume_smc(adev); adev 6767 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_thermal_start_smc_fan_control(adev); adev 6773 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_thermal_stop_thermal_controller(struct amdgpu_device *adev) adev 6775 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (!adev->pm.no_fan) { adev 6776 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_fan_ctrl_set_default_mode(adev); adev 6777 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_fan_ctrl_stop_smc_fan_control(adev); adev 6781 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_dpm_enable(struct amdgpu_device *adev) adev 6783 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 6784 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 6785 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 6786 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_ps *boot_ps = adev->pm.dpm.boot_ps; adev 6789 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (amdgpu_si_is_smc_running(adev)) adev 6792 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_enable_voltage_control(adev, true); adev 6794 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_get_mvdd_configuration(adev); adev 6796 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_construct_voltage_tables(adev); adev 6803 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_initialize_mc_reg_table(adev); adev 6808 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_enable_spread_spectrum(adev, true); adev 6810 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_enable_thermal_protection(adev, true); adev 6811 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_setup_bsp(adev); adev 6812 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_program_git(adev); adev 6813 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_program_tp(adev); adev 6814 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_program_tpp(adev); adev 6815 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_program_sstp(adev); adev 6816 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_enable_display_gap(adev); adev 6817 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_program_vc(adev); adev 6818 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_upload_firmware(adev); adev 6823 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_process_firmware_header(adev); adev 6828 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_initial_switch_from_arb_f0_to_f1(adev); adev 6833 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_init_smc_table(adev); adev 6838 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_init_smc_spll_table(adev); adev 6843 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_init_arb_table_index(adev); adev 6849 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_mc_reg_table(adev, boot_ps); adev 6855 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_initialize_smc_cac_tables(adev); adev 6860 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_initialize_hardware_cac_manager(adev); adev 6865 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_initialize_smc_dte_tables(adev); adev 6870 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_smc_tdp_limits(adev, boot_ps); adev 6875 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_smc_tdp_limits_2(adev, boot_ps); adev 6880 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_program_response_times(adev); adev 6881 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_program_ds_registers(adev); adev 6882 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_dpm_start_smc(adev); adev 6883 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_notify_smc_display_change(adev, false); adev 6888 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_enable_sclk_control(adev, true); adev 6889 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_start_dpm(adev); adev 6891 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_enable_auto_throttle_source(adev, AMDGPU_DPM_AUTO_THROTTLE_SRC_THERMAL, true); adev 6892 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_thermal_start_thermal_controller(adev); adev 6897 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_set_temperature_range(struct amdgpu_device *adev) adev 6901 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_thermal_enable_alert(adev, false); adev 6904 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_thermal_set_temperature_range(adev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); adev 6907 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_thermal_enable_alert(adev, true); adev 6914 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_dpm_disable(struct amdgpu_device *adev) adev 6916 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 6917 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_ps *boot_ps = adev->pm.dpm.boot_ps; adev 6919 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (!amdgpu_si_is_smc_running(adev)) adev 6921 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_thermal_stop_thermal_controller(adev); adev 6922 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_disable_ulv(adev); adev 6923 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_clear_vc(adev); adev 6925 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_enable_thermal_protection(adev, false); adev 6926 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_enable_power_containment(adev, boot_ps, false); adev 6927 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_enable_smc_cac(adev, boot_ps, false); adev 6928 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_enable_spread_spectrum(adev, false); adev 6929 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_enable_auto_throttle_source(adev, AMDGPU_DPM_AUTO_THROTTLE_SRC_THERMAL, false); adev 6930 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_stop_dpm(adev); adev 6931 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_reset_to_default(adev); adev 6932 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_dpm_stop_smc(adev); adev 6933 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_force_switch_to_arb_f0(adev); adev 6935 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_update_current_ps(adev, boot_ps); adev 6940 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 6941 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 6942 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_ps requested_ps = *adev->pm.dpm.requested_ps; adev 6945 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_update_requested_ps(adev, new_ps); adev 6946 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_apply_state_adjust_rules(adev, &eg_pi->requested_rps); adev 6951 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_power_control_set_level(struct amdgpu_device *adev) adev 6953 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_ps *new_ps = adev->pm.dpm.requested_ps; adev 6956 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_restrict_performance_levels_before_switch(adev); adev 6959 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_halt_smc(adev); adev 6962 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_smc_tdp_limits(adev, new_ps); adev 6965 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_populate_smc_tdp_limits_2(adev, new_ps); adev 6968 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_resume_smc(adev); adev 6971 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_set_sw_state(adev); adev 6979 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 6980 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 6985 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_disable_ulv(adev); adev 6990 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_restrict_performance_levels_before_switch(adev); adev 6996 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_request_link_speed_change_before_state_change(adev, new_ps, old_ps); adev 6997 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_set_uvd_clock_before_set_eng_clock(adev, new_ps, old_ps); adev 6998 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_enable_power_containment(adev, new_ps, false); adev 7003 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_enable_smc_cac(adev, new_ps, false); adev 7008 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_halt_smc(adev); adev 7013 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_upload_sw_state(adev, new_ps); adev 7018 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_upload_smc_data(adev); adev 7023 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_upload_ulv_state(adev); adev 7029 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_upload_mc_reg_table(adev, new_ps); adev 7035 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_program_memory_timing_parameters(adev, new_ps); adev 7040 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_set_pcie_lane_width_in_smc(adev, new_ps, old_ps); adev 7042 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_resume_smc(adev); adev 7047 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_set_sw_state(adev); adev 7052 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_set_uvd_clock_after_set_eng_clock(adev, new_ps, old_ps); adev 7054 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_notify_link_speed_change_after_state_change(adev, new_ps, old_ps); adev 7055 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_set_power_state_conditionally_enable_ulv(adev, new_ps); adev 7060 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_enable_smc_cac(adev, new_ps, true); adev 7065 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_enable_power_containment(adev, new_ps, true); adev 7071 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_power_control_set_level(adev); adev 7082 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7083 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 7086 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_update_current_ps(adev, new_ps); adev 7090 drivers/gpu/drm/amd/amdgpu/si_dpm.c void si_dpm_reset_asic(struct amdgpu_device *adev) adev 7092 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_restrict_performance_levels_before_switch(adev); adev 7093 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_disable_ulv(adev); adev 7094 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_set_boot_state(adev); adev 7100 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7102 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_program_display_gap(adev); adev 7106 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_parse_pplib_non_clock_info(struct amdgpu_device *adev, adev 7127 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.boot_ps = rps; adev 7129 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.uvd_ps = rps; adev 7132 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_parse_pplib_clock_info(struct amdgpu_device *adev, adev 7136 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct rv7xx_power_info *pi = rv770_get_pi(adev); adev 7137 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 7138 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct si_power_info *si_pi = si_get_pi(adev); adev 7154 drivers/gpu/drm/amd/amdgpu/si_dpm.c pl->pcie_gen = amdgpu_get_pcie_gen_support(adev, adev 7160 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_get_leakage_voltage_from_leakage_index(adev, pl->vddc, adev 7191 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_atombios_get_default_voltages(adev, &vddc, &vddci, &mvdd); adev 7192 drivers/gpu/drm/amd/amdgpu/si_dpm.c pl->mclk = adev->clock.default_mclk; adev 7193 drivers/gpu/drm/amd/amdgpu/si_dpm.c pl->sclk = adev->clock.default_sclk; adev 7201 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk; adev 7202 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk; adev 7203 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc; adev 7204 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci; adev 7213 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_parse_power_table(struct amdgpu_device *adev) adev 7215 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 7235 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_add_thermal_controller(adev); adev 7247 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, adev 7250 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (!adev->pm.dpm.ps) adev 7261 drivers/gpu/drm/amd/amdgpu/si_dpm.c kfree(adev->pm.dpm.ps); adev 7264 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.ps[i].ps_priv = ps; adev 7265 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_parse_pplib_non_clock_info(adev, &adev->pm.dpm.ps[i], adev 7279 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_parse_pplib_clock_info(adev, adev 7280 drivers/gpu/drm/amd/amdgpu/si_dpm.c &adev->pm.dpm.ps[i], k, adev 7286 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.num_ps = state_array->ucNumEntries; adev 7289 drivers/gpu/drm/amd/amdgpu/si_dpm.c for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) { adev 7291 drivers/gpu/drm/amd/amdgpu/si_dpm.c clock_array_index = adev->pm.dpm.vce_states[i].clk_idx; adev 7298 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.vce_states[i].sclk = sclk; adev 7299 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.vce_states[i].mclk = mclk; adev 7305 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_dpm_init(struct amdgpu_device *adev) adev 7317 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.priv = si_pi; adev 7323 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_MASK; adev 7325 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_pi->boot_pcie_gen = si_get_current_pcie_speed(adev); adev 7327 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_set_max_cu_value(adev); adev 7329 drivers/gpu/drm/amd/amdgpu/si_dpm.c rv770_get_max_vddc(adev); adev 7330 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_get_leakage_vddc(adev); adev 7331 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_patch_dependency_tables_based_on_leakage(adev); adev 7338 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_get_platform_caps(adev); adev 7342 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_parse_extended_power_table(adev); adev 7346 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_parse_power_table(adev); adev 7350 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = adev 7354 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (!adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { adev 7355 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_free_extended_power_table(adev); adev 7358 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; adev 7359 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; adev 7360 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; adev 7361 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000; adev 7362 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; adev 7363 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000; adev 7364 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810; adev 7365 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000; adev 7366 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900; adev 7368 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.voltage_response_time == 0) adev 7369 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT; adev 7370 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.backbias_response_time == 0) adev 7371 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT; adev 7373 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_atombios_get_clock_dividers(adev, COMPUTE_ENGINE_PLL_PARAM, adev 7383 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (si_is_special_1gb_platform(adev)) adev 7393 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_atombios_is_voltage_gpio(adev, SET_VOLTAGE_TYPE_ASIC_VDDC, adev 7397 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_atombios_is_voltage_gpio(adev, SET_VOLTAGE_TYPE_ASIC_VDDC, adev 7400 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_atombios_get_svi2_info(adev, SET_VOLTAGE_TYPE_ASIC_VDDC, adev 7405 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_atombios_is_voltage_gpio(adev, SET_VOLTAGE_TYPE_ASIC_MVDDC, adev 7409 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_atombios_is_voltage_gpio(adev, SET_VOLTAGE_TYPE_ASIC_VDDCI, adev 7413 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_atombios_is_voltage_gpio(adev, SET_VOLTAGE_TYPE_ASIC_VDDCI, adev 7417 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_atombios_is_voltage_gpio(adev, SET_VOLTAGE_TYPE_ASIC_VDDC, adev 7420 drivers/gpu/drm/amd/amdgpu/si_dpm.c rv770_get_engine_memory_ss(adev); adev 7431 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.int_thermal_type != THERMAL_TYPE_NONE) adev 7441 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_acpi_is_pcie_performance_request_supported(adev); adev 7448 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.mclk_sclk_ratio = 4; adev 7449 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.sclk_mclk_delta = 15000; adev 7450 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.vddc_vddci_delta = 200; adev 7451 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.valid_sclk_values.count = 0; adev 7452 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.valid_sclk_values.values = NULL; adev 7453 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.valid_mclk_values.count = 0; adev 7454 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.valid_mclk_values.values = NULL; adev 7456 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_initialize_powertune_defaults(adev); adev 7459 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) || adev 7460 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0)) adev 7461 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.max_clock_voltage_on_dc = adev 7462 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; adev 7469 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_dpm_fini(struct amdgpu_device *adev) adev 7473 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm.ps) adev 7474 drivers/gpu/drm/amd/amdgpu/si_dpm.c for (i = 0; i < adev->pm.dpm.num_ps; i++) adev 7475 drivers/gpu/drm/amd/amdgpu/si_dpm.c kfree(adev->pm.dpm.ps[i].ps_priv); adev 7476 drivers/gpu/drm/amd/amdgpu/si_dpm.c kfree(adev->pm.dpm.ps); adev 7477 drivers/gpu/drm/amd/amdgpu/si_dpm.c kfree(adev->pm.dpm.priv); adev 7478 drivers/gpu/drm/amd/amdgpu/si_dpm.c kfree(adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries); adev 7479 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_free_extended_power_table(adev); adev 7485 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7486 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 7504 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_dpm_set_interrupt_state(struct amdgpu_device *adev, adev 7552 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_dpm_process_interrupt(struct amdgpu_device *adev, adev 7564 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.thermal.high_to_low = false; adev 7569 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.thermal.high_to_low = true; adev 7577 drivers/gpu/drm/amd/amdgpu/si_dpm.c schedule_work(&adev->pm.dpm.thermal.work); adev 7585 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7587 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (!adev->pm.dpm_enabled) adev 7590 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_set_temperature_range(adev); adev 7594 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_dpm_powergate_uvd(adev, true); adev 7608 drivers/gpu/drm/amd/amdgpu/si_dpm.c static int si_dpm_init_microcode(struct amdgpu_device *adev) adev 7615 drivers/gpu/drm/amd/amdgpu/si_dpm.c switch (adev->asic_type) { adev 7620 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((adev->pdev->revision == 0x81) && adev 7621 drivers/gpu/drm/amd/amdgpu/si_dpm.c ((adev->pdev->device == 0x6810) || adev 7622 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6811))) adev 7628 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (((adev->pdev->device == 0x6820) && adev 7629 drivers/gpu/drm/amd/amdgpu/si_dpm.c ((adev->pdev->revision == 0x81) || adev 7630 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->revision == 0x83))) || adev 7631 drivers/gpu/drm/amd/amdgpu/si_dpm.c ((adev->pdev->device == 0x6821) && adev 7632 drivers/gpu/drm/amd/amdgpu/si_dpm.c ((adev->pdev->revision == 0x83) || adev 7633 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->revision == 0x87))) || adev 7634 drivers/gpu/drm/amd/amdgpu/si_dpm.c ((adev->pdev->revision == 0x87) && adev 7635 drivers/gpu/drm/amd/amdgpu/si_dpm.c ((adev->pdev->device == 0x6823) || adev 7636 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x682b)))) adev 7642 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (((adev->pdev->revision == 0x81) && adev 7643 drivers/gpu/drm/amd/amdgpu/si_dpm.c ((adev->pdev->device == 0x6600) || adev 7644 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6604) || adev 7645 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6605) || adev 7646 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6610))) || adev 7647 drivers/gpu/drm/amd/amdgpu/si_dpm.c ((adev->pdev->revision == 0x83) && adev 7648 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6610))) adev 7654 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (((adev->pdev->revision == 0x81) && adev 7655 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6660)) || adev 7656 drivers/gpu/drm/amd/amdgpu/si_dpm.c ((adev->pdev->revision == 0x83) && adev 7657 drivers/gpu/drm/amd/amdgpu/si_dpm.c ((adev->pdev->device == 0x6660) || adev 7658 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6663) || adev 7659 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6665) || adev 7660 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6667)))) adev 7662 drivers/gpu/drm/amd/amdgpu/si_dpm.c else if ((adev->pdev->revision == 0xc3) && adev 7663 drivers/gpu/drm/amd/amdgpu/si_dpm.c (adev->pdev->device == 0x6665)) adev 7672 drivers/gpu/drm/amd/amdgpu/si_dpm.c err = request_firmware(&adev->pm.fw, fw_name, adev->dev); adev 7675 drivers/gpu/drm/amd/amdgpu/si_dpm.c err = amdgpu_ucode_validate(adev->pm.fw); adev 7681 drivers/gpu/drm/amd/amdgpu/si_dpm.c release_firmware(adev->pm.fw); adev 7682 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.fw = NULL; adev 7691 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7693 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 230, &adev->pm.dpm.thermal.irq); adev 7697 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 231, &adev->pm.dpm.thermal.irq); adev 7702 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; adev 7703 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; adev 7704 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.forced_level = AMD_DPM_FORCED_LEVEL_AUTO; adev 7705 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.default_sclk = adev->clock.default_sclk; adev 7706 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.default_mclk = adev->clock.default_mclk; adev 7707 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.current_sclk = adev->clock.default_sclk; adev 7708 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.current_mclk = adev->clock.default_mclk; adev 7709 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.int_thermal_type = THERMAL_TYPE_NONE; adev 7714 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_dpm_init_microcode(adev); adev 7718 drivers/gpu/drm/amd/amdgpu/si_dpm.c INIT_WORK(&adev->pm.dpm.thermal.work, amdgpu_dpm_thermal_work_handler); adev 7719 drivers/gpu/drm/amd/amdgpu/si_dpm.c mutex_lock(&adev->pm.mutex); adev 7720 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_dpm_init(adev); adev 7723 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps = adev->pm.dpm.boot_ps; adev 7725 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_pm_print_power_states(adev); adev 7726 drivers/gpu/drm/amd/amdgpu/si_dpm.c mutex_unlock(&adev->pm.mutex); adev 7732 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_dpm_fini(adev); adev 7733 drivers/gpu/drm/amd/amdgpu/si_dpm.c mutex_unlock(&adev->pm.mutex); adev 7740 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7742 drivers/gpu/drm/amd/amdgpu/si_dpm.c flush_work(&adev->pm.dpm.thermal.work); adev 7744 drivers/gpu/drm/amd/amdgpu/si_dpm.c mutex_lock(&adev->pm.mutex); adev 7745 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_dpm_fini(adev); adev 7746 drivers/gpu/drm/amd/amdgpu/si_dpm.c mutex_unlock(&adev->pm.mutex); adev 7755 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7760 drivers/gpu/drm/amd/amdgpu/si_dpm.c mutex_lock(&adev->pm.mutex); adev 7761 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_dpm_setup_asic(adev); adev 7762 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_dpm_enable(adev); adev 7764 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm_enabled = false; adev 7766 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm_enabled = true; adev 7767 drivers/gpu/drm/amd/amdgpu/si_dpm.c mutex_unlock(&adev->pm.mutex); adev 7768 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_pm_compute_clocks(adev); adev 7774 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7776 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm_enabled) { adev 7777 drivers/gpu/drm/amd/amdgpu/si_dpm.c mutex_lock(&adev->pm.mutex); adev 7778 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_dpm_disable(adev); adev 7779 drivers/gpu/drm/amd/amdgpu/si_dpm.c mutex_unlock(&adev->pm.mutex); adev 7787 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7789 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm_enabled) { adev 7790 drivers/gpu/drm/amd/amdgpu/si_dpm.c mutex_lock(&adev->pm.mutex); adev 7792 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_dpm_disable(adev); adev 7794 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps = adev->pm.dpm.boot_ps; adev 7795 drivers/gpu/drm/amd/amdgpu/si_dpm.c mutex_unlock(&adev->pm.mutex); adev 7803 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7805 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm_enabled) { adev 7807 drivers/gpu/drm/amd/amdgpu/si_dpm.c mutex_lock(&adev->pm.mutex); adev 7808 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_dpm_setup_asic(adev); adev 7809 drivers/gpu/drm/amd/amdgpu/si_dpm.c ret = si_dpm_enable(adev); adev 7811 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm_enabled = false; adev 7813 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm_enabled = true; adev 7814 drivers/gpu/drm/amd/amdgpu/si_dpm.c mutex_unlock(&adev->pm.mutex); adev 7815 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->pm.dpm_enabled) adev 7816 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_pm_compute_clocks(adev); adev 7855 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7872 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7873 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 7884 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7885 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 7897 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7908 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev->asic_type >= CHIP_TAHITI) adev 7915 drivers/gpu/drm/amd/amdgpu/si_dpm.c amdgpu_dpm_print_ps_status(adev, rps); adev 7921 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7923 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->powerplay.pp_funcs = &si_dpm_funcs; adev 7924 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->powerplay.pp_handle = adev; adev 7925 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_dpm_set_irq_funcs(adev); adev 7949 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7951 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (adev == NULL || cps == NULL || rps == NULL || equal == NULL) adev 7986 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 7987 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct evergreen_power_info *eg_pi = evergreen_get_pi(adev); adev 8017 drivers/gpu/drm/amd/amdgpu/si_dpm.c *((uint32_t *)value) = si_dpm_get_temp(adev); adev 8076 drivers/gpu/drm/amd/amdgpu/si_dpm.c static void si_dpm_set_irq_funcs(struct amdgpu_device *adev) adev 8078 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.thermal.irq.num_types = AMDGPU_THERMAL_IRQ_LAST; adev 8079 drivers/gpu/drm/amd/amdgpu/si_dpm.c adev->pm.dpm.thermal.irq.funcs = &si_dpm_irq_funcs; adev 31 drivers/gpu/drm/amd/amdgpu/si_ih.c static void si_ih_set_interrupt_funcs(struct amdgpu_device *adev); adev 33 drivers/gpu/drm/amd/amdgpu/si_ih.c static void si_ih_enable_interrupts(struct amdgpu_device *adev) adev 42 drivers/gpu/drm/amd/amdgpu/si_ih.c adev->irq.ih.enabled = true; adev 45 drivers/gpu/drm/amd/amdgpu/si_ih.c static void si_ih_disable_interrupts(struct amdgpu_device *adev) adev 56 drivers/gpu/drm/amd/amdgpu/si_ih.c adev->irq.ih.enabled = false; adev 57 drivers/gpu/drm/amd/amdgpu/si_ih.c adev->irq.ih.rptr = 0; adev 60 drivers/gpu/drm/amd/amdgpu/si_ih.c static int si_ih_irq_init(struct amdgpu_device *adev) adev 62 drivers/gpu/drm/amd/amdgpu/si_ih.c struct amdgpu_ih_ring *ih = &adev->irq.ih; adev 66 drivers/gpu/drm/amd/amdgpu/si_ih.c si_ih_disable_interrupts(adev); adev 68 drivers/gpu/drm/amd/amdgpu/si_ih.c WREG32(INTERRUPT_CNTL2, adev->dummy_page_addr >> 8); adev 74 drivers/gpu/drm/amd/amdgpu/si_ih.c WREG32(IH_RB_BASE, adev->irq.ih.gpu_addr >> 8); adev 75 drivers/gpu/drm/amd/amdgpu/si_ih.c rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4); adev 89 drivers/gpu/drm/amd/amdgpu/si_ih.c if (adev->irq.msi_enabled) adev 93 drivers/gpu/drm/amd/amdgpu/si_ih.c pci_set_master(adev->pdev); adev 94 drivers/gpu/drm/amd/amdgpu/si_ih.c si_ih_enable_interrupts(adev); adev 99 drivers/gpu/drm/amd/amdgpu/si_ih.c static void si_ih_irq_disable(struct amdgpu_device *adev) adev 101 drivers/gpu/drm/amd/amdgpu/si_ih.c si_ih_disable_interrupts(adev); adev 105 drivers/gpu/drm/amd/amdgpu/si_ih.c static u32 si_ih_get_wptr(struct amdgpu_device *adev, adev 114 drivers/gpu/drm/amd/amdgpu/si_ih.c dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", adev 124 drivers/gpu/drm/amd/amdgpu/si_ih.c static void si_ih_decode_iv(struct amdgpu_device *adev, adev 145 drivers/gpu/drm/amd/amdgpu/si_ih.c static void si_ih_set_rptr(struct amdgpu_device *adev, adev 153 drivers/gpu/drm/amd/amdgpu/si_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 155 drivers/gpu/drm/amd/amdgpu/si_ih.c si_ih_set_interrupt_funcs(adev); adev 163 drivers/gpu/drm/amd/amdgpu/si_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 165 drivers/gpu/drm/amd/amdgpu/si_ih.c r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, false); adev 169 drivers/gpu/drm/amd/amdgpu/si_ih.c return amdgpu_irq_init(adev); adev 174 drivers/gpu/drm/amd/amdgpu/si_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 176 drivers/gpu/drm/amd/amdgpu/si_ih.c amdgpu_irq_fini(adev); adev 177 drivers/gpu/drm/amd/amdgpu/si_ih.c amdgpu_ih_ring_fini(adev, &adev->irq.ih); adev 184 drivers/gpu/drm/amd/amdgpu/si_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 186 drivers/gpu/drm/amd/amdgpu/si_ih.c return si_ih_irq_init(adev); adev 191 drivers/gpu/drm/amd/amdgpu/si_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 193 drivers/gpu/drm/amd/amdgpu/si_ih.c si_ih_irq_disable(adev); adev 200 drivers/gpu/drm/amd/amdgpu/si_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 202 drivers/gpu/drm/amd/amdgpu/si_ih.c return si_ih_hw_fini(adev); adev 207 drivers/gpu/drm/amd/amdgpu/si_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 209 drivers/gpu/drm/amd/amdgpu/si_ih.c return si_ih_hw_init(adev); adev 214 drivers/gpu/drm/amd/amdgpu/si_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 226 drivers/gpu/drm/amd/amdgpu/si_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 228 drivers/gpu/drm/amd/amdgpu/si_ih.c for (i = 0; i < adev->usec_timeout; i++) { adev 238 drivers/gpu/drm/amd/amdgpu/si_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 249 drivers/gpu/drm/amd/amdgpu/si_ih.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 300 drivers/gpu/drm/amd/amdgpu/si_ih.c static void si_ih_set_interrupt_funcs(struct amdgpu_device *adev) adev 302 drivers/gpu/drm/amd/amdgpu/si_ih.c adev->irq.ih_funcs = &si_ih_funcs; adev 33 drivers/gpu/drm/amd/amdgpu/si_smc.c static int si_set_smc_sram_address(struct amdgpu_device *adev, adev 47 drivers/gpu/drm/amd/amdgpu/si_smc.c int amdgpu_si_copy_bytes_to_smc(struct amdgpu_device *adev, adev 62 drivers/gpu/drm/amd/amdgpu/si_smc.c spin_lock_irqsave(&adev->smc_idx_lock, flags); adev 67 drivers/gpu/drm/amd/amdgpu/si_smc.c ret = si_set_smc_sram_address(adev, addr, limit); adev 82 drivers/gpu/drm/amd/amdgpu/si_smc.c ret = si_set_smc_sram_address(adev, addr, limit); adev 98 drivers/gpu/drm/amd/amdgpu/si_smc.c ret = si_set_smc_sram_address(adev, addr, limit); adev 106 drivers/gpu/drm/amd/amdgpu/si_smc.c spin_unlock_irqrestore(&adev->smc_idx_lock, flags); adev 111 drivers/gpu/drm/amd/amdgpu/si_smc.c void amdgpu_si_start_smc(struct amdgpu_device *adev) adev 120 drivers/gpu/drm/amd/amdgpu/si_smc.c void amdgpu_si_reset_smc(struct amdgpu_device *adev) adev 134 drivers/gpu/drm/amd/amdgpu/si_smc.c int amdgpu_si_program_jump_on_start(struct amdgpu_device *adev) adev 138 drivers/gpu/drm/amd/amdgpu/si_smc.c return amdgpu_si_copy_bytes_to_smc(adev, 0x0, data, 4, sizeof(data)+1); adev 141 drivers/gpu/drm/amd/amdgpu/si_smc.c void amdgpu_si_smc_clock(struct amdgpu_device *adev, bool enable) adev 153 drivers/gpu/drm/amd/amdgpu/si_smc.c bool amdgpu_si_is_smc_running(struct amdgpu_device *adev) adev 164 drivers/gpu/drm/amd/amdgpu/si_smc.c PPSMC_Result amdgpu_si_send_msg_to_smc(struct amdgpu_device *adev, adev 170 drivers/gpu/drm/amd/amdgpu/si_smc.c if (!amdgpu_si_is_smc_running(adev)) adev 175 drivers/gpu/drm/amd/amdgpu/si_smc.c for (i = 0; i < adev->usec_timeout; i++) { adev 185 drivers/gpu/drm/amd/amdgpu/si_smc.c PPSMC_Result amdgpu_si_wait_for_smc_inactive(struct amdgpu_device *adev) adev 190 drivers/gpu/drm/amd/amdgpu/si_smc.c if (!amdgpu_si_is_smc_running(adev)) adev 193 drivers/gpu/drm/amd/amdgpu/si_smc.c for (i = 0; i < adev->usec_timeout; i++) { adev 203 drivers/gpu/drm/amd/amdgpu/si_smc.c int amdgpu_si_load_smc_ucode(struct amdgpu_device *adev, u32 limit) adev 212 drivers/gpu/drm/amd/amdgpu/si_smc.c if (!adev->pm.fw) adev 215 drivers/gpu/drm/amd/amdgpu/si_smc.c hdr = (const struct smc_firmware_header_v1_0 *)adev->pm.fw->data; adev 219 drivers/gpu/drm/amd/amdgpu/si_smc.c adev->pm.fw_version = le32_to_cpu(hdr->header.ucode_version); adev 223 drivers/gpu/drm/amd/amdgpu/si_smc.c (adev->pm.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); adev 227 drivers/gpu/drm/amd/amdgpu/si_smc.c spin_lock_irqsave(&adev->smc_idx_lock, flags); adev 240 drivers/gpu/drm/amd/amdgpu/si_smc.c spin_unlock_irqrestore(&adev->smc_idx_lock, flags); adev 245 drivers/gpu/drm/amd/amdgpu/si_smc.c int amdgpu_si_read_smc_sram_dword(struct amdgpu_device *adev, u32 smc_address, adev 251 drivers/gpu/drm/amd/amdgpu/si_smc.c spin_lock_irqsave(&adev->smc_idx_lock, flags); adev 252 drivers/gpu/drm/amd/amdgpu/si_smc.c ret = si_set_smc_sram_address(adev, smc_address, limit); adev 255 drivers/gpu/drm/amd/amdgpu/si_smc.c spin_unlock_irqrestore(&adev->smc_idx_lock, flags); adev 260 drivers/gpu/drm/amd/amdgpu/si_smc.c int amdgpu_si_write_smc_sram_dword(struct amdgpu_device *adev, u32 smc_address, adev 266 drivers/gpu/drm/amd/amdgpu/si_smc.c spin_lock_irqsave(&adev->smc_idx_lock, flags); adev 267 drivers/gpu/drm/amd/amdgpu/si_smc.c ret = si_set_smc_sram_address(adev, smc_address, limit); adev 270 drivers/gpu/drm/amd/amdgpu/si_smc.c spin_unlock_irqrestore(&adev->smc_idx_lock, flags); adev 406 drivers/gpu/drm/amd/amdgpu/sislands_smc.h int amdgpu_si_copy_bytes_to_smc(struct amdgpu_device *adev, adev 409 drivers/gpu/drm/amd/amdgpu/sislands_smc.h void amdgpu_si_start_smc(struct amdgpu_device *adev); adev 410 drivers/gpu/drm/amd/amdgpu/sislands_smc.h void amdgpu_si_reset_smc(struct amdgpu_device *adev); adev 411 drivers/gpu/drm/amd/amdgpu/sislands_smc.h int amdgpu_si_program_jump_on_start(struct amdgpu_device *adev); adev 412 drivers/gpu/drm/amd/amdgpu/sislands_smc.h void amdgpu_si_smc_clock(struct amdgpu_device *adev, bool enable); adev 413 drivers/gpu/drm/amd/amdgpu/sislands_smc.h bool amdgpu_si_is_smc_running(struct amdgpu_device *adev); adev 414 drivers/gpu/drm/amd/amdgpu/sislands_smc.h PPSMC_Result amdgpu_si_send_msg_to_smc(struct amdgpu_device *adev, PPSMC_Msg msg); adev 415 drivers/gpu/drm/amd/amdgpu/sislands_smc.h PPSMC_Result amdgpu_si_wait_for_smc_inactive(struct amdgpu_device *adev); adev 416 drivers/gpu/drm/amd/amdgpu/sislands_smc.h int amdgpu_si_load_smc_ucode(struct amdgpu_device *adev, u32 limit); adev 417 drivers/gpu/drm/amd/amdgpu/sislands_smc.h int amdgpu_si_read_smc_sram_dword(struct amdgpu_device *adev, u32 smc_address, adev 419 drivers/gpu/drm/amd/amdgpu/sislands_smc.h int amdgpu_si_write_smc_sram_dword(struct amdgpu_device *adev, u32 smc_address, adev 49 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c #define to_amdgpu_device(x) (container_of(x, struct amdgpu_ras, eeprom_control.eeprom_accessor))->adev adev 54 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 64 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 71 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 81 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 97 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 120 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 129 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 180 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 228 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 328 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 401 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 418 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 476 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 510 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 513 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c if (!adev->powerplay.pp_funcs->smu_i2c_bus_access) adev 517 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c if (!adev->powerplay.pp_funcs->smu_i2c_bus_access(adev->powerplay.pp_handle, true)) adev 526 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 529 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c if (!adev->powerplay.pp_funcs->smu_i2c_bus_access) adev 533 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c if (!adev->powerplay.pp_funcs->smu_i2c_bus_access(adev->powerplay.pp_handle, adev 675 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c struct amdgpu_device *adev = to_amdgpu_device(control); adev 680 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c control->dev.parent = &adev->pdev->dev; adev 97 drivers/gpu/drm/amd/amdgpu/soc15.c static u32 soc15_pcie_rreg(struct amdgpu_device *adev, u32 reg) adev 101 drivers/gpu/drm/amd/amdgpu/soc15.c address = adev->nbio_funcs->get_pcie_index_offset(adev); adev 102 drivers/gpu/drm/amd/amdgpu/soc15.c data = adev->nbio_funcs->get_pcie_data_offset(adev); adev 104 drivers/gpu/drm/amd/amdgpu/soc15.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 108 drivers/gpu/drm/amd/amdgpu/soc15.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 112 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 116 drivers/gpu/drm/amd/amdgpu/soc15.c address = adev->nbio_funcs->get_pcie_index_offset(adev); adev 117 drivers/gpu/drm/amd/amdgpu/soc15.c data = adev->nbio_funcs->get_pcie_data_offset(adev); adev 119 drivers/gpu/drm/amd/amdgpu/soc15.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 124 drivers/gpu/drm/amd/amdgpu/soc15.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 127 drivers/gpu/drm/amd/amdgpu/soc15.c static u64 soc15_pcie_rreg64(struct amdgpu_device *adev, u32 reg) adev 131 drivers/gpu/drm/amd/amdgpu/soc15.c address = adev->nbio_funcs->get_pcie_index_offset(adev); adev 132 drivers/gpu/drm/amd/amdgpu/soc15.c data = adev->nbio_funcs->get_pcie_data_offset(adev); adev 134 drivers/gpu/drm/amd/amdgpu/soc15.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 144 drivers/gpu/drm/amd/amdgpu/soc15.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 148 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_pcie_wreg64(struct amdgpu_device *adev, u32 reg, u64 v) adev 152 drivers/gpu/drm/amd/amdgpu/soc15.c address = adev->nbio_funcs->get_pcie_index_offset(adev); adev 153 drivers/gpu/drm/amd/amdgpu/soc15.c data = adev->nbio_funcs->get_pcie_data_offset(adev); adev 155 drivers/gpu/drm/amd/amdgpu/soc15.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 167 drivers/gpu/drm/amd/amdgpu/soc15.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 170 drivers/gpu/drm/amd/amdgpu/soc15.c static u32 soc15_uvd_ctx_rreg(struct amdgpu_device *adev, u32 reg) adev 178 drivers/gpu/drm/amd/amdgpu/soc15.c spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags); adev 181 drivers/gpu/drm/amd/amdgpu/soc15.c spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags); adev 185 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 192 drivers/gpu/drm/amd/amdgpu/soc15.c spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags); adev 195 drivers/gpu/drm/amd/amdgpu/soc15.c spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags); adev 198 drivers/gpu/drm/amd/amdgpu/soc15.c static u32 soc15_didt_rreg(struct amdgpu_device *adev, u32 reg) adev 206 drivers/gpu/drm/amd/amdgpu/soc15.c spin_lock_irqsave(&adev->didt_idx_lock, flags); adev 209 drivers/gpu/drm/amd/amdgpu/soc15.c spin_unlock_irqrestore(&adev->didt_idx_lock, flags); adev 213 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_didt_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 220 drivers/gpu/drm/amd/amdgpu/soc15.c spin_lock_irqsave(&adev->didt_idx_lock, flags); adev 223 drivers/gpu/drm/amd/amdgpu/soc15.c spin_unlock_irqrestore(&adev->didt_idx_lock, flags); adev 226 drivers/gpu/drm/amd/amdgpu/soc15.c static u32 soc15_gc_cac_rreg(struct amdgpu_device *adev, u32 reg) adev 231 drivers/gpu/drm/amd/amdgpu/soc15.c spin_lock_irqsave(&adev->gc_cac_idx_lock, flags); adev 234 drivers/gpu/drm/amd/amdgpu/soc15.c spin_unlock_irqrestore(&adev->gc_cac_idx_lock, flags); adev 238 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_gc_cac_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 242 drivers/gpu/drm/amd/amdgpu/soc15.c spin_lock_irqsave(&adev->gc_cac_idx_lock, flags); adev 245 drivers/gpu/drm/amd/amdgpu/soc15.c spin_unlock_irqrestore(&adev->gc_cac_idx_lock, flags); adev 248 drivers/gpu/drm/amd/amdgpu/soc15.c static u32 soc15_se_cac_rreg(struct amdgpu_device *adev, u32 reg) adev 253 drivers/gpu/drm/amd/amdgpu/soc15.c spin_lock_irqsave(&adev->se_cac_idx_lock, flags); adev 256 drivers/gpu/drm/amd/amdgpu/soc15.c spin_unlock_irqrestore(&adev->se_cac_idx_lock, flags); adev 260 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_se_cac_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 264 drivers/gpu/drm/amd/amdgpu/soc15.c spin_lock_irqsave(&adev->se_cac_idx_lock, flags); adev 267 drivers/gpu/drm/amd/amdgpu/soc15.c spin_unlock_irqrestore(&adev->se_cac_idx_lock, flags); adev 270 drivers/gpu/drm/amd/amdgpu/soc15.c static u32 soc15_get_config_memsize(struct amdgpu_device *adev) adev 272 drivers/gpu/drm/amd/amdgpu/soc15.c return adev->nbio_funcs->get_memsize(adev); adev 275 drivers/gpu/drm/amd/amdgpu/soc15.c static u32 soc15_get_xclk(struct amdgpu_device *adev) adev 277 drivers/gpu/drm/amd/amdgpu/soc15.c u32 reference_clock = adev->clock.spll.reference_freq; adev 279 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->asic_type == CHIP_RAVEN) adev 286 drivers/gpu/drm/amd/amdgpu/soc15.c void soc15_grbm_select(struct amdgpu_device *adev, adev 298 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_vga_set_state(struct amdgpu_device *adev, bool state) adev 303 drivers/gpu/drm/amd/amdgpu/soc15.c static bool soc15_read_disabled_bios(struct amdgpu_device *adev) adev 309 drivers/gpu/drm/amd/amdgpu/soc15.c static bool soc15_read_bios_from_rom(struct amdgpu_device *adev, adev 322 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->flags & AMD_IS_APU) adev 328 drivers/gpu/drm/amd/amdgpu/soc15.c switch (adev->asic_type) { adev 371 drivers/gpu/drm/amd/amdgpu/soc15.c static uint32_t soc15_read_indexed_register(struct amdgpu_device *adev, u32 se_num, adev 376 drivers/gpu/drm/amd/amdgpu/soc15.c mutex_lock(&adev->grbm_idx_mutex); adev 378 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); adev 383 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_gfx_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 384 drivers/gpu/drm/amd/amdgpu/soc15.c mutex_unlock(&adev->grbm_idx_mutex); adev 388 drivers/gpu/drm/amd/amdgpu/soc15.c static uint32_t soc15_get_register_value(struct amdgpu_device *adev, adev 393 drivers/gpu/drm/amd/amdgpu/soc15.c return soc15_read_indexed_register(adev, se_num, sh_num, reg_offset); adev 396 drivers/gpu/drm/amd/amdgpu/soc15.c return adev->gfx.config.gb_addr_config; adev 398 drivers/gpu/drm/amd/amdgpu/soc15.c return adev->gfx.config.db_debug2; adev 403 drivers/gpu/drm/amd/amdgpu/soc15.c static int soc15_read_register(struct amdgpu_device *adev, u32 se_num, adev 412 drivers/gpu/drm/amd/amdgpu/soc15.c if (reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg] adev 416 drivers/gpu/drm/amd/amdgpu/soc15.c *value = soc15_get_register_value(adev, adev 436 drivers/gpu/drm/amd/amdgpu/soc15.c void soc15_program_register_sequence(struct amdgpu_device *adev, adev 446 drivers/gpu/drm/amd/amdgpu/soc15.c reg = adev->reg_offset[entry->hwip][entry->instance][entry->segment] + entry->reg; adev 468 drivers/gpu/drm/amd/amdgpu/soc15.c static int soc15_asic_mode1_reset(struct amdgpu_device *adev) adev 473 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_atombios_scratch_regs_engine_hung(adev, true); adev 475 drivers/gpu/drm/amd/amdgpu/soc15.c dev_info(adev->dev, "GPU mode1 reset\n"); adev 478 drivers/gpu/drm/amd/amdgpu/soc15.c pci_clear_master(adev->pdev); adev 480 drivers/gpu/drm/amd/amdgpu/soc15.c pci_save_state(adev->pdev); adev 482 drivers/gpu/drm/amd/amdgpu/soc15.c ret = psp_gpu_reset(adev); adev 484 drivers/gpu/drm/amd/amdgpu/soc15.c dev_err(adev->dev, "GPU mode1 reset failed\n"); adev 486 drivers/gpu/drm/amd/amdgpu/soc15.c pci_restore_state(adev->pdev); adev 489 drivers/gpu/drm/amd/amdgpu/soc15.c for (i = 0; i < adev->usec_timeout; i++) { adev 490 drivers/gpu/drm/amd/amdgpu/soc15.c u32 memsize = adev->nbio_funcs->get_memsize(adev); adev 497 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_atombios_scratch_regs_engine_hung(adev, false); adev 502 drivers/gpu/drm/amd/amdgpu/soc15.c static int soc15_asic_get_baco_capability(struct amdgpu_device *adev, bool *cap) adev 504 drivers/gpu/drm/amd/amdgpu/soc15.c void *pp_handle = adev->powerplay.pp_handle; adev 505 drivers/gpu/drm/amd/amdgpu/soc15.c const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; adev 515 drivers/gpu/drm/amd/amdgpu/soc15.c static int soc15_asic_baco_reset(struct amdgpu_device *adev) adev 517 drivers/gpu/drm/amd/amdgpu/soc15.c void *pp_handle = adev->powerplay.pp_handle; adev 518 drivers/gpu/drm/amd/amdgpu/soc15.c const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; adev 531 drivers/gpu/drm/amd/amdgpu/soc15.c dev_info(adev->dev, "GPU BACO reset\n"); adev 533 drivers/gpu/drm/amd/amdgpu/soc15.c adev->in_baco_reset = 1; adev 538 drivers/gpu/drm/amd/amdgpu/soc15.c static int soc15_mode2_reset(struct amdgpu_device *adev) adev 540 drivers/gpu/drm/amd/amdgpu/soc15.c if (!adev->powerplay.pp_funcs || adev 541 drivers/gpu/drm/amd/amdgpu/soc15.c !adev->powerplay.pp_funcs->asic_reset_mode_2) adev 544 drivers/gpu/drm/amd/amdgpu/soc15.c return adev->powerplay.pp_funcs->asic_reset_mode_2(adev->powerplay.pp_handle); adev 548 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_asic_reset_method(struct amdgpu_device *adev) adev 552 drivers/gpu/drm/amd/amdgpu/soc15.c switch (adev->asic_type) { adev 557 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_asic_get_baco_capability(adev, &baco_reset); adev 560 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->psp.sos_fw_version >= 0x80067) adev 561 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_asic_get_baco_capability(adev, &baco_reset); adev 565 drivers/gpu/drm/amd/amdgpu/soc15.c struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev, 0); adev 566 drivers/gpu/drm/amd/amdgpu/soc15.c struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); adev 583 drivers/gpu/drm/amd/amdgpu/soc15.c static int soc15_asic_reset(struct amdgpu_device *adev) adev 585 drivers/gpu/drm/amd/amdgpu/soc15.c switch (soc15_asic_reset_method(adev)) { adev 587 drivers/gpu/drm/amd/amdgpu/soc15.c if (!adev->in_suspend) adev 588 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_inc_vram_lost(adev); adev 589 drivers/gpu/drm/amd/amdgpu/soc15.c return soc15_asic_baco_reset(adev); adev 591 drivers/gpu/drm/amd/amdgpu/soc15.c return soc15_mode2_reset(adev); adev 593 drivers/gpu/drm/amd/amdgpu/soc15.c if (!adev->in_suspend) adev 594 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_inc_vram_lost(adev); adev 595 drivers/gpu/drm/amd/amdgpu/soc15.c return soc15_asic_mode1_reset(adev); adev 605 drivers/gpu/drm/amd/amdgpu/soc15.c static int soc15_set_uvd_clocks(struct amdgpu_device *adev, u32 vclk, u32 dclk) adev 618 drivers/gpu/drm/amd/amdgpu/soc15.c static int soc15_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) adev 625 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_pcie_gen3_enable(struct amdgpu_device *adev) adev 627 drivers/gpu/drm/amd/amdgpu/soc15.c if (pci_is_root_bus(adev->pdev->bus)) adev 633 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->flags & AMD_IS_APU) adev 636 drivers/gpu/drm/amd/amdgpu/soc15.c if (!(adev->pm.pcie_gen_mask & (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 | adev 643 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_program_aspm(struct amdgpu_device *adev) adev 652 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_enable_doorbell_aperture(struct amdgpu_device *adev, adev 655 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs->enable_doorbell_aperture(adev, enable); adev 656 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs->enable_doorbell_selfring_aperture(adev, enable); adev 668 drivers/gpu/drm/amd/amdgpu/soc15.c static uint32_t soc15_get_rev_id(struct amdgpu_device *adev) adev 670 drivers/gpu/drm/amd/amdgpu/soc15.c return adev->nbio_funcs->get_rev_id(adev); adev 673 drivers/gpu/drm/amd/amdgpu/soc15.c int soc15_set_ip_blocks(struct amdgpu_device *adev) adev 676 drivers/gpu/drm/amd/amdgpu/soc15.c switch (adev->asic_type) { adev 681 drivers/gpu/drm/amd/amdgpu/soc15.c vega10_reg_base_init(adev); adev 684 drivers/gpu/drm/amd/amdgpu/soc15.c vega20_reg_base_init(adev); adev 687 drivers/gpu/drm/amd/amdgpu/soc15.c arct_reg_base_init(adev); adev 693 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->asic_type == CHIP_VEGA20 || adev->asic_type == CHIP_ARCTURUS) adev 694 drivers/gpu/drm/amd/amdgpu/soc15.c adev->gmc.xgmi.supported = true; adev 696 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->flags & AMD_IS_APU) adev 697 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs = &nbio_v7_0_funcs; adev 698 drivers/gpu/drm/amd/amdgpu/soc15.c else if (adev->asic_type == CHIP_VEGA20 || adev 699 drivers/gpu/drm/amd/amdgpu/soc15.c adev->asic_type == CHIP_ARCTURUS) adev 700 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs = &nbio_v7_4_funcs; adev 702 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs = &nbio_v6_1_funcs; adev 704 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->asic_type == CHIP_VEGA20 || adev->asic_type == CHIP_ARCTURUS) adev 705 drivers/gpu/drm/amd/amdgpu/soc15.c adev->df_funcs = &df_v3_6_funcs; adev 707 drivers/gpu/drm/amd/amdgpu/soc15.c adev->df_funcs = &df_v1_7_funcs; adev 709 drivers/gpu/drm/amd/amdgpu/soc15.c adev->rev_id = soc15_get_rev_id(adev); adev 710 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs->detect_hw_virt(adev); adev 712 drivers/gpu/drm/amd/amdgpu/soc15.c if (amdgpu_sriov_vf(adev)) adev 713 drivers/gpu/drm/amd/amdgpu/soc15.c adev->virt.ops = &xgpu_ai_virt_ops; adev 715 drivers/gpu/drm/amd/amdgpu/soc15.c switch (adev->asic_type) { adev 719 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &vega10_common_ip_block); adev 720 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block); adev 723 drivers/gpu/drm/amd/amdgpu/soc15.c if (amdgpu_sriov_vf(adev)) { adev 724 drivers/gpu/drm/amd/amdgpu/soc15.c if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) { adev 725 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->asic_type == CHIP_VEGA20) adev 726 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block); adev 728 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block); adev 730 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); adev 732 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); adev 733 drivers/gpu/drm/amd/amdgpu/soc15.c if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) { adev 734 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->asic_type == CHIP_VEGA20) adev 735 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block); adev 737 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block); adev 740 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); adev 741 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); adev 742 drivers/gpu/drm/amd/amdgpu/soc15.c if (!amdgpu_sriov_vf(adev)) { adev 743 drivers/gpu/drm/amd/amdgpu/soc15.c if (is_support_sw_smu(adev)) adev 744 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); adev 746 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); adev 748 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) adev 749 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 751 drivers/gpu/drm/amd/amdgpu/soc15.c else if (amdgpu_device_has_dc_support(adev)) adev 752 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &dm_ip_block); adev 754 drivers/gpu/drm/amd/amdgpu/soc15.c if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) { adev 755 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block); adev 756 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block); adev 760 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &vega10_common_ip_block); adev 761 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block); adev 762 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); adev 763 drivers/gpu/drm/amd/amdgpu/soc15.c if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) adev 764 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &psp_v10_0_ip_block); adev 765 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); adev 766 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); adev 767 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); adev 768 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) adev 769 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 771 drivers/gpu/drm/amd/amdgpu/soc15.c else if (amdgpu_device_has_dc_support(adev)) adev 772 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &dm_ip_block); adev 774 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &vcn_v1_0_ip_block); adev 777 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &vega10_common_ip_block); adev 778 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block); adev 779 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); adev 780 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) adev 781 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 782 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); adev 783 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); adev 784 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); adev 785 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &vcn_v2_5_ip_block); adev 788 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &vega10_common_ip_block); adev 789 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block); adev 790 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); adev 791 drivers/gpu/drm/amd/amdgpu/soc15.c if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) adev 792 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &psp_v12_0_ip_block); adev 793 drivers/gpu/drm/amd/amdgpu/soc15.c if (is_support_sw_smu(adev)) adev 794 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &smu_v12_0_ip_block); adev 795 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); adev 796 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); adev 797 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) adev 798 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 800 drivers/gpu/drm/amd/amdgpu/soc15.c else if (amdgpu_device_has_dc_support(adev)) adev 801 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &dm_ip_block); adev 803 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block); adev 812 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_flush_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring) adev 814 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs->hdp_flush(adev, ring); adev 817 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_invalidate_hdp(struct amdgpu_device *adev, adev 827 drivers/gpu/drm/amd/amdgpu/soc15.c static bool soc15_need_full_reset(struct amdgpu_device *adev) adev 832 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_get_pcie_usage(struct amdgpu_device *adev, uint64_t *count0, adev 842 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->flags & AMD_IS_APU) adev 879 drivers/gpu/drm/amd/amdgpu/soc15.c static void vega20_get_pcie_usage(struct amdgpu_device *adev, uint64_t *count0, adev 889 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->flags & AMD_IS_APU) adev 928 drivers/gpu/drm/amd/amdgpu/soc15.c static bool soc15_need_reset_on_init(struct amdgpu_device *adev) adev 935 drivers/gpu/drm/amd/amdgpu/soc15.c if (!amdgpu_passthrough(adev)) adev 938 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->flags & AMD_IS_APU) adev 951 drivers/gpu/drm/amd/amdgpu/soc15.c static uint64_t soc15_get_pcie_replay_count(struct amdgpu_device *adev) adev 1008 drivers/gpu/drm/amd/amdgpu/soc15.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1010 drivers/gpu/drm/amd/amdgpu/soc15.c adev->rmmio_remap.reg_offset = MMIO_REG_HOLE_OFFSET; adev 1011 drivers/gpu/drm/amd/amdgpu/soc15.c adev->rmmio_remap.bus_addr = adev->rmmio_base + MMIO_REG_HOLE_OFFSET; adev 1012 drivers/gpu/drm/amd/amdgpu/soc15.c adev->smc_rreg = NULL; adev 1013 drivers/gpu/drm/amd/amdgpu/soc15.c adev->smc_wreg = NULL; adev 1014 drivers/gpu/drm/amd/amdgpu/soc15.c adev->pcie_rreg = &soc15_pcie_rreg; adev 1015 drivers/gpu/drm/amd/amdgpu/soc15.c adev->pcie_wreg = &soc15_pcie_wreg; adev 1016 drivers/gpu/drm/amd/amdgpu/soc15.c adev->pcie_rreg64 = &soc15_pcie_rreg64; adev 1017 drivers/gpu/drm/amd/amdgpu/soc15.c adev->pcie_wreg64 = &soc15_pcie_wreg64; adev 1018 drivers/gpu/drm/amd/amdgpu/soc15.c adev->uvd_ctx_rreg = &soc15_uvd_ctx_rreg; adev 1019 drivers/gpu/drm/amd/amdgpu/soc15.c adev->uvd_ctx_wreg = &soc15_uvd_ctx_wreg; adev 1020 drivers/gpu/drm/amd/amdgpu/soc15.c adev->didt_rreg = &soc15_didt_rreg; adev 1021 drivers/gpu/drm/amd/amdgpu/soc15.c adev->didt_wreg = &soc15_didt_wreg; adev 1022 drivers/gpu/drm/amd/amdgpu/soc15.c adev->gc_cac_rreg = &soc15_gc_cac_rreg; adev 1023 drivers/gpu/drm/amd/amdgpu/soc15.c adev->gc_cac_wreg = &soc15_gc_cac_wreg; adev 1024 drivers/gpu/drm/amd/amdgpu/soc15.c adev->se_cac_rreg = &soc15_se_cac_rreg; adev 1025 drivers/gpu/drm/amd/amdgpu/soc15.c adev->se_cac_wreg = &soc15_se_cac_wreg; adev 1028 drivers/gpu/drm/amd/amdgpu/soc15.c adev->external_rev_id = 0xFF; adev 1029 drivers/gpu/drm/amd/amdgpu/soc15.c switch (adev->asic_type) { adev 1031 drivers/gpu/drm/amd/amdgpu/soc15.c adev->asic_funcs = &soc15_asic_funcs; adev 1032 drivers/gpu/drm/amd/amdgpu/soc15.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 1051 drivers/gpu/drm/amd/amdgpu/soc15.c adev->pg_flags = 0; adev 1052 drivers/gpu/drm/amd/amdgpu/soc15.c adev->external_rev_id = 0x1; adev 1055 drivers/gpu/drm/amd/amdgpu/soc15.c adev->asic_funcs = &soc15_asic_funcs; adev 1056 drivers/gpu/drm/amd/amdgpu/soc15.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 1074 drivers/gpu/drm/amd/amdgpu/soc15.c adev->pg_flags = 0; adev 1075 drivers/gpu/drm/amd/amdgpu/soc15.c adev->external_rev_id = adev->rev_id + 0x14; adev 1078 drivers/gpu/drm/amd/amdgpu/soc15.c adev->asic_funcs = &vega20_asic_funcs; adev 1079 drivers/gpu/drm/amd/amdgpu/soc15.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 1097 drivers/gpu/drm/amd/amdgpu/soc15.c adev->pg_flags = 0; adev 1098 drivers/gpu/drm/amd/amdgpu/soc15.c adev->external_rev_id = adev->rev_id + 0x28; adev 1101 drivers/gpu/drm/amd/amdgpu/soc15.c adev->asic_funcs = &soc15_asic_funcs; adev 1102 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->rev_id >= 0x8) adev 1103 drivers/gpu/drm/amd/amdgpu/soc15.c adev->external_rev_id = adev->rev_id + 0x79; adev 1104 drivers/gpu/drm/amd/amdgpu/soc15.c else if (adev->pdev->device == 0x15d8) adev 1105 drivers/gpu/drm/amd/amdgpu/soc15.c adev->external_rev_id = adev->rev_id + 0x41; adev 1106 drivers/gpu/drm/amd/amdgpu/soc15.c else if (adev->rev_id == 1) adev 1107 drivers/gpu/drm/amd/amdgpu/soc15.c adev->external_rev_id = adev->rev_id + 0x20; adev 1109 drivers/gpu/drm/amd/amdgpu/soc15.c adev->external_rev_id = adev->rev_id + 0x01; adev 1111 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->rev_id >= 0x8) { adev 1112 drivers/gpu/drm/amd/amdgpu/soc15.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 1128 drivers/gpu/drm/amd/amdgpu/soc15.c adev->pg_flags = AMD_PG_SUPPORT_SDMA | AMD_PG_SUPPORT_VCN; adev 1129 drivers/gpu/drm/amd/amdgpu/soc15.c } else if (adev->pdev->device == 0x15d8) { adev 1130 drivers/gpu/drm/amd/amdgpu/soc15.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 1145 drivers/gpu/drm/amd/amdgpu/soc15.c adev->pg_flags = AMD_PG_SUPPORT_SDMA | adev 1150 drivers/gpu/drm/amd/amdgpu/soc15.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 1171 drivers/gpu/drm/amd/amdgpu/soc15.c adev->pg_flags = AMD_PG_SUPPORT_SDMA | AMD_PG_SUPPORT_VCN; adev 1175 drivers/gpu/drm/amd/amdgpu/soc15.c adev->asic_funcs = &vega20_asic_funcs; adev 1176 drivers/gpu/drm/amd/amdgpu/soc15.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 1187 drivers/gpu/drm/amd/amdgpu/soc15.c adev->pg_flags = 0; adev 1188 drivers/gpu/drm/amd/amdgpu/soc15.c adev->external_rev_id = adev->rev_id + 0x32; adev 1191 drivers/gpu/drm/amd/amdgpu/soc15.c adev->asic_funcs = &soc15_asic_funcs; adev 1192 drivers/gpu/drm/amd/amdgpu/soc15.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 1211 drivers/gpu/drm/amd/amdgpu/soc15.c adev->pg_flags = AMD_PG_SUPPORT_SDMA | adev 1214 drivers/gpu/drm/amd/amdgpu/soc15.c adev->external_rev_id = adev->rev_id + 0x91; adev 1221 drivers/gpu/drm/amd/amdgpu/soc15.c if (amdgpu_sriov_vf(adev)) { adev 1222 drivers/gpu/drm/amd/amdgpu/soc15.c amdgpu_virt_init_setting(adev); adev 1223 drivers/gpu/drm/amd/amdgpu/soc15.c xgpu_ai_mailbox_set_irq_funcs(adev); adev 1231 drivers/gpu/drm/amd/amdgpu/soc15.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1233 drivers/gpu/drm/amd/amdgpu/soc15.c if (amdgpu_sriov_vf(adev)) adev 1234 drivers/gpu/drm/amd/amdgpu/soc15.c xgpu_ai_mailbox_get_irq(adev); adev 1241 drivers/gpu/drm/amd/amdgpu/soc15.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1243 drivers/gpu/drm/amd/amdgpu/soc15.c if (amdgpu_sriov_vf(adev)) adev 1244 drivers/gpu/drm/amd/amdgpu/soc15.c xgpu_ai_mailbox_add_irq_id(adev); adev 1246 drivers/gpu/drm/amd/amdgpu/soc15.c adev->df_funcs->sw_init(adev); adev 1256 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_doorbell_range_init(struct amdgpu_device *adev) adev 1262 drivers/gpu/drm/amd/amdgpu/soc15.c if (!amdgpu_sriov_vf(adev)) { adev 1263 drivers/gpu/drm/amd/amdgpu/soc15.c for (i = 0; i < adev->sdma.num_instances; i++) { adev 1264 drivers/gpu/drm/amd/amdgpu/soc15.c ring = &adev->sdma.instance[i].ring; adev 1265 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs->sdma_doorbell_range(adev, i, adev 1267 drivers/gpu/drm/amd/amdgpu/soc15.c adev->doorbell_index.sdma_doorbell_range); adev 1270 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs->ih_doorbell_range(adev, adev->irq.ih.use_doorbell, adev 1271 drivers/gpu/drm/amd/amdgpu/soc15.c adev->irq.ih.doorbell_index); adev 1277 drivers/gpu/drm/amd/amdgpu/soc15.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1280 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_pcie_gen3_enable(adev); adev 1282 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_program_aspm(adev); adev 1284 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs->init_registers(adev); adev 1289 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->nbio_funcs->remap_hdp_registers) adev 1290 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs->remap_hdp_registers(adev); adev 1293 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_enable_doorbell_aperture(adev, true); adev 1299 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_doorbell_range_init(adev); adev 1306 drivers/gpu/drm/amd/amdgpu/soc15.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1309 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_enable_doorbell_aperture(adev, false); adev 1310 drivers/gpu/drm/amd/amdgpu/soc15.c if (amdgpu_sriov_vf(adev)) adev 1311 drivers/gpu/drm/amd/amdgpu/soc15.c xgpu_ai_mailbox_put_irq(adev); adev 1318 drivers/gpu/drm/amd/amdgpu/soc15.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1320 drivers/gpu/drm/amd/amdgpu/soc15.c return soc15_common_hw_fini(adev); adev 1325 drivers/gpu/drm/amd/amdgpu/soc15.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1327 drivers/gpu/drm/amd/amdgpu/soc15.c return soc15_common_hw_init(adev); adev 1345 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_update_hdp_light_sleep(struct amdgpu_device *adev, bool enable) adev 1349 drivers/gpu/drm/amd/amdgpu/soc15.c if (adev->asic_type == CHIP_VEGA20 || adev 1350 drivers/gpu/drm/amd/amdgpu/soc15.c adev->asic_type == CHIP_ARCTURUS) { adev 1353 drivers/gpu/drm/amd/amdgpu/soc15.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_HDP_LS)) adev 1369 drivers/gpu/drm/amd/amdgpu/soc15.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_HDP_LS)) adev 1379 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_update_drm_clock_gating(struct amdgpu_device *adev, bool enable) adev 1385 drivers/gpu/drm/amd/amdgpu/soc15.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_DRM_MGCG)) adev 1408 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_update_drm_light_sleep(struct amdgpu_device *adev, bool enable) adev 1414 drivers/gpu/drm/amd/amdgpu/soc15.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_DRM_LS)) adev 1423 drivers/gpu/drm/amd/amdgpu/soc15.c static void soc15_update_rom_medium_grain_clock_gating(struct amdgpu_device *adev, adev 1430 drivers/gpu/drm/amd/amdgpu/soc15.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_ROM_MGCG)) adev 1444 drivers/gpu/drm/amd/amdgpu/soc15.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1446 drivers/gpu/drm/amd/amdgpu/soc15.c if (amdgpu_sriov_vf(adev)) adev 1449 drivers/gpu/drm/amd/amdgpu/soc15.c switch (adev->asic_type) { adev 1453 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs->update_medium_grain_clock_gating(adev, adev 1455 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs->update_medium_grain_light_sleep(adev, adev 1457 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_update_hdp_light_sleep(adev, adev 1459 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_update_drm_clock_gating(adev, adev 1461 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_update_drm_light_sleep(adev, adev 1463 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_update_rom_medium_grain_clock_gating(adev, adev 1465 drivers/gpu/drm/amd/amdgpu/soc15.c adev->df_funcs->update_medium_grain_clock_gating(adev, adev 1470 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs->update_medium_grain_clock_gating(adev, adev 1472 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs->update_medium_grain_light_sleep(adev, adev 1474 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_update_hdp_light_sleep(adev, adev 1476 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_update_drm_clock_gating(adev, adev 1478 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_update_drm_light_sleep(adev, adev 1480 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_update_rom_medium_grain_clock_gating(adev, adev 1484 drivers/gpu/drm/amd/amdgpu/soc15.c soc15_update_hdp_light_sleep(adev, adev 1495 drivers/gpu/drm/amd/amdgpu/soc15.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1498 drivers/gpu/drm/amd/amdgpu/soc15.c if (amdgpu_sriov_vf(adev)) adev 1501 drivers/gpu/drm/amd/amdgpu/soc15.c adev->nbio_funcs->get_clockgating_state(adev, flags); adev 1523 drivers/gpu/drm/amd/amdgpu/soc15.c adev->df_funcs->get_clockgating_state(adev, flags); adev 65 drivers/gpu/drm/amd/amdgpu/soc15.h #define SOC15_REG_ENTRY_OFFSET(entry) (adev->reg_offset[entry.hwip][entry.inst][entry.seg] + entry.reg_offset) adev 70 drivers/gpu/drm/amd/amdgpu/soc15.h void soc15_grbm_select(struct amdgpu_device *adev, adev 72 drivers/gpu/drm/amd/amdgpu/soc15.h int soc15_set_ip_blocks(struct amdgpu_device *adev); adev 74 drivers/gpu/drm/amd/amdgpu/soc15.h void soc15_program_register_sequence(struct amdgpu_device *adev, adev 78 drivers/gpu/drm/amd/amdgpu/soc15.h int vega10_reg_base_init(struct amdgpu_device *adev); adev 79 drivers/gpu/drm/amd/amdgpu/soc15.h int vega20_reg_base_init(struct amdgpu_device *adev); adev 80 drivers/gpu/drm/amd/amdgpu/soc15.h int arct_reg_base_init(struct amdgpu_device *adev); adev 82 drivers/gpu/drm/amd/amdgpu/soc15.h void vega10_doorbell_index_init(struct amdgpu_device *adev); adev 83 drivers/gpu/drm/amd/amdgpu/soc15.h void vega20_doorbell_index_init(struct amdgpu_device *adev); adev 28 drivers/gpu/drm/amd/amdgpu/soc15_common.h #define SOC15_REG_OFFSET(ip, inst, reg) (adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) adev 31 drivers/gpu/drm/amd/amdgpu/soc15_common.h WREG32(adev->reg_offset[ip##_HWIP][idx][mm##reg##_BASE_IDX] + mm##reg, \ adev 32 drivers/gpu/drm/amd/amdgpu/soc15_common.h (RREG32(adev->reg_offset[ip##_HWIP][idx][mm##reg##_BASE_IDX] + mm##reg) \ adev 36 drivers/gpu/drm/amd/amdgpu/soc15_common.h RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) adev 39 drivers/gpu/drm/amd/amdgpu/soc15_common.h RREG32((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + offset) adev 42 drivers/gpu/drm/amd/amdgpu/soc15_common.h WREG32((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg), value) adev 45 drivers/gpu/drm/amd/amdgpu/soc15_common.h WREG32_NO_KIQ((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg), value) adev 48 drivers/gpu/drm/amd/amdgpu/soc15_common.h WREG32((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + offset, value) adev 53 drivers/gpu/drm/amd/amdgpu/soc15_common.h uint32_t tmp_ = RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \ adev 54 drivers/gpu/drm/amd/amdgpu/soc15_common.h uint32_t loop = adev->usec_timeout; \ adev 58 drivers/gpu/drm/amd/amdgpu/soc15_common.h loop = adev->usec_timeout; \ adev 62 drivers/gpu/drm/amd/amdgpu/soc15_common.h tmp_ = RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \ adev 76 drivers/gpu/drm/amd/amdgpu/soc15_common.h if (AMDGPU_VIRT_SUPPORT_RLC_PRG_REG(adev)) { \ adev 79 drivers/gpu/drm/amd/amdgpu/soc15_common.h uint32_t r0 = adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG0_BASE_IDX] + mmSCRATCH_REG0; \ adev 80 drivers/gpu/drm/amd/amdgpu/soc15_common.h uint32_t r1 = adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG1; \ adev 81 drivers/gpu/drm/amd/amdgpu/soc15_common.h uint32_t spare_int = adev->reg_offset[GC_HWIP][0][mmRLC_SPARE_INT_BASE_IDX] + mmRLC_SPARE_INT; \ adev 100 drivers/gpu/drm/amd/amdgpu/soc15_common.h uint32_t target_reg = adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg;\ adev 101 drivers/gpu/drm/amd/amdgpu/soc15_common.h if (AMDGPU_VIRT_SUPPORT_RLC_PRG_REG(adev)) { \ adev 102 drivers/gpu/drm/amd/amdgpu/soc15_common.h uint32_t r2 = adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG2; \ adev 103 drivers/gpu/drm/amd/amdgpu/soc15_common.h uint32_t r3 = adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG1_BASE_IDX] + mmSCRATCH_REG3; \ adev 104 drivers/gpu/drm/amd/amdgpu/soc15_common.h uint32_t grbm_cntl = adev->reg_offset[GC_HWIP][0][mmGRBM_GFX_CNTL_BASE_IDX] + mmGRBM_GFX_CNTL; \ adev 105 drivers/gpu/drm/amd/amdgpu/soc15_common.h uint32_t grbm_idx = adev->reg_offset[GC_HWIP][0][mmGRBM_GFX_INDEX_BASE_IDX] + mmGRBM_GFX_INDEX; \ adev 118 drivers/gpu/drm/amd/amdgpu/soc15_common.h uint32_t target_reg = adev->reg_offset[GC_HWIP][0][reg##_BASE_IDX] + reg;\ adev 123 drivers/gpu/drm/amd/amdgpu/soc15_common.h WREG32_RLC((adev->reg_offset[ip##_HWIP][idx][mm##reg##_BASE_IDX] + mm##reg), \ adev 124 drivers/gpu/drm/amd/amdgpu/soc15_common.h (RREG32(adev->reg_offset[ip##_HWIP][idx][mm##reg##_BASE_IDX] + mm##reg) \ adev 128 drivers/gpu/drm/amd/amdgpu/soc15_common.h WREG32_RLC(((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + offset), value) adev 51 drivers/gpu/drm/amd/amdgpu/tonga_ih.c static void tonga_ih_set_interrupt_funcs(struct amdgpu_device *adev); adev 60 drivers/gpu/drm/amd/amdgpu/tonga_ih.c static void tonga_ih_enable_interrupts(struct amdgpu_device *adev) adev 67 drivers/gpu/drm/amd/amdgpu/tonga_ih.c adev->irq.ih.enabled = true; adev 77 drivers/gpu/drm/amd/amdgpu/tonga_ih.c static void tonga_ih_disable_interrupts(struct amdgpu_device *adev) adev 87 drivers/gpu/drm/amd/amdgpu/tonga_ih.c adev->irq.ih.enabled = false; adev 88 drivers/gpu/drm/amd/amdgpu/tonga_ih.c adev->irq.ih.rptr = 0; adev 102 drivers/gpu/drm/amd/amdgpu/tonga_ih.c static int tonga_ih_irq_init(struct amdgpu_device *adev) adev 105 drivers/gpu/drm/amd/amdgpu/tonga_ih.c struct amdgpu_ih_ring *ih = &adev->irq.ih; adev 109 drivers/gpu/drm/amd/amdgpu/tonga_ih.c tonga_ih_disable_interrupts(adev); adev 112 drivers/gpu/drm/amd/amdgpu/tonga_ih.c WREG32(mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); adev 125 drivers/gpu/drm/amd/amdgpu/tonga_ih.c rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4); adev 132 drivers/gpu/drm/amd/amdgpu/tonga_ih.c if (adev->irq.msi_enabled) adev 146 drivers/gpu/drm/amd/amdgpu/tonga_ih.c if (adev->irq.ih.use_doorbell) { adev 148 drivers/gpu/drm/amd/amdgpu/tonga_ih.c OFFSET, adev->irq.ih.doorbell_index); adev 157 drivers/gpu/drm/amd/amdgpu/tonga_ih.c pci_set_master(adev->pdev); adev 160 drivers/gpu/drm/amd/amdgpu/tonga_ih.c tonga_ih_enable_interrupts(adev); adev 172 drivers/gpu/drm/amd/amdgpu/tonga_ih.c static void tonga_ih_irq_disable(struct amdgpu_device *adev) adev 174 drivers/gpu/drm/amd/amdgpu/tonga_ih.c tonga_ih_disable_interrupts(adev); adev 191 drivers/gpu/drm/amd/amdgpu/tonga_ih.c static u32 tonga_ih_get_wptr(struct amdgpu_device *adev, adev 204 drivers/gpu/drm/amd/amdgpu/tonga_ih.c dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", adev 222 drivers/gpu/drm/amd/amdgpu/tonga_ih.c static void tonga_ih_decode_iv(struct amdgpu_device *adev, adev 253 drivers/gpu/drm/amd/amdgpu/tonga_ih.c static void tonga_ih_set_rptr(struct amdgpu_device *adev, adev 267 drivers/gpu/drm/amd/amdgpu/tonga_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 270 drivers/gpu/drm/amd/amdgpu/tonga_ih.c ret = amdgpu_irq_add_domain(adev); adev 274 drivers/gpu/drm/amd/amdgpu/tonga_ih.c tonga_ih_set_interrupt_funcs(adev); adev 282 drivers/gpu/drm/amd/amdgpu/tonga_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 284 drivers/gpu/drm/amd/amdgpu/tonga_ih.c r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, true); adev 288 drivers/gpu/drm/amd/amdgpu/tonga_ih.c adev->irq.ih.use_doorbell = true; adev 289 drivers/gpu/drm/amd/amdgpu/tonga_ih.c adev->irq.ih.doorbell_index = adev->doorbell_index.ih; adev 291 drivers/gpu/drm/amd/amdgpu/tonga_ih.c r = amdgpu_irq_init(adev); adev 298 drivers/gpu/drm/amd/amdgpu/tonga_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 300 drivers/gpu/drm/amd/amdgpu/tonga_ih.c amdgpu_irq_fini(adev); adev 301 drivers/gpu/drm/amd/amdgpu/tonga_ih.c amdgpu_ih_ring_fini(adev, &adev->irq.ih); adev 302 drivers/gpu/drm/amd/amdgpu/tonga_ih.c amdgpu_irq_remove_domain(adev); adev 310 drivers/gpu/drm/amd/amdgpu/tonga_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 312 drivers/gpu/drm/amd/amdgpu/tonga_ih.c r = tonga_ih_irq_init(adev); adev 321 drivers/gpu/drm/amd/amdgpu/tonga_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 323 drivers/gpu/drm/amd/amdgpu/tonga_ih.c tonga_ih_irq_disable(adev); adev 330 drivers/gpu/drm/amd/amdgpu/tonga_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 332 drivers/gpu/drm/amd/amdgpu/tonga_ih.c return tonga_ih_hw_fini(adev); adev 337 drivers/gpu/drm/amd/amdgpu/tonga_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 339 drivers/gpu/drm/amd/amdgpu/tonga_ih.c return tonga_ih_hw_init(adev); adev 344 drivers/gpu/drm/amd/amdgpu/tonga_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 357 drivers/gpu/drm/amd/amdgpu/tonga_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 359 drivers/gpu/drm/amd/amdgpu/tonga_ih.c for (i = 0; i < adev->usec_timeout; i++) { adev 371 drivers/gpu/drm/amd/amdgpu/tonga_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 380 drivers/gpu/drm/amd/amdgpu/tonga_ih.c adev->irq.srbm_soft_reset = srbm_soft_reset; adev 383 drivers/gpu/drm/amd/amdgpu/tonga_ih.c adev->irq.srbm_soft_reset = 0; adev 390 drivers/gpu/drm/amd/amdgpu/tonga_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 392 drivers/gpu/drm/amd/amdgpu/tonga_ih.c if (!adev->irq.srbm_soft_reset) adev 395 drivers/gpu/drm/amd/amdgpu/tonga_ih.c return tonga_ih_hw_fini(adev); adev 400 drivers/gpu/drm/amd/amdgpu/tonga_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 402 drivers/gpu/drm/amd/amdgpu/tonga_ih.c if (!adev->irq.srbm_soft_reset) adev 405 drivers/gpu/drm/amd/amdgpu/tonga_ih.c return tonga_ih_hw_init(adev); adev 410 drivers/gpu/drm/amd/amdgpu/tonga_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 413 drivers/gpu/drm/amd/amdgpu/tonga_ih.c if (!adev->irq.srbm_soft_reset) adev 415 drivers/gpu/drm/amd/amdgpu/tonga_ih.c srbm_soft_reset = adev->irq.srbm_soft_reset; adev 422 drivers/gpu/drm/amd/amdgpu/tonga_ih.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 477 drivers/gpu/drm/amd/amdgpu/tonga_ih.c static void tonga_ih_set_interrupt_funcs(struct amdgpu_device *adev) adev 479 drivers/gpu/drm/amd/amdgpu/tonga_ih.c adev->irq.ih_funcs = &tonga_ih_funcs; adev 52 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c static void umc_v6_1_enable_umc_index_mode(struct amdgpu_device *adev, adev 72 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c static void umc_v6_1_disable_umc_index_mode(struct amdgpu_device *adev) adev 78 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c static void umc_v6_1_query_correctable_error_count(struct amdgpu_device *adev, adev 126 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c static void umc_v6_1_querry_uncorrectable_error_count(struct amdgpu_device *adev, adev 147 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c static void umc_v6_1_query_error_count(struct amdgpu_device *adev, adev 151 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c umc_v6_1_query_correctable_error_count(adev, umc_reg_offset, adev 153 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c umc_v6_1_querry_uncorrectable_error_count(adev, umc_reg_offset, adev 157 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c static void umc_v6_1_query_ras_error_count(struct amdgpu_device *adev, adev 163 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c static void umc_v6_1_query_error_address(struct amdgpu_device *adev, adev 206 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c static void umc_v6_1_query_ras_error_address(struct amdgpu_device *adev, adev 212 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c static void umc_v6_1_ras_init_per_channel(struct amdgpu_device *adev, adev 242 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c static void umc_v6_1_ras_init(struct amdgpu_device *adev) adev 42 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static void uvd_v4_2_mc_resume(struct amdgpu_device *adev); adev 43 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static void uvd_v4_2_set_ring_funcs(struct amdgpu_device *adev); adev 44 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static void uvd_v4_2_set_irq_funcs(struct amdgpu_device *adev); adev 45 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static int uvd_v4_2_start(struct amdgpu_device *adev); adev 46 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static void uvd_v4_2_stop(struct amdgpu_device *adev); adev 49 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static void uvd_v4_2_set_dcm(struct amdgpu_device *adev, adev 60 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = ring->adev; adev 74 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = ring->adev; adev 88 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = ring->adev; adev 95 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 96 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c adev->uvd.num_uvd_inst = 1; adev 98 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c uvd_v4_2_set_ring_funcs(adev); adev 99 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c uvd_v4_2_set_irq_funcs(adev); adev 107 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 111 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 124, &adev->uvd.inst->irq); adev 115 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c r = amdgpu_uvd_sw_init(adev); adev 119 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c ring = &adev->uvd.inst->ring; adev 121 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.inst->irq, 0); adev 125 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c r = amdgpu_uvd_resume(adev); adev 129 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c r = amdgpu_uvd_entity_init(adev); adev 137 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 139 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c r = amdgpu_uvd_suspend(adev); adev 143 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c return amdgpu_uvd_sw_fini(adev); adev 146 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static void uvd_v4_2_enable_mgcg(struct amdgpu_device *adev, adev 157 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 158 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_ring *ring = &adev->uvd.inst->ring; adev 162 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c uvd_v4_2_enable_mgcg(adev, true); adev 163 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c amdgpu_asic_set_uvd_clocks(adev, 10000, 10000); adev 212 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 213 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_ring *ring = &adev->uvd.inst->ring; adev 216 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c uvd_v4_2_stop(adev); adev 226 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 228 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c r = uvd_v4_2_hw_fini(adev); adev 232 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c return amdgpu_uvd_suspend(adev); adev 238 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 240 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c r = amdgpu_uvd_resume(adev); adev 244 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c return uvd_v4_2_hw_init(adev); adev 254 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static int uvd_v4_2_start(struct amdgpu_device *adev) adev 256 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_ring *ring = &adev->uvd.inst->ring; adev 267 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c uvd_v4_2_set_dcm(adev, true); adev 300 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c uvd_v4_2_mc_resume(adev); adev 381 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static void uvd_v4_2_stop(struct amdgpu_device *adev) adev 435 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c uvd_v4_2_set_dcm(adev, false); adev 477 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = ring->adev; adev 490 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c for (i = 0; i < adev->usec_timeout; i++) { adev 497 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c if (i >= adev->usec_timeout) adev 541 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static void uvd_v4_2_mc_resume(struct amdgpu_device *adev) adev 547 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c addr = (adev->uvd.inst->gpu_addr + AMDGPU_UVD_FIRMWARE_OFFSET) >> 3; adev 548 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c size = AMDGPU_UVD_FIRMWARE_SIZE(adev) >> 3; adev 559 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c (AMDGPU_UVD_SESSION_SIZE * adev->uvd.max_handles)) >> 3; adev 564 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c addr = (adev->uvd.inst->gpu_addr >> 28) & 0xF; adev 568 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c addr = (adev->uvd.inst->gpu_addr >> 32) & 0xFF; adev 571 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 572 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 573 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 576 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static void uvd_v4_2_enable_mgcg(struct amdgpu_device *adev, adev 581 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG)) { adev 602 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static void uvd_v4_2_set_dcm(struct amdgpu_device *adev, adev 631 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 639 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 641 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c for (i = 0; i < adev->usec_timeout; i++) { adev 650 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 652 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c uvd_v4_2_stop(adev); adev 658 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c return uvd_v4_2_start(adev); adev 661 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static int uvd_v4_2_set_interrupt_state(struct amdgpu_device *adev, adev 670 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static int uvd_v4_2_process_interrupt(struct amdgpu_device *adev, adev 675 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c amdgpu_fence_process(&adev->uvd.inst->ring); adev 695 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 698 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c uvd_v4_2_stop(adev); adev 699 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c if (adev->pg_flags & AMD_PG_SUPPORT_UVD && !adev->pm.dpm_enabled) { adev 710 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c if (adev->pg_flags & AMD_PG_SUPPORT_UVD && !adev->pm.dpm_enabled) { adev 719 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c return uvd_v4_2_start(adev); adev 762 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static void uvd_v4_2_set_ring_funcs(struct amdgpu_device *adev) adev 764 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c adev->uvd.inst->ring.funcs = &uvd_v4_2_ring_funcs; adev 772 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c static void uvd_v4_2_set_irq_funcs(struct amdgpu_device *adev) adev 774 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c adev->uvd.inst->irq.num_types = 1; adev 775 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c adev->uvd.inst->irq.funcs = &uvd_v4_2_irq_funcs; adev 41 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static void uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev); adev 42 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static void uvd_v5_0_set_irq_funcs(struct amdgpu_device *adev); adev 43 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static int uvd_v5_0_start(struct amdgpu_device *adev); adev 44 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static void uvd_v5_0_stop(struct amdgpu_device *adev); adev 47 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static void uvd_v5_0_enable_mgcg(struct amdgpu_device *adev, adev 58 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = ring->adev; adev 72 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = ring->adev; adev 86 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = ring->adev; adev 93 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 94 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c adev->uvd.num_uvd_inst = 1; adev 96 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uvd_v5_0_set_ring_funcs(adev); adev 97 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uvd_v5_0_set_irq_funcs(adev); adev 105 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 109 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE, &adev->uvd.inst->irq); adev 113 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c r = amdgpu_uvd_sw_init(adev); adev 117 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c ring = &adev->uvd.inst->ring; adev 119 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.inst->irq, 0); adev 123 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c r = amdgpu_uvd_resume(adev); adev 127 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c r = amdgpu_uvd_entity_init(adev); adev 135 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 137 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c r = amdgpu_uvd_suspend(adev); adev 141 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c return amdgpu_uvd_sw_fini(adev); adev 153 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 154 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_ring *ring = &adev->uvd.inst->ring; adev 158 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c amdgpu_asic_set_uvd_clocks(adev, 10000, 10000); adev 159 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uvd_v5_0_set_clockgating_state(adev, AMD_CG_STATE_UNGATE); adev 160 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uvd_v5_0_enable_mgcg(adev, true); adev 210 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 211 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_ring *ring = &adev->uvd.inst->ring; adev 214 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uvd_v5_0_stop(adev); adev 224 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 226 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c r = uvd_v5_0_hw_fini(adev); adev 229 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uvd_v5_0_set_clockgating_state(adev, AMD_CG_STATE_GATE); adev 231 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c return amdgpu_uvd_suspend(adev); adev 237 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 239 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c r = amdgpu_uvd_resume(adev); adev 243 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c return uvd_v5_0_hw_init(adev); adev 253 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static void uvd_v5_0_mc_resume(struct amdgpu_device *adev) adev 260 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c lower_32_bits(adev->uvd.inst->gpu_addr)); adev 262 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c upper_32_bits(adev->uvd.inst->gpu_addr)); adev 265 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c size = AMDGPU_UVD_FIRMWARE_SIZE(adev); adev 276 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c (AMDGPU_UVD_SESSION_SIZE * adev->uvd.max_handles); adev 280 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 281 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 282 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 292 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static int uvd_v5_0_start(struct amdgpu_device *adev) adev 294 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_ring *ring = &adev->uvd.inst->ring; adev 307 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uvd_v5_0_mc_resume(adev); adev 433 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static void uvd_v5_0_stop(struct amdgpu_device *adev) adev 494 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = ring->adev; adev 506 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 513 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c if (i >= adev->usec_timeout) adev 554 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 562 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 564 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 573 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 575 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uvd_v5_0_stop(adev); adev 581 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c return uvd_v5_0_start(adev); adev 584 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static int uvd_v5_0_set_interrupt_state(struct amdgpu_device *adev, adev 593 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static int uvd_v5_0_process_interrupt(struct amdgpu_device *adev, adev 598 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c amdgpu_fence_process(&adev->uvd.inst->ring); adev 602 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static void uvd_v5_0_enable_clock_gating(struct amdgpu_device *adev, bool enable) adev 635 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c if (adev->pg_flags & AMD_PG_SUPPORT_UVD) adev 648 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static void uvd_v5_0_set_sw_clock_gating(struct amdgpu_device *adev) adev 696 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static void uvd_v5_0_set_hw_clock_gating(struct amdgpu_device *adev) adev 736 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static void uvd_v5_0_enable_mgcg(struct amdgpu_device *adev, adev 741 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG)) { adev 765 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 772 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uvd_v5_0_enable_clock_gating(adev, true); adev 777 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uvd_v5_0_enable_clock_gating(adev, false); adev 780 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uvd_v5_0_set_sw_clock_gating(adev); adev 794 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 798 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c uvd_v5_0_stop(adev); adev 800 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c ret = uvd_v5_0_start(adev); adev 811 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 814 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c mutex_lock(&adev->pm.mutex); adev 828 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c mutex_unlock(&adev->pm.mutex); adev 871 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static void uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev) adev 873 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c adev->uvd.inst->ring.funcs = &uvd_v5_0_ring_funcs; adev 881 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c static void uvd_v5_0_set_irq_funcs(struct amdgpu_device *adev) adev 883 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c adev->uvd.inst->irq.num_types = 1; adev 884 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c adev->uvd.inst->irq.funcs = &uvd_v5_0_irq_funcs; adev 44 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_set_ring_funcs(struct amdgpu_device *adev); adev 45 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_set_enc_ring_funcs(struct amdgpu_device *adev); adev 47 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_set_irq_funcs(struct amdgpu_device *adev); adev 48 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static int uvd_v6_0_start(struct amdgpu_device *adev); adev 49 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_stop(struct amdgpu_device *adev); adev 50 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_set_sw_clock_gating(struct amdgpu_device *adev); adev 53 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_enable_mgcg(struct amdgpu_device *adev, adev 63 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static inline bool uvd_v6_0_enc_support(struct amdgpu_device *adev) adev 65 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c return ((adev->asic_type >= CHIP_POLARIS10) && adev 66 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c (adev->asic_type <= CHIP_VEGAM) && adev 67 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c (!adev->uvd.fw_version || adev->uvd.fw_version >= FW_1_130_16)); adev 79 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = ring->adev; adev 93 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = ring->adev; adev 95 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (ring == &adev->uvd.inst->ring_enc[0]) adev 109 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = ring->adev; adev 123 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = ring->adev; adev 125 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (ring == &adev->uvd.inst->ring_enc[0]) adev 140 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = ring->adev; adev 154 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = ring->adev; adev 156 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (ring == &adev->uvd.inst->ring_enc[0]) adev 172 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = ring->adev; adev 186 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 192 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (i >= adev->usec_timeout) adev 219 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job); adev 282 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job); adev 335 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c r = amdgpu_bo_create_reserved(ring->adev, 128 * 1024, PAGE_SIZE, adev 364 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 365 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c adev->uvd.num_uvd_inst = 1; adev 367 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (!(adev->flags & AMD_IS_APU) && adev 371 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_set_ring_funcs(adev); adev 373 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (uvd_v6_0_enc_support(adev)) { adev 374 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c adev->uvd.num_enc_rings = 2; adev 375 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_set_enc_ring_funcs(adev); adev 378 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_set_irq_funcs(adev); adev 387 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 390 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE, &adev->uvd.inst->irq); adev 395 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (uvd_v6_0_enc_support(adev)) { adev 396 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c for (i = 0; i < adev->uvd.num_enc_rings; ++i) { adev 397 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + VISLANDS30_IV_SRCID_UVD_ENC_GEN_PURP, &adev->uvd.inst->irq); adev 403 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c r = amdgpu_uvd_sw_init(adev); adev 407 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (!uvd_v6_0_enc_support(adev)) { adev 408 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c for (i = 0; i < adev->uvd.num_enc_rings; ++i) adev 409 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c adev->uvd.inst->ring_enc[i].funcs = NULL; adev 411 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c adev->uvd.inst->irq.num_types = 1; adev 412 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c adev->uvd.num_enc_rings = 0; adev 417 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c ring = &adev->uvd.inst->ring; adev 419 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.inst->irq, 0); adev 423 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c r = amdgpu_uvd_resume(adev); adev 427 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (uvd_v6_0_enc_support(adev)) { adev 428 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c for (i = 0; i < adev->uvd.num_enc_rings; ++i) { adev 429 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c ring = &adev->uvd.inst->ring_enc[i]; adev 431 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.inst->irq, 0); adev 437 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c r = amdgpu_uvd_entity_init(adev); adev 445 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 447 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c r = amdgpu_uvd_suspend(adev); adev 451 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (uvd_v6_0_enc_support(adev)) { adev 452 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c for (i = 0; i < adev->uvd.num_enc_rings; ++i) adev 453 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c amdgpu_ring_fini(&adev->uvd.inst->ring_enc[i]); adev 456 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c return amdgpu_uvd_sw_fini(adev); adev 468 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 469 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_ring *ring = &adev->uvd.inst->ring; adev 473 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c amdgpu_asic_set_uvd_clocks(adev, 10000, 10000); adev 474 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_set_clockgating_state(adev, AMD_CG_STATE_UNGATE); adev 475 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_enable_mgcg(adev, true); adev 508 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (uvd_v6_0_enc_support(adev)) { adev 509 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c for (i = 0; i < adev->uvd.num_enc_rings; ++i) { adev 510 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c ring = &adev->uvd.inst->ring_enc[i]; adev 519 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (uvd_v6_0_enc_support(adev)) adev 537 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 538 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_ring *ring = &adev->uvd.inst->ring; adev 541 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_stop(adev); adev 551 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 553 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c r = uvd_v6_0_hw_fini(adev); adev 557 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c return amdgpu_uvd_suspend(adev); adev 563 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 565 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c r = amdgpu_uvd_resume(adev); adev 569 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c return uvd_v6_0_hw_init(adev); adev 579 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_mc_resume(struct amdgpu_device *adev) adev 586 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c lower_32_bits(adev->uvd.inst->gpu_addr)); adev 588 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c upper_32_bits(adev->uvd.inst->gpu_addr)); adev 591 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c size = AMDGPU_UVD_FIRMWARE_SIZE(adev); adev 602 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c (AMDGPU_UVD_SESSION_SIZE * adev->uvd.max_handles); adev 606 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 607 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 608 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 610 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c WREG32(mmUVD_GP_SCRATCH4, adev->uvd.max_handles); adev 614 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void cz_set_uvd_clock_gating_branches(struct amdgpu_device *adev, adev 699 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static int uvd_v6_0_start(struct amdgpu_device *adev) adev 701 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_ring *ring = &adev->uvd.inst->ring; adev 714 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_mc_resume(adev); adev 840 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (uvd_v6_0_enc_support(adev)) { adev 841 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c ring = &adev->uvd.inst->ring_enc[0]; adev 848 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c ring = &adev->uvd.inst->ring_enc[1]; adev 866 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_stop(struct amdgpu_device *adev) adev 957 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = ring->adev; adev 970 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 977 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (i >= adev->usec_timeout) adev 1115 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1123 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1125 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 1135 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1145 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c adev->uvd.inst->srbm_soft_reset = srbm_soft_reset; adev 1148 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c adev->uvd.inst->srbm_soft_reset = 0; adev 1155 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1157 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (!adev->uvd.inst->srbm_soft_reset) adev 1160 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_stop(adev); adev 1166 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1169 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (!adev->uvd.inst->srbm_soft_reset) adev 1171 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c srbm_soft_reset = adev->uvd.inst->srbm_soft_reset; adev 1178 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 1197 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1199 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (!adev->uvd.inst->srbm_soft_reset) adev 1204 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c return uvd_v6_0_start(adev); adev 1207 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static int uvd_v6_0_set_interrupt_state(struct amdgpu_device *adev, adev 1216 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static int uvd_v6_0_process_interrupt(struct amdgpu_device *adev, adev 1225 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c amdgpu_fence_process(&adev->uvd.inst->ring); adev 1228 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (likely(uvd_v6_0_enc_support(adev))) adev 1229 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c amdgpu_fence_process(&adev->uvd.inst->ring_enc[0]); adev 1234 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (likely(uvd_v6_0_enc_support(adev))) adev 1235 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c amdgpu_fence_process(&adev->uvd.inst->ring_enc[1]); adev 1248 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_enable_clock_gating(struct amdgpu_device *adev, bool enable) adev 1291 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (adev->pg_flags & AMD_PG_SUPPORT_UVD) adev 1303 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_set_sw_clock_gating(struct amdgpu_device *adev) adev 1352 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_set_hw_clock_gating(struct amdgpu_device *adev) adev 1394 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_enable_mgcg(struct amdgpu_device *adev, adev 1399 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG)) { adev 1423 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1430 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_enable_clock_gating(adev, true); adev 1435 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_enable_clock_gating(adev, false); adev 1437 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_set_sw_clock_gating(adev); adev 1451 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1457 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_stop(adev); adev 1459 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c ret = uvd_v6_0_start(adev); adev 1470 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1473 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c mutex_lock(&adev->pm.mutex); adev 1475 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (adev->flags & AMD_IS_APU) adev 1491 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c mutex_unlock(&adev->pm.mutex); adev 1597 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_set_ring_funcs(struct amdgpu_device *adev) adev 1599 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (adev->asic_type >= CHIP_POLARIS10) { adev 1600 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c adev->uvd.inst->ring.funcs = &uvd_v6_0_ring_vm_funcs; adev 1603 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c adev->uvd.inst->ring.funcs = &uvd_v6_0_ring_phys_funcs; adev 1608 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_set_enc_ring_funcs(struct amdgpu_device *adev) adev 1612 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c for (i = 0; i < adev->uvd.num_enc_rings; ++i) adev 1613 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c adev->uvd.inst->ring_enc[i].funcs = &uvd_v6_0_enc_ring_vm_funcs; adev 1623 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c static void uvd_v6_0_set_irq_funcs(struct amdgpu_device *adev) adev 1625 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (uvd_v6_0_enc_support(adev)) adev 1626 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c adev->uvd.inst->irq.num_types = adev->uvd.num_enc_rings + 1; adev 1628 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c adev->uvd.inst->irq.num_types = 1; adev 1630 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c adev->uvd.inst->irq.funcs = &uvd_v6_0_irq_funcs; adev 52 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static void uvd_v7_0_set_ring_funcs(struct amdgpu_device *adev); adev 53 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static void uvd_v7_0_set_enc_ring_funcs(struct amdgpu_device *adev); adev 54 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static void uvd_v7_0_set_irq_funcs(struct amdgpu_device *adev); adev 55 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static int uvd_v7_0_start(struct amdgpu_device *adev); adev 56 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static void uvd_v7_0_stop(struct amdgpu_device *adev); adev 57 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static int uvd_v7_0_sriov_start(struct amdgpu_device *adev); adev 73 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = ring->adev; adev 87 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = ring->adev; adev 89 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) adev 104 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = ring->adev; adev 118 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = ring->adev; adev 121 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c return adev->wb.wb[ring->wptr_offs]; adev 123 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) adev 138 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = ring->adev; adev 152 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = ring->adev; adev 156 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); adev 161 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) adev 177 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = ring->adev; adev 182 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (amdgpu_sriov_vf(adev)) adev 194 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 200 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (i >= adev->usec_timeout) adev 227 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job); adev 289 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job); adev 342 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = amdgpu_bo_create_reserved(ring->adev, 128 * 1024, PAGE_SIZE, adev 371 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 373 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->asic_type == CHIP_VEGA20) { adev 377 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.num_uvd_inst = UVD7_MAX_HW_INSTANCES_VEGA20; adev 378 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->uvd.num_uvd_inst; i++) { adev 381 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.harvest_config |= 1 << i; adev 384 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config == (AMDGPU_UVD_HARVEST_UVD0 | adev 389 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.num_uvd_inst = 1; adev 392 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (amdgpu_sriov_vf(adev)) adev 393 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.num_enc_rings = 1; adev 395 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.num_enc_rings = 2; adev 396 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c uvd_v7_0_set_ring_funcs(adev); adev 397 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c uvd_v7_0_set_enc_ring_funcs(adev); adev 398 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c uvd_v7_0_set_irq_funcs(adev); adev 408 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 410 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (j = 0; j < adev->uvd.num_uvd_inst; j++) { adev 411 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config & (1 << j)) adev 414 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_uvds[j], UVD_7_0__SRCID__UVD_SYSTEM_MESSAGE_INTERRUPT, &adev->uvd.inst[j].irq); adev 419 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->uvd.num_enc_rings; ++i) { adev 420 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_uvds[j], i + UVD_7_0__SRCID__UVD_ENC_GEN_PURP, &adev->uvd.inst[j].irq); adev 426 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = amdgpu_uvd_sw_init(adev); adev 430 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 432 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c hdr = (const struct common_firmware_header *)adev->uvd.fw->data; adev 433 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_UVD].ucode_id = AMDGPU_UCODE_ID_UVD; adev 434 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_UVD].fw = adev->uvd.fw; adev 435 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->firmware.fw_size += adev 438 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.num_uvd_inst == UVD7_MAX_HW_INSTANCES_VEGA20) { adev 439 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_UVD1].ucode_id = AMDGPU_UCODE_ID_UVD1; adev 440 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_UVD1].fw = adev->uvd.fw; adev 441 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->firmware.fw_size += adev 447 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (j = 0; j < adev->uvd.num_uvd_inst; j++) { adev 448 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config & (1 << j)) adev 450 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (!amdgpu_sriov_vf(adev)) { adev 451 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c ring = &adev->uvd.inst[j].ring; adev 453 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.inst[j].irq, 0); adev 458 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->uvd.num_enc_rings; ++i) { adev 459 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c ring = &adev->uvd.inst[j].ring_enc[i]; adev 461 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (amdgpu_sriov_vf(adev)) { adev 468 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c ring->doorbell_index = adev->doorbell_index.uvd_vce.uvd_ring0_1 * 2; adev 470 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c ring->doorbell_index = adev->doorbell_index.uvd_vce.uvd_ring2_3 * 2 + 1; adev 472 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.inst[j].irq, 0); adev 478 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = amdgpu_uvd_resume(adev); adev 482 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = amdgpu_uvd_entity_init(adev); adev 486 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = amdgpu_virt_alloc_mm_table(adev); adev 496 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 498 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c amdgpu_virt_free_mm_table(adev); adev 500 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = amdgpu_uvd_suspend(adev); adev 504 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (j = 0; j < adev->uvd.num_uvd_inst; ++j) { adev 505 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config & (1 << j)) adev 507 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->uvd.num_enc_rings; ++i) adev 508 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]); adev 510 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c return amdgpu_uvd_sw_fini(adev); adev 522 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 527 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (amdgpu_sriov_vf(adev)) adev 528 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = uvd_v7_0_sriov_start(adev); adev 530 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = uvd_v7_0_start(adev); adev 534 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (j = 0; j < adev->uvd.num_uvd_inst; ++j) { adev 535 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config & (1 << j)) adev 537 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c ring = &adev->uvd.inst[j].ring; adev 539 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (!amdgpu_sriov_vf(adev)) { adev 577 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->uvd.num_enc_rings; ++i) { adev 578 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c ring = &adev->uvd.inst[j].ring_enc[i]; adev 600 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 603 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (!amdgpu_sriov_vf(adev)) adev 604 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c uvd_v7_0_stop(adev); adev 610 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->uvd.num_uvd_inst; ++i) { adev 611 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config & (1 << i)) adev 613 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.inst[i].ring.sched.ready = false; adev 622 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 624 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = uvd_v7_0_hw_fini(adev); adev 628 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c return amdgpu_uvd_suspend(adev); adev 634 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 636 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c r = amdgpu_uvd_resume(adev); adev 640 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c return uvd_v7_0_hw_init(adev); adev 650 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static void uvd_v7_0_mc_resume(struct amdgpu_device *adev) adev 652 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c uint32_t size = AMDGPU_UVD_FIRMWARE_SIZE(adev); adev 656 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->uvd.num_uvd_inst; ++i) { adev 657 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config & (1 << i)) adev 659 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 662 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_UVD].tmr_mc_addr_lo: adev 663 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_UVD1].tmr_mc_addr_lo); adev 666 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_UVD].tmr_mc_addr_hi: adev 667 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_UVD1].tmr_mc_addr_hi); adev 672 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c lower_32_bits(adev->uvd.inst[i].gpu_addr)); adev 674 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c upper_32_bits(adev->uvd.inst[i].gpu_addr)); adev 683 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c lower_32_bits(adev->uvd.inst[i].gpu_addr + offset)); adev 685 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c upper_32_bits(adev->uvd.inst[i].gpu_addr + offset)); adev 690 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c lower_32_bits(adev->uvd.inst[i].gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE)); adev 692 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c upper_32_bits(adev->uvd.inst[i].gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE)); adev 698 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->gfx.config.gb_addr_config); adev 700 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->gfx.config.gb_addr_config); adev 702 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->gfx.config.gb_addr_config); adev 704 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_GP_SCRATCH4, adev->uvd.max_handles); adev 708 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static int uvd_v7_0_mmsch_start(struct amdgpu_device *adev, adev 735 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->uvd.num_uvd_inst; ++i) { adev 736 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config & (1 << i)) adev 738 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WDOORBELL32(adev->uvd.inst[i].ring_enc[0].doorbell_index, 0); adev 739 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->wb.wb[adev->uvd.inst[i].ring_enc[0].wptr_offs] = 0; adev 740 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.inst[i].ring_enc[0].wptr = 0; adev 741 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.inst[i].ring_enc[0].wptr_old = 0; adev 757 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c dev_err(adev->dev, "failed to init MMSCH, mmVCE_MMSCH_VF_MAILBOX_RESP = %x\n", data); adev 764 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static int uvd_v7_0_sriov_start(struct amdgpu_device *adev) adev 773 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c uint32_t *init_table = adev->virt.mm_table.cpu_addr; adev 793 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->uvd.num_uvd_inst; ++i) { adev 794 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config & (1 << i)) adev 796 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c ring = &adev->uvd.inst[i].ring; adev 798 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c size = AMDGPU_GPU_PAGE_ALIGN(adev->uvd.fw->size + 4); adev 803 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 806 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_UVD].tmr_mc_addr_lo); adev 809 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_UVD].tmr_mc_addr_hi); adev 814 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c lower_32_bits(adev->uvd.inst[i].gpu_addr)); adev 816 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c upper_32_bits(adev->uvd.inst[i].gpu_addr)); adev 826 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c lower_32_bits(adev->uvd.inst[i].gpu_addr + offset)); adev 828 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c upper_32_bits(adev->uvd.inst[i].gpu_addr + offset)); adev 833 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c lower_32_bits(adev->uvd.inst[i].gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE)); adev 835 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c upper_32_bits(adev->uvd.inst[i].gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE)); adev 840 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_GP_SCRATCH4), adev->uvd.max_handles); adev 899 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c ring = &adev->uvd.inst[i].ring_enc[0]; adev 920 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c return uvd_v7_0_mmsch_start(adev, &adev->virt.mm_table); adev 930 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static int uvd_v7_0_start(struct amdgpu_device *adev) adev 938 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (k = 0; k < adev->uvd.num_uvd_inst; ++k) { adev 939 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config & (1 << k)) adev 950 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c uvd_v7_0_mc_resume(adev); adev 952 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (k = 0; k < adev->uvd.num_uvd_inst; ++k) { adev 953 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config & (1 << k)) adev 955 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c ring = &adev->uvd.inst[k].ring; adev 1093 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c ring = &adev->uvd.inst[k].ring_enc[0]; adev 1100 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c ring = &adev->uvd.inst[k].ring_enc[1]; adev 1117 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static void uvd_v7_0_stop(struct amdgpu_device *adev) adev 1121 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->uvd.num_uvd_inst; ++i) { adev 1122 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config & (1 << i)) adev 1158 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = ring->adev; adev 1226 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = ring->adev; adev 1240 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 1247 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (i >= adev->usec_timeout) adev 1274 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c reg -= p->adev->reg_offset[UVD_HWIP][0][1]; adev 1275 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c reg += p->adev->reg_offset[UVD_HWIP][1][1]; adev 1295 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = ring->adev; adev 1338 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = ring->adev; adev 1354 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = ring->adev; adev 1373 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub]; adev 1387 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = ring->adev; adev 1416 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub]; adev 1436 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1444 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1446 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 1456 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1468 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.inst[ring->me].srbm_soft_reset = srbm_soft_reset; adev 1471 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.inst[ring->me].srbm_soft_reset = 0; adev 1478 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1480 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (!adev->uvd.inst[ring->me].srbm_soft_reset) adev 1483 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c uvd_v7_0_stop(adev); adev 1489 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1492 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (!adev->uvd.inst[ring->me].srbm_soft_reset) adev 1494 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c srbm_soft_reset = adev->uvd.inst[ring->me].srbm_soft_reset; adev 1501 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 1520 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1522 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (!adev->uvd.inst[ring->me].srbm_soft_reset) adev 1527 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c return uvd_v7_0_start(adev); adev 1531 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static int uvd_v7_0_set_interrupt_state(struct amdgpu_device *adev, adev 1540 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static int uvd_v7_0_process_interrupt(struct amdgpu_device *adev, adev 1562 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c amdgpu_fence_process(&adev->uvd.inst[ip_instance].ring); adev 1565 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c amdgpu_fence_process(&adev->uvd.inst[ip_instance].ring_enc[0]); adev 1568 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (!amdgpu_sriov_vf(adev)) adev 1569 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c amdgpu_fence_process(&adev->uvd.inst[ip_instance].ring_enc[1]); adev 1581 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static void uvd_v7_0_set_sw_clock_gating(struct amdgpu_device *adev) adev 1637 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static void uvd_v7_0_set_hw_clock_gating(struct amdgpu_device *adev) adev 1678 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static void uvd_v7_0_set_bypass_mode(struct amdgpu_device *adev, bool enable) adev 1696 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1699 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c uvd_v7_0_set_bypass_mode(adev, enable); adev 1701 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (!(adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG)) adev 1706 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c uvd_v7_0_set_sw_clock_gating(adev); adev 1729 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1731 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (!(adev->pg_flags & AMD_PG_SUPPORT_UVD)) adev 1737 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c uvd_v7_0_stop(adev); adev 1740 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c return uvd_v7_0_start(adev); adev 1837 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static void uvd_v7_0_set_ring_funcs(struct amdgpu_device *adev) adev 1841 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->uvd.num_uvd_inst; i++) { adev 1842 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config & (1 << i)) adev 1844 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.inst[i].ring.funcs = &uvd_v7_0_ring_vm_funcs; adev 1845 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.inst[i].ring.me = i; adev 1850 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static void uvd_v7_0_set_enc_ring_funcs(struct amdgpu_device *adev) adev 1854 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (j = 0; j < adev->uvd.num_uvd_inst; j++) { adev 1855 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config & (1 << j)) adev 1857 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->uvd.num_enc_rings; ++i) { adev 1858 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.inst[j].ring_enc[i].funcs = &uvd_v7_0_enc_ring_vm_funcs; adev 1859 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.inst[j].ring_enc[i].me = j; adev 1871 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c static void uvd_v7_0_set_irq_funcs(struct amdgpu_device *adev) adev 1875 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c for (i = 0; i < adev->uvd.num_uvd_inst; i++) { adev 1876 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c if (adev->uvd.harvest_config & (1 << i)) adev 1878 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.inst[i].irq.num_types = adev->uvd.num_enc_rings + 1; adev 1879 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c adev->uvd.inst[i].irq.funcs = &uvd_v7_0_irq_funcs; adev 45 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev); adev 46 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static void vce_v2_0_set_irq_funcs(struct amdgpu_device *adev); adev 57 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c struct amdgpu_device *adev = ring->adev; adev 74 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c struct amdgpu_device *adev = ring->adev; adev 91 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c struct amdgpu_device *adev = ring->adev; adev 99 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static int vce_v2_0_lmi_clean(struct amdgpu_device *adev) adev 116 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static int vce_v2_0_firmware_loaded(struct amdgpu_device *adev) adev 142 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static void vce_v2_0_disable_cg(struct amdgpu_device *adev) adev 147 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static void vce_v2_0_init_cg(struct amdgpu_device *adev) adev 168 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static void vce_v2_0_mc_resume(struct amdgpu_device *adev) adev 183 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8)); adev 206 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 213 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 216 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 230 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static int vce_v2_0_start(struct amdgpu_device *adev) adev 238 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c vce_v2_0_init_cg(adev); adev 239 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c vce_v2_0_disable_cg(adev); adev 241 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c vce_v2_0_mc_resume(adev); adev 243 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c ring = &adev->vce.ring[0]; adev 250 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c ring = &adev->vce.ring[1]; adev 262 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c r = vce_v2_0_firmware_loaded(adev); adev 275 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static int vce_v2_0_stop(struct amdgpu_device *adev) adev 280 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c if (vce_v2_0_lmi_clean(adev)) { adev 285 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c if (vce_v2_0_wait_for_idle(adev)) { adev 310 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static void vce_v2_0_set_sw_cg(struct amdgpu_device *adev, bool gated) adev 345 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static void vce_v2_0_set_dyn_cg(struct amdgpu_device *adev, bool gated) adev 383 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static void vce_v2_0_enable_mgcg(struct amdgpu_device *adev, bool enable, adev 386 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG)) { adev 388 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c vce_v2_0_set_sw_cg(adev, true); adev 390 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c vce_v2_0_set_dyn_cg(adev, true); adev 392 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c vce_v2_0_disable_cg(adev); adev 395 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c vce_v2_0_set_sw_cg(adev, false); adev 397 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c vce_v2_0_set_dyn_cg(adev, false); adev 403 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 405 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c adev->vce.num_rings = 2; adev 407 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c vce_v2_0_set_ring_funcs(adev); adev 408 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c vce_v2_0_set_irq_funcs(adev); adev 417 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 420 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 167, &adev->vce.irq); adev 424 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c r = amdgpu_vce_sw_init(adev, VCE_V2_0_FW_SIZE + adev 429 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c r = amdgpu_vce_resume(adev); adev 433 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c for (i = 0; i < adev->vce.num_rings; i++) { adev 434 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c ring = &adev->vce.ring[i]; adev 436 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c r = amdgpu_ring_init(adev, ring, 512, adev 437 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c &adev->vce.irq, 0); adev 442 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c r = amdgpu_vce_entity_init(adev); adev 450 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 452 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c r = amdgpu_vce_suspend(adev); adev 456 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c return amdgpu_vce_sw_fini(adev); adev 462 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 464 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c amdgpu_asic_set_vce_clocks(adev, 10000, 10000); adev 465 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c vce_v2_0_enable_mgcg(adev, true, false); adev 467 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c for (i = 0; i < adev->vce.num_rings; i++) { adev 468 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c r = amdgpu_ring_test_helper(&adev->vce.ring[i]); adev 486 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 488 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c r = vce_v2_0_hw_fini(adev); adev 492 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c return amdgpu_vce_suspend(adev); adev 498 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 500 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c r = amdgpu_vce_resume(adev); adev 504 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c return vce_v2_0_hw_init(adev); adev 509 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 514 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c return vce_v2_0_start(adev); adev 517 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static int vce_v2_0_set_interrupt_state(struct amdgpu_device *adev, adev 531 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static int vce_v2_0_process_interrupt(struct amdgpu_device *adev, adev 539 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c amdgpu_fence_process(&adev->vce.ring[entry->src_data[0]]); adev 556 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 563 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c vce_v2_0_enable_mgcg(adev, gate, sw_cg); adev 578 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 581 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c return vce_v2_0_stop(adev); adev 583 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c return vce_v2_0_start(adev); adev 625 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev) adev 629 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c for (i = 0; i < adev->vce.num_rings; i++) { adev 630 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c adev->vce.ring[i].funcs = &vce_v2_0_ring_funcs; adev 631 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c adev->vce.ring[i].me = i; adev 640 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c static void vce_v2_0_set_irq_funcs(struct amdgpu_device *adev) adev 642 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c adev->vce.irq.num_types = 1; adev 643 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c adev->vce.irq.funcs = &vce_v2_0_irq_funcs; adev 64 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c static void vce_v3_0_mc_resume(struct amdgpu_device *adev, int idx); adev 65 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c static void vce_v3_0_set_ring_funcs(struct amdgpu_device *adev); adev 66 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c static void vce_v3_0_set_irq_funcs(struct amdgpu_device *adev); adev 79 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = ring->adev; adev 82 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_lock(&adev->grbm_idx_mutex); adev 83 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->vce.harvest_config == 0 || adev 84 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) adev 86 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) adev 97 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 111 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = ring->adev; adev 114 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_lock(&adev->grbm_idx_mutex); adev 115 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->vce.harvest_config == 0 || adev 116 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) adev 118 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) adev 129 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 143 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = ring->adev; adev 145 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_lock(&adev->grbm_idx_mutex); adev 146 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->vce.harvest_config == 0 || adev 147 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) adev 149 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) adev 160 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 163 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c static void vce_v3_0_override_vce_clock_gating(struct amdgpu_device *adev, bool override) adev 168 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c static void vce_v3_0_set_vce_sw_clock_gating(struct amdgpu_device *adev, adev 174 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c vce_v3_0_override_vce_clock_gating(adev, true); adev 232 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c vce_v3_0_override_vce_clock_gating(adev, false); adev 235 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c static int vce_v3_0_firmware_loaded(struct amdgpu_device *adev) adev 265 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c static int vce_v3_0_start(struct amdgpu_device *adev) adev 270 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_lock(&adev->grbm_idx_mutex); adev 272 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->vce.harvest_config & (1 << idx)) adev 279 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (idx != 1 || adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) { adev 280 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c ring = &adev->vce.ring[0]; adev 287 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c ring = &adev->vce.ring[1]; adev 294 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c ring = &adev->vce.ring[2]; adev 302 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c vce_v3_0_mc_resume(adev, idx); adev 305 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->asic_type >= CHIP_STONEY) adev 313 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c r = vce_v3_0_firmware_loaded(adev); adev 320 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 326 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 331 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c static int vce_v3_0_stop(struct amdgpu_device *adev) adev 335 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_lock(&adev->grbm_idx_mutex); adev 337 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->vce.harvest_config & (1 << idx)) adev 342 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->asic_type >= CHIP_STONEY) adev 355 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 364 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c static unsigned vce_v3_0_get_harvest_config(struct amdgpu_device *adev) adev 368 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if ((adev->asic_type == CHIP_FIJI) || adev 369 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c (adev->asic_type == CHIP_STONEY)) adev 372 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->flags & AMD_IS_APU) adev 389 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if ((adev->asic_type == CHIP_POLARIS10) || adev 390 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c (adev->asic_type == CHIP_POLARIS11) || adev 391 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c (adev->asic_type == CHIP_POLARIS12) || adev 392 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c (adev->asic_type == CHIP_VEGAM)) adev 401 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 403 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.harvest_config = vce_v3_0_get_harvest_config(adev); adev 405 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if ((adev->vce.harvest_config & adev 410 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.num_rings = 3; adev 412 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c vce_v3_0_set_ring_funcs(adev); adev 413 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c vce_v3_0_set_irq_funcs(adev); adev 420 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 425 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_VCE_TRAP, &adev->vce.irq); adev 429 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c r = amdgpu_vce_sw_init(adev, VCE_V3_0_FW_SIZE + adev 435 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->vce.fw_version < FW_52_8_3) adev 436 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.num_rings = 2; adev 438 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c r = amdgpu_vce_resume(adev); adev 442 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c for (i = 0; i < adev->vce.num_rings; i++) { adev 443 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c ring = &adev->vce.ring[i]; adev 445 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0); adev 450 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c r = amdgpu_vce_entity_init(adev); adev 458 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 460 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c r = amdgpu_vce_suspend(adev); adev 464 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c return amdgpu_vce_sw_fini(adev); adev 470 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 472 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c vce_v3_0_override_vce_clock_gating(adev, true); adev 474 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c amdgpu_asic_set_vce_clocks(adev, 10000, 10000); adev 476 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c for (i = 0; i < adev->vce.num_rings; i++) { adev 477 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c r = amdgpu_ring_test_helper(&adev->vce.ring[i]); adev 490 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 496 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c vce_v3_0_stop(adev); adev 497 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c return vce_v3_0_set_clockgating_state(adev, AMD_CG_STATE_GATE); adev 503 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 505 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c r = vce_v3_0_hw_fini(adev); adev 509 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c return amdgpu_vce_suspend(adev); adev 515 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 517 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c r = amdgpu_vce_resume(adev); adev 521 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c return vce_v3_0_hw_init(adev); adev 524 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c static void vce_v3_0_mc_resume(struct amdgpu_device *adev, int idx) adev 540 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->asic_type >= CHIP_STONEY) { adev 541 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR0, (adev->vce.gpu_addr >> 8)); adev 542 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR1, (adev->vce.gpu_addr >> 8)); adev 543 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR2, (adev->vce.gpu_addr >> 8)); adev 545 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8)); adev 577 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 580 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE0) ? 0 : SRBM_STATUS2__VCE0_BUSY_MASK; adev 581 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE1) ? 0 : SRBM_STATUS2__VCE1_BUSY_MASK; adev 589 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 591 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c for (i = 0; i < adev->usec_timeout; i++) adev 606 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 622 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_lock(&adev->grbm_idx_mutex); adev 634 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 637 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.srbm_soft_reset = srbm_soft_reset; adev 640 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.srbm_soft_reset = 0; adev 647 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 650 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (!adev->vce.srbm_soft_reset) adev 652 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c srbm_soft_reset = adev->vce.srbm_soft_reset; adev 659 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 678 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 680 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (!adev->vce.srbm_soft_reset) adev 685 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c return vce_v3_0_suspend(adev); adev 691 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 693 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (!adev->vce.srbm_soft_reset) adev 698 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c return vce_v3_0_resume(adev); adev 701 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c static int vce_v3_0_set_interrupt_state(struct amdgpu_device *adev, adev 715 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c static int vce_v3_0_process_interrupt(struct amdgpu_device *adev, adev 727 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c amdgpu_fence_process(&adev->vce.ring[entry->src_data[0]]); adev 741 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 745 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (!(adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG)) adev 748 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_lock(&adev->grbm_idx_mutex); adev 751 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->vce.harvest_config & (1 << i)) adev 770 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c vce_v3_0_set_vce_sw_clock_gating(adev, enable); adev 774 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 789 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 793 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c ret = vce_v3_0_stop(adev); adev 797 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c ret = vce_v3_0_start(adev); adev 808 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 811 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_lock(&adev->pm.mutex); adev 813 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->flags & AMD_IS_APU) adev 831 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c mutex_unlock(&adev->pm.mutex); adev 943 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c static void vce_v3_0_set_ring_funcs(struct amdgpu_device *adev) adev 947 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c if (adev->asic_type >= CHIP_STONEY) { adev 948 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c for (i = 0; i < adev->vce.num_rings; i++) { adev 949 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.ring[i].funcs = &vce_v3_0_ring_vm_funcs; adev 950 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.ring[i].me = i; adev 954 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c for (i = 0; i < adev->vce.num_rings; i++) { adev 955 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.ring[i].funcs = &vce_v3_0_ring_phys_funcs; adev 956 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.ring[i].me = i; adev 967 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c static void vce_v3_0_set_irq_funcs(struct amdgpu_device *adev) adev 969 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.irq.num_types = 1; adev 970 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c adev->vce.irq.funcs = &vce_v3_0_irq_funcs; adev 50 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static void vce_v4_0_mc_resume(struct amdgpu_device *adev); adev 51 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static void vce_v4_0_set_ring_funcs(struct amdgpu_device *adev); adev 52 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static void vce_v4_0_set_irq_funcs(struct amdgpu_device *adev); adev 63 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = ring->adev; adev 82 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = ring->adev; adev 85 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c return adev->wb.wb[ring->wptr_offs]; adev 104 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = ring->adev; adev 108 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); adev 124 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static int vce_v4_0_firmware_loaded(struct amdgpu_device *adev) adev 152 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static int vce_v4_0_mmsch_start(struct amdgpu_device *adev, adev 178 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c WDOORBELL32(adev->vce.ring[0].doorbell_index, 0); adev 179 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->wb.wb[adev->vce.ring[0].wptr_offs] = 0; adev 180 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.ring[0].wptr = 0; adev 181 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.ring[0].wptr_old = 0; adev 197 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c dev_err(adev->dev, "failed to init MMSCH, mmVCE_MMSCH_VF_MAILBOX_RESP = %x\n", data); adev 204 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static int vce_v4_0_sriov_start(struct amdgpu_device *adev) adev 213 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c uint32_t *init_table = adev->virt.mm_table.cpu_addr; adev 232 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c ring = &adev->vce.ring[0]; adev 248 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 249 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c uint32_t low = adev->firmware.ucode[AMDGPU_UCODE_ID_VCE].tmr_mc_addr_lo; adev 250 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c uint32_t hi = adev->firmware.ucode[AMDGPU_UCODE_ID_VCE].tmr_mc_addr_hi; adev 262 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.gpu_addr >> 8); adev 265 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c (adev->vce.gpu_addr >> 40) & 0xff); adev 272 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.gpu_addr >> 8); adev 275 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c (adev->vce.gpu_addr >> 40) & 0xff); adev 278 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.gpu_addr >> 8); adev 281 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c (adev->vce.gpu_addr >> 40) & 0xff); adev 286 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c offset = (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) ? offset + size : 0; adev 325 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c return vce_v4_0_mmsch_start(adev, &adev->virt.mm_table); adev 335 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static int vce_v4_0_start(struct amdgpu_device *adev) adev 340 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c ring = &adev->vce.ring[0]; adev 348 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c ring = &adev->vce.ring[1]; adev 356 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c ring = &adev->vce.ring[2]; adev 364 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c vce_v4_0_mc_resume(adev); adev 374 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = vce_v4_0_firmware_loaded(adev); adev 387 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static int vce_v4_0_stop(struct amdgpu_device *adev) adev 411 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 413 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (amdgpu_sriov_vf(adev)) /* currently only VCN0 support SRIOV */ adev 414 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.num_rings = 1; adev 416 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.num_rings = 3; adev 418 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c vce_v4_0_set_ring_funcs(adev); adev 419 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c vce_v4_0_set_irq_funcs(adev); adev 426 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 432 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCE0, 167, &adev->vce.irq); adev 437 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) adev 440 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = amdgpu_vce_sw_init(adev, size); adev 444 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 446 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c unsigned size = amdgpu_bo_size(adev->vce.vcpu_bo); adev 448 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.saved_bo = kvmalloc(size, GFP_KERNEL); adev 449 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (!adev->vce.saved_bo) adev 452 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c hdr = (const struct common_firmware_header *)adev->vce.fw->data; adev 453 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_VCE].ucode_id = AMDGPU_UCODE_ID_VCE; adev 454 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_VCE].fw = adev->vce.fw; adev 455 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->firmware.fw_size += adev 459 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = amdgpu_vce_resume(adev); adev 464 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c for (i = 0; i < adev->vce.num_rings; i++) { adev 465 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c ring = &adev->vce.ring[i]; adev 467 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (amdgpu_sriov_vf(adev)) { adev 475 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring0_1 * 2; adev 477 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c ring->doorbell_index = adev->doorbell_index.uvd_vce.vce_ring2_3 * 2 + 1; adev 479 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0); adev 485 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = amdgpu_vce_entity_init(adev); adev 489 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = amdgpu_virt_alloc_mm_table(adev); adev 499 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 502 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c amdgpu_virt_free_mm_table(adev); adev 504 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 505 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c kvfree(adev->vce.saved_bo); adev 506 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.saved_bo = NULL; adev 509 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = amdgpu_vce_suspend(adev); adev 513 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c return amdgpu_vce_sw_fini(adev); adev 519 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 521 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (amdgpu_sriov_vf(adev)) adev 522 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = vce_v4_0_sriov_start(adev); adev 524 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = vce_v4_0_start(adev); adev 528 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c for (i = 0; i < adev->vce.num_rings; i++) { adev 529 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = amdgpu_ring_test_helper(&adev->vce.ring[i]); adev 541 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 544 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (!amdgpu_sriov_vf(adev)) { adev 546 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c vce_v4_0_stop(adev); adev 552 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c for (i = 0; i < adev->vce.num_rings; i++) adev 553 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.ring[i].sched.ready = false; adev 560 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 563 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (adev->vce.vcpu_bo == NULL) adev 566 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 567 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c unsigned size = amdgpu_bo_size(adev->vce.vcpu_bo); adev 568 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c void *ptr = adev->vce.cpu_addr; adev 570 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c memcpy_fromio(adev->vce.saved_bo, ptr, size); adev 573 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = vce_v4_0_hw_fini(adev); adev 577 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c return amdgpu_vce_suspend(adev); adev 582 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 585 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (adev->vce.vcpu_bo == NULL) adev 588 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 589 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c unsigned size = amdgpu_bo_size(adev->vce.vcpu_bo); adev 590 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c void *ptr = adev->vce.cpu_addr; adev 592 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c memcpy_toio(ptr, adev->vce.saved_bo, size); adev 594 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c r = amdgpu_vce_resume(adev); adev 599 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c return vce_v4_0_hw_init(adev); adev 602 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static void vce_v4_0_mc_resume(struct amdgpu_device *adev) adev 620 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 621 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c tmr_mc_addr = (uint64_t)(adev->firmware.ucode[AMDGPU_UCODE_ID_VCE].tmr_mc_addr_hi) << 32 | adev 622 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_VCE].tmr_mc_addr_lo; adev 630 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c (adev->vce.gpu_addr >> 8)); adev 632 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c (adev->vce.gpu_addr >> 40) & 0xff); adev 639 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR1), (adev->vce.gpu_addr >> 8)); adev 640 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_64BIT_BAR1), (adev->vce.gpu_addr >> 40) & 0xff); adev 641 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c offset = (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) ? offset + size : 0; adev 646 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR2), (adev->vce.gpu_addr >> 8)); adev 647 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_64BIT_BAR2), (adev->vce.gpu_addr >> 40) & 0xff); adev 669 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 672 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE0) ? 0 : SRBM_STATUS2__VCE0_BUSY_MASK; adev 673 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE1) ? 0 : SRBM_STATUS2__VCE1_BUSY_MASK; adev 681 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 683 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c for (i = 0; i < adev->usec_timeout; i++) adev 698 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 714 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c mutex_lock(&adev->grbm_idx_mutex); adev 726 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 729 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.srbm_soft_reset = srbm_soft_reset; adev 732 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.srbm_soft_reset = 0; adev 739 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 742 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (!adev->vce.srbm_soft_reset) adev 744 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c srbm_soft_reset = adev->vce.srbm_soft_reset; adev 751 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); adev 770 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 772 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (!adev->vce.srbm_soft_reset) adev 777 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c return vce_v4_0_suspend(adev); adev 783 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 785 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (!adev->vce.srbm_soft_reset) adev 790 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c return vce_v4_0_resume(adev); adev 793 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static void vce_v4_0_override_vce_clock_gating(struct amdgpu_device *adev, bool override) adev 807 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static void vce_v4_0_set_vce_sw_clock_gating(struct amdgpu_device *adev, adev 813 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c vce_v4_0_override_vce_clock_gating(adev, true); adev 871 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c vce_v4_0_override_vce_clock_gating(adev, false); adev 874 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static void vce_v4_0_set_bypass_mode(struct amdgpu_device *adev, bool enable) adev 889 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 893 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if ((adev->asic_type == CHIP_POLARIS10) || adev 894 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c (adev->asic_type == CHIP_TONGA) || adev 895 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c (adev->asic_type == CHIP_FIJI)) adev 896 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c vce_v4_0_set_bypass_mode(adev, enable); adev 898 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (!(adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG)) adev 901 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c mutex_lock(&adev->grbm_idx_mutex); adev 904 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (adev->vce.harvest_config & (1 << i)) adev 923 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c vce_v4_0_set_vce_sw_clock_gating(adev, enable); adev 927 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c mutex_unlock(&adev->grbm_idx_mutex); adev 943 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 946 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c return vce_v4_0_stop(adev); adev 948 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c return vce_v4_0_start(adev); adev 992 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub]; adev 1009 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static int vce_v4_0_set_interrupt_state(struct amdgpu_device *adev, adev 1016 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c if (!amdgpu_sriov_vf(adev)) { adev 1026 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static int vce_v4_0_process_interrupt(struct amdgpu_device *adev, adev 1036 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c amdgpu_fence_process(&adev->vce.ring[entry->src_data[0]]); adev 1100 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static void vce_v4_0_set_ring_funcs(struct amdgpu_device *adev) adev 1104 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c for (i = 0; i < adev->vce.num_rings; i++) { adev 1105 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.ring[i].funcs = &vce_v4_0_ring_vm_funcs; adev 1106 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.ring[i].me = i; adev 1116 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c static void vce_v4_0_set_irq_funcs(struct amdgpu_device *adev) adev 1118 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.irq.num_types = 1; adev 1119 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c adev->vce.irq.funcs = &vce_v4_0_irq_funcs; adev 45 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static int vcn_v1_0_stop(struct amdgpu_device *adev); adev 46 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev); adev 47 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev); adev 48 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_v1_0_set_jpeg_ring_funcs(struct amdgpu_device *adev); adev 49 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev); adev 52 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev, adev 64 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 66 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.num_vcn_inst = 1; adev 67 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.num_enc_rings = 2; adev 69 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_set_dec_ring_funcs(adev); adev 70 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_set_enc_ring_funcs(adev); adev 71 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_set_jpeg_ring_funcs(adev); adev 72 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_set_irq_funcs(adev); adev 88 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 91 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, adev 92 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c VCN_1_0__SRCID__UVD_SYSTEM_MESSAGE_INTERRUPT, &adev->vcn.inst->irq); adev 97 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) { adev 98 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, i + VCN_1_0__SRCID__UVD_ENC_GENERAL_PURPOSE, adev 99 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c &adev->vcn.inst->irq); adev 105 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, 126, &adev->vcn.inst->irq); adev 109 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = amdgpu_vcn_sw_init(adev); adev 113 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 115 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c hdr = (const struct common_firmware_header *)adev->vcn.fw->data; adev 116 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].ucode_id = AMDGPU_UCODE_ID_VCN; adev 117 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].fw = adev->vcn.fw; adev 118 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->firmware.fw_size += adev 123 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = amdgpu_vcn_resume(adev); adev 127 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ring = &adev->vcn.inst->ring_dec; adev 129 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst->irq, 0); adev 133 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.internal.scratch9 = adev->vcn.inst->external.scratch9 = adev 135 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.internal.data0 = adev->vcn.inst->external.data0 = adev 137 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.internal.data1 = adev->vcn.inst->external.data1 = adev 139 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.internal.cmd = adev->vcn.inst->external.cmd = adev 141 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.internal.nop = adev->vcn.inst->external.nop = adev 144 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) { adev 145 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ring = &adev->vcn.inst->ring_enc[i]; adev 147 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst->irq, 0); adev 152 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ring = &adev->vcn.inst->ring_jpeg; adev 154 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst->irq, 0); adev 158 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.pause_dpg_mode = vcn_v1_0_pause_dpg_mode; adev 159 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.internal.jpeg_pitch = adev->vcn.inst->external.jpeg_pitch = adev 175 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 177 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = amdgpu_vcn_suspend(adev); adev 181 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = amdgpu_vcn_sw_fini(adev); adev 195 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 196 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec; adev 203 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) { adev 204 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ring = &adev->vcn.inst->ring_enc[i]; adev 211 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ring = &adev->vcn.inst->ring_jpeg; adev 219 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode"); adev 233 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 234 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec; adev 236 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) || adev 238 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_set_powergating_state(adev, AMD_PG_STATE_GATE); adev 255 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 257 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = vcn_v1_0_hw_fini(adev); adev 261 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = amdgpu_vcn_suspend(adev); adev 276 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 278 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = amdgpu_vcn_resume(adev); adev 282 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = vcn_v1_0_hw_init(adev); adev 294 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_v1_0_mc_resume_spg_mode(struct amdgpu_device *adev) adev 296 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c uint32_t size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw->size + 4); adev 300 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 302 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].tmr_mc_addr_lo)); adev 304 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].tmr_mc_addr_hi)); adev 309 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c lower_32_bits(adev->vcn.inst->gpu_addr)); adev 311 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c upper_32_bits(adev->vcn.inst->gpu_addr)); adev 321 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c lower_32_bits(adev->vcn.inst->gpu_addr + offset)); adev 323 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c upper_32_bits(adev->vcn.inst->gpu_addr + offset)); adev 329 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c lower_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE)); adev 331 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c upper_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE)); adev 336 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config); adev 338 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config); adev 340 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config); adev 342 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config); adev 344 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config); adev 346 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config); adev 348 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config); adev 350 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config); adev 352 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config); adev 354 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config); adev 356 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config); adev 358 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config); adev 361 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_v1_0_mc_resume_dpg_mode(struct amdgpu_device *adev) adev 363 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c uint32_t size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw->size + 4); adev 367 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 369 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].tmr_mc_addr_lo), adev 372 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].tmr_mc_addr_hi), adev 379 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c lower_32_bits(adev->vcn.inst->gpu_addr), 0xFFFFFFFF, 0); adev 381 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c upper_32_bits(adev->vcn.inst->gpu_addr), 0xFFFFFFFF, 0); adev 391 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c lower_32_bits(adev->vcn.inst->gpu_addr + offset), 0xFFFFFFFF, 0); adev 393 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c upper_32_bits(adev->vcn.inst->gpu_addr + offset), 0xFFFFFFFF, 0); adev 401 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c lower_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE), adev 404 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c upper_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE), adev 412 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0); adev 414 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0); adev 416 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0); adev 418 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0); adev 420 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0); adev 422 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0); adev 424 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0); adev 426 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0); adev 428 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0); adev 430 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0); adev 441 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_v1_0_disable_clock_gating(struct amdgpu_device *adev) adev 448 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG) adev 463 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG) adev 568 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_v1_0_enable_clock_gating(struct amdgpu_device *adev) adev 574 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG) adev 588 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG) adev 633 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_v1_0_clock_gating_dpg_mode(struct amdgpu_device *adev, uint8_t sram_sel) adev 638 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG) adev 649 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG) adev 687 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_1_0_disable_static_power_gating(struct amdgpu_device *adev) adev 692 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->pg_flags & AMD_PG_SUPPORT_VCN) { adev 727 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->pg_flags & AMD_PG_SUPPORT_VCN) adev 733 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_1_0_enable_static_power_gating(struct amdgpu_device *adev) adev 738 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->pg_flags & AMD_PG_SUPPORT_VCN) { adev 782 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static int vcn_v1_0_start_spg_mode(struct amdgpu_device *adev) adev 784 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec; adev 792 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_1_0_disable_static_power_gating(adev); adev 798 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_disable_clock_gating(adev); adev 840 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_mc_resume_spg_mode(adev); adev 937 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ring = &adev->vcn.inst->ring_enc[0]; adev 944 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ring = &adev->vcn.inst->ring_enc[1]; adev 951 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ring = &adev->vcn.inst->ring_jpeg; adev 971 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static int vcn_v1_0_start_dpg_mode(struct amdgpu_device *adev) adev 973 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec; adev 980 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_1_0_enable_static_power_gating(adev); adev 989 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_clock_gating_dpg_mode(adev, 0); adev 1038 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_mc_resume_dpg_mode(adev); adev 1055 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_clock_gating_dpg_mode(adev, 1); adev 1067 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c tmp = adev->gfx.config.gb_addr_config; adev 1111 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ring = &adev->vcn.inst->ring_jpeg; adev 1121 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static int vcn_v1_0_start(struct amdgpu_device *adev) adev 1125 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) adev 1126 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = vcn_v1_0_start_dpg_mode(adev); adev 1128 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = vcn_v1_0_start_spg_mode(adev); adev 1139 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static int vcn_v1_0_stop_spg_mode(struct amdgpu_device *adev) adev 1175 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_enable_clock_gating(adev); adev 1176 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_1_0_enable_static_power_gating(adev); adev 1180 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static int vcn_v1_0_stop_dpg_mode(struct amdgpu_device *adev) adev 1214 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static int vcn_v1_0_stop(struct amdgpu_device *adev) adev 1218 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) adev 1219 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = vcn_v1_0_stop_dpg_mode(adev); adev 1221 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c r = vcn_v1_0_stop_spg_mode(adev); adev 1226 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev, adev 1235 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->vcn.pause_state.fw_based != new_state->fw_based) { adev 1237 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.pause_state.fw_based, adev->vcn.pause_state.jpeg, adev 1260 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ring = &adev->vcn.inst->ring_enc[0]; adev 1267 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ring = &adev->vcn.inst->ring_enc[1]; adev 1274 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ring = &adev->vcn.inst->ring_dec; adev 1286 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.pause_state.fw_based = new_state->fw_based; adev 1290 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->vcn.pause_state.jpeg != new_state->jpeg) { adev 1292 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.pause_state.fw_based, adev->vcn.pause_state.jpeg, adev 1320 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ring = &adev->vcn.inst->ring_jpeg; adev 1334 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ring = &adev->vcn.inst->ring_dec; adev 1346 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.pause_state.jpeg = new_state->jpeg; adev 1354 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1361 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1373 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1380 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_enable_clock_gating(adev); adev 1383 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_disable_clock_gating(adev); adev 1397 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1411 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1425 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1427 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) adev 1443 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1462 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1480 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1521 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1543 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1562 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub]; adev 1577 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1599 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1601 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (ring == &adev->vcn.inst->ring_enc[0]) adev 1616 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1618 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (ring == &adev->vcn.inst->ring_enc[0]) adev 1633 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1635 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if (ring == &adev->vcn.inst->ring_enc[0]) adev 1703 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub]; adev 1730 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1744 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1758 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1772 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1791 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1812 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1886 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1938 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 1967 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub]; adev 1982 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 2014 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 2029 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 2103 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static int vcn_v1_0_set_interrupt_state(struct amdgpu_device *adev, adev 2111 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static int vcn_v1_0_process_interrupt(struct amdgpu_device *adev, adev 2119 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c amdgpu_fence_process(&adev->vcn.inst->ring_dec); adev 2122 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c amdgpu_fence_process(&adev->vcn.inst->ring_enc[0]); adev 2125 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c amdgpu_fence_process(&adev->vcn.inst->ring_enc[1]); adev 2128 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c amdgpu_fence_process(&adev->vcn.inst->ring_jpeg); adev 2141 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = ring->adev; adev 2163 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2165 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c if(state == adev->vcn.cur_state) adev 2169 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ret = vcn_v1_0_stop(adev); adev 2171 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ret = vcn_v1_0_start(adev); adev 2174 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.cur_state = state; adev 2298 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev) adev 2300 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.inst->ring_dec.funcs = &vcn_v1_0_dec_ring_vm_funcs; adev 2304 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev) adev 2308 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) adev 2309 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.inst->ring_enc[i].funcs = &vcn_v1_0_enc_ring_vm_funcs; adev 2314 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_v1_0_set_jpeg_ring_funcs(struct amdgpu_device *adev) adev 2316 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.inst->ring_jpeg.funcs = &vcn_v1_0_jpeg_ring_vm_funcs; adev 2325 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev) adev 2327 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.inst->irq.num_types = adev->vcn.num_enc_rings + 2; adev 2328 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c adev->vcn.inst->irq.funcs = &vcn_v1_0_irq_funcs; adev 75 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_set_dec_ring_funcs(struct amdgpu_device *adev); adev 76 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_set_enc_ring_funcs(struct amdgpu_device *adev); adev 77 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_set_jpeg_ring_funcs(struct amdgpu_device *adev); adev 78 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_set_irq_funcs(struct amdgpu_device *adev); adev 81 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev, adev 93 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 95 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.num_vcn_inst = 1; adev 96 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.num_enc_rings = 2; adev 98 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_set_dec_ring_funcs(adev); adev 99 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_set_enc_ring_funcs(adev); adev 100 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_set_jpeg_ring_funcs(adev); adev 101 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_set_irq_funcs(adev); adev 117 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 120 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, adev 122 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c &adev->vcn.inst->irq); adev 127 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) { adev 128 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, adev 130 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c &adev->vcn.inst->irq); adev 136 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, adev 137 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c VCN_2_0__SRCID__JPEG_DECODE, &adev->vcn.inst->irq); adev 141 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = amdgpu_vcn_sw_init(adev); adev 145 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 147 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c hdr = (const struct common_firmware_header *)adev->vcn.fw->data; adev 148 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].ucode_id = AMDGPU_UCODE_ID_VCN; adev 149 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].fw = adev->vcn.fw; adev 150 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->firmware.fw_size += adev 155 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = amdgpu_vcn_resume(adev); adev 159 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ring = &adev->vcn.inst->ring_dec; adev 162 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ring->doorbell_index = adev->doorbell_index.vcn.vcn_ring0_1 << 1; adev 165 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst->irq, 0); adev 169 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.internal.context_id = mmUVD_CONTEXT_ID_INTERNAL_OFFSET; adev 170 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.internal.ib_vmid = mmUVD_LMI_RBC_IB_VMID_INTERNAL_OFFSET; adev 171 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.internal.ib_bar_low = mmUVD_LMI_RBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET; adev 172 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.internal.ib_bar_high = mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET; adev 173 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.internal.ib_size = mmUVD_RBC_IB_SIZE_INTERNAL_OFFSET; adev 174 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.internal.gp_scratch8 = mmUVD_GP_SCRATCH8_INTERNAL_OFFSET; adev 176 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.internal.scratch9 = mmUVD_SCRATCH9_INTERNAL_OFFSET; adev 177 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.inst->external.scratch9 = SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9); adev 178 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.internal.data0 = mmUVD_GPCOM_VCPU_DATA0_INTERNAL_OFFSET; adev 179 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.inst->external.data0 = SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0); adev 180 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.internal.data1 = mmUVD_GPCOM_VCPU_DATA1_INTERNAL_OFFSET; adev 181 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.inst->external.data1 = SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA1); adev 182 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.internal.cmd = mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET; adev 183 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.inst->external.cmd = SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD); adev 184 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.internal.nop = mmUVD_NO_OP_INTERNAL_OFFSET; adev 185 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.inst->external.nop = SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP); adev 187 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) { adev 188 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ring = &adev->vcn.inst->ring_enc[i]; adev 190 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 2 + i; adev 192 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst->irq, 0); adev 197 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ring = &adev->vcn.inst->ring_jpeg; adev 199 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 1; adev 201 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst->irq, 0); adev 205 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.pause_dpg_mode = vcn_v2_0_pause_dpg_mode; adev 207 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.internal.jpeg_pitch = mmUVD_JPEG_PITCH_INTERNAL_OFFSET; adev 208 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.inst->external.jpeg_pitch = SOC15_REG_OFFSET(UVD, 0, mmUVD_JPEG_PITCH); adev 223 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 225 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = amdgpu_vcn_suspend(adev); adev 229 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = amdgpu_vcn_sw_fini(adev); adev 243 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 244 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec; adev 247 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->nbio_funcs->vcn_doorbell_range(adev, ring->use_doorbell, adev 257 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) { adev 258 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ring = &adev->vcn.inst->ring_enc[i]; adev 267 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ring = &adev->vcn.inst->ring_jpeg; adev 278 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode"); adev 292 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 293 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec; adev 296 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if ((adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) || adev 297 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c (adev->vcn.cur_state != AMD_PG_STATE_GATE && adev 299 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_set_powergating_state(adev, AMD_PG_STATE_GATE); adev 303 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) { adev 304 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ring = &adev->vcn.inst->ring_enc[i]; adev 308 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ring = &adev->vcn.inst->ring_jpeg; adev 324 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 326 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = vcn_v2_0_hw_fini(adev); adev 330 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = amdgpu_vcn_suspend(adev); adev 345 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 347 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = amdgpu_vcn_resume(adev); adev 351 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = vcn_v2_0_hw_init(adev); adev 363 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_mc_resume(struct amdgpu_device *adev) adev 365 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c uint32_t size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw->size + 4); adev 369 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 371 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].tmr_mc_addr_lo)); adev 373 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].tmr_mc_addr_hi)); adev 378 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c lower_32_bits(adev->vcn.inst->gpu_addr)); adev 380 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c upper_32_bits(adev->vcn.inst->gpu_addr)); adev 390 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c lower_32_bits(adev->vcn.inst->gpu_addr + offset)); adev 392 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c upper_32_bits(adev->vcn.inst->gpu_addr + offset)); adev 398 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c lower_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE)); adev 400 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c upper_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE)); adev 404 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 405 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmJPEG_DEC_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config); adev 408 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_mc_resume_dpg_mode(struct amdgpu_device *adev, bool indirect) adev 410 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c uint32_t size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw->size + 4); adev 414 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 418 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].tmr_mc_addr_lo), 0, indirect); adev 421 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].tmr_mc_addr_hi), 0, indirect); adev 436 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c lower_32_bits(adev->vcn.inst->gpu_addr), 0, indirect); adev 439 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c upper_32_bits(adev->vcn.inst->gpu_addr), 0, indirect); adev 457 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c lower_32_bits(adev->vcn.inst->gpu_addr + offset), 0, indirect); adev 460 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c upper_32_bits(adev->vcn.inst->gpu_addr + offset), 0, indirect); adev 477 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c lower_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE), 0, indirect); adev 480 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c upper_32_bits(adev->vcn.inst->gpu_addr + offset + AMDGPU_VCN_STACK_SIZE), 0, indirect); adev 498 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c UVD, 0, mmUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect); adev 509 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_disable_clock_gating(struct amdgpu_device *adev) adev 515 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG) adev 611 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_clock_gating_dpg_mode(struct amdgpu_device *adev, adev 617 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG) adev 666 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static int jpeg_v2_0_start(struct amdgpu_device *adev) adev 668 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_ring *ring = &adev->vcn.inst->ring_jpeg; adev 735 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static int jpeg_v2_0_stop(struct amdgpu_device *adev) adev 790 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_enable_clock_gating(struct amdgpu_device *adev) adev 796 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG) adev 841 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_disable_static_power_gating(struct amdgpu_device *adev) adev 846 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->pg_flags & AMD_PG_SUPPORT_VCN) { adev 881 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->pg_flags & AMD_PG_SUPPORT_VCN) adev 888 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_enable_static_power_gating(struct amdgpu_device *adev) adev 893 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->pg_flags & AMD_PG_SUPPORT_VCN) { adev 928 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static int vcn_v2_0_start_dpg_mode(struct amdgpu_device *adev, bool indirect) adev 930 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec; adev 933 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_enable_static_power_gating(adev); adev 942 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.dpg_sram_curr_addr = (uint32_t*)adev->vcn.dpg_sram_cpu_addr; adev 945 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_clock_gating_dpg_mode(adev, 0, indirect); adev 994 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_mc_resume_dpg_mode(adev, indirect); adev 1016 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c psp_update_vcn_sram(adev, 0, adev->vcn.dpg_sram_gpu_addr, adev 1017 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c (uint32_t)((uintptr_t)adev->vcn.dpg_sram_curr_addr - adev 1018 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c (uintptr_t)adev->vcn.dpg_sram_cpu_addr)); adev 1054 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static int vcn_v2_0_start(struct amdgpu_device *adev) adev 1056 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec; adev 1061 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->pm.dpm_enabled) adev 1062 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_dpm_enable_uvd(adev, true); adev 1064 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) { adev 1065 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = vcn_v2_0_start_dpg_mode(adev, adev->vcn.indirect_sram); adev 1071 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_disable_static_power_gating(adev); adev 1078 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_disable_clock_gating(adev); adev 1122 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_mc_resume(adev); adev 1207 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ring = &adev->vcn.inst->ring_enc[0]; adev 1214 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ring = &adev->vcn.inst->ring_enc[1]; adev 1222 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = jpeg_v2_0_start(adev); adev 1227 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static int vcn_v2_0_stop_dpg_mode(struct amdgpu_device *adev) adev 1259 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static int vcn_v2_0_stop(struct amdgpu_device *adev) adev 1264 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = jpeg_v2_0_stop(adev); adev 1268 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) { adev 1269 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c r = vcn_v2_0_stop_dpg_mode(adev); adev 1321 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_enable_clock_gating(adev); adev 1322 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_enable_static_power_gating(adev); adev 1325 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->pm.dpm_enabled) adev 1326 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_dpm_enable_uvd(adev, false); adev 1331 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev, adev 1339 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->vcn.pause_state.fw_based != new_state->fw_based) { adev 1341 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.pause_state.fw_based, new_state->fw_based); adev 1361 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ring = &adev->vcn.inst->ring_enc[0]; adev 1368 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ring = &adev->vcn.inst->ring_enc[1]; adev 1387 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.pause_state.fw_based = new_state->fw_based; adev 1395 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1402 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1414 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1421 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_enable_clock_gating(adev); adev 1424 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_disable_clock_gating(adev); adev 1438 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1452 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1455 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c return adev->wb.wb[ring->wptr_offs]; adev 1469 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1471 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) adev 1476 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); adev 1492 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1494 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.data0, 0)); adev 1496 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.cmd, 0)); adev 1509 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1511 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.cmd, 0)); adev 1524 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1530 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.nop, 0)); adev 1546 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1549 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.context_id, 0)); adev 1552 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.data0, 0)); adev 1555 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.data1, 0)); adev 1558 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.cmd, 0)); adev 1561 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.data0, 0)); adev 1564 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.data1, 0)); adev 1567 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.cmd, 0)); adev 1585 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1588 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.ib_vmid, 0)); adev 1591 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.ib_bar_low, 0)); adev 1593 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.ib_bar_high, 0)); adev 1595 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.ib_size, 0)); adev 1602 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1604 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.data0, 0)); adev 1607 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.data1, 0)); adev 1610 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.gp_scratch8, 0)); adev 1613 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.cmd, 0)); adev 1621 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub]; adev 1636 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1638 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.data0, 0)); adev 1641 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.data1, 0)); adev 1644 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.cmd, 0)); adev 1658 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1660 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (ring == &adev->vcn.inst->ring_enc[0]) adev 1675 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1677 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (ring == &adev->vcn.inst->ring_enc[0]) { adev 1679 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c return adev->wb.wb[ring->wptr_offs]; adev 1684 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c return adev->wb.wb[ring->wptr_offs]; adev 1699 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1701 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (ring == &adev->vcn.inst->ring_enc[0]) { adev 1703 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); adev 1710 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); adev 1777 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub]; adev 1802 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1816 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1819 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c return adev->wb.wb[ring->wptr_offs]; adev 1833 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 1836 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); adev 2017 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub]; adev 2059 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static int vcn_v2_0_set_interrupt_state(struct amdgpu_device *adev, adev 2067 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static int vcn_v2_0_process_interrupt(struct amdgpu_device *adev, adev 2075 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_fence_process(&adev->vcn.inst->ring_dec); adev 2078 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_fence_process(&adev->vcn.inst->ring_enc[0]); adev 2081 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_fence_process(&adev->vcn.inst->ring_enc[1]); adev 2084 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_fence_process(&adev->vcn.inst->ring_jpeg); adev 2097 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = ring->adev; adev 2102 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD); adev 2106 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.cmd, 0)); adev 2108 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.scratch9, 0)); adev 2111 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 2112 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c tmp = RREG32(adev->vcn.inst[ring->me].external.scratch9); adev 2118 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (i >= adev->usec_timeout) adev 2136 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2138 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c if (state == adev->vcn.cur_state) adev 2142 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ret = vcn_v2_0_stop(adev); adev 2144 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c ret = vcn_v2_0_start(adev); adev 2147 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.cur_state = state; adev 2261 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_set_dec_ring_funcs(struct amdgpu_device *adev) adev 2263 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.inst->ring_dec.funcs = &vcn_v2_0_dec_ring_vm_funcs; adev 2267 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_set_enc_ring_funcs(struct amdgpu_device *adev) adev 2271 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) adev 2272 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.inst->ring_enc[i].funcs = &vcn_v2_0_enc_ring_vm_funcs; adev 2277 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_set_jpeg_ring_funcs(struct amdgpu_device *adev) adev 2279 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.inst->ring_jpeg.funcs = &vcn_v2_0_jpeg_ring_vm_funcs; adev 2288 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c static void vcn_v2_0_set_irq_funcs(struct amdgpu_device *adev) adev 2290 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.inst->irq.num_types = adev->vcn.num_enc_rings + 2; adev 2291 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c adev->vcn.inst->irq.funcs = &vcn_v2_0_irq_funcs; adev 53 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static void vcn_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev); adev 54 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static void vcn_v2_5_set_enc_ring_funcs(struct amdgpu_device *adev); adev 55 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static void vcn_v2_5_set_jpeg_ring_funcs(struct amdgpu_device *adev); adev 56 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static void vcn_v2_5_set_irq_funcs(struct amdgpu_device *adev); adev 74 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 75 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->asic_type == CHIP_ARCTURUS) { adev 79 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.num_vcn_inst = VCN25_MAX_HW_INSTANCES_ARCTURUS; adev 80 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; i++) { adev 83 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.harvest_config |= 1 << i; adev 86 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config == (AMDGPU_VCN_HARVEST_VCN0 | adev 91 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.num_vcn_inst = 1; adev 93 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.num_enc_rings = 2; adev 95 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c vcn_v2_5_set_dec_ring_funcs(adev); adev 96 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c vcn_v2_5_set_enc_ring_funcs(adev); adev 97 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c vcn_v2_5_set_jpeg_ring_funcs(adev); adev 98 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c vcn_v2_5_set_irq_funcs(adev); adev 114 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 116 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (j = 0; j < adev->vcn.num_vcn_inst; j++) { adev 117 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << j)) adev 120 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_vcns[j], adev 121 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c VCN_2_0__SRCID__UVD_SYSTEM_MESSAGE_INTERRUPT, &adev->vcn.inst[j].irq); adev 126 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) { adev 127 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_vcns[j], adev 128 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c i + VCN_2_0__SRCID__UVD_ENC_GENERAL_PURPOSE, &adev->vcn.inst[j].irq); adev 134 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_vcns[j], adev 135 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c VCN_2_0__SRCID__JPEG_DECODE, &adev->vcn.inst[j].irq); adev 140 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = amdgpu_vcn_sw_init(adev); adev 144 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 146 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c hdr = (const struct common_firmware_header *)adev->vcn.fw->data; adev 147 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].ucode_id = AMDGPU_UCODE_ID_VCN; adev 148 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].fw = adev->vcn.fw; adev 149 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->firmware.fw_size += adev 152 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.num_vcn_inst == VCN25_MAX_HW_INSTANCES_ARCTURUS) { adev 153 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->firmware.ucode[AMDGPU_UCODE_ID_VCN1].ucode_id = AMDGPU_UCODE_ID_VCN1; adev 154 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->firmware.ucode[AMDGPU_UCODE_ID_VCN1].fw = adev->vcn.fw; adev 155 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->firmware.fw_size += adev 161 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = amdgpu_vcn_resume(adev); adev 165 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (j = 0; j < adev->vcn.num_vcn_inst; j++) { adev 166 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << j)) adev 168 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.internal.context_id = mmUVD_CONTEXT_ID_INTERNAL_OFFSET; adev 169 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.internal.ib_vmid = mmUVD_LMI_RBC_IB_VMID_INTERNAL_OFFSET; adev 170 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.internal.ib_bar_low = mmUVD_LMI_RBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET; adev 171 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.internal.ib_bar_high = mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET; adev 172 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.internal.ib_size = mmUVD_RBC_IB_SIZE_INTERNAL_OFFSET; adev 173 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.internal.gp_scratch8 = mmUVD_GP_SCRATCH8_INTERNAL_OFFSET; adev 175 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.internal.scratch9 = mmUVD_SCRATCH9_INTERNAL_OFFSET; adev 176 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.inst[j].external.scratch9 = SOC15_REG_OFFSET(UVD, j, mmUVD_SCRATCH9); adev 177 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.internal.data0 = mmUVD_GPCOM_VCPU_DATA0_INTERNAL_OFFSET; adev 178 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.inst[j].external.data0 = SOC15_REG_OFFSET(UVD, j, mmUVD_GPCOM_VCPU_DATA0); adev 179 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.internal.data1 = mmUVD_GPCOM_VCPU_DATA1_INTERNAL_OFFSET; adev 180 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.inst[j].external.data1 = SOC15_REG_OFFSET(UVD, j, mmUVD_GPCOM_VCPU_DATA1); adev 181 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.internal.cmd = mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET; adev 182 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.inst[j].external.cmd = SOC15_REG_OFFSET(UVD, j, mmUVD_GPCOM_VCPU_CMD); adev 183 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.internal.nop = mmUVD_NO_OP_INTERNAL_OFFSET; adev 184 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.inst[j].external.nop = SOC15_REG_OFFSET(UVD, j, mmUVD_NO_OP); adev 186 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.internal.jpeg_pitch = mmUVD_JPEG_PITCH_INTERNAL_OFFSET; adev 187 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.inst[j].external.jpeg_pitch = SOC15_REG_OFFSET(UVD, j, mmUVD_JPEG_PITCH); adev 189 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring = &adev->vcn.inst[j].ring_dec; adev 191 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 8*j; adev 193 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst[j].irq, 0); adev 197 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) { adev 198 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring = &adev->vcn.inst[j].ring_enc[i]; adev 200 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 2 + i + 8*j; adev 202 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst[j].irq, 0); adev 207 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring = &adev->vcn.inst[j].ring_jpeg; adev 209 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 1 + 8*j; adev 211 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst[j].irq, 0); adev 229 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 231 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = amdgpu_vcn_suspend(adev); adev 235 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = amdgpu_vcn_sw_fini(adev); adev 249 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 253 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (j = 0; j < adev->vcn.num_vcn_inst; ++j) { adev 254 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << j)) adev 256 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring = &adev->vcn.inst[j].ring_dec; adev 258 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->nbio_funcs->vcn_doorbell_range(adev, ring->use_doorbell, adev 267 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) { adev 268 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring = &adev->vcn.inst[j].ring_enc[i]; adev 278 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring = &adev->vcn.inst[j].ring_jpeg; adev 301 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 305 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 306 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 308 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring = &adev->vcn.inst[i].ring_dec; adev 311 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c vcn_v2_5_set_powergating_state(adev, AMD_PG_STATE_GATE); adev 315 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) { adev 316 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring = &adev->vcn.inst[i].ring_enc[i]; adev 320 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring = &adev->vcn.inst[i].ring_jpeg; adev 337 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 339 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = vcn_v2_5_hw_fini(adev); adev 343 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = amdgpu_vcn_suspend(adev); adev 358 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 360 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = amdgpu_vcn_resume(adev); adev 364 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = vcn_v2_5_hw_init(adev); adev 376 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static void vcn_v2_5_mc_resume(struct amdgpu_device *adev) adev 378 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c uint32_t size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw->size + 4); adev 382 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 383 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 386 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 388 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].tmr_mc_addr_lo)); adev 390 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].tmr_mc_addr_hi)); adev 395 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c lower_32_bits(adev->vcn.inst[i].gpu_addr)); adev 397 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c upper_32_bits(adev->vcn.inst[i].gpu_addr)); adev 406 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c lower_32_bits(adev->vcn.inst[i].gpu_addr + offset)); adev 408 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c upper_32_bits(adev->vcn.inst[i].gpu_addr + offset)); adev 414 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c lower_32_bits(adev->vcn.inst[i].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE)); adev 416 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c upper_32_bits(adev->vcn.inst[i].gpu_addr + offset + AMDGPU_VCN_STACK_SIZE)); adev 429 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static void vcn_v2_5_disable_clock_gating(struct amdgpu_device *adev) adev 435 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 436 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 440 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG) adev 547 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static void vcn_v2_5_enable_clock_gating(struct amdgpu_device *adev) adev 552 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 553 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 557 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->cg_flags & AMD_CG_SUPPORT_VCN_MGCG) adev 609 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static int jpeg_v2_5_start(struct amdgpu_device *adev) adev 615 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 616 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 618 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring = &adev->vcn.inst[i].ring_jpeg; adev 646 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->gfx.config.gb_addr_config); adev 648 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->gfx.config.gb_addr_config); adev 682 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static int jpeg_v2_5_stop(struct amdgpu_device *adev) adev 687 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 688 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 711 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static int vcn_v2_5_start(struct amdgpu_device *adev) adev 717 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 718 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 730 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c vcn_v2_5_disable_clock_gating(adev); adev 732 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 733 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 779 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c vcn_v2_5_mc_resume(adev); adev 781 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 782 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 786 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->gfx.config.gb_addr_config); adev 788 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->gfx.config.gb_addr_config); adev 845 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring = &adev->vcn.inst[i].ring_dec; adev 867 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring = &adev->vcn.inst[i].ring_enc[0]; adev 874 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ring = &adev->vcn.inst[i].ring_enc[1]; adev 881 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = jpeg_v2_5_start(adev); adev 886 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static int vcn_v2_5_stop(struct amdgpu_device *adev) adev 891 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c r = jpeg_v2_5_stop(adev); adev 895 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 896 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 939 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c vcn_v2_5_enable_clock_gating(adev); adev 959 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = ring->adev; adev 973 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = ring->adev; adev 976 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c return adev->wb.wb[ring->wptr_offs]; adev 990 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = ring->adev; adev 993 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); adev 1039 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = ring->adev; adev 1041 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) adev 1056 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = ring->adev; adev 1058 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) { adev 1060 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c return adev->wb.wb[ring->wptr_offs]; adev 1065 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c return adev->wb.wb[ring->wptr_offs]; adev 1080 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = ring->adev; adev 1082 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (ring == &adev->vcn.inst[ring->me].ring_enc[0]) { adev 1084 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); adev 1091 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); adev 1138 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = ring->adev; adev 1152 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = ring->adev; adev 1155 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c return adev->wb.wb[ring->wptr_offs]; adev 1169 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = ring->adev; adev 1172 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); adev 1209 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static void vcn_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev) adev 1213 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 1214 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 1216 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.inst[i].ring_dec.funcs = &vcn_v2_5_dec_ring_vm_funcs; adev 1217 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.inst[i].ring_dec.me = i; adev 1222 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static void vcn_v2_5_set_enc_ring_funcs(struct amdgpu_device *adev) adev 1226 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (j = 0; j < adev->vcn.num_vcn_inst; ++j) { adev 1227 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << j)) adev 1229 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_enc_rings; ++i) { adev 1230 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.inst[j].ring_enc[i].funcs = &vcn_v2_5_enc_ring_vm_funcs; adev 1231 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.inst[j].ring_enc[i].me = j; adev 1237 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static void vcn_v2_5_set_jpeg_ring_funcs(struct amdgpu_device *adev) adev 1241 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 1242 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 1244 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.inst[i].ring_jpeg.funcs = &vcn_v2_5_jpeg_ring_vm_funcs; adev 1245 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.inst[i].ring_jpeg.me = i; adev 1252 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1255 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 1256 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 1266 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1269 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 1270 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 1284 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1290 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c vcn_v2_5_enable_clock_gating(adev); adev 1292 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c vcn_v2_5_disable_clock_gating(adev); adev 1301 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1304 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if(state == adev->vcn.cur_state) adev 1308 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ret = vcn_v2_5_stop(adev); adev 1310 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c ret = vcn_v2_5_start(adev); adev 1313 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.cur_state = state; adev 1318 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static int vcn_v2_5_set_interrupt_state(struct amdgpu_device *adev, adev 1326 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static int vcn_v2_5_process_interrupt(struct amdgpu_device *adev, adev 1348 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c amdgpu_fence_process(&adev->vcn.inst[ip_instance].ring_dec); adev 1351 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c amdgpu_fence_process(&adev->vcn.inst[ip_instance].ring_enc[0]); adev 1354 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c amdgpu_fence_process(&adev->vcn.inst[ip_instance].ring_enc[1]); adev 1357 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c amdgpu_fence_process(&adev->vcn.inst[ip_instance].ring_jpeg); adev 1373 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c static void vcn_v2_5_set_irq_funcs(struct amdgpu_device *adev) adev 1377 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { adev 1378 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c if (adev->vcn.harvest_config & (1 << i)) adev 1380 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.inst[i].irq.num_types = adev->vcn.num_enc_rings + 2; adev 1381 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c adev->vcn.inst[i].irq.funcs = &vcn_v2_5_irq_funcs; adev 38 drivers/gpu/drm/amd/amdgpu/vega10_ih.c static void vega10_ih_set_interrupt_funcs(struct amdgpu_device *adev); adev 47 drivers/gpu/drm/amd/amdgpu/vega10_ih.c static void vega10_ih_enable_interrupts(struct amdgpu_device *adev) adev 53 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (amdgpu_sriov_vf(adev)) { adev 54 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL, ih_rb_cntl)) { adev 61 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih.enabled = true; adev 63 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (adev->irq.ih1.ring_size) { adev 67 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (amdgpu_sriov_vf(adev)) { adev 68 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL_RING1, adev 76 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih1.enabled = true; adev 79 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (adev->irq.ih2.ring_size) { adev 83 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (amdgpu_sriov_vf(adev)) { adev 84 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL_RING2, adev 92 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih2.enabled = true; adev 103 drivers/gpu/drm/amd/amdgpu/vega10_ih.c static void vega10_ih_disable_interrupts(struct amdgpu_device *adev) adev 109 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (amdgpu_sriov_vf(adev)) { adev 110 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL, ih_rb_cntl)) { adev 121 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih.enabled = false; adev 122 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih.rptr = 0; adev 124 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (adev->irq.ih1.ring_size) { adev 128 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (amdgpu_sriov_vf(adev)) { adev 129 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL_RING1, adev 140 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih1.enabled = false; adev 141 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih1.rptr = 0; adev 144 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (adev->irq.ih2.ring_size) { adev 148 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (amdgpu_sriov_vf(adev)) { adev 149 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL_RING2, adev 161 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih2.enabled = false; adev 162 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih2.rptr = 0; adev 219 drivers/gpu/drm/amd/amdgpu/vega10_ih.c static int vega10_ih_irq_init(struct amdgpu_device *adev) adev 227 drivers/gpu/drm/amd/amdgpu/vega10_ih.c vega10_ih_disable_interrupts(adev); adev 229 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->nbio_funcs->ih_control(adev); adev 231 drivers/gpu/drm/amd/amdgpu/vega10_ih.c ih = &adev->irq.ih; adev 239 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (adev->irq.ih.use_bus_addr) { adev 245 drivers/gpu/drm/amd/amdgpu/vega10_ih.c !!adev->irq.msi_enabled); adev 247 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (amdgpu_sriov_vf(adev)) { adev 248 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL, ih_rb_cntl)) { adev 256 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if ((adev->asic_type == CHIP_ARCTURUS adev 257 drivers/gpu/drm/amd/amdgpu/vega10_ih.c && adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) adev 258 drivers/gpu/drm/amd/amdgpu/vega10_ih.c || adev->asic_type == CHIP_RENOIR) adev 274 drivers/gpu/drm/amd/amdgpu/vega10_ih.c ih = &adev->irq.ih1; adev 286 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (amdgpu_sriov_vf(adev)) { adev 287 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL_RING1, adev 304 drivers/gpu/drm/amd/amdgpu/vega10_ih.c ih = &adev->irq.ih2; adev 313 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (amdgpu_sriov_vf(adev)) { adev 314 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL_RING2, adev 340 drivers/gpu/drm/amd/amdgpu/vega10_ih.c pci_set_master(adev->pdev); adev 343 drivers/gpu/drm/amd/amdgpu/vega10_ih.c vega10_ih_enable_interrupts(adev); adev 355 drivers/gpu/drm/amd/amdgpu/vega10_ih.c static void vega10_ih_irq_disable(struct amdgpu_device *adev) adev 357 drivers/gpu/drm/amd/amdgpu/vega10_ih.c vega10_ih_disable_interrupts(adev); adev 373 drivers/gpu/drm/amd/amdgpu/vega10_ih.c static u32 vega10_ih_get_wptr(struct amdgpu_device *adev, adev 385 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (ih == &adev->irq.ih) adev 387 drivers/gpu/drm/amd/amdgpu/vega10_ih.c else if (ih == &adev->irq.ih1) adev 389 drivers/gpu/drm/amd/amdgpu/vega10_ih.c else if (ih == &adev->irq.ih2) adev 405 drivers/gpu/drm/amd/amdgpu/vega10_ih.c dev_warn(adev->dev, "IH ring buffer overflow " adev 410 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (ih == &adev->irq.ih) adev 412 drivers/gpu/drm/amd/amdgpu/vega10_ih.c else if (ih == &adev->irq.ih1) adev 414 drivers/gpu/drm/amd/amdgpu/vega10_ih.c else if (ih == &adev->irq.ih2) adev 435 drivers/gpu/drm/amd/amdgpu/vega10_ih.c static void vega10_ih_decode_iv(struct amdgpu_device *adev, adev 476 drivers/gpu/drm/amd/amdgpu/vega10_ih.c static void vega10_ih_irq_rearm(struct amdgpu_device *adev, adev 483 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (ih == &adev->irq.ih) adev 485 drivers/gpu/drm/amd/amdgpu/vega10_ih.c else if (ih == &adev->irq.ih1) adev 487 drivers/gpu/drm/amd/amdgpu/vega10_ih.c else if (ih == &adev->irq.ih2) adev 509 drivers/gpu/drm/amd/amdgpu/vega10_ih.c static void vega10_ih_set_rptr(struct amdgpu_device *adev, adev 517 drivers/gpu/drm/amd/amdgpu/vega10_ih.c if (amdgpu_sriov_vf(adev)) adev 518 drivers/gpu/drm/amd/amdgpu/vega10_ih.c vega10_ih_irq_rearm(adev, ih); adev 519 drivers/gpu/drm/amd/amdgpu/vega10_ih.c } else if (ih == &adev->irq.ih) { adev 521 drivers/gpu/drm/amd/amdgpu/vega10_ih.c } else if (ih == &adev->irq.ih1) { adev 523 drivers/gpu/drm/amd/amdgpu/vega10_ih.c } else if (ih == &adev->irq.ih2) { adev 537 drivers/gpu/drm/amd/amdgpu/vega10_ih.c static int vega10_ih_self_irq(struct amdgpu_device *adev, adev 545 drivers/gpu/drm/amd/amdgpu/vega10_ih.c *adev->irq.ih1.wptr_cpu = wptr; adev 546 drivers/gpu/drm/amd/amdgpu/vega10_ih.c schedule_work(&adev->irq.ih1_work); adev 549 drivers/gpu/drm/amd/amdgpu/vega10_ih.c *adev->irq.ih2.wptr_cpu = wptr; adev 550 drivers/gpu/drm/amd/amdgpu/vega10_ih.c schedule_work(&adev->irq.ih2_work); adev 561 drivers/gpu/drm/amd/amdgpu/vega10_ih.c static void vega10_ih_set_self_irq_funcs(struct amdgpu_device *adev) adev 563 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.self_irq.num_types = 0; adev 564 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.self_irq.funcs = &vega10_ih_self_irq_funcs; adev 569 drivers/gpu/drm/amd/amdgpu/vega10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 571 drivers/gpu/drm/amd/amdgpu/vega10_ih.c vega10_ih_set_interrupt_funcs(adev); adev 572 drivers/gpu/drm/amd/amdgpu/vega10_ih.c vega10_ih_set_self_irq_funcs(adev); adev 578 drivers/gpu/drm/amd/amdgpu/vega10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 581 drivers/gpu/drm/amd/amdgpu/vega10_ih.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_IH, 0, adev 582 drivers/gpu/drm/amd/amdgpu/vega10_ih.c &adev->irq.self_irq); adev 586 drivers/gpu/drm/amd/amdgpu/vega10_ih.c r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 256 * 1024, true); adev 590 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih.use_doorbell = true; adev 591 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1; adev 593 drivers/gpu/drm/amd/amdgpu/vega10_ih.c r = amdgpu_ih_ring_init(adev, &adev->irq.ih1, PAGE_SIZE, true); adev 597 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih1.use_doorbell = true; adev 598 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih1.doorbell_index = (adev->doorbell_index.ih + 1) << 1; adev 600 drivers/gpu/drm/amd/amdgpu/vega10_ih.c r = amdgpu_ih_ring_init(adev, &adev->irq.ih2, PAGE_SIZE, true); adev 604 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih2.use_doorbell = true; adev 605 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih2.doorbell_index = (adev->doorbell_index.ih + 2) << 1; adev 607 drivers/gpu/drm/amd/amdgpu/vega10_ih.c r = amdgpu_irq_init(adev); adev 614 drivers/gpu/drm/amd/amdgpu/vega10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 616 drivers/gpu/drm/amd/amdgpu/vega10_ih.c amdgpu_irq_fini(adev); adev 617 drivers/gpu/drm/amd/amdgpu/vega10_ih.c amdgpu_ih_ring_fini(adev, &adev->irq.ih2); adev 618 drivers/gpu/drm/amd/amdgpu/vega10_ih.c amdgpu_ih_ring_fini(adev, &adev->irq.ih1); adev 619 drivers/gpu/drm/amd/amdgpu/vega10_ih.c amdgpu_ih_ring_fini(adev, &adev->irq.ih); adev 627 drivers/gpu/drm/amd/amdgpu/vega10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 629 drivers/gpu/drm/amd/amdgpu/vega10_ih.c r = vega10_ih_irq_init(adev); adev 638 drivers/gpu/drm/amd/amdgpu/vega10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 640 drivers/gpu/drm/amd/amdgpu/vega10_ih.c vega10_ih_irq_disable(adev); adev 647 drivers/gpu/drm/amd/amdgpu/vega10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 649 drivers/gpu/drm/amd/amdgpu/vega10_ih.c return vega10_ih_hw_fini(adev); adev 654 drivers/gpu/drm/amd/amdgpu/vega10_ih.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 656 drivers/gpu/drm/amd/amdgpu/vega10_ih.c return vega10_ih_hw_init(adev); adev 713 drivers/gpu/drm/amd/amdgpu/vega10_ih.c static void vega10_ih_set_interrupt_funcs(struct amdgpu_device *adev) adev 715 drivers/gpu/drm/amd/amdgpu/vega10_ih.c adev->irq.ih_funcs = &vega10_ih_funcs; adev 30 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c int vega10_reg_base_init(struct amdgpu_device *adev) adev 35 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); adev 36 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); adev 37 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); adev 38 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i])); adev 39 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i])); adev 40 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); adev 41 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i])); adev 42 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i])); adev 43 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[VCE_HWIP][i] = (uint32_t *)(&(VCE_BASE.instance[i])); adev 44 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(VCN_BASE.instance[i])); adev 45 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[DF_HWIP][i] = (uint32_t *)(&(DF_BASE.instance[i])); adev 46 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[DCE_HWIP][i] = (uint32_t *)(&(DCE_BASE.instance[i])); adev 47 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); adev 48 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i])); adev 49 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i])); adev 50 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); adev 51 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[PWR_HWIP][i] = (uint32_t *)(&(PWR_BASE.instance[i])); adev 52 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[NBIF_HWIP][i] = (uint32_t *)(&(NBIF_BASE.instance[i])); adev 53 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i])); adev 54 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[CLK_HWIP][i] = (uint32_t *)(&(CLK_BASE.instance[i])); adev 59 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c void vega10_doorbell_index_init(struct amdgpu_device *adev) adev 61 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.kiq = AMDGPU_DOORBELL64_KIQ; adev 62 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.mec_ring0 = AMDGPU_DOORBELL64_MEC_RING0; adev 63 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.mec_ring1 = AMDGPU_DOORBELL64_MEC_RING1; adev 64 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.mec_ring2 = AMDGPU_DOORBELL64_MEC_RING2; adev 65 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.mec_ring3 = AMDGPU_DOORBELL64_MEC_RING3; adev 66 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.mec_ring4 = AMDGPU_DOORBELL64_MEC_RING4; adev 67 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.mec_ring5 = AMDGPU_DOORBELL64_MEC_RING5; adev 68 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.mec_ring6 = AMDGPU_DOORBELL64_MEC_RING6; adev 69 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.mec_ring7 = AMDGPU_DOORBELL64_MEC_RING7; adev 70 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.userqueue_start = AMDGPU_DOORBELL64_USERQUEUE_START; adev 71 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.userqueue_end = AMDGPU_DOORBELL64_USERQUEUE_END; adev 72 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.gfx_ring0 = AMDGPU_DOORBELL64_GFX_RING0; adev 73 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.sdma_engine[0] = AMDGPU_DOORBELL64_sDMA_ENGINE0; adev 74 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.sdma_engine[1] = AMDGPU_DOORBELL64_sDMA_ENGINE1; adev 75 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.ih = AMDGPU_DOORBELL64_IH; adev 76 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.uvd_vce.uvd_ring0_1 = AMDGPU_DOORBELL64_UVD_RING0_1; adev 77 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.uvd_vce.uvd_ring2_3 = AMDGPU_DOORBELL64_UVD_RING2_3; adev 78 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.uvd_vce.uvd_ring4_5 = AMDGPU_DOORBELL64_UVD_RING4_5; adev 79 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.uvd_vce.uvd_ring6_7 = AMDGPU_DOORBELL64_UVD_RING6_7; adev 80 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.uvd_vce.vce_ring0_1 = AMDGPU_DOORBELL64_VCE_RING0_1; adev 81 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.uvd_vce.vce_ring2_3 = AMDGPU_DOORBELL64_VCE_RING2_3; adev 82 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_DOORBELL64_VCE_RING4_5; adev 83 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7; adev 84 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.vcn.vcn_ring0_1 = AMDGPU_DOORBELL64_VCN0_1; adev 85 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.vcn.vcn_ring2_3 = AMDGPU_DOORBELL64_VCN2_3; adev 86 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.vcn.vcn_ring4_5 = AMDGPU_DOORBELL64_VCN4_5; adev 87 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.vcn.vcn_ring6_7 = AMDGPU_DOORBELL64_VCN6_7; adev 89 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.first_non_cp = AMDGPU_DOORBELL64_FIRST_NON_CP; adev 90 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.last_non_cp = AMDGPU_DOORBELL64_LAST_NON_CP; adev 93 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.max_assignment = AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1; adev 94 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->doorbell_index.sdma_doorbell_range = 4; adev 30 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c int vega20_reg_base_init(struct amdgpu_device *adev) adev 35 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); adev 36 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); adev 37 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[MMHUB_HWIP][i] = (uint32_t *)(&(MMHUB_BASE.instance[i])); adev 38 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i])); adev 39 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i])); adev 40 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); adev 41 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i])); adev 42 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i])); adev 43 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[VCE_HWIP][i] = (uint32_t *)(&(VCE_BASE.instance[i])); adev 44 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[DF_HWIP][i] = (uint32_t *)(&(DF_BASE.instance[i])); adev 45 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[DCE_HWIP][i] = (uint32_t *)(&(DCE_BASE.instance[i])); adev 46 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); adev 47 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i])); adev 48 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i])); adev 49 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i])); adev 50 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[NBIF_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i])); adev 51 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i])); adev 52 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[CLK_HWIP][i] = (uint32_t *)(&(CLK_BASE.instance[i])); adev 53 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[UMC_HWIP][i] = (uint32_t *)(&(UMC_BASE.instance[i])); adev 54 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[RSMU_HWIP][i] = (uint32_t *)(&(RSMU_BASE.instance[i])); adev 59 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c void vega20_doorbell_index_init(struct amdgpu_device *adev) adev 61 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.kiq = AMDGPU_VEGA20_DOORBELL_KIQ; adev 62 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.mec_ring0 = AMDGPU_VEGA20_DOORBELL_MEC_RING0; adev 63 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.mec_ring1 = AMDGPU_VEGA20_DOORBELL_MEC_RING1; adev 64 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.mec_ring2 = AMDGPU_VEGA20_DOORBELL_MEC_RING2; adev 65 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.mec_ring3 = AMDGPU_VEGA20_DOORBELL_MEC_RING3; adev 66 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.mec_ring4 = AMDGPU_VEGA20_DOORBELL_MEC_RING4; adev 67 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.mec_ring5 = AMDGPU_VEGA20_DOORBELL_MEC_RING5; adev 68 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.mec_ring6 = AMDGPU_VEGA20_DOORBELL_MEC_RING6; adev 69 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.mec_ring7 = AMDGPU_VEGA20_DOORBELL_MEC_RING7; adev 70 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.userqueue_start = AMDGPU_VEGA20_DOORBELL_USERQUEUE_START; adev 71 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.userqueue_end = AMDGPU_VEGA20_DOORBELL_USERQUEUE_END; adev 72 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.gfx_ring0 = AMDGPU_VEGA20_DOORBELL_GFX_RING0; adev 73 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.sdma_engine[0] = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0; adev 74 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.sdma_engine[1] = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE1; adev 75 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.sdma_engine[2] = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE2; adev 76 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.sdma_engine[3] = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE3; adev 77 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.sdma_engine[4] = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE4; adev 78 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.sdma_engine[5] = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE5; adev 79 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.sdma_engine[6] = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE6; adev 80 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.sdma_engine[7] = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE7; adev 81 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.ih = AMDGPU_VEGA20_DOORBELL_IH; adev 82 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.uvd_vce.uvd_ring0_1 = AMDGPU_VEGA20_DOORBELL64_UVD_RING0_1; adev 83 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.uvd_vce.uvd_ring2_3 = AMDGPU_VEGA20_DOORBELL64_UVD_RING2_3; adev 84 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.uvd_vce.uvd_ring4_5 = AMDGPU_VEGA20_DOORBELL64_UVD_RING4_5; adev 85 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.uvd_vce.uvd_ring6_7 = AMDGPU_VEGA20_DOORBELL64_UVD_RING6_7; adev 86 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.uvd_vce.vce_ring0_1 = AMDGPU_VEGA20_DOORBELL64_VCE_RING0_1; adev 87 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.uvd_vce.vce_ring2_3 = AMDGPU_VEGA20_DOORBELL64_VCE_RING2_3; adev 88 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5; adev 89 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7; adev 90 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.vcn.vcn_ring0_1 = AMDGPU_VEGA20_DOORBELL64_VCN0_1; adev 91 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.vcn.vcn_ring2_3 = AMDGPU_VEGA20_DOORBELL64_VCN2_3; adev 92 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.vcn.vcn_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCN4_5; adev 93 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.vcn.vcn_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCN6_7; adev 95 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.first_non_cp = AMDGPU_VEGA20_DOORBELL64_FIRST_NON_CP; adev 96 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.last_non_cp = AMDGPU_VEGA20_DOORBELL64_LAST_NON_CP; adev 98 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.max_assignment = AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT << 1; adev 99 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->doorbell_index.sdma_doorbell_range = 20; adev 85 drivers/gpu/drm/amd/amdgpu/vi.c static u32 vi_pcie_rreg(struct amdgpu_device *adev, u32 reg) adev 90 drivers/gpu/drm/amd/amdgpu/vi.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 94 drivers/gpu/drm/amd/amdgpu/vi.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 98 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 102 drivers/gpu/drm/amd/amdgpu/vi.c spin_lock_irqsave(&adev->pcie_idx_lock, flags); adev 107 drivers/gpu/drm/amd/amdgpu/vi.c spin_unlock_irqrestore(&adev->pcie_idx_lock, flags); adev 110 drivers/gpu/drm/amd/amdgpu/vi.c static u32 vi_smc_rreg(struct amdgpu_device *adev, u32 reg) adev 115 drivers/gpu/drm/amd/amdgpu/vi.c spin_lock_irqsave(&adev->smc_idx_lock, flags); adev 118 drivers/gpu/drm/amd/amdgpu/vi.c spin_unlock_irqrestore(&adev->smc_idx_lock, flags); adev 122 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 126 drivers/gpu/drm/amd/amdgpu/vi.c spin_lock_irqsave(&adev->smc_idx_lock, flags); adev 129 drivers/gpu/drm/amd/amdgpu/vi.c spin_unlock_irqrestore(&adev->smc_idx_lock, flags); adev 136 drivers/gpu/drm/amd/amdgpu/vi.c static u32 cz_smc_rreg(struct amdgpu_device *adev, u32 reg) adev 141 drivers/gpu/drm/amd/amdgpu/vi.c spin_lock_irqsave(&adev->smc_idx_lock, flags); adev 144 drivers/gpu/drm/amd/amdgpu/vi.c spin_unlock_irqrestore(&adev->smc_idx_lock, flags); adev 148 drivers/gpu/drm/amd/amdgpu/vi.c static void cz_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 152 drivers/gpu/drm/amd/amdgpu/vi.c spin_lock_irqsave(&adev->smc_idx_lock, flags); adev 155 drivers/gpu/drm/amd/amdgpu/vi.c spin_unlock_irqrestore(&adev->smc_idx_lock, flags); adev 158 drivers/gpu/drm/amd/amdgpu/vi.c static u32 vi_uvd_ctx_rreg(struct amdgpu_device *adev, u32 reg) adev 163 drivers/gpu/drm/amd/amdgpu/vi.c spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags); adev 166 drivers/gpu/drm/amd/amdgpu/vi.c spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags); adev 170 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 174 drivers/gpu/drm/amd/amdgpu/vi.c spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags); adev 177 drivers/gpu/drm/amd/amdgpu/vi.c spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags); adev 180 drivers/gpu/drm/amd/amdgpu/vi.c static u32 vi_didt_rreg(struct amdgpu_device *adev, u32 reg) adev 185 drivers/gpu/drm/amd/amdgpu/vi.c spin_lock_irqsave(&adev->didt_idx_lock, flags); adev 188 drivers/gpu/drm/amd/amdgpu/vi.c spin_unlock_irqrestore(&adev->didt_idx_lock, flags); adev 192 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_didt_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 196 drivers/gpu/drm/amd/amdgpu/vi.c spin_lock_irqsave(&adev->didt_idx_lock, flags); adev 199 drivers/gpu/drm/amd/amdgpu/vi.c spin_unlock_irqrestore(&adev->didt_idx_lock, flags); adev 202 drivers/gpu/drm/amd/amdgpu/vi.c static u32 vi_gc_cac_rreg(struct amdgpu_device *adev, u32 reg) adev 207 drivers/gpu/drm/amd/amdgpu/vi.c spin_lock_irqsave(&adev->gc_cac_idx_lock, flags); adev 210 drivers/gpu/drm/amd/amdgpu/vi.c spin_unlock_irqrestore(&adev->gc_cac_idx_lock, flags); adev 214 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_gc_cac_wreg(struct amdgpu_device *adev, u32 reg, u32 v) adev 218 drivers/gpu/drm/amd/amdgpu/vi.c spin_lock_irqsave(&adev->gc_cac_idx_lock, flags); adev 221 drivers/gpu/drm/amd/amdgpu/vi.c spin_unlock_irqrestore(&adev->gc_cac_idx_lock, flags); adev 272 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_init_golden_registers(struct amdgpu_device *adev) adev 275 drivers/gpu/drm/amd/amdgpu/vi.c mutex_lock(&adev->grbm_idx_mutex); adev 277 drivers/gpu/drm/amd/amdgpu/vi.c if (amdgpu_sriov_vf(adev)) { adev 278 drivers/gpu/drm/amd/amdgpu/vi.c xgpu_vi_init_golden_registers(adev); adev 279 drivers/gpu/drm/amd/amdgpu/vi.c mutex_unlock(&adev->grbm_idx_mutex); adev 283 drivers/gpu/drm/amd/amdgpu/vi.c switch (adev->asic_type) { adev 285 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_program_register_sequence(adev, adev 290 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_program_register_sequence(adev, adev 295 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_program_register_sequence(adev, adev 300 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_program_register_sequence(adev, adev 305 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_program_register_sequence(adev, adev 316 drivers/gpu/drm/amd/amdgpu/vi.c mutex_unlock(&adev->grbm_idx_mutex); adev 327 drivers/gpu/drm/amd/amdgpu/vi.c static u32 vi_get_xclk(struct amdgpu_device *adev) adev 329 drivers/gpu/drm/amd/amdgpu/vi.c u32 reference_clock = adev->clock.spll.reference_freq; adev 332 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->flags & AMD_IS_APU) adev 359 drivers/gpu/drm/amd/amdgpu/vi.c void vi_srbm_select(struct amdgpu_device *adev, adev 370 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_vga_set_state(struct amdgpu_device *adev, bool state) adev 375 drivers/gpu/drm/amd/amdgpu/vi.c static bool vi_read_disabled_bios(struct amdgpu_device *adev) adev 385 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->mode_info.num_crtc) { adev 394 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->mode_info.num_crtc) { adev 407 drivers/gpu/drm/amd/amdgpu/vi.c r = amdgpu_read_bios(adev); adev 411 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->mode_info.num_crtc) { adev 420 drivers/gpu/drm/amd/amdgpu/vi.c static bool vi_read_bios_from_rom(struct amdgpu_device *adev, adev 432 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->flags & AMD_IS_APU) adev 438 drivers/gpu/drm/amd/amdgpu/vi.c spin_lock_irqsave(&adev->smc_idx_lock, flags); adev 446 drivers/gpu/drm/amd/amdgpu/vi.c spin_unlock_irqrestore(&adev->smc_idx_lock, flags); adev 451 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_detect_hw_virtualization(struct amdgpu_device *adev) adev 455 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->asic_type == CHIP_TONGA || adev 456 drivers/gpu/drm/amd/amdgpu/vi.c adev->asic_type == CHIP_FIJI) { adev 460 drivers/gpu/drm/amd/amdgpu/vi.c adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF; adev 463 drivers/gpu/drm/amd/amdgpu/vi.c adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV; adev 468 drivers/gpu/drm/amd/amdgpu/vi.c adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE; adev 551 drivers/gpu/drm/amd/amdgpu/vi.c static uint32_t vi_get_register_value(struct amdgpu_device *adev, adev 562 drivers/gpu/drm/amd/amdgpu/vi.c return adev->gfx.config.rb_config[se_idx][sh_idx].rb_backend_disable; adev 564 drivers/gpu/drm/amd/amdgpu/vi.c return adev->gfx.config.rb_config[se_idx][sh_idx].user_rb_backend_disable; adev 566 drivers/gpu/drm/amd/amdgpu/vi.c return adev->gfx.config.rb_config[se_idx][sh_idx].raster_config; adev 568 drivers/gpu/drm/amd/amdgpu/vi.c return adev->gfx.config.rb_config[se_idx][sh_idx].raster_config_1; adev 571 drivers/gpu/drm/amd/amdgpu/vi.c mutex_lock(&adev->grbm_idx_mutex); adev 573 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); adev 578 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_gfx_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff); adev 579 drivers/gpu/drm/amd/amdgpu/vi.c mutex_unlock(&adev->grbm_idx_mutex); adev 586 drivers/gpu/drm/amd/amdgpu/vi.c return adev->gfx.config.gb_addr_config; adev 588 drivers/gpu/drm/amd/amdgpu/vi.c return adev->gfx.config.mc_arb_ramcfg; adev 622 drivers/gpu/drm/amd/amdgpu/vi.c return adev->gfx.config.tile_mode_array[idx]; adev 640 drivers/gpu/drm/amd/amdgpu/vi.c return adev->gfx.config.macrotile_mode_array[idx]; adev 647 drivers/gpu/drm/amd/amdgpu/vi.c static int vi_read_register(struct amdgpu_device *adev, u32 se_num, adev 659 drivers/gpu/drm/amd/amdgpu/vi.c *value = vi_get_register_value(adev, indexed, se_num, sh_num, adev 666 drivers/gpu/drm/amd/amdgpu/vi.c static int vi_gpu_pci_config_reset(struct amdgpu_device *adev) adev 670 drivers/gpu/drm/amd/amdgpu/vi.c dev_info(adev->dev, "GPU pci config reset\n"); adev 673 drivers/gpu/drm/amd/amdgpu/vi.c pci_clear_master(adev->pdev); adev 675 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_pci_config_reset(adev); adev 680 drivers/gpu/drm/amd/amdgpu/vi.c for (i = 0; i < adev->usec_timeout; i++) { adev 683 drivers/gpu/drm/amd/amdgpu/vi.c pci_set_master(adev->pdev); adev 684 drivers/gpu/drm/amd/amdgpu/vi.c adev->has_hw_reset = true; adev 701 drivers/gpu/drm/amd/amdgpu/vi.c static int vi_asic_reset(struct amdgpu_device *adev) adev 705 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_atombios_scratch_regs_engine_hung(adev, true); adev 707 drivers/gpu/drm/amd/amdgpu/vi.c r = vi_gpu_pci_config_reset(adev); adev 709 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_atombios_scratch_regs_engine_hung(adev, false); adev 715 drivers/gpu/drm/amd/amdgpu/vi.c vi_asic_reset_method(struct amdgpu_device *adev) adev 720 drivers/gpu/drm/amd/amdgpu/vi.c static u32 vi_get_config_memsize(struct amdgpu_device *adev) adev 725 drivers/gpu/drm/amd/amdgpu/vi.c static int vi_set_uvd_clock(struct amdgpu_device *adev, u32 clock, adev 732 drivers/gpu/drm/amd/amdgpu/vi.c r = amdgpu_atombios_get_clock_dividers(adev, adev 740 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->flags & AMD_IS_APU) adev 750 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->flags & AMD_IS_APU) { adev 771 drivers/gpu/drm/amd/amdgpu/vi.c static int vi_set_uvd_clocks(struct amdgpu_device *adev, u32 vclk, u32 dclk) adev 775 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->flags & AMD_IS_APU) { adev 776 drivers/gpu/drm/amd/amdgpu/vi.c r = vi_set_uvd_clock(adev, vclk, ixGNB_CLK2_DFS_CNTL, ixGNB_CLK2_STATUS); adev 780 drivers/gpu/drm/amd/amdgpu/vi.c r = vi_set_uvd_clock(adev, dclk, ixGNB_CLK1_DFS_CNTL, ixGNB_CLK1_STATUS); adev 784 drivers/gpu/drm/amd/amdgpu/vi.c r = vi_set_uvd_clock(adev, vclk, ixCG_VCLK_CNTL, ixCG_VCLK_STATUS); adev 788 drivers/gpu/drm/amd/amdgpu/vi.c r = vi_set_uvd_clock(adev, dclk, ixCG_DCLK_CNTL, ixCG_DCLK_STATUS); adev 796 drivers/gpu/drm/amd/amdgpu/vi.c static int vi_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) adev 806 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->flags & AMD_IS_APU) { adev 818 drivers/gpu/drm/amd/amdgpu/vi.c r = amdgpu_atombios_get_clock_dividers(adev, adev 850 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_pcie_gen3_enable(struct amdgpu_device *adev) adev 852 drivers/gpu/drm/amd/amdgpu/vi.c if (pci_is_root_bus(adev->pdev->bus)) adev 858 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->flags & AMD_IS_APU) adev 861 drivers/gpu/drm/amd/amdgpu/vi.c if (!(adev->pm.pcie_gen_mask & (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 | adev 868 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_program_aspm(struct amdgpu_device *adev) adev 877 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_enable_doorbell_aperture(struct amdgpu_device *adev, adev 883 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->flags & AMD_IS_APU) adev 899 drivers/gpu/drm/amd/amdgpu/vi.c static uint32_t vi_get_rev_id(struct amdgpu_device *adev) adev 901 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->flags & AMD_IS_APU) adev 909 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_flush_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring) adev 919 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_invalidate_hdp(struct amdgpu_device *adev, adev 930 drivers/gpu/drm/amd/amdgpu/vi.c static bool vi_need_full_reset(struct amdgpu_device *adev) adev 932 drivers/gpu/drm/amd/amdgpu/vi.c switch (adev->asic_type) { adev 951 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_get_pcie_usage(struct amdgpu_device *adev, uint64_t *count0, adev 961 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->flags & AMD_IS_APU) adev 997 drivers/gpu/drm/amd/amdgpu/vi.c static uint64_t vi_get_pcie_replay_count(struct amdgpu_device *adev) adev 1009 drivers/gpu/drm/amd/amdgpu/vi.c static bool vi_need_reset_on_init(struct amdgpu_device *adev) adev 1013 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->flags & AMD_IS_APU) adev 1052 drivers/gpu/drm/amd/amdgpu/vi.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1054 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->flags & AMD_IS_APU) { adev 1055 drivers/gpu/drm/amd/amdgpu/vi.c adev->smc_rreg = &cz_smc_rreg; adev 1056 drivers/gpu/drm/amd/amdgpu/vi.c adev->smc_wreg = &cz_smc_wreg; adev 1058 drivers/gpu/drm/amd/amdgpu/vi.c adev->smc_rreg = &vi_smc_rreg; adev 1059 drivers/gpu/drm/amd/amdgpu/vi.c adev->smc_wreg = &vi_smc_wreg; adev 1061 drivers/gpu/drm/amd/amdgpu/vi.c adev->pcie_rreg = &vi_pcie_rreg; adev 1062 drivers/gpu/drm/amd/amdgpu/vi.c adev->pcie_wreg = &vi_pcie_wreg; adev 1063 drivers/gpu/drm/amd/amdgpu/vi.c adev->uvd_ctx_rreg = &vi_uvd_ctx_rreg; adev 1064 drivers/gpu/drm/amd/amdgpu/vi.c adev->uvd_ctx_wreg = &vi_uvd_ctx_wreg; adev 1065 drivers/gpu/drm/amd/amdgpu/vi.c adev->didt_rreg = &vi_didt_rreg; adev 1066 drivers/gpu/drm/amd/amdgpu/vi.c adev->didt_wreg = &vi_didt_wreg; adev 1067 drivers/gpu/drm/amd/amdgpu/vi.c adev->gc_cac_rreg = &vi_gc_cac_rreg; adev 1068 drivers/gpu/drm/amd/amdgpu/vi.c adev->gc_cac_wreg = &vi_gc_cac_wreg; adev 1070 drivers/gpu/drm/amd/amdgpu/vi.c adev->asic_funcs = &vi_asic_funcs; adev 1072 drivers/gpu/drm/amd/amdgpu/vi.c adev->rev_id = vi_get_rev_id(adev); adev 1073 drivers/gpu/drm/amd/amdgpu/vi.c adev->external_rev_id = 0xFF; adev 1074 drivers/gpu/drm/amd/amdgpu/vi.c switch (adev->asic_type) { adev 1076 drivers/gpu/drm/amd/amdgpu/vi.c adev->cg_flags = 0; adev 1077 drivers/gpu/drm/amd/amdgpu/vi.c adev->pg_flags = 0; adev 1078 drivers/gpu/drm/amd/amdgpu/vi.c adev->external_rev_id = 0x1; adev 1081 drivers/gpu/drm/amd/amdgpu/vi.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 1098 drivers/gpu/drm/amd/amdgpu/vi.c adev->pg_flags = 0; adev 1099 drivers/gpu/drm/amd/amdgpu/vi.c adev->external_rev_id = adev->rev_id + 0x3c; adev 1102 drivers/gpu/drm/amd/amdgpu/vi.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 1115 drivers/gpu/drm/amd/amdgpu/vi.c adev->pg_flags = 0; adev 1116 drivers/gpu/drm/amd/amdgpu/vi.c adev->external_rev_id = adev->rev_id + 0x14; adev 1119 drivers/gpu/drm/amd/amdgpu/vi.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 1138 drivers/gpu/drm/amd/amdgpu/vi.c adev->pg_flags = 0; adev 1139 drivers/gpu/drm/amd/amdgpu/vi.c adev->external_rev_id = adev->rev_id + 0x5A; adev 1142 drivers/gpu/drm/amd/amdgpu/vi.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 1161 drivers/gpu/drm/amd/amdgpu/vi.c adev->pg_flags = 0; adev 1162 drivers/gpu/drm/amd/amdgpu/vi.c adev->external_rev_id = adev->rev_id + 0x50; adev 1165 drivers/gpu/drm/amd/amdgpu/vi.c adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | adev 1184 drivers/gpu/drm/amd/amdgpu/vi.c adev->pg_flags = 0; adev 1185 drivers/gpu/drm/amd/amdgpu/vi.c adev->external_rev_id = adev->rev_id + 0x64; adev 1188 drivers/gpu/drm/amd/amdgpu/vi.c adev->cg_flags = 0; adev 1208 drivers/gpu/drm/amd/amdgpu/vi.c adev->pg_flags = 0; adev 1209 drivers/gpu/drm/amd/amdgpu/vi.c adev->external_rev_id = adev->rev_id + 0x6E; adev 1212 drivers/gpu/drm/amd/amdgpu/vi.c adev->cg_flags = AMD_CG_SUPPORT_UVD_MGCG | adev 1228 drivers/gpu/drm/amd/amdgpu/vi.c adev->pg_flags = 0; adev 1229 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->rev_id != 0x00 || CZ_REV_BRISTOL(adev->pdev->revision)) { adev 1230 drivers/gpu/drm/amd/amdgpu/vi.c adev->pg_flags |= AMD_PG_SUPPORT_GFX_SMG | adev 1236 drivers/gpu/drm/amd/amdgpu/vi.c adev->external_rev_id = adev->rev_id + 0x1; adev 1239 drivers/gpu/drm/amd/amdgpu/vi.c adev->cg_flags = AMD_CG_SUPPORT_UVD_MGCG | adev 1253 drivers/gpu/drm/amd/amdgpu/vi.c adev->pg_flags = AMD_PG_SUPPORT_GFX_PG | adev 1259 drivers/gpu/drm/amd/amdgpu/vi.c adev->external_rev_id = adev->rev_id + 0x61; adev 1266 drivers/gpu/drm/amd/amdgpu/vi.c if (amdgpu_sriov_vf(adev)) { adev 1267 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_virt_init_setting(adev); adev 1268 drivers/gpu/drm/amd/amdgpu/vi.c xgpu_vi_mailbox_set_irq_funcs(adev); adev 1276 drivers/gpu/drm/amd/amdgpu/vi.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1278 drivers/gpu/drm/amd/amdgpu/vi.c if (amdgpu_sriov_vf(adev)) adev 1279 drivers/gpu/drm/amd/amdgpu/vi.c xgpu_vi_mailbox_get_irq(adev); adev 1286 drivers/gpu/drm/amd/amdgpu/vi.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1288 drivers/gpu/drm/amd/amdgpu/vi.c if (amdgpu_sriov_vf(adev)) adev 1289 drivers/gpu/drm/amd/amdgpu/vi.c xgpu_vi_mailbox_add_irq_id(adev); adev 1301 drivers/gpu/drm/amd/amdgpu/vi.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1304 drivers/gpu/drm/amd/amdgpu/vi.c vi_init_golden_registers(adev); adev 1306 drivers/gpu/drm/amd/amdgpu/vi.c vi_pcie_gen3_enable(adev); adev 1308 drivers/gpu/drm/amd/amdgpu/vi.c vi_program_aspm(adev); adev 1310 drivers/gpu/drm/amd/amdgpu/vi.c vi_enable_doorbell_aperture(adev, true); adev 1317 drivers/gpu/drm/amd/amdgpu/vi.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1320 drivers/gpu/drm/amd/amdgpu/vi.c vi_enable_doorbell_aperture(adev, false); adev 1322 drivers/gpu/drm/amd/amdgpu/vi.c if (amdgpu_sriov_vf(adev)) adev 1323 drivers/gpu/drm/amd/amdgpu/vi.c xgpu_vi_mailbox_put_irq(adev); adev 1330 drivers/gpu/drm/amd/amdgpu/vi.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1332 drivers/gpu/drm/amd/amdgpu/vi.c return vi_common_hw_fini(adev); adev 1337 drivers/gpu/drm/amd/amdgpu/vi.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1339 drivers/gpu/drm/amd/amdgpu/vi.c return vi_common_hw_init(adev); adev 1357 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_update_bif_medium_grain_light_sleep(struct amdgpu_device *adev, adev 1364 drivers/gpu/drm/amd/amdgpu/vi.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_BIF_LS)) adev 1377 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_update_hdp_medium_grain_clock_gating(struct amdgpu_device *adev, adev 1384 drivers/gpu/drm/amd/amdgpu/vi.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_HDP_MGCG)) adev 1393 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_update_hdp_light_sleep(struct amdgpu_device *adev, adev 1400 drivers/gpu/drm/amd/amdgpu/vi.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_HDP_LS)) adev 1409 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_update_drm_light_sleep(struct amdgpu_device *adev, adev 1416 drivers/gpu/drm/amd/amdgpu/vi.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_DRM_LS)) adev 1426 drivers/gpu/drm/amd/amdgpu/vi.c static void vi_update_rom_medium_grain_clock_gating(struct amdgpu_device *adev, adev 1433 drivers/gpu/drm/amd/amdgpu/vi.c if (enable && (adev->cg_flags & AMD_CG_SUPPORT_ROM_MGCG)) adev 1449 drivers/gpu/drm/amd/amdgpu/vi.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1451 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->cg_flags & (AMD_CG_SUPPORT_MC_LS | AMD_CG_SUPPORT_MC_MGCG)) { adev 1452 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->cg_flags & AMD_CG_SUPPORT_MC_LS) { adev 1456 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->cg_flags & AMD_CG_SUPPORT_MC_MGCG) { adev 1466 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->powerplay.pp_funcs->set_clockgating_by_smu) adev 1467 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_dpm_set_clockgating_by_smu(adev, msg_id); adev 1470 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->cg_flags & (AMD_CG_SUPPORT_SDMA_LS | AMD_CG_SUPPORT_SDMA_MGCG)) { adev 1471 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->cg_flags & AMD_CG_SUPPORT_SDMA_LS) { adev 1475 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG) { adev 1485 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->powerplay.pp_funcs->set_clockgating_by_smu) adev 1486 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_dpm_set_clockgating_by_smu(adev, msg_id); adev 1489 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->cg_flags & (AMD_CG_SUPPORT_HDP_LS | AMD_CG_SUPPORT_HDP_MGCG)) { adev 1490 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->cg_flags & AMD_CG_SUPPORT_HDP_LS) { adev 1494 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->cg_flags & AMD_CG_SUPPORT_HDP_MGCG) { adev 1504 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->powerplay.pp_funcs->set_clockgating_by_smu) adev 1505 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_dpm_set_clockgating_by_smu(adev, msg_id); adev 1509 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->cg_flags & AMD_CG_SUPPORT_BIF_LS) { adev 1519 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->powerplay.pp_funcs->set_clockgating_by_smu) adev 1520 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_dpm_set_clockgating_by_smu(adev, msg_id); adev 1522 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->cg_flags & AMD_CG_SUPPORT_BIF_MGCG) { adev 1532 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->powerplay.pp_funcs->set_clockgating_by_smu) adev 1533 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_dpm_set_clockgating_by_smu(adev, msg_id); adev 1536 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->cg_flags & AMD_CG_SUPPORT_DRM_LS) { adev 1547 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->powerplay.pp_funcs->set_clockgating_by_smu) adev 1548 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_dpm_set_clockgating_by_smu(adev, msg_id); adev 1551 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->cg_flags & AMD_CG_SUPPORT_ROM_MGCG) { adev 1562 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->powerplay.pp_funcs->set_clockgating_by_smu) adev 1563 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_dpm_set_clockgating_by_smu(adev, msg_id); adev 1571 drivers/gpu/drm/amd/amdgpu/vi.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1573 drivers/gpu/drm/amd/amdgpu/vi.c if (amdgpu_sriov_vf(adev)) adev 1576 drivers/gpu/drm/amd/amdgpu/vi.c switch (adev->asic_type) { adev 1578 drivers/gpu/drm/amd/amdgpu/vi.c vi_update_bif_medium_grain_light_sleep(adev, adev 1580 drivers/gpu/drm/amd/amdgpu/vi.c vi_update_hdp_medium_grain_clock_gating(adev, adev 1582 drivers/gpu/drm/amd/amdgpu/vi.c vi_update_hdp_light_sleep(adev, adev 1584 drivers/gpu/drm/amd/amdgpu/vi.c vi_update_rom_medium_grain_clock_gating(adev, adev 1589 drivers/gpu/drm/amd/amdgpu/vi.c vi_update_bif_medium_grain_light_sleep(adev, adev 1591 drivers/gpu/drm/amd/amdgpu/vi.c vi_update_hdp_medium_grain_clock_gating(adev, adev 1593 drivers/gpu/drm/amd/amdgpu/vi.c vi_update_hdp_light_sleep(adev, adev 1595 drivers/gpu/drm/amd/amdgpu/vi.c vi_update_drm_light_sleep(adev, adev 1603 drivers/gpu/drm/amd/amdgpu/vi.c vi_common_set_clockgating_state_by_smu(adev, state); adev 1618 drivers/gpu/drm/amd/amdgpu/vi.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1621 drivers/gpu/drm/amd/amdgpu/vi.c if (amdgpu_sriov_vf(adev)) adev 1672 drivers/gpu/drm/amd/amdgpu/vi.c int vi_set_ip_blocks(struct amdgpu_device *adev) adev 1675 drivers/gpu/drm/amd/amdgpu/vi.c vi_detect_hw_virtualization(adev); adev 1677 drivers/gpu/drm/amd/amdgpu/vi.c if (amdgpu_sriov_vf(adev)) adev 1678 drivers/gpu/drm/amd/amdgpu/vi.c adev->virt.ops = &xgpu_vi_virt_ops; adev 1680 drivers/gpu/drm/amd/amdgpu/vi.c switch (adev->asic_type) { adev 1683 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &vi_common_ip_block); adev 1684 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &gmc_v7_4_ip_block); adev 1685 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &iceland_ih_ip_block); adev 1686 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); adev 1687 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &sdma_v2_4_ip_block); adev 1688 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); adev 1689 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->enable_virtual_display) adev 1690 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 1693 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &vi_common_ip_block); adev 1694 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &gmc_v8_5_ip_block); adev 1695 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block); adev 1696 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); adev 1697 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); adev 1698 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); adev 1699 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) adev 1700 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 1702 drivers/gpu/drm/amd/amdgpu/vi.c else if (amdgpu_device_has_dc_support(adev)) adev 1703 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dm_ip_block); adev 1706 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dce_v10_1_ip_block); adev 1707 drivers/gpu/drm/amd/amdgpu/vi.c if (!amdgpu_sriov_vf(adev)) { adev 1708 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block); adev 1709 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block); adev 1713 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &vi_common_ip_block); adev 1714 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block); adev 1715 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block); adev 1716 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); adev 1717 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); adev 1718 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); adev 1719 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) adev 1720 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 1722 drivers/gpu/drm/amd/amdgpu/vi.c else if (amdgpu_device_has_dc_support(adev)) adev 1723 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dm_ip_block); adev 1726 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dce_v10_0_ip_block); adev 1727 drivers/gpu/drm/amd/amdgpu/vi.c if (!amdgpu_sriov_vf(adev)) { adev 1728 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &uvd_v5_0_ip_block); adev 1729 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block); adev 1736 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &vi_common_ip_block); adev 1737 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &gmc_v8_1_ip_block); adev 1738 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block); adev 1739 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); adev 1740 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block); adev 1741 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); adev 1742 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->enable_virtual_display) adev 1743 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 1745 drivers/gpu/drm/amd/amdgpu/vi.c else if (amdgpu_device_has_dc_support(adev)) adev 1746 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dm_ip_block); adev 1749 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dce_v11_2_ip_block); adev 1750 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &uvd_v6_3_ip_block); adev 1751 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block); adev 1754 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &vi_common_ip_block); adev 1755 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block); adev 1756 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &cz_ih_ip_block); adev 1757 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); adev 1758 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); adev 1759 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); adev 1760 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->enable_virtual_display) adev 1761 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 1763 drivers/gpu/drm/amd/amdgpu/vi.c else if (amdgpu_device_has_dc_support(adev)) adev 1764 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dm_ip_block); adev 1767 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dce_v11_0_ip_block); adev 1768 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block); adev 1769 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &vce_v3_1_ip_block); adev 1771 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &acp_ip_block); adev 1775 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &vi_common_ip_block); adev 1776 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block); adev 1777 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &cz_ih_ip_block); adev 1778 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &gfx_v8_1_ip_block); adev 1779 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); adev 1780 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); adev 1781 drivers/gpu/drm/amd/amdgpu/vi.c if (adev->enable_virtual_display) adev 1782 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); adev 1784 drivers/gpu/drm/amd/amdgpu/vi.c else if (amdgpu_device_has_dc_support(adev)) adev 1785 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dm_ip_block); adev 1788 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &dce_v11_0_ip_block); adev 1789 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &uvd_v6_2_ip_block); adev 1790 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block); adev 1792 drivers/gpu/drm/amd/amdgpu/vi.c amdgpu_device_ip_block_add(adev, &acp_ip_block); adev 1803 drivers/gpu/drm/amd/amdgpu/vi.c void legacy_doorbell_index_init(struct amdgpu_device *adev) adev 1805 drivers/gpu/drm/amd/amdgpu/vi.c adev->doorbell_index.kiq = AMDGPU_DOORBELL_KIQ; adev 1806 drivers/gpu/drm/amd/amdgpu/vi.c adev->doorbell_index.mec_ring0 = AMDGPU_DOORBELL_MEC_RING0; adev 1807 drivers/gpu/drm/amd/amdgpu/vi.c adev->doorbell_index.mec_ring1 = AMDGPU_DOORBELL_MEC_RING1; adev 1808 drivers/gpu/drm/amd/amdgpu/vi.c adev->doorbell_index.mec_ring2 = AMDGPU_DOORBELL_MEC_RING2; adev 1809 drivers/gpu/drm/amd/amdgpu/vi.c adev->doorbell_index.mec_ring3 = AMDGPU_DOORBELL_MEC_RING3; adev 1810 drivers/gpu/drm/amd/amdgpu/vi.c adev->doorbell_index.mec_ring4 = AMDGPU_DOORBELL_MEC_RING4; adev 1811 drivers/gpu/drm/amd/amdgpu/vi.c adev->doorbell_index.mec_ring5 = AMDGPU_DOORBELL_MEC_RING5; adev 1812 drivers/gpu/drm/amd/amdgpu/vi.c adev->doorbell_index.mec_ring6 = AMDGPU_DOORBELL_MEC_RING6; adev 1813 drivers/gpu/drm/amd/amdgpu/vi.c adev->doorbell_index.mec_ring7 = AMDGPU_DOORBELL_MEC_RING7; adev 1814 drivers/gpu/drm/amd/amdgpu/vi.c adev->doorbell_index.gfx_ring0 = AMDGPU_DOORBELL_GFX_RING0; adev 1815 drivers/gpu/drm/amd/amdgpu/vi.c adev->doorbell_index.sdma_engine[0] = AMDGPU_DOORBELL_sDMA_ENGINE0; adev 1816 drivers/gpu/drm/amd/amdgpu/vi.c adev->doorbell_index.sdma_engine[1] = AMDGPU_DOORBELL_sDMA_ENGINE1; adev 1817 drivers/gpu/drm/amd/amdgpu/vi.c adev->doorbell_index.ih = AMDGPU_DOORBELL_IH; adev 1818 drivers/gpu/drm/amd/amdgpu/vi.c adev->doorbell_index.max_assignment = AMDGPU_DOORBELL_MAX_ASSIGNMENT; adev 29 drivers/gpu/drm/amd/amdgpu/vi.h void vi_srbm_select(struct amdgpu_device *adev, adev 31 drivers/gpu/drm/amd/amdgpu/vi.h int vi_set_ip_blocks(struct amdgpu_device *adev); adev 33 drivers/gpu/drm/amd/amdgpu/vi.h void legacy_doorbell_index_init(struct amdgpu_device *adev); adev 100 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int amdgpu_dm_init(struct amdgpu_device *adev); adev 101 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void amdgpu_dm_fini(struct amdgpu_device *adev); adev 110 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev); adev 159 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static u32 dm_vblank_get_counter(struct amdgpu_device *adev, int crtc) adev 161 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (crtc >= adev->mode_info.num_crtc) adev 164 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc]; adev 179 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int dm_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, adev 184 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc)) adev 187 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc]; adev 238 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c get_crtc_by_otg_inst(struct amdgpu_device *adev, adev 241 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_device *dev = adev->ddev; adev 247 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c return adev->mode_info.crtcs[0]; adev 270 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = irq_params->adev; adev 277 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_crtc = get_crtc_by_otg_inst(adev, irq_params->irq_src - IRQ_TYPE_PFLIP); adev 286 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_lock_irqsave(&adev->ddev->event_lock, flags); adev 294 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 346 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c list_add_tail(&e->base.link, &adev->ddev->vblank_event_list); adev 355 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_crtc->last_flip_vblank = amdgpu_get_vblank_counter_kms(adev->ddev, adev 359 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 369 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = irq_params->adev; adev 374 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c acrtc = get_crtc_by_otg_inst(adev, irq_params->irq_src - IRQ_TYPE_VUPDATE); adev 393 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->family < AMDGPU_FAMILY_AI) { adev 394 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_lock_irqsave(&adev->ddev->event_lock, flags); adev 396 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.freesync_module, adev 401 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.dc, adev 404 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 413 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = irq_params->adev; adev 418 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c acrtc = get_crtc_by_otg_inst(adev, irq_params->irq_src - IRQ_TYPE_VBLANK); adev 439 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (acrtc_state->stream && adev->family >= AMDGPU_FAMILY_AI && adev 442 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_lock_irqsave(&adev->ddev->event_lock, flags); adev 444 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.freesync_module, adev 449 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.dc, adev 452 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 476 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 477 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dm_comressor_info *compressor = &adev->dm.compressor; adev 482 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (adev->dm.dc->fbc_compressor == NULL) adev 498 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c int r = amdgpu_bo_create_kernel(adev, max_size * 4, PAGE_SIZE, adev 505 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.dc->ctx->fbc_gpu_addr = compressor->gpu_addr; adev 518 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 526 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mutex_lock(&adev->dm.audio_lock); adev 542 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mutex_unlock(&adev->dm.audio_lock); adev 557 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 562 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.audio_component = acomp; adev 571 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 576 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.audio_component = NULL; adev 584 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int amdgpu_dm_audio_init(struct amdgpu_device *adev) adev 591 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.audio.enabled = true; adev 593 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.audio.num_pins = adev->dm.dc->res_pool->audio_count; adev 595 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for (i = 0; i < adev->mode_info.audio.num_pins; i++) { adev 596 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.audio.pin[i].channels = -1; adev 597 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.audio.pin[i].rate = -1; adev 598 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.audio.pin[i].bits_per_sample = -1; adev 599 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.audio.pin[i].status_bits = 0; adev 600 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.audio.pin[i].category_code = 0; adev 601 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.audio.pin[i].connected = false; adev 602 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.audio.pin[i].id = adev 603 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.dc->res_pool->audios[i]->inst; adev 604 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.audio.pin[i].offset = 0; adev 607 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = component_add(adev->dev, &amdgpu_dm_audio_component_bind_ops); adev 611 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.audio_registered = true; adev 616 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void amdgpu_dm_audio_fini(struct amdgpu_device *adev) adev 621 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!adev->mode_info.audio.enabled) adev 624 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (adev->dm.audio_registered) { adev 625 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c component_del(adev->dev, &amdgpu_dm_audio_component_bind_ops); adev 626 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.audio_registered = false; adev 631 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.audio.enabled = false; adev 634 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c void amdgpu_dm_audio_eld_notify(struct amdgpu_device *adev, int pin) adev 636 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_audio_component *acomp = adev->dm.audio_component; adev 646 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int amdgpu_dm_init(struct amdgpu_device *adev) adev 649 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.ddev = adev->ddev; adev 650 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.adev = adev; adev 655 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mutex_init(&adev->dm.dc_lock); adev 656 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mutex_init(&adev->dm.audio_lock); adev 658 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if(amdgpu_dm_irq_init(adev)) { adev 663 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c init_data.asic_id.chip_family = adev->family; adev 665 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c init_data.asic_id.pci_revision_id = adev->rev_id; adev 666 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c init_data.asic_id.hw_internal_rev = adev->external_rev_id; adev 668 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c init_data.asic_id.vram_width = adev->gmc.vram_width; adev 671 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.atom_context->bios; adev 673 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c init_data.driver = adev; adev 675 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.cgs_device = amdgpu_cgs_create_device(adev); adev 677 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!adev->dm.cgs_device) { adev 682 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c init_data.cgs_device = adev->dm.cgs_device; adev 689 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (adev->flags & AMD_IS_APU && adev 690 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->asic_type >= CHIP_CARRIZO && adev 691 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->asic_type < CHIP_RAVEN) adev 703 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c init_data.soc_bounding_box = adev->dm.soc_bounding_box; adev 707 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.dc = dc_create(&init_data); adev 709 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (adev->dm.dc) { adev 716 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.freesync_module = mod_freesync_create(adev->dm.dc); adev 717 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!adev->dm.freesync_module) { adev 722 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.freesync_module); adev 726 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (amdgpu_dm_initialize_drm_device(adev)) { adev 733 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_crtc = adev->dm.display_indexes_num; adev 738 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->ddev->mode_config.cursor_width = adev->dm.dc->caps.max_cursor_size; adev 739 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->ddev->mode_config.cursor_height = adev->dm.dc->caps.max_cursor_size; adev 741 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (drm_vblank_init(adev->ddev, adev->dm.display_indexes_num)) { adev 748 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (dtn_debugfs_init(adev)) adev 756 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_fini(adev); adev 761 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void amdgpu_dm_fini(struct amdgpu_device *adev) adev 763 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_audio_fini(adev); adev 765 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_destroy_drm_device(&adev->dm); adev 768 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (adev->dm.dc) adev 769 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dc_destroy(&adev->dm.dc); adev 776 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (adev->dm.cgs_device) { adev 777 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_cgs_destroy_device(adev->dm.cgs_device); adev 778 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.cgs_device = NULL; adev 780 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (adev->dm.freesync_module) { adev 781 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mod_freesync_destroy(adev->dm.freesync_module); adev 782 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.freesync_module = NULL; adev 785 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mutex_destroy(&adev->dm.audio_lock); adev 786 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mutex_destroy(&adev->dm.dc_lock); adev 791 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int load_dmcu_fw(struct amdgpu_device *adev) adev 797 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c switch(adev->asic_type) { adev 820 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (ASICREV_IS_PICASSO(adev->external_rev_id)) adev 822 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c else if (ASICREV_IS_RAVEN2(adev->external_rev_id)) adev 828 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c DRM_ERROR("Unsupported ASIC type: 0x%X\n", adev->asic_type); adev 832 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) { adev 837 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c r = request_firmware_direct(&adev->dm.fw_dmcu, fw_name_dmcu, adev->dev); adev 841 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.fw_dmcu = NULL; adev 845 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dev_err(adev->dev, "amdgpu_dm: Can't load firmware \"%s\"\n", adev 850 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c r = amdgpu_ucode_validate(adev->dm.fw_dmcu); adev 852 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dev_err(adev->dev, "amdgpu_dm: Can't validate firmware \"%s\"\n", adev 854 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c release_firmware(adev->dm.fw_dmcu); adev 855 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.fw_dmcu = NULL; adev 859 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c hdr = (const struct dmcu_firmware_header_v1_0 *)adev->dm.fw_dmcu->data; adev 860 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->firmware.ucode[AMDGPU_UCODE_ID_DMCU_ERAM].ucode_id = AMDGPU_UCODE_ID_DMCU_ERAM; adev 861 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->firmware.ucode[AMDGPU_UCODE_ID_DMCU_ERAM].fw = adev->dm.fw_dmcu; adev 862 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->firmware.fw_size += adev 865 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->firmware.ucode[AMDGPU_UCODE_ID_DMCU_INTV].ucode_id = AMDGPU_UCODE_ID_DMCU_INTV; adev 866 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->firmware.ucode[AMDGPU_UCODE_ID_DMCU_INTV].fw = adev->dm.fw_dmcu; adev 867 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->firmware.fw_size += adev 870 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.dmcu_fw_version = le32_to_cpu(hdr->header.ucode_version); adev 879 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 881 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c return load_dmcu_fw(adev); adev 886 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 888 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if(adev->dm.fw_dmcu) { adev 889 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c release_firmware(adev->dm.fw_dmcu); adev 890 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.fw_dmcu = NULL; adev 926 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 931 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dmcu *dmcu = adev->dm.dc->res_pool->dmcu; adev 949 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (adev->asic_type <= CHIP_RAVEN) { adev 956 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c return detect_mst_link_for_all_connectors(adev->ddev); adev 1017 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1019 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_init(adev); adev 1020 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_hpd_init(adev); adev 1035 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1037 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_hpd_fini(adev); adev 1039 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_irq_fini(adev); adev 1040 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_fini(adev); adev 1046 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = handle; adev 1047 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_display_manager *dm = &adev->dm; adev 1050 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c WARN_ON(adev->dm.cached_state); adev 1051 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.cached_state = drm_atomic_helper_suspend(adev->ddev); adev 1053 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c s3_handle_mst(adev->ddev, true); adev 1055 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_irq_suspend(adev); adev 1166 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = handle; adev 1167 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_device *ddev = adev->ddev; adev 1168 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_display_manager *dm = &adev->dm; adev 1200 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_irq_resume_early(adev); adev 1263 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_irq_resume_late(adev); adev 1644 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void register_hpd_handlers(struct amdgpu_device *adev) adev 1646 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_device *dev = adev->ddev; adev 1665 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_irq_register_interrupt(adev, &int_params, adev 1676 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_irq_register_interrupt(adev, &int_params, adev 1684 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int dce110_register_irq_handlers(struct amdgpu_device *adev) adev 1686 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dc *dc = adev->dm.dc; adev 1693 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (adev->asic_type >= CHIP_VEGA10) adev 1712 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c r = amdgpu_irq_add_id(adev, client_id, i, &adev->crtc_irq); adev 1722 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c c_irq_params = &adev->dm.vblank_params[int_params.irq_source - DC_IRQ_SOURCE_VBLANK1]; adev 1724 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c c_irq_params->adev = adev; adev 1727 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_irq_register_interrupt(adev, &int_params, adev 1733 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c r = amdgpu_irq_add_id(adev, client_id, i, &adev->vupdate_irq); adev 1743 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c c_irq_params = &adev->dm.vupdate_params[int_params.irq_source - DC_IRQ_SOURCE_VUPDATE1]; adev 1745 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c c_irq_params->adev = adev; adev 1748 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_irq_register_interrupt(adev, &int_params, adev 1755 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c r = amdgpu_irq_add_id(adev, client_id, i, &adev->pageflip_irq); adev 1765 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c c_irq_params = &adev->dm.pflip_params[int_params.irq_source - DC_IRQ_SOURCE_PFLIP_FIRST]; adev 1767 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c c_irq_params->adev = adev; adev 1770 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_irq_register_interrupt(adev, &int_params, adev 1776 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c r = amdgpu_irq_add_id(adev, client_id, adev 1777 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A, &adev->hpd_irq); adev 1783 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c register_hpd_handlers(adev); adev 1790 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int dcn10_register_irq_handlers(struct amdgpu_device *adev) adev 1792 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dc *dc = adev->dm.dc; adev 1815 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c i <= DCN_1_0__SRCID__DC_D1_OTG_VSTARTUP + adev->mode_info.num_crtc - 1; adev 1817 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, i, &adev->crtc_irq); adev 1828 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c c_irq_params = &adev->dm.vblank_params[int_params.irq_source - DC_IRQ_SOURCE_VBLANK1]; adev 1830 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c c_irq_params->adev = adev; adev 1833 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_irq_register_interrupt(adev, &int_params, adev 1843 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c i <= DCN_1_0__SRCID__OTG0_IHC_V_UPDATE_NO_LOCK_INTERRUPT + adev->mode_info.num_crtc - 1; adev 1845 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, i, &adev->vupdate_irq); adev 1856 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c c_irq_params = &adev->dm.vupdate_params[int_params.irq_source - DC_IRQ_SOURCE_VUPDATE1]; adev 1858 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c c_irq_params->adev = adev; adev 1861 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_irq_register_interrupt(adev, &int_params, adev 1867 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c i <= DCN_1_0__SRCID__HUBP0_FLIP_INTERRUPT + adev->mode_info.num_crtc - 1; adev 1869 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, i, &adev->pageflip_irq); adev 1879 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c c_irq_params = &adev->dm.pflip_params[int_params.irq_source - DC_IRQ_SOURCE_PFLIP_FIRST]; adev 1881 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c c_irq_params->adev = adev; adev 1884 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_irq_register_interrupt(adev, &int_params, adev 1890 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, DCN_1_0__SRCID__DC_HPD1_INT, adev 1891 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c &adev->hpd_irq); adev 1897 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c register_hpd_handlers(adev); adev 1913 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 1914 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_display_manager *dm = &adev->dm; adev 1933 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 1934 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_display_manager *dm = &adev->dm; adev 1951 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 1952 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_display_manager *dm = &adev->dm; adev 2005 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int amdgpu_dm_mode_config_init(struct amdgpu_device *adev) adev 2010 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.mode_config_initialized = true; adev 2012 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->ddev->mode_config.funcs = (void *)&amdgpu_dm_mode_funcs; adev 2013 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->ddev->mode_config.helper_private = &amdgpu_dm_mode_config_helperfuncs; adev 2015 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->ddev->mode_config.max_width = 16384; adev 2016 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->ddev->mode_config.max_height = 16384; adev 2018 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->ddev->mode_config.preferred_depth = 24; adev 2019 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->ddev->mode_config.prefer_shadow = 1; adev 2021 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->ddev->mode_config.async_page_flip = true; adev 2023 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->ddev->mode_config.fb_base = adev->gmc.aper_base; adev 2029 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c state->context = dc_create_state(adev->dm.dc); adev 2035 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dc_resource_state_copy_construct_current(adev->dm.dc, state->context); adev 2037 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_atomic_private_obj_init(adev->ddev, adev 2038 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c &adev->dm.atomic_obj, adev 2042 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c r = amdgpu_display_modeset_create_props(adev); adev 2046 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c r = amdgpu_dm_audio_init(adev); adev 2067 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_acpi_get_backlight_caps(dm->adev, &caps); adev 2144 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm->adev->ddev->primary->index); adev 2147 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm->adev->ddev->dev, adev 2231 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) adev 2233 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_display_manager *dm = &adev->dm; adev 2237 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_mode_info *mode_info = &adev->mode_info; adev 2244 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (amdgpu_dm_mode_config_init(dm->adev)) { adev 2353 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c switch (adev->asic_type) { adev 2370 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (dce110_register_irq_handlers(dm->adev)) { adev 2385 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (dcn10_register_irq_handlers(dm->adev)) { adev 2392 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c DRM_ERROR("Unsupported ASIC type: 0x%X\n", adev->asic_type); adev 2396 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (adev->asic_type != CHIP_CARRIZO && adev->asic_type != CHIP_STONEY) adev 2425 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void dm_bandwidth_update(struct amdgpu_device *adev) adev 2454 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = drm_dev->dev_private; adev 2460 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_resume(adev); adev 2461 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_kms_helper_hotplug_event(adev->ddev); adev 2463 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_suspend(adev); adev 2475 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 2477 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c switch (adev->asic_type) { adev 2480 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_crtc = 6; adev 2481 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_hpd = 6; adev 2482 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_dig = 6; adev 2485 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_crtc = 4; adev 2486 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_hpd = 6; adev 2487 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_dig = 7; adev 2491 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_crtc = 2; adev 2492 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_hpd = 6; adev 2493 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_dig = 6; adev 2497 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_crtc = 6; adev 2498 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_hpd = 6; adev 2499 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_dig = 7; adev 2502 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_crtc = 3; adev 2503 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_hpd = 6; adev 2504 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_dig = 9; adev 2507 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_crtc = 2; adev 2508 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_hpd = 6; adev 2509 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_dig = 9; adev 2513 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_crtc = 5; adev 2514 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_hpd = 5; adev 2515 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_dig = 5; adev 2519 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_crtc = 6; adev 2520 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_hpd = 6; adev 2521 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_dig = 6; adev 2526 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_crtc = 6; adev 2527 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_hpd = 6; adev 2528 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_dig = 6; adev 2532 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_crtc = 4; adev 2533 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_hpd = 4; adev 2534 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_dig = 4; adev 2540 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_crtc = 6; adev 2541 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_hpd = 6; adev 2542 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_dig = 6; adev 2545 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_crtc = 5; adev 2546 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_hpd = 5; adev 2547 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_dig = 5; adev 2552 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_crtc = 4; adev 2553 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_hpd = 4; adev 2554 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.num_dig = 4; adev 2558 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c DRM_ERROR("Unsupported ASIC type: 0x%X\n", adev->asic_type); adev 2562 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_set_irq_funcs(adev); adev 2564 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (adev->mode_info.funcs == NULL) adev 2565 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.funcs = &dm_display_funcs; adev 2574 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->ddev->dev, adev 2698 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c fill_plane_dcc_attributes(struct amdgpu_device *adev, adev 2709 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dc *dc = adev->dm.dc; adev 2763 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c fill_plane_buffer_attributes(struct amdgpu_device *adev, adev 2851 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (adev->asic_type == CHIP_VEGA10 || adev 2852 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->asic_type == CHIP_VEGA12 || adev 2853 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->asic_type == CHIP_VEGA20 || adev 2855 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->asic_type == CHIP_NAVI10 || adev 2856 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->asic_type == CHIP_NAVI14 || adev 2857 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->asic_type == CHIP_NAVI12 || adev 2860 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->asic_type == CHIP_RENOIR || adev 2862 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->asic_type == CHIP_RAVEN) { adev 2865 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->gfx.config.gb_addr_config_fields.num_pipes; adev 2867 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->gfx.config.gb_addr_config_fields.num_banks; adev 2869 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->gfx.config.gb_addr_config_fields.pipe_interleave_size; adev 2871 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->gfx.config.gb_addr_config_fields.num_se; adev 2873 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->gfx.config.gb_addr_config_fields.max_compress_frags; adev 2875 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->gfx.config.gb_addr_config_fields.num_rb_per_se; adev 2880 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = fill_plane_dcc_attributes(adev, afb, format, rotation, adev 2971 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c fill_dc_plane_info_and_addr(struct amdgpu_device *adev, adev 3051 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = fill_plane_buffer_attributes(adev, afb, plane_info->format, adev 3067 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int fill_dc_plane_attributes(struct amdgpu_device *adev, adev 3094 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c force_disable_dcc = adev->asic_type == CHIP_RAVEN && adev->in_suspend; adev 3095 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = fill_dc_plane_info_and_addr(adev, plane_state, tiling_flags, adev 3749 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 3754 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c rc = dc_interrupt_set(adev->dm.dc, irq_source, enable) ? 0 : -EBUSY; adev 3765 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 3782 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c return dc_interrupt_set(adev->dm.dc, irq_source, enable) ? 0 : -EBUSY; adev 3840 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 3872 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c } else if (property == adev->mode_info.underscan_hborder_property) { adev 3875 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c } else if (property == adev->mode_info.underscan_vborder_property) { adev 3878 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c } else if (property == adev->mode_info.underscan_property) { adev 3881 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c } else if (property == adev->mode_info.abm_level_property) { adev 3895 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 3917 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c } else if (property == adev->mode_info.underscan_hborder_property) { adev 3920 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c } else if (property == adev->mode_info.underscan_vborder_property) { adev 3923 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c } else if (property == adev->mode_info.underscan_property) { adev 3926 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c } else if (property == adev->mode_info.abm_level_property) { adev 3945 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = connector->dev->dev_private; adev 3946 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_display_manager *dm = &adev->dm; adev 4102 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = connector->dev->dev_private; adev 4133 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dc_result = dc_validate_stream(adev->dm.dc, stream); adev 4364 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 4365 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dc *dc = adev->dm.dc; adev 4491 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev; adev 4513 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev = amdgpu_ttm_adev(rbo->tbo.bdev); adev 4522 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dev_err(adev->dev, "fail to reserve bo (%d)\n", r); adev 4527 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c domain = amdgpu_display_supported_domains(adev, rbo->flags); adev 4559 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c force_disable_dcc = adev->asic_type == CHIP_RAVEN && adev->in_suspend; adev 4561 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev, afb, plane_state->format, plane_state->rotation, adev 4595 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = plane->dev->dev_private; adev 4596 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dc *dc = adev->dm.dc; adev 4745 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c res = drm_universal_plane_init(dm->adev->ddev, plane, possible_crtcs, adev 4817 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c acrtc->max_cursor_width = dm->adev->dm.dc->caps.max_cursor_size; adev 4818 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c acrtc->max_cursor_height = dm->adev->dm.dc->caps.max_cursor_size; adev 4824 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm->adev->mode_info.crtcs[crtc_index] = acrtc; adev 5034 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dm->ddev->dev_private; adev 5080 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.underscan_property, adev 5083 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.underscan_hborder_property, adev 5086 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.underscan_vborder_property, adev 5096 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dc_is_dmcu_initialized(adev->dm.dc)) { adev 5098 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->mode_info.abm_level_property, 0); adev 5163 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = ddc_service->ctx->driver_context; adev 5171 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c i2c->base.dev.parent = &adev->pdev->dev; adev 5262 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c int amdgpu_dm_get_encoder_crtc_mask(struct amdgpu_device *adev) adev 5264 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c switch (adev->mode_info.num_crtc) { adev 5285 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 5293 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c aencoder->base.possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev); adev 5305 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void manage_dm_interrupts(struct amdgpu_device *adev, adev 5315 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev, adev 5321 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev, adev 5322 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c &adev->pageflip_irq, adev 5327 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev, adev 5328 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c &adev->pageflip_irq, adev 5352 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static void remove_stream(struct amdgpu_device *adev, adev 5418 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = plane->dev->dev_private; adev 5444 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mutex_lock(&adev->dm.dc_lock); adev 5447 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mutex_unlock(&adev->dm.dc_lock); adev 5467 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mutex_lock(&adev->dm.dc_lock); adev 5475 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mutex_unlock(&adev->dm.dc_lock); adev 5506 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dm->adev; adev 5520 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_lock_irqsave(&adev->ddev->event_lock, flags); adev 5531 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (adev->family < AMDGPU_FAMILY_AI && adev 5573 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 5583 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dm->adev; adev 5596 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_lock_irqsave(&adev->ddev->event_lock, flags); adev 5619 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 5787 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm->adev, new_plane_state, tiling_flags, adev 5958 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 5989 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mutex_lock(&adev->dm.audio_lock); adev 5992 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mutex_unlock(&adev->dm.audio_lock); adev 5994 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_audio_eld_notify(adev, inst); adev 6021 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mutex_lock(&adev->dm.audio_lock); adev 6024 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mutex_unlock(&adev->dm.audio_lock); adev 6026 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_audio_eld_notify(adev, inst); adev 6046 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 6074 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c manage_dm_interrupts(adev, acrtc, true); adev 6108 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 6134 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c manage_dm_interrupts(adev, acrtc, false); adev 6157 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 6158 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_display_manager *dm = &adev->dm; adev 6239 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c remove_stream(adev, acrtc, dm_old_crtc_state->stream); adev 6251 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c remove_stream(adev, acrtc, dm_old_crtc_state->stream); adev 6405 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_lock_irqsave(&adev->ddev->event_lock, flags); adev 6413 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c spin_unlock_irqrestore(&adev->ddev->event_lock, flags); adev 7178 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm->adev, new_plane_state, tiling_flags, adev 7258 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 7260 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dc *dc = adev->dm.dc; adev 7349 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = dm_update_crtc_state(&adev->dm, state, crtc, adev 7360 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = dm_update_crtc_state(&adev->dm, state, crtc, adev 7428 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = dm_determine_update_type_for_commit(&adev->dm, state, &update_type); adev 7536 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct amdgpu_device *adev = dev->dev_private; adev 7561 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!adev->dm.freesync_module) adev 7570 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c adev->dm.dc, adev 62 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h struct amdgpu_device *adev; adev 126 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h struct amdgpu_device *adev; adev 368 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h int amdgpu_dm_get_encoder_crtc_mask(struct amdgpu_device *adev); adev 302 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c struct amdgpu_device *adev = adev 304 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c bool has_rom = adev->asic_type <= CHIP_RAVEN; adev 104 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c struct amdgpu_device *adev = crtc->dev->dev_private; adev 113 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c mutex_lock(&adev->dm.dc_lock); adev 132 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c mutex_unlock(&adev->dm.dc_lock); adev 970 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 971 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c struct dc *dc = adev->dm.dc; adev 1009 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c struct amdgpu_device *adev = file_inode(f)->i_private; adev 1010 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c struct dc *dc = adev->dm.dc; adev 1031 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c struct amdgpu_device *adev = dev->dev_private; adev 1032 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c struct dc *dc = adev->dm.dc; adev 1048 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c struct amdgpu_device *adev = dev->dev_private; adev 1049 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c struct dc *dc = adev->dm.dc; adev 1091 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c struct amdgpu_device *adev = data; adev 1093 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c adev->dm.dc->debug.visual_confirm = (enum visual_confirm)val; adev 1104 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c struct amdgpu_device *adev = data; adev 1106 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c *val = adev->dm.dc->debug.visual_confirm; adev 1114 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c int dtn_debugfs_init(struct amdgpu_device *adev) adev 1123 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c struct drm_minor *minor = adev->ddev->primary; adev 1127 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c ret = amdgpu_debugfs_add_files(adev, amdgpu_dm_debugfs_list, adev 1132 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c debugfs_create_file("amdgpu_dm_dtn_log", 0644, root, adev, adev 1135 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c debugfs_create_file_unsafe("amdgpu_dm_visual_confirm", 0644, root, adev, adev 33 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.h int dtn_debugfs_init(struct amdgpu_device *adev); adev 87 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c #define DM_IRQ_TABLE_LOCK(adev, flags) \ adev 88 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c spin_lock_irqsave(&adev->dm.irq_handler_list_table_lock, flags) adev 90 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c #define DM_IRQ_TABLE_UNLOCK(adev, flags) \ adev 91 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c spin_unlock_irqrestore(&adev->dm.irq_handler_list_table_lock, flags) adev 143 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c static struct list_head *remove_irq_handler(struct amdgpu_device *adev, adev 154 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_LOCK(adev, irq_table_flags); adev 160 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c hnd_list = &adev->dm.irq_handler_list_high_tab[irq_source]; adev 164 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c hnd_list = &adev->dm.irq_handler_list_low_tab[irq_source].head; adev 181 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags); adev 261 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c void *amdgpu_dm_irq_register_interrupt(struct amdgpu_device *adev, adev 280 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c init_handler_common_data(handler_data, ih, handler_args, &adev->dm); adev 287 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_LOCK(adev, irq_table_flags); adev 291 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c hnd_list = &adev->dm.irq_handler_list_high_tab[irq_source]; adev 295 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c hnd_list = &adev->dm.irq_handler_list_low_tab[irq_source].head; adev 301 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags); adev 326 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c void amdgpu_dm_irq_unregister_interrupt(struct amdgpu_device *adev, adev 345 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c handler_list = remove_irq_handler(adev, ih, &int_params); adev 374 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c int amdgpu_dm_irq_init(struct amdgpu_device *adev) adev 381 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c spin_lock_init(&adev->dm.irq_handler_list_table_lock); adev 385 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c lh = &adev->dm.irq_handler_list_low_tab[src]; adev 390 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c INIT_LIST_HEAD(&adev->dm.irq_handler_list_high_tab[src]); adev 402 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c void amdgpu_dm_irq_fini(struct amdgpu_device *adev) adev 409 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_LOCK(adev, irq_table_flags); adev 413 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c lh = &adev->dm.irq_handler_list_low_tab[src]; adev 414 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags); adev 419 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c int amdgpu_dm_irq_suspend(struct amdgpu_device *adev) adev 426 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_LOCK(adev, irq_table_flags); adev 435 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c hnd_list_l = &adev->dm.irq_handler_list_low_tab[src].head; adev 436 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c hnd_list_h = &adev->dm.irq_handler_list_high_tab[src]; adev 438 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c dc_interrupt_set(adev->dm.dc, src, false); adev 440 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags); adev 441 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c flush_work(&adev->dm.irq_handler_list_low_tab[src].work); adev 443 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_LOCK(adev, irq_table_flags); adev 446 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags); adev 450 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c int amdgpu_dm_irq_resume_early(struct amdgpu_device *adev) adev 456 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_LOCK(adev, irq_table_flags); adev 462 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c hnd_list_l = &adev->dm.irq_handler_list_low_tab[src].head; adev 463 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c hnd_list_h = &adev->dm.irq_handler_list_high_tab[src]; adev 465 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c dc_interrupt_set(adev->dm.dc, src, true); adev 468 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags); adev 473 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c int amdgpu_dm_irq_resume_late(struct amdgpu_device *adev) adev 479 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_LOCK(adev, irq_table_flags); adev 488 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c hnd_list_l = &adev->dm.irq_handler_list_low_tab[src].head; adev 489 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c hnd_list_h = &adev->dm.irq_handler_list_high_tab[src]; adev 491 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c dc_interrupt_set(adev->dm.dc, src, true); adev 494 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags); adev 502 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c static void amdgpu_dm_irq_schedule_work(struct amdgpu_device *adev, adev 508 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_LOCK(adev, irq_table_flags); adev 510 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c if (!list_empty(&adev->dm.irq_handler_list_low_tab[irq_source].head)) adev 511 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c work = &adev->dm.irq_handler_list_low_tab[irq_source].work; adev 513 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags); adev 527 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c static void amdgpu_dm_irq_immediate_work(struct amdgpu_device *adev, adev 534 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_LOCK(adev, irq_table_flags); adev 538 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c &adev->dm.irq_handler_list_high_tab[irq_source]) { adev 549 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags); adev 561 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c static int amdgpu_dm_irq_handler(struct amdgpu_device *adev, adev 568 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c adev->dm.dc, adev 572 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c dc_interrupt_ack(adev->dm.dc, src); adev 575 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c amdgpu_dm_irq_immediate_work(adev, src); adev 577 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c amdgpu_dm_irq_schedule_work(adev, src); adev 602 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c static int amdgpu_dm_set_hpd_irq_state(struct amdgpu_device *adev, adev 610 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c dc_interrupt_set(adev->dm.dc, src, st); adev 614 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c static inline int dm_irq_state(struct amdgpu_device *adev, adev 624 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc_id]; adev 641 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c dc_interrupt_set(adev->dm.dc, irq_source, st); adev 645 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c static int amdgpu_dm_set_pflip_irq_state(struct amdgpu_device *adev, adev 651 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c adev, adev 659 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c static int amdgpu_dm_set_crtc_irq_state(struct amdgpu_device *adev, adev 665 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c adev, adev 673 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c static int amdgpu_dm_set_vupdate_irq_state(struct amdgpu_device *adev, adev 679 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c adev, adev 707 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev) adev 710 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c adev->crtc_irq.num_types = adev->mode_info.num_crtc; adev 711 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c adev->crtc_irq.funcs = &dm_crtc_irq_funcs; adev 713 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c adev->vupdate_irq.num_types = adev->mode_info.num_crtc; adev 714 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c adev->vupdate_irq.funcs = &dm_vupdate_irq_funcs; adev 716 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c adev->pageflip_irq.num_types = adev->mode_info.num_crtc; adev 717 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c adev->pageflip_irq.funcs = &dm_pageflip_irq_funcs; adev 719 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c adev->hpd_irq.num_types = adev->mode_info.num_hpd; adev 720 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c adev->hpd_irq.funcs = &dm_hpd_irq_funcs; adev 731 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c void amdgpu_dm_hpd_init(struct amdgpu_device *adev) adev 733 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c struct drm_device *dev = adev->ddev; adev 743 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c dc_interrupt_set(adev->dm.dc, adev 749 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c dc_interrupt_set(adev->dm.dc, adev 764 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c void amdgpu_dm_hpd_fini(struct amdgpu_device *adev) adev 766 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c struct drm_device *dev = adev->ddev; adev 774 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c dc_interrupt_set(adev->dm.dc, dc_link->irq_source_hpd, false); adev 777 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c dc_interrupt_set(adev->dm.dc, adev 42 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h int amdgpu_dm_irq_init(struct amdgpu_device *adev); adev 50 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h void amdgpu_dm_irq_fini(struct amdgpu_device *adev); adev 66 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h void *amdgpu_dm_irq_register_interrupt(struct amdgpu_device *adev, adev 79 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h void amdgpu_dm_irq_unregister_interrupt(struct amdgpu_device *adev, adev 83 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev); adev 85 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h void amdgpu_dm_hpd_init(struct amdgpu_device *adev); adev 86 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h void amdgpu_dm_hpd_fini(struct amdgpu_device *adev); adev 92 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h int amdgpu_dm_irq_suspend(struct amdgpu_device *adev); adev 99 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h int amdgpu_dm_irq_resume_early(struct amdgpu_device *adev); adev 100 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h int amdgpu_dm_irq_resume_late(struct amdgpu_device *adev); adev 275 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c struct amdgpu_device *adev = dev->dev_private; adev 284 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev); adev 305 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c struct amdgpu_device *adev = dev->dev_private; adev 328 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c &adev->dm, adev 370 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c struct amdgpu_device *adev = dev->dev_private; adev 386 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c if (adev->mode_info.rfbdev) adev 387 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c drm_fb_helper_remove_one_connector(&adev->mode_info.rfbdev->helper, connector); adev 394 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c struct amdgpu_device *adev = dev->dev_private; adev 396 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c if (adev->mode_info.rfbdev) adev 397 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c drm_fb_helper_add_one_connector(&adev->mode_info.rfbdev->helper, connector); adev 420 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c aconnector->base.name, dm->adev->dev); adev 424 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c dm->adev->ddev, adev 42 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 43 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; adev 46 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c if (adev->pm.dpm_enabled) { adev 48 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c memset(&adev->pm.pm_display_cfg, 0, adev 49 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c sizeof(adev->pm.pm_display_cfg)); adev 51 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.cpu_cc6_disable = adev 54 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.cpu_pstate_disable = adev 57 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.cpu_pstate_separation_time = adev 60 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.nb_pstate_switch_disable = adev 63 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.num_display = adev 65 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.num_path_including_non_display = adev 68 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.min_core_set_clock = adev 70 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.min_core_set_clock_in_sr = adev 72 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.min_mem_set_clock = adev 75 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.min_dcef_deep_sleep_set_clk = adev 77 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.min_dcef_set_clk = adev 80 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.multi_monitor_in_sync = adev 82 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.min_vblank_time = adev 85 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.display_clk = adev 88 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.dce_tolerable_mclk_in_active_latency = adev 91 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.crtc_index = pp_display_cfg->crtc_index; adev 92 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.line_time_in_us = adev 95 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.vrefresh = pp_display_cfg->disp_configs[0].v_refresh; adev 96 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.crossfire_display_index = -1; adev 97 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.min_bus_bandwidth = 0; adev 102 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->pm.pm_display_cfg.displays[i].controller_id = dc_cfg->pipe_idx + 1; adev 105 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->display_configuration_change) adev 106 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->powerplay.pp_funcs->display_configuration_change( adev 107 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->powerplay.pp_handle, adev 108 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c &adev->pm.pm_display_cfg); adev 111 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c &adev->pm.pm_display_cfg); adev 113 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c amdgpu_pm_compute_clocks(adev); adev 336 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 337 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c void *pp_handle = adev->powerplay.pp_handle; adev 342 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_clock_by_type) { adev 343 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c if (adev->powerplay.pp_funcs->get_clock_by_type(pp_handle, adev 349 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c } else if (adev->smu.funcs && adev->smu.funcs->get_clock_by_type) { adev 350 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c if (smu_get_clock_by_type(&adev->smu, adev 360 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_display_mode_validation_clocks) { adev 361 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c if (adev->powerplay.pp_funcs->get_display_mode_validation_clocks( adev 369 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c } else if (adev->smu.funcs && adev->smu.funcs->get_max_high_clocks) { adev 370 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c if (smu_get_max_high_clocks(&adev->smu, &validation_clks)) { adev 422 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 423 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c void *pp_handle = adev->powerplay.pp_handle; adev 425 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; adev 434 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c } else if (adev->smu.ppt_funcs && adev->smu.ppt_funcs->get_clock_by_type_with_latency) { adev 435 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c if (smu_get_clock_by_type_with_latency(&adev->smu, adev 452 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 453 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c void *pp_handle = adev->powerplay.pp_handle; adev 455 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; adev 464 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c } else if (adev->smu.ppt_funcs && adev->smu.ppt_funcs->get_clock_by_type_with_voltage) { adev 465 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c if (smu_get_clock_by_type_with_voltage(&adev->smu, adev 496 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 506 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->display_clock_voltage_request) adev 507 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c ret = adev->powerplay.pp_funcs->display_clock_voltage_request( adev 508 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->powerplay.pp_handle, adev 510 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c else if (adev->smu.funcs && adev 511 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->smu.funcs->display_clock_voltage_request) adev 512 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c ret = smu_display_clock_voltage_request(&adev->smu, adev 523 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 527 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_current_clocks) adev 528 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c ret = adev->powerplay.pp_funcs->get_current_clocks( adev 529 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->powerplay.pp_handle, adev 531 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c else if (adev->smu.funcs) adev 532 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c ret = smu_get_current_clocks(&adev->smu, &pp_clk_info); adev 547 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 548 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c void *pp_handle = adev->powerplay.pp_handle; adev 549 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; adev 593 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c else if (adev->smu.funcs && adev 594 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c adev->smu.funcs->set_watermarks_for_clock_ranges) adev 595 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c smu_set_watermarks_for_clock_ranges(&adev->smu, adev 602 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 603 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c void *pp_handle = adev->powerplay.pp_handle; adev 604 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; adev 608 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c else if (adev->smu.funcs) adev 609 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c smu_notify_smu_enable_pwe(&adev->smu); adev 615 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 616 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c void *pp_handle = adev->powerplay.pp_handle; adev 617 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; adev 628 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 629 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c void *pp_handle = adev->powerplay.pp_handle; adev 630 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; adev 641 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 642 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c void *pp_handle = adev->powerplay.pp_handle; adev 643 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; adev 654 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 655 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c void *pp_handle = adev->powerplay.pp_handle; adev 656 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; adev 668 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 669 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; adev 718 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c if (smu_set_watermarks_for_clock_ranges(&adev->smu, adev 728 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 729 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; adev 744 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 745 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; adev 760 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 761 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; adev 777 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 778 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; adev 799 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 800 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; adev 822 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 823 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; adev 835 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 836 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; adev 870 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 871 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; adev 889 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct amdgpu_device *adev = ctx->driver_context; adev 890 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c struct smu_context *smu = &adev->smu; adev 86 drivers/gpu/drm/amd/display/dc/bios/command_table.c struct amdgpu_device *adev = dev; adev 89 drivers/gpu/drm/amd/display/dc/bios/command_table.c if (amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, adev 67 drivers/gpu/drm/amd/display/dc/bios/command_table2.c struct amdgpu_device *adev = dev; adev 70 drivers/gpu/drm/amd/display/dc/bios/command_table2.c if (amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, adev 38 drivers/gpu/drm/amd/powerplay/amd_powerplay.c static int amd_powerplay_create(struct amdgpu_device *adev) adev 42 drivers/gpu/drm/amd/powerplay/amd_powerplay.c if (adev == NULL) adev 49 drivers/gpu/drm/amd/powerplay/amd_powerplay.c hwmgr->adev = adev; adev 50 drivers/gpu/drm/amd/powerplay/amd_powerplay.c hwmgr->not_vf = !amdgpu_sriov_vf(adev); adev 52 drivers/gpu/drm/amd/powerplay/amd_powerplay.c hwmgr->device = amdgpu_cgs_create_device(adev); adev 54 drivers/gpu/drm/amd/powerplay/amd_powerplay.c hwmgr->chip_family = adev->family; adev 55 drivers/gpu/drm/amd/powerplay/amd_powerplay.c hwmgr->chip_id = adev->asic_type; adev 56 drivers/gpu/drm/amd/powerplay/amd_powerplay.c hwmgr->feature_mask = adev->pm.pp_feature; adev 57 drivers/gpu/drm/amd/powerplay/amd_powerplay.c hwmgr->display_config = &adev->pm.pm_display_cfg; adev 58 drivers/gpu/drm/amd/powerplay/amd_powerplay.c adev->powerplay.pp_handle = hwmgr; adev 59 drivers/gpu/drm/amd/powerplay/amd_powerplay.c adev->powerplay.pp_funcs = &pp_dpm_funcs; adev 64 drivers/gpu/drm/amd/powerplay/amd_powerplay.c static void amd_powerplay_destroy(struct amdgpu_device *adev) adev 66 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; adev 78 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct amdgpu_device *adev = handle; adev 80 drivers/gpu/drm/amd/powerplay/amd_powerplay.c ret = amd_powerplay_create(adev); adev 85 drivers/gpu/drm/amd/powerplay/amd_powerplay.c ret = hwmgr_early_init(adev->powerplay.pp_handle); adev 94 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct amdgpu_device *adev = handle; adev 95 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; adev 107 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct amdgpu_device *adev = handle; adev 108 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; adev 112 drivers/gpu/drm/amd/powerplay/amd_powerplay.c release_firmware(adev->pm.fw); adev 113 drivers/gpu/drm/amd/powerplay/amd_powerplay.c adev->pm.fw = NULL; adev 121 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct amdgpu_device *adev = handle; adev 122 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; adev 134 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct amdgpu_device *adev = handle; adev 135 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; adev 142 drivers/gpu/drm/amd/powerplay/amd_powerplay.c static void pp_reserve_vram_for_smu(struct amdgpu_device *adev) adev 147 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; adev 149 drivers/gpu/drm/amd/powerplay/amd_powerplay.c if (amdgpu_bo_create_kernel(adev, adev->pm.smu_prv_buffer_size, adev 151 drivers/gpu/drm/amd/powerplay/amd_powerplay.c &adev->pm.smu_prv_buffer, adev 164 drivers/gpu/drm/amd/powerplay/amd_powerplay.c adev->pm.smu_prv_buffer_size); adev 167 drivers/gpu/drm/amd/powerplay/amd_powerplay.c amdgpu_bo_free_kernel(&adev->pm.smu_prv_buffer, NULL, NULL); adev 168 drivers/gpu/drm/amd/powerplay/amd_powerplay.c adev->pm.smu_prv_buffer = NULL; adev 175 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct amdgpu_device *adev = handle; adev 176 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; adev 184 drivers/gpu/drm/amd/powerplay/amd_powerplay.c if (adev->pm.smu_prv_buffer_size != 0) adev 185 drivers/gpu/drm/amd/powerplay/amd_powerplay.c pp_reserve_vram_for_smu(adev); adev 192 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct amdgpu_device *adev = handle; adev 194 drivers/gpu/drm/amd/powerplay/amd_powerplay.c if (adev->pm.smu_prv_buffer) adev 195 drivers/gpu/drm/amd/powerplay/amd_powerplay.c amdgpu_bo_free_kernel(&adev->pm.smu_prv_buffer, NULL, NULL); adev 196 drivers/gpu/drm/amd/powerplay/amd_powerplay.c amd_powerplay_destroy(adev); adev 223 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct amdgpu_device *adev = handle; adev 224 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; adev 231 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct amdgpu_device *adev = handle; adev 232 drivers/gpu/drm/amd/powerplay/amd_powerplay.c struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; adev 323 drivers/gpu/drm/amd/powerplay/amd_powerplay.c amdgpu_device_ip_set_powergating_state(hwmgr->adev, adev 326 drivers/gpu/drm/amd/powerplay/amd_powerplay.c amdgpu_device_ip_set_clockgating_state(hwmgr->adev, adev 336 drivers/gpu/drm/amd/powerplay/amd_powerplay.c amdgpu_device_ip_set_clockgating_state(hwmgr->adev, adev 339 drivers/gpu/drm/amd/powerplay/amd_powerplay.c amdgpu_device_ip_set_powergating_state(hwmgr->adev, adev 437 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = smu->adev; adev 466 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c adev->nbio_funcs->hdp_flush(adev, NULL); adev 474 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c bool is_support_sw_smu(struct amdgpu_device *adev) adev 476 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->asic_type == CHIP_VEGA20) adev 478 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c else if (adev->asic_type >= CHIP_ARCTURUS) adev 484 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c bool is_support_sw_smu_xgmi(struct amdgpu_device *adev) adev 489 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->asic_type == CHIP_VEGA20) adev 610 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = smu->adev; adev 615 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->flags & AMD_IS_APU) adev 706 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c static int smu_set_funcs(struct amdgpu_device *adev) adev 708 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; adev 710 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c switch (adev->asic_type) { adev 716 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->pm.pp_feature & PP_OVERDRIVE_MASK) adev 721 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->pm.pp_feature & PP_OVERDRIVE_MASK) adev 734 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 735 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; adev 737 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c smu->adev = adev; adev 741 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c return smu_set_funcs(adev); adev 746 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 747 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; adev 753 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c smu_handle_task(&adev->smu, adev 765 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = smu->adev; adev 768 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (!amdgpu_atom_parse_data_header(adev->mode_info.atom_context, table, adev 772 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c *addr = (uint8_t *)adev->mode_info.atom_context->bios + data_start; adev 831 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 832 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; adev 835 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c smu->pool_size = adev->pm.smu_prv_buffer_size; adev 869 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c smu->display_config = &adev->pm.pm_display_cfg; adev 896 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 897 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; adev 920 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = smu->adev; adev 933 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c ret = amdgpu_bo_create_kernel(adev, adev 980 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = smu->adev; adev 984 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->flags & AMD_IS_APU) adev 987 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN4) adev 989 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) adev 991 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2) adev 993 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1) adev 1000 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) adev 1002 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) adev 1004 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) adev 1006 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) adev 1008 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) adev 1010 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) adev 1025 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = smu->adev; adev 1028 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (smu_is_dpm_running(smu) && adev->in_suspend) { adev 1033 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->asic_type != CHIP_ARCTURUS) { adev 1109 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->asic_type != CHIP_ARCTURUS) { adev 1179 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = smu->adev; adev 1197 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c ret = amdgpu_bo_create_kernel(adev, adev 1233 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1234 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; adev 1236 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) { adev 1237 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->asic_type < CHIP_NAVI10) { adev 1250 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->flags & AMD_IS_APU) { adev 1251 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c smu_powergate_sdma(&adev->smu, false); adev 1252 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c smu_powergate_vcn(&adev->smu, false); adev 1283 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c adev->pm.dpm_enabled = false; adev 1285 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c adev->pm.dpm_enabled = true; /* TODO: will set dpm_enabled flag while VCN and DAL DPM is workable */ adev 1297 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1298 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; adev 1302 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->flags & AMD_IS_APU) { adev 1303 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c smu_powergate_sdma(&adev->smu, true); adev 1304 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c smu_powergate_vcn(&adev->smu, true); adev 1329 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = smu->adev; adev 1332 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c ret = smu_hw_fini(adev); adev 1336 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c ret = smu_hw_init(adev); adev 1346 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1347 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; adev 1350 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if(!(adev->flags & AMD_IS_APU)) adev 1357 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->in_gpu_reset && baco_feature_is_enabled) { adev 1367 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (adev->asic_type >= CHIP_NAVI10 && adev 1368 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c adev->gfx.rlc.funcs->stop) adev 1369 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c adev->gfx.rlc.funcs->stop(adev); adev 1377 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev 1378 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c struct smu_context *smu = &adev->smu; adev 1408 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (!smu->pm_enabled || !is_support_sw_smu(smu->adev)) adev 1472 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (!is_support_sw_smu(smu->adev)) adev 1544 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c amdgpu_device_ip_set_powergating_state(smu->adev, adev 1547 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c amdgpu_device_ip_set_clockgating_state(smu->adev, adev 1557 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c amdgpu_device_ip_set_clockgating_state(smu->adev, adev 1560 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c amdgpu_device_ip_set_powergating_state(smu->adev, adev 29 drivers/gpu/drm/amd/powerplay/hwmgr/common_baco.c struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); adev 47 drivers/gpu/drm/amd/powerplay/hwmgr/common_baco.c struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); adev 75 drivers/gpu/drm/amd/powerplay/hwmgr/common_baco.c dev_warn(adev->dev, "Invalid BACO command.\n"); adev 86 drivers/gpu/drm/amd/powerplay/hwmgr/common_baco.c struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); adev 93 drivers/gpu/drm/amd/powerplay/hwmgr/common_baco.c reg = adev->reg_offset[entry[i].hwip][entry[i].inst][entry[i].seg] adev 78 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c struct amdgpu_device *adev = NULL; adev 81 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c adev = hwmgr->adev; adev 84 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c if (smum_is_dpm_running(hwmgr) && !amdgpu_passthrough(adev) adev 85 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c && adev->in_suspend) { adev 238 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c struct amdgpu_device *adev = hwmgr->adev; adev 249 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c adev->pm.dpm.thermal.min_temp = range.min; adev 250 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c adev->pm.dpm.thermal.max_temp = range.max; adev 251 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c adev->pm.dpm.thermal.max_edge_emergency_temp = range.edge_emergency_max; adev 252 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c adev->pm.dpm.thermal.min_hotspot_temp = range.hotspot_min; adev 253 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c adev->pm.dpm.thermal.max_hotspot_crit_temp = range.hotspot_crit_max; adev 254 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c adev->pm.dpm.thermal.max_hotspot_emergency_temp = range.hotspot_emergency_max; adev 255 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c adev->pm.dpm.thermal.min_mem_temp = range.mem_min; adev 256 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c adev->pm.dpm.thermal.max_mem_crit_temp = range.mem_crit_max; adev 257 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c adev->pm.dpm.thermal.max_mem_emergency_temp = range.mem_emergency_max; adev 230 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c ((struct amdgpu_device *)hwmgr->adev)->pm.no_fan = adev 258 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c ((struct amdgpu_device *)hwmgr->adev)->pm.dpm_enabled = true; adev 405 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c if (amdgpu_acpi_is_pcie_performance_request_supported(hwmgr->adev)) adev 144 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c smu_atom_get_data_table(hwmgr->adev, adev 177 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 190 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c return amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 253 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 260 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 301 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 307 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 322 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 328 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 352 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 358 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 375 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 382 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 412 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 419 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 444 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 452 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 489 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c smu_atom_get_data_table(hwmgr->adev, adev 513 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c (ATOM_VOLTAGE_OBJECT_INFO_V3_1 *)get_voltage_info_table(hwmgr->adev); adev 532 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c (ATOM_VOLTAGE_OBJECT_INFO_V3_1 *)get_voltage_info_table(hwmgr->adev); adev 629 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c get_gpio_lookup_table(hwmgr->adev); adev 650 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 677 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c smu_atom_get_data_table(hwmgr->adev, adev 743 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 764 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 784 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 805 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 827 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 848 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 879 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 1090 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 1103 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 1124 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 1148 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 1172 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c smu_atom_get_data_table(hwmgr->adev, adev 1225 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c table = asic_internal_ss_get_ss_table(hwmgr->adev); adev 1300 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 1310 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 1321 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 1331 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 1341 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 1350 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 1368 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c (ATOM_SMU_INFO_V2_1 *)smu_atom_get_data_table(hwmgr->adev, adev 1396 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c smu_atom_get_data_table(hwmgr->adev, adev 1436 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c (ATOM_VOLTAGE_OBJECT_INFO_V3_1 *)get_voltage_info_table(hwmgr->adev); adev 1455 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 1463 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c result = amdgpu_atom_execute_table(adev->mode_info.atom_context, adev 1488 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c smu_atom_get_data_table(hwmgr->adev, adev 1539 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c profile = smu_atom_get_data_table(hwmgr->adev, adev 61 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c table_address = smu_atom_get_data_table(hwmgr->adev, adev 169 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c table_address = smu_atom_get_data_table(hwmgr->adev, adev 250 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 261 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c adev->mode_info.atom_context, idx, (uint32_t *)&pll_parameters)) adev 287 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c smu_atom_get_data_table(hwmgr->adev, adev 471 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c smu_atom_get_data_table(hwmgr->adev, adev 495 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c struct amdgpu_device *adev = hwmgr->adev; adev 508 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c adev->mode_info.atom_context, ix, (uint32_t *)¶meters)) adev 596 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c smu_atom_get_data_table(hwmgr->adev, adev 628 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c smu_atom_get_data_table(hwmgr->adev, adev 144 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c smu_atom_get_data_table(hwmgr->adev, adev 840 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c table_addr = smu_atom_get_data_table(hwmgr->adev, adev 1088 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c fw_info = smu_atom_get_data_table(hwmgr->adev, adev 272 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 278 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c if (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) adev 312 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 324 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 326 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c if (adev->pm.pp_feature & PP_GFXOFF_MASK) { adev 344 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 346 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c if (adev->pm.pp_feature & PP_GFXOFF_MASK) adev 1103 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 1191 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c amdgpu_device_ip_set_powergating_state(hwmgr->adev, adev 1200 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c amdgpu_device_ip_set_powergating_state(hwmgr->adev, adev 1277 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 1278 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c if ((adev->asic_type == CHIP_RAVEN) && adev 1279 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c (adev->rev_id != 0x15d8) && adev 116 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c amdgpu_device_ip_set_powergating_state(hwmgr->adev, adev 119 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c amdgpu_device_ip_set_clockgating_state(hwmgr->adev, adev 126 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c amdgpu_device_ip_set_clockgating_state(hwmgr->adev, adev 129 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c amdgpu_device_ip_set_powergating_state(hwmgr->adev, adev 144 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c amdgpu_device_ip_set_powergating_state(hwmgr->adev, adev 147 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c amdgpu_device_ip_set_clockgating_state(hwmgr->adev, adev 154 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c amdgpu_device_ip_set_clockgating_state(hwmgr->adev, adev 157 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c amdgpu_device_ip_set_powergating_state(hwmgr->adev, adev 421 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c struct amdgpu_device *adev = hwmgr->adev; adev 426 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c adev->gfx.cu_info.number); adev 1554 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 1679 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (adev->pg_flags & AMD_PG_SUPPORT_UVD) adev 1682 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (adev->pg_flags & AMD_PG_SUPPORT_VCE) adev 2119 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 2127 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c hw_revision = adev->pdev->revision; adev 2128 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c sub_sys_id = adev->pdev->subsystem_device; adev 2129 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c sub_vendor_id = adev->pdev->subsystem_vendor; adev 2572 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 2581 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->pcie_gen_cap = adev->pm.pcie_gen_mask; adev 2584 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->pcie_lane_cap = adev->pm.pcie_mlw_mask; adev 2887 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 2910 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c max_limits = adev->pm.ac_power ? adev 2915 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (!adev->pm.ac_power) { adev 3071 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c fw_info = (ATOM_FIRMWARE_INFO_V2_2 *)smu_atom_get_data_table(hwmgr->adev, index, adev 3481 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 3495 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if ((adev->asic_type != CHIP_HAWAII) && adev 3496 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c (adev->asic_type != CHIP_BONAIRE) && adev 3497 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c (adev->asic_type != CHIP_FIJI) && adev 3498 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c (adev->asic_type != CHIP_TONGA)) { adev 3697 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (0 == amdgpu_acpi_pcie_performance_request(hwmgr->adev, PCIE_PERF_REQ_GEN3, false)) adev 3704 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (0 == amdgpu_acpi_pcie_performance_request(hwmgr->adev, PCIE_PERF_REQ_GEN2, false)) adev 3934 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c if (amdgpu_acpi_pcie_performance_request(hwmgr->adev, request, false)) { adev 4076 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c ref_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 4146 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c amdgpu_irq_add_id((struct amdgpu_device *)(hwmgr->adev), adev 4150 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c amdgpu_irq_add_id((struct amdgpu_device *)(hwmgr->adev), adev 4156 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c amdgpu_irq_add_id((struct amdgpu_device *)(hwmgr->adev), adev 4321 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 4323 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c data->is_memory_gddr5 = (adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5); adev 961 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c struct amdgpu_device *adev = hwmgr->adev; adev 963 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c num_se = adev->gfx.config.max_shader_engines; adev 970 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 971 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c mutex_lock(&adev->grbm_idx_mutex); adev 1016 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c mutex_unlock(&adev->grbm_idx_mutex); adev 1017 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 1022 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c mutex_unlock(&adev->grbm_idx_mutex); adev 1023 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 1030 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c struct amdgpu_device *adev = hwmgr->adev; adev 1037 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 1049 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 1054 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 98 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c crystal_clock_freq = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 271 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c crystal_clock_freq = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 175 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 236 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (adev->pg_flags & AMD_PG_SUPPORT_UVD) adev 239 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (adev->pg_flags & AMD_PG_SUPPORT_VCE) adev 316 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c info = (ATOM_INTEGRATED_SYSTEM_INFO_V1_9 *)smu_atom_get_data_table(hwmgr->adev, adev 1913 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c amdgpu_device_ip_set_powergating_state(hwmgr->adev, adev 1916 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c amdgpu_device_ip_set_clockgating_state(hwmgr->adev, adev 1923 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c amdgpu_device_ip_set_clockgating_state(hwmgr->adev, adev 1926 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c amdgpu_device_ip_set_powergating_state(hwmgr->adev, adev 1939 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c amdgpu_device_ip_set_powergating_state(hwmgr->adev, adev 1942 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c amdgpu_device_ip_set_clockgating_state(hwmgr->adev, adev 1951 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c amdgpu_device_ip_set_clockgating_state(hwmgr->adev, adev 1954 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c amdgpu_device_ip_set_powergating_state(hwmgr->adev, adev 33 drivers/gpu/drm/amd/powerplay/hwmgr/smu9_baco.c struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); adev 55 drivers/gpu/drm/amd/powerplay/hwmgr/smu9_baco.c struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); adev 588 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c int phm_irq_process(struct amdgpu_device *adev, adev 598 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_BUS_NUM(adev->pdev->devfn), adev 599 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_SLOT(adev->pdev->devfn), adev 600 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_FUNC(adev->pdev->devfn)); adev 603 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_BUS_NUM(adev->pdev->devfn), adev 604 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_SLOT(adev->pdev->devfn), adev 605 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_FUNC(adev->pdev->devfn)); adev 608 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_BUS_NUM(adev->pdev->devfn), adev 609 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_SLOT(adev->pdev->devfn), adev 610 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_FUNC(adev->pdev->devfn)); adev 614 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_BUS_NUM(adev->pdev->devfn), adev 615 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_SLOT(adev->pdev->devfn), adev 616 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_FUNC(adev->pdev->devfn)); adev 619 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_BUS_NUM(adev->pdev->devfn), adev 620 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_SLOT(adev->pdev->devfn), adev 621 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_FUNC(adev->pdev->devfn)); adev 624 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_BUS_NUM(adev->pdev->devfn), adev 625 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_SLOT(adev->pdev->devfn), adev 626 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c PCI_FUNC(adev->pdev->devfn)); adev 645 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c amdgpu_irq_add_id((struct amdgpu_device *)(hwmgr->adev), adev 649 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c amdgpu_irq_add_id((struct amdgpu_device *)(hwmgr->adev), adev 655 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c amdgpu_irq_add_id((struct amdgpu_device *)(hwmgr->adev), adev 666 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c struct amdgpu_device *adev = dev; adev 670 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c adev->mode_info.atom_context, table, size, adev 672 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c return (uint8_t *)adev->mode_info.atom_context->bios + adev 108 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h int phm_irq_process(struct amdgpu_device *adev, adev 196 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 211 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (adev->pg_flags & AMD_PG_SUPPORT_UVD) adev 215 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (adev->pg_flags & AMD_PG_SUPPORT_VCE) adev 361 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 495 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c hw_revision = adev->pdev->revision; adev 496 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c sub_vendor_id = adev->pdev->subsystem_vendor; adev 511 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c adev->unique_id = ((uint64_t)bottom32 << 32) | top32; adev 825 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 916 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c data->total_active_cus = adev->gfx.cu_info.number; adev 3134 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 3160 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c max_limits = adev->pm.ac_power ? adev 3165 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (!adev->pm.ac_power) { adev 3769 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 5339 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 5343 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c if (amdgpu_passthrough(adev)) adev 934 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c struct amdgpu_device *adev = hwmgr->adev; adev 938 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c num_se = adev->gfx.config.max_shader_engines; adev 940 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 942 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c mutex_lock(&adev->grbm_idx_mutex); adev 961 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c mutex_unlock(&adev->grbm_idx_mutex); adev 965 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 972 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c struct amdgpu_device *adev = hwmgr->adev; adev 974 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 978 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 985 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c struct amdgpu_device *adev = hwmgr->adev; adev 989 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c num_se = adev->gfx.config.max_shader_engines; adev 991 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 993 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c mutex_lock(&adev->grbm_idx_mutex); adev 1006 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c mutex_unlock(&adev->grbm_idx_mutex); adev 1010 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 1024 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c struct amdgpu_device *adev = hwmgr->adev; adev 1027 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 1031 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 1046 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c struct amdgpu_device *adev = hwmgr->adev; adev 1050 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c num_se = adev->gfx.config.max_shader_engines; adev 1052 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 1054 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c mutex_lock(&adev->grbm_idx_mutex); adev 1069 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c mutex_unlock(&adev->grbm_idx_mutex); adev 1073 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 1080 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c struct amdgpu_device *adev = hwmgr->adev; adev 1082 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 1086 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 1093 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c struct amdgpu_device *adev = hwmgr->adev; adev 1098 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c num_se = adev->gfx.config.max_shader_engines; adev 1100 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 1104 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c mutex_lock(&adev->grbm_idx_mutex); adev 1117 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c mutex_unlock(&adev->grbm_idx_mutex); adev 1121 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 1138 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c struct amdgpu_device *adev = hwmgr->adev; adev 1141 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 1145 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 1160 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c struct amdgpu_device *adev = hwmgr->adev; adev 1163 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_enter_safe_mode(adev); adev 1165 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c mutex_lock(&adev->grbm_idx_mutex); adev 1167 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c mutex_unlock(&adev->grbm_idx_mutex); adev 1176 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c amdgpu_gfx_rlc_exit_safe_mode(adev); adev 57 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c smu_atom_get_data_table(hwmgr->adev, index, adev 756 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c struct amdgpu_device *adev = hwmgr->adev; adev 767 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c dev_id = adev->pdev->device; adev 768 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c rev_id = adev->pdev->revision; adev 93 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 113 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c crystal_clock_freq = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 130 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 159 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 254 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 309 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 324 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c crystal_clock_freq = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 341 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 367 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 404 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 427 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 458 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 135 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 147 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c if (adev->pg_flags & AMD_PG_SUPPORT_UVD) { adev 154 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c if (adev->pg_flags & AMD_PG_SUPPORT_VCE) adev 292 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 365 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c adev->unique_id = ((uint64_t)bottom32 << 32) | top32; adev 385 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 425 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c data->total_active_cus = adev->gfx.cu_info.number; adev 54 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c smu_atom_get_data_table(hwmgr->adev, index, adev 148 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 173 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 208 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 226 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 42 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_baco.c struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); adev 61 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_baco.c struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); adev 76 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_baco.c struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); adev 77 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_baco.c struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); adev 176 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 188 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c if (adev->pg_flags & AMD_PG_SUPPORT_UVD) adev 192 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c if (adev->pg_flags & AMD_PG_SUPPORT_VCE) adev 327 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 405 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c adev->unique_id = ((uint64_t)bottom32 << 32) | top32; adev 424 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 467 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c data->total_active_cus = adev->gfx.cu_info.number; adev 485 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); adev 493 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c if (adev->in_baco_reset) { adev 494 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c adev->in_baco_reset = 0; adev 833 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); adev 839 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN4) adev 841 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) adev 843 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2) adev 845 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1) adev 848 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) adev 850 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) adev 852 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) adev 854 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) adev 856 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) adev 858 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) adev 2161 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 3261 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c struct amdgpu_device *adev = hwmgr->adev; adev 3606 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c amdgpu_device_ip_set_powergating_state(hwmgr->adev, adev 3610 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c amdgpu_device_ip_set_powergating_state(hwmgr->adev, adev 56 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c smu_atom_get_data_table(hwmgr->adev, index, adev 723 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c smc_dpm_table = smu_atom_get_data_table(hwmgr->adev, index, NULL, NULL, NULL), adev 92 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 139 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 188 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 201 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c crystal_clock_freq = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 218 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 243 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 278 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 296 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c struct amdgpu_device *adev = hwmgr->adev; adev 341 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h struct amdgpu_device *adev; adev 794 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h bool is_support_sw_smu(struct amdgpu_device *adev); adev 795 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h bool is_support_sw_smu_xgmi(struct amdgpu_device *adev); adev 734 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h void *adev; adev 305 drivers/gpu/drm/amd/powerplay/navi10_ppt.c struct amdgpu_device *adev = smu->adev; adev 322 drivers/gpu/drm/amd/powerplay/navi10_ppt.c struct amdgpu_device *adev = smu->adev; adev 354 drivers/gpu/drm/amd/powerplay/navi10_ppt.c if (adev->pm.pp_feature & PP_MCLK_DPM_MASK) adev 359 drivers/gpu/drm/amd/powerplay/navi10_ppt.c if (adev->pm.pp_feature & PP_GFXOFF_MASK) { adev 365 drivers/gpu/drm/amd/powerplay/navi10_ppt.c if (smu->adev->pg_flags & AMD_PG_SUPPORT_MMHUB) adev 368 drivers/gpu/drm/amd/powerplay/navi10_ppt.c if (smu->adev->pg_flags & AMD_PG_SUPPORT_ATHUB) adev 371 drivers/gpu/drm/amd/powerplay/navi10_ppt.c if (smu->adev->pg_flags & AMD_PG_SUPPORT_VCN) adev 378 drivers/gpu/drm/amd/powerplay/navi10_ppt.c if ((adev->asic_type == CHIP_NAVI10) && adev 379 drivers/gpu/drm/amd/powerplay/navi10_ppt.c (adev->rev_id == 0)) { adev 399 drivers/gpu/drm/amd/powerplay/navi10_ppt.c struct amdgpu_device *adev = smu->adev; adev 485 drivers/gpu/drm/amd/powerplay/navi10_ppt.c if (adev->pm.pp_feature & PP_GFXOFF_MASK) { adev 1458 drivers/gpu/drm/amd/powerplay/navi10_ppt.c struct amdgpu_device *adev = smu->adev; adev 1463 drivers/gpu/drm/amd/powerplay/navi10_ppt.c switch (adev->pdev->revision) { adev 1497 drivers/gpu/drm/amd/powerplay/navi10_ppt.c struct amdgpu_device *adev = smu->adev; adev 1499 drivers/gpu/drm/amd/powerplay/navi10_ppt.c if (adev->asic_type != CHIP_NAVI10) adev 59 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 66 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 74 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 75 drivers/gpu/drm/amd/powerplay/smu_v11_0.c uint32_t cur_value, i, timeout = adev->usec_timeout * 10; adev 93 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 121 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 149 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 157 drivers/gpu/drm/amd/powerplay/smu_v11_0.c switch (adev->asic_type) { adev 179 drivers/gpu/drm/amd/powerplay/smu_v11_0.c err = request_firmware(&adev->pm.fw, fw_name, adev->dev); adev 182 drivers/gpu/drm/amd/powerplay/smu_v11_0.c err = amdgpu_ucode_validate(adev->pm.fw); adev 186 drivers/gpu/drm/amd/powerplay/smu_v11_0.c hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data; adev 188 drivers/gpu/drm/amd/powerplay/smu_v11_0.c adev->pm.fw_version = le32_to_cpu(hdr->header.ucode_version); adev 190 drivers/gpu/drm/amd/powerplay/smu_v11_0.c if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { adev 191 drivers/gpu/drm/amd/powerplay/smu_v11_0.c ucode = &adev->firmware.ucode[AMDGPU_UCODE_ID_SMC]; adev 193 drivers/gpu/drm/amd/powerplay/smu_v11_0.c ucode->fw = adev->pm.fw; adev 195 drivers/gpu/drm/amd/powerplay/smu_v11_0.c adev->firmware.fw_size += adev 203 drivers/gpu/drm/amd/powerplay/smu_v11_0.c release_firmware(adev->pm.fw); adev 204 drivers/gpu/drm/amd/powerplay/smu_v11_0.c adev->pm.fw = NULL; adev 211 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 218 drivers/gpu/drm/amd/powerplay/smu_v11_0.c hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data; adev 219 drivers/gpu/drm/amd/powerplay/smu_v11_0.c src = (const uint32_t *)(adev->pm.fw->data + adev 232 drivers/gpu/drm/amd/powerplay/smu_v11_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 241 drivers/gpu/drm/amd/powerplay/smu_v11_0.c if (i == adev->usec_timeout) adev 249 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 277 drivers/gpu/drm/amd/powerplay/smu_v11_0.c switch (smu->adev->asic_type) { adev 291 drivers/gpu/drm/amd/powerplay/smu_v11_0.c pr_err("smu unsupported asic type:%d.\n", smu->adev->asic_type); adev 317 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 321 drivers/gpu/drm/amd/powerplay/smu_v11_0.c v2 = (const struct smc_firmware_header_v2_0 *) adev->pm.fw->data; adev 333 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 339 drivers/gpu/drm/amd/powerplay/smu_v11_0.c v2_1 = (const struct smc_firmware_header_v2_1 *) adev->pm.fw->data; adev 359 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 368 drivers/gpu/drm/amd/powerplay/smu_v11_0.c hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data; adev 582 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 591 drivers/gpu/drm/amd/powerplay/smu_v11_0.c ret = amdgpu_atom_execute_table(adev->mode_info.atom_context, index, adev 605 drivers/gpu/drm/amd/powerplay/smu_v11_0.c ret = amdgpu_atom_execute_table(adev->mode_info.atom_context, index, adev 619 drivers/gpu/drm/amd/powerplay/smu_v11_0.c ret = amdgpu_atom_execute_table(adev->mode_info.atom_context, index, adev 633 drivers/gpu/drm/amd/powerplay/smu_v11_0.c ret = amdgpu_atom_execute_table(adev->mode_info.atom_context, index, adev 647 drivers/gpu/drm/amd/powerplay/smu_v11_0.c ret = amdgpu_atom_execute_table(adev->mode_info.atom_context, index, adev 664 drivers/gpu/drm/amd/powerplay/smu_v11_0.c ret = amdgpu_atom_execute_table(adev->mode_info.atom_context, index, adev 935 drivers/gpu/drm/amd/powerplay/smu_v11_0.c smu->adev->gmc.vram_type == AMDGPU_VRAM_TYPE_HBM) adev 1136 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 1165 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 1181 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 1206 drivers/gpu/drm/amd/powerplay/smu_v11_0.c adev->pm.dpm.thermal.min_temp = range.min; adev 1207 drivers/gpu/drm/amd/powerplay/smu_v11_0.c adev->pm.dpm.thermal.max_temp = range.max; adev 1208 drivers/gpu/drm/amd/powerplay/smu_v11_0.c adev->pm.dpm.thermal.max_edge_emergency_temp = range.edge_emergency_max; adev 1209 drivers/gpu/drm/amd/powerplay/smu_v11_0.c adev->pm.dpm.thermal.min_hotspot_temp = range.hotspot_min; adev 1210 drivers/gpu/drm/amd/powerplay/smu_v11_0.c adev->pm.dpm.thermal.max_hotspot_crit_temp = range.hotspot_crit_max; adev 1211 drivers/gpu/drm/amd/powerplay/smu_v11_0.c adev->pm.dpm.thermal.max_hotspot_emergency_temp = range.hotspot_emergency_max; adev 1212 drivers/gpu/drm/amd/powerplay/smu_v11_0.c adev->pm.dpm.thermal.min_mem_temp = range.mem_min; adev 1213 drivers/gpu/drm/amd/powerplay/smu_v11_0.c adev->pm.dpm.thermal.max_mem_crit_temp = range.mem_crit_max; adev 1214 drivers/gpu/drm/amd/powerplay/smu_v11_0.c adev->pm.dpm.thermal.max_mem_emergency_temp = range.mem_emergency_max; adev 1226 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 1358 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 1360 drivers/gpu/drm/amd/powerplay/smu_v11_0.c switch (adev->asic_type) { adev 1366 drivers/gpu/drm/amd/powerplay/smu_v11_0.c if (!(adev->pm.pp_feature & PP_GFXOFF_MASK)) adev 1410 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 1425 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 1482 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 1494 drivers/gpu/drm/amd/powerplay/smu_v11_0.c crystal_clock_freq = amdgpu_asic_get_xclk(adev); adev 1526 drivers/gpu/drm/amd/powerplay/smu_v11_0.c static int smu_v11_0_irq_process(struct amdgpu_device *adev, adev 1537 drivers/gpu/drm/amd/powerplay/smu_v11_0.c PCI_BUS_NUM(adev->pdev->devfn), adev 1538 drivers/gpu/drm/amd/powerplay/smu_v11_0.c PCI_SLOT(adev->pdev->devfn), adev 1539 drivers/gpu/drm/amd/powerplay/smu_v11_0.c PCI_FUNC(adev->pdev->devfn)); adev 1543 drivers/gpu/drm/amd/powerplay/smu_v11_0.c PCI_BUS_NUM(adev->pdev->devfn), adev 1544 drivers/gpu/drm/amd/powerplay/smu_v11_0.c PCI_SLOT(adev->pdev->devfn), adev 1545 drivers/gpu/drm/amd/powerplay/smu_v11_0.c PCI_FUNC(adev->pdev->devfn)); adev 1550 drivers/gpu/drm/amd/powerplay/smu_v11_0.c PCI_BUS_NUM(adev->pdev->devfn), adev 1551 drivers/gpu/drm/amd/powerplay/smu_v11_0.c PCI_SLOT(adev->pdev->devfn), adev 1552 drivers/gpu/drm/amd/powerplay/smu_v11_0.c PCI_FUNC(adev->pdev->devfn)); adev 1568 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 1583 drivers/gpu/drm/amd/powerplay/smu_v11_0.c ret = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_THM, adev 1589 drivers/gpu/drm/amd/powerplay/smu_v11_0.c ret = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_THM, adev 1646 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 1816 drivers/gpu/drm/amd/powerplay/smu_v11_0.c struct amdgpu_device *adev = smu->adev; adev 1819 drivers/gpu/drm/amd/powerplay/smu_v11_0.c switch (adev->asic_type) { adev 47 drivers/gpu/drm/amd/powerplay/smu_v12_0.c struct amdgpu_device *adev = smu->adev; adev 55 drivers/gpu/drm/amd/powerplay/smu_v12_0.c struct amdgpu_device *adev = smu->adev; adev 63 drivers/gpu/drm/amd/powerplay/smu_v12_0.c struct amdgpu_device *adev = smu->adev; adev 66 drivers/gpu/drm/amd/powerplay/smu_v12_0.c for (i = 0; i < adev->usec_timeout; i++) { adev 74 drivers/gpu/drm/amd/powerplay/smu_v12_0.c if (i == adev->usec_timeout) adev 82 drivers/gpu/drm/amd/powerplay/smu_v12_0.c struct amdgpu_device *adev = smu->adev; adev 109 drivers/gpu/drm/amd/powerplay/smu_v12_0.c struct amdgpu_device *adev = smu->adev; adev 137 drivers/gpu/drm/amd/powerplay/smu_v12_0.c struct amdgpu_device *adev = smu->adev; adev 186 drivers/gpu/drm/amd/powerplay/smu_v12_0.c if (!(smu->adev->flags & AMD_IS_APU)) adev 197 drivers/gpu/drm/amd/powerplay/smu_v12_0.c if (!(smu->adev->flags & AMD_IS_APU)) adev 208 drivers/gpu/drm/amd/powerplay/smu_v12_0.c if (!(smu->adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) adev 231 drivers/gpu/drm/amd/powerplay/smu_v12_0.c struct amdgpu_device *adev = smu->adev; adev 401 drivers/gpu/drm/amd/powerplay/smu_v12_0.c struct amdgpu_device *adev = smu->adev; adev 405 drivers/gpu/drm/amd/powerplay/smu_v12_0.c switch (adev->asic_type) { adev 235 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 238 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c dev_id = adev->pdev->device; adev 1304 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 1325 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c dev_id = adev->pdev->device; adev 2185 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 2855 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 2864 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint32_t max_vddc = adev->pm.ac_power ? hwmgr->dyn_state.max_clock_voltage_on_ac.vddc : adev 2892 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 2900 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint32_t max_vddc = adev->pm.ac_power ? hwmgr->dyn_state.max_clock_voltage_on_ac.vddc : adev 2205 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 283 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 286 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c dev_id = adev->pdev->device; adev 2147 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 806 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c ref_clk = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 871 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c ref_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 1644 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 1665 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c if (((adev->pdev->device == 0x67ef) && adev 1666 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c ((adev->pdev->revision == 0xe0) || adev 1667 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (adev->pdev->revision == 0xe5))) || adev 1668 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c ((adev->pdev->device == 0x67ff) && adev 1669 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c ((adev->pdev->revision == 0xcf) || adev 1670 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (adev->pdev->revision == 0xef) || adev 1671 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (adev->pdev->revision == 0xff)))) { adev 1673 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c if ((adev->pdev->device == 0x67ef && adev->pdev->revision == 0xe5) || adev 1674 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (adev->pdev->device == 0x67ff && adev->pdev->revision == 0xef)) { adev 1697 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c } else if (((adev->pdev->device == 0x67df) && adev 1698 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c ((adev->pdev->revision == 0xe0) || adev 1699 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (adev->pdev->revision == 0xe3) || adev 1700 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (adev->pdev->revision == 0xe4) || adev 1701 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (adev->pdev->revision == 0xe5) || adev 1702 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (adev->pdev->revision == 0xe7) || adev 1703 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (adev->pdev->revision == 0xef))) || adev 1704 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c ((adev->pdev->device == 0x6fdf) && adev 1705 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c ((adev->pdev->revision == 0xef) || adev 1706 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (adev->pdev->revision == 0xff)))) { adev 2140 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 51 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 65 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 74 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 81 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 99 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 121 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 140 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c adev->nbio_funcs->hdp_flush(adev, NULL); adev 215 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 219 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c adev->pm.fw_version = hwmgr->smu_version >> 8; adev 221 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c if (adev->rev_id < 0x8 && adev->pdev->device != 0x15d8 && adev 222 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c adev->pm.fw_version < 0x1e45) adev 223 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c adev->pm.pp_feature &= ~PP_GFXOFF_MASK; adev 244 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c r = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 260 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c r = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 346 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c amdgpu_ucode_init_bo(hwmgr->adev); adev 554 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c r = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 569 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c r = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 665 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c amdgpu_ucode_init_bo(hwmgr->adev); adev 725 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c struct amdgpu_device *adev; adev 734 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c adev = hwmgr->adev; adev 742 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c adev->pm.fw_version = hwmgr->smu_version >> 8; adev 766 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 776 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 40 drivers/gpu/drm/amd/powerplay/smumgr/smu9_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 60 drivers/gpu/drm/amd/powerplay/smumgr/smu9_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 84 drivers/gpu/drm/amd/powerplay/smumgr/smu9_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 99 drivers/gpu/drm/amd/powerplay/smumgr/smu9_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 125 drivers/gpu/drm/amd/powerplay/smumgr/smu9_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 145 drivers/gpu/drm/amd/powerplay/smumgr/smu9_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 1587 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 1591 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c hw_revision = adev->pdev->revision; adev 1592 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c dev_id = adev->pdev->device; adev 2532 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 42 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 61 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c adev->nbio_funcs->hdp_flush(adev, NULL); adev 149 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 159 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c dev_id = adev->pdev->device; adev 160 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c rev_id = adev->pdev->revision; adev 197 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 212 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 228 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 245 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 260 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 45 drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 69 drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.c adev->nbio_funcs->hdp_flush(adev, NULL); adev 221 drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 235 drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 251 drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 266 drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 281 drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 295 drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 49 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 70 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 90 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 105 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 131 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 151 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 166 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 192 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c adev->nbio_funcs->hdp_flush(adev, NULL); adev 273 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 293 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c adev->nbio_funcs->hdp_flush(adev, NULL); adev 419 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 433 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 447 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 461 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 475 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 489 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev, adev 674 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c ref_clk = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 746 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c ref_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); adev 1914 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c struct amdgpu_device *adev = hwmgr->adev; adev 1918 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c adev->gfx.cu_info.number); adev 946 drivers/gpu/drm/amd/powerplay/vega20_ppt.c struct amdgpu_device *adev = smu->adev; adev 2980 drivers/gpu/drm/amd/powerplay/vega20_ppt.c struct amdgpu_device *adev = smu->adev; adev 902 drivers/hid/i2c-hid/i2c-hid-core.c struct acpi_device *adev; adev 906 drivers/hid/i2c-hid/i2c-hid-core.c if (!handle || acpi_bus_get_device(handle, &adev)) { adev 911 drivers/hid/i2c-hid/i2c-hid-core.c if (acpi_match_device_ids(adev, i2c_hid_acpi_blacklist) == 0) adev 929 drivers/hid/i2c-hid/i2c-hid-core.c struct acpi_device *adev; adev 931 drivers/hid/i2c-hid/i2c-hid-core.c adev = ACPI_COMPANION(dev); adev 932 drivers/hid/i2c-hid/i2c-hid-core.c if (adev) adev 933 drivers/hid/i2c-hid/i2c-hid-core.c acpi_device_fix_up_power(adev); adev 500 drivers/hwtracing/coresight/coresight-catu.c static int catu_probe(struct amba_device *adev, const struct amba_id *id) adev 507 drivers/hwtracing/coresight/coresight-catu.c struct device *dev = &adev->dev; adev 521 drivers/hwtracing/coresight/coresight-catu.c base = devm_ioremap_resource(dev, &adev->res); adev 565 drivers/hwtracing/coresight/coresight-catu.c pm_runtime_put(&adev->dev); adev 558 drivers/hwtracing/coresight/coresight-cpu-debug.c static int debug_probe(struct amba_device *adev, const struct amba_id *id) adev 561 drivers/hwtracing/coresight/coresight-cpu-debug.c struct device *dev = &adev->dev; adev 563 drivers/hwtracing/coresight/coresight-cpu-debug.c struct resource *res = &adev->res; adev 580 drivers/hwtracing/coresight/coresight-cpu-debug.c drvdata->dev = &adev->dev; adev 581 drivers/hwtracing/coresight/coresight-cpu-debug.c amba_set_drvdata(adev, drvdata); adev 630 drivers/hwtracing/coresight/coresight-cpu-debug.c static int debug_remove(struct amba_device *adev) adev 632 drivers/hwtracing/coresight/coresight-cpu-debug.c struct device *dev = &adev->dev; adev 633 drivers/hwtracing/coresight/coresight-cpu-debug.c struct debug_drvdata *drvdata = amba_get_drvdata(adev); adev 726 drivers/hwtracing/coresight/coresight-etb10.c static int etb_probe(struct amba_device *adev, const struct amba_id *id) adev 730 drivers/hwtracing/coresight/coresight-etb10.c struct device *dev = &adev->dev; adev 733 drivers/hwtracing/coresight/coresight-etb10.c struct resource *res = &adev->res; adev 744 drivers/hwtracing/coresight/coresight-etb10.c drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */ adev 777 drivers/hwtracing/coresight/coresight-etb10.c adev->dev.platform_data = pdata; adev 796 drivers/hwtracing/coresight/coresight-etb10.c pm_runtime_put(&adev->dev); adev 785 drivers/hwtracing/coresight/coresight-etm3x.c static int etm_probe(struct amba_device *adev, const struct amba_id *id) adev 789 drivers/hwtracing/coresight/coresight-etm3x.c struct device *dev = &adev->dev; adev 792 drivers/hwtracing/coresight/coresight-etm3x.c struct resource *res = &adev->res; adev 811 drivers/hwtracing/coresight/coresight-etm3x.c drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */ adev 859 drivers/hwtracing/coresight/coresight-etm3x.c adev->dev.platform_data = pdata; adev 879 drivers/hwtracing/coresight/coresight-etm3x.c pm_runtime_put(&adev->dev); adev 1088 drivers/hwtracing/coresight/coresight-etm4x.c static int etm4_probe(struct amba_device *adev, const struct amba_id *id) adev 1092 drivers/hwtracing/coresight/coresight-etm4x.c struct device *dev = &adev->dev; adev 1095 drivers/hwtracing/coresight/coresight-etm4x.c struct resource *res = &adev->res; adev 1155 drivers/hwtracing/coresight/coresight-etm4x.c adev->dev.platform_data = pdata; adev 1175 drivers/hwtracing/coresight/coresight-etm4x.c pm_runtime_put(&adev->dev); adev 345 drivers/hwtracing/coresight/coresight-funnel.c static int dynamic_funnel_probe(struct amba_device *adev, adev 348 drivers/hwtracing/coresight/coresight-funnel.c return funnel_probe(&adev->dev, &adev->res); adev 485 drivers/hwtracing/coresight/coresight-platform.c acpi_get_dsd_graph(struct acpi_device *adev) adev 492 drivers/hwtracing/coresight/coresight-platform.c status = acpi_evaluate_object_typed(adev->handle, "_DSD", NULL, adev 518 drivers/hwtracing/coresight/coresight-platform.c dev_warn(&adev->dev, "Invalid Graph _DSD property\n"); adev 548 drivers/hwtracing/coresight/coresight-platform.c acpi_get_coresight_graph(struct acpi_device *adev) adev 553 drivers/hwtracing/coresight/coresight-platform.c graph_list = acpi_get_dsd_graph(adev); adev 589 drivers/hwtracing/coresight/coresight-platform.c static int acpi_coresight_parse_link(struct acpi_device *adev, adev 640 drivers/hwtracing/coresight/coresight-platform.c static int acpi_coresight_parse_graph(struct acpi_device *adev, adev 648 drivers/hwtracing/coresight/coresight-platform.c graph = acpi_get_coresight_graph(adev); adev 662 drivers/hwtracing/coresight/coresight-platform.c conns = devm_kcalloc(&adev->dev, nlinks, sizeof(*conns), GFP_KERNEL); adev 670 drivers/hwtracing/coresight/coresight-platform.c dir = acpi_coresight_parse_link(adev, link, ptr); adev 682 drivers/hwtracing/coresight/coresight-platform.c rc = coresight_alloc_conns(&adev->dev, pdata); adev 690 drivers/hwtracing/coresight/coresight-platform.c devm_kfree(&adev->dev, conns); adev 727 drivers/hwtracing/coresight/coresight-platform.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 729 drivers/hwtracing/coresight/coresight-platform.c if (!adev) adev 731 drivers/hwtracing/coresight/coresight-platform.c status = acpi_get_parent(adev->handle, &cpu_handle); adev 745 drivers/hwtracing/coresight/coresight-platform.c struct acpi_device *adev; adev 747 drivers/hwtracing/coresight/coresight-platform.c adev = ACPI_COMPANION(dev); adev 748 drivers/hwtracing/coresight/coresight-platform.c if (!adev) adev 751 drivers/hwtracing/coresight/coresight-platform.c return acpi_coresight_parse_graph(adev, pdata); adev 343 drivers/hwtracing/coresight/coresight-replicator.c static int dynamic_replicator_probe(struct amba_device *adev, adev 346 drivers/hwtracing/coresight/coresight-replicator.c return replicator_probe(&adev->dev, &adev->res); adev 728 drivers/hwtracing/coresight/coresight-stm.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 730 drivers/hwtracing/coresight/coresight-stm.c if (!adev) adev 732 drivers/hwtracing/coresight/coresight-stm.c rc = acpi_dev_get_resources(adev, &res_list, NULL, NULL); adev 853 drivers/hwtracing/coresight/coresight-stm.c static int stm_probe(struct amba_device *adev, const struct amba_id *id) adev 858 drivers/hwtracing/coresight/coresight-stm.c struct device *dev = &adev->dev; adev 861 drivers/hwtracing/coresight/coresight-stm.c struct resource *res = &adev->res; adev 874 drivers/hwtracing/coresight/coresight-stm.c drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */ adev 928 drivers/hwtracing/coresight/coresight-stm.c adev->dev.platform_data = pdata; adev 942 drivers/hwtracing/coresight/coresight-stm.c pm_runtime_put(&adev->dev); adev 434 drivers/hwtracing/coresight/coresight-tmc.c static int tmc_probe(struct amba_device *adev, const struct amba_id *id) adev 439 drivers/hwtracing/coresight/coresight-tmc.c struct device *dev = &adev->dev; adev 442 drivers/hwtracing/coresight/coresight-tmc.c struct resource *res = &adev->res; adev 520 drivers/hwtracing/coresight/coresight-tmc.c adev->dev.platform_data = pdata; adev 536 drivers/hwtracing/coresight/coresight-tmc.c pm_runtime_put(&adev->dev); adev 120 drivers/hwtracing/coresight/coresight-tpiu.c static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) adev 124 drivers/hwtracing/coresight/coresight-tpiu.c struct device *dev = &adev->dev; adev 127 drivers/hwtracing/coresight/coresight-tpiu.c struct resource *res = &adev->res; adev 138 drivers/hwtracing/coresight/coresight-tpiu.c drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */ adev 169 drivers/hwtracing/coresight/coresight-tpiu.c pm_runtime_put(&adev->dev); adev 39 drivers/hwtracing/intel_th/acpi.c struct acpi_device *adev = ACPI_COMPANION(&pdev->dev); adev 58 drivers/hwtracing/intel_th/acpi.c adev->driver_data = th; adev 246 drivers/i2c/busses/i2c-amd-mp2-plat.c struct acpi_device *adev; adev 250 drivers/i2c/busses/i2c-amd-mp2-plat.c if (acpi_bus_get_device(handle, &adev)) adev 276 drivers/i2c/busses/i2c-amd-mp2-plat.c uid = adev->pnp.unique_id; adev 1655 drivers/i2c/busses/i2c-i801.c struct acpi_device *adev; adev 1658 drivers/i2c/busses/i2c-i801.c adev = ACPI_COMPANION(&priv->pci_dev->dev); adev 1659 drivers/i2c/busses/i2c-i801.c if (adev) { adev 1660 drivers/i2c/busses/i2c-i801.c status = acpi_install_address_space_handler(adev->handle, adev 1672 drivers/i2c/busses/i2c-i801.c struct acpi_device *adev; adev 1674 drivers/i2c/busses/i2c-i801.c adev = ACPI_COMPANION(&priv->pci_dev->dev); adev 1675 drivers/i2c/busses/i2c-i801.c if (!adev) adev 1678 drivers/i2c/busses/i2c-i801.c acpi_remove_address_space_handler(adev->handle, adev 170 drivers/i2c/busses/i2c-nomadik.c struct amba_device *adev; adev 239 drivers/i2c/busses/i2c-nomadik.c dev_err(&dev->adev->dev, adev 391 drivers/i2c/busses/i2c-nomadik.c dev_dbg(&dev->adev->dev, "calculated SLSU = %04x\n", slsu); adev 421 drivers/i2c/busses/i2c-nomadik.c dev_err(&dev->adev->dev, adev 481 drivers/i2c/busses/i2c-nomadik.c dev_err(&dev->adev->dev, "read from slave 0x%x timed out\n", adev 561 drivers/i2c/busses/i2c-nomadik.c dev_err(&dev->adev->dev, "write to slave 0x%x timed out\n", adev 600 drivers/i2c/busses/i2c-nomadik.c dev_err(&dev->adev->dev, "%s\n", adev 669 drivers/i2c/busses/i2c-nomadik.c pm_runtime_get_sync(&dev->adev->dev); adev 691 drivers/i2c/busses/i2c-nomadik.c pm_runtime_put_sync(&dev->adev->dev); adev 809 drivers/i2c/busses/i2c-nomadik.c dev_err(&dev->adev->dev, adev 853 drivers/i2c/busses/i2c-nomadik.c dev_err(&dev->adev->dev, "Tx Fifo Over run\n"); adev 866 drivers/i2c/busses/i2c-nomadik.c dev_err(&dev->adev->dev, "unhandled Interrupt\n"); adev 869 drivers/i2c/busses/i2c-nomadik.c dev_err(&dev->adev->dev, "spurious Interrupt..\n"); adev 898 drivers/i2c/busses/i2c-nomadik.c struct amba_device *adev = to_amba_device(dev); adev 899 drivers/i2c/busses/i2c-nomadik.c struct nmk_i2c_dev *nmk_i2c = amba_get_drvdata(adev); adev 908 drivers/i2c/busses/i2c-nomadik.c struct amba_device *adev = to_amba_device(dev); adev 909 drivers/i2c/busses/i2c-nomadik.c struct nmk_i2c_dev *nmk_i2c = amba_get_drvdata(adev); adev 964 drivers/i2c/busses/i2c-nomadik.c static int nmk_i2c_probe(struct amba_device *adev, const struct amba_id *id) adev 967 drivers/i2c/busses/i2c-nomadik.c struct device_node *np = adev->dev.of_node; adev 973 drivers/i2c/busses/i2c-nomadik.c dev = devm_kzalloc(&adev->dev, sizeof(struct nmk_i2c_dev), GFP_KERNEL); adev 975 drivers/i2c/busses/i2c-nomadik.c dev_err(&adev->dev, "cannot allocate memory\n"); adev 980 drivers/i2c/busses/i2c-nomadik.c dev->adev = adev; adev 984 drivers/i2c/busses/i2c-nomadik.c dev_warn(&adev->dev, "requested TX FIFO threshold %u, adjusted down to %u\n", adev 990 drivers/i2c/busses/i2c-nomadik.c dev_warn(&adev->dev, "requested RX FIFO threshold %u, adjusted down to %u\n", adev 995 drivers/i2c/busses/i2c-nomadik.c amba_set_drvdata(adev, dev); adev 997 drivers/i2c/busses/i2c-nomadik.c dev->virtbase = devm_ioremap(&adev->dev, adev->res.start, adev 998 drivers/i2c/busses/i2c-nomadik.c resource_size(&adev->res)); adev 1004 drivers/i2c/busses/i2c-nomadik.c dev->irq = adev->irq[0]; adev 1005 drivers/i2c/busses/i2c-nomadik.c ret = devm_request_irq(&adev->dev, dev->irq, i2c_irq_handler, 0, adev 1008 drivers/i2c/busses/i2c-nomadik.c dev_err(&adev->dev, "cannot claim the irq %d\n", dev->irq); adev 1012 drivers/i2c/busses/i2c-nomadik.c dev->clk = devm_clk_get(&adev->dev, NULL); adev 1014 drivers/i2c/busses/i2c-nomadik.c dev_err(&adev->dev, "could not get i2c clock\n"); adev 1021 drivers/i2c/busses/i2c-nomadik.c dev_err(&adev->dev, "can't prepare_enable clock\n"); adev 1029 drivers/i2c/busses/i2c-nomadik.c adap->dev.parent = &adev->dev; adev 1035 drivers/i2c/busses/i2c-nomadik.c "Nomadik I2C at %pR", &adev->res); adev 1039 drivers/i2c/busses/i2c-nomadik.c dev_info(&adev->dev, adev 1047 drivers/i2c/busses/i2c-nomadik.c pm_runtime_put(&adev->dev); adev 1058 drivers/i2c/busses/i2c-nomadik.c static int nmk_i2c_remove(struct amba_device *adev) adev 1060 drivers/i2c/busses/i2c-nomadik.c struct resource *res = &adev->res; adev 1061 drivers/i2c/busses/i2c-nomadik.c struct nmk_i2c_dev *dev = amba_get_drvdata(adev); adev 108 drivers/i2c/i2c-core-acpi.c static int i2c_acpi_do_lookup(struct acpi_device *adev, adev 115 drivers/i2c/i2c-core-acpi.c if (acpi_bus_get_status(adev) || !adev->status.present) adev 118 drivers/i2c/i2c-core-acpi.c if (acpi_match_device_ids(adev, i2c_acpi_ignored_device_ids) == 0) adev 122 drivers/i2c/i2c-core-acpi.c lookup->device_handle = acpi_device_handle(adev); adev 126 drivers/i2c/i2c-core-acpi.c ret = acpi_dev_get_resources(adev, &resource_list, adev 157 drivers/i2c/i2c-core-acpi.c struct acpi_device *adev = ACPI_COMPANION(&client->dev); adev 164 drivers/i2c/i2c-core-acpi.c ret = acpi_dev_get_resources(adev, &resource_list, adev 172 drivers/i2c/i2c-core-acpi.c irq = acpi_dev_gpio_irq_get(adev, 0); adev 177 drivers/i2c/i2c-core-acpi.c static int i2c_acpi_get_info(struct acpi_device *adev, adev 189 drivers/i2c/i2c-core-acpi.c if (acpi_device_enumerated(adev)) adev 192 drivers/i2c/i2c-core-acpi.c ret = i2c_acpi_do_lookup(adev, &lookup); adev 211 drivers/i2c/i2c-core-acpi.c info->fwnode = acpi_fwnode_handle(adev); adev 215 drivers/i2c/i2c-core-acpi.c acpi_set_modalias(adev, dev_name(&adev->dev), info->type, adev 222 drivers/i2c/i2c-core-acpi.c struct acpi_device *adev, adev 225 drivers/i2c/i2c-core-acpi.c adev->power.flags.ignore_parent = true; adev 226 drivers/i2c/i2c-core-acpi.c acpi_device_set_enumerated(adev); adev 229 drivers/i2c/i2c-core-acpi.c adev->power.flags.ignore_parent = false; adev 232 drivers/i2c/i2c-core-acpi.c dev_name(&adev->dev)); adev 240 drivers/i2c/i2c-core-acpi.c struct acpi_device *adev; adev 243 drivers/i2c/i2c-core-acpi.c if (acpi_bus_get_device(handle, &adev)) adev 246 drivers/i2c/i2c-core-acpi.c if (i2c_acpi_get_info(adev, &info, adapter, NULL)) adev 249 drivers/i2c/i2c-core-acpi.c i2c_acpi_register_device(adapter, adev, &info); adev 306 drivers/i2c/i2c-core-acpi.c struct acpi_device *adev; adev 308 drivers/i2c/i2c-core-acpi.c if (acpi_bus_get_device(handle, &adev)) adev 311 drivers/i2c/i2c-core-acpi.c if (i2c_acpi_do_lookup(adev, lookup)) adev 320 drivers/i2c/i2c-core-acpi.c if (acpi_match_device_ids(adev, i2c_acpi_force_400khz_device_ids) == 0) adev 394 drivers/i2c/i2c-core-acpi.c static struct i2c_client *i2c_acpi_find_client_by_adev(struct acpi_device *adev) adev 399 drivers/i2c/i2c-core-acpi.c dev = bus_find_device_by_acpi_dev(&i2c_bus_type, adev); adev 413 drivers/i2c/i2c-core-acpi.c struct acpi_device *adev = arg; adev 421 drivers/i2c/i2c-core-acpi.c if (i2c_acpi_get_info(adev, &info, NULL, &adapter_handle)) adev 428 drivers/i2c/i2c-core-acpi.c i2c_acpi_register_device(adapter, adev, &info); adev 431 drivers/i2c/i2c-core-acpi.c if (!acpi_device_enumerated(adev)) adev 434 drivers/i2c/i2c-core-acpi.c client = i2c_acpi_find_client_by_adev(adev); adev 473 drivers/i2c/i2c-core-acpi.c struct acpi_device *adev; adev 477 drivers/i2c/i2c-core-acpi.c adev = ACPI_COMPANION(dev); adev 478 drivers/i2c/i2c-core-acpi.c if (!adev) adev 483 drivers/i2c/i2c-core-acpi.c lookup.device_handle = acpi_device_handle(adev); adev 486 drivers/i2c/i2c-core-acpi.c ret = acpi_dev_get_resources(adev, &resource_list, adev 683 drivers/i2c/i2c-core-base.c struct acpi_device *adev = ACPI_COMPANION(&client->dev); adev 690 drivers/i2c/i2c-core-base.c if (adev) { adev 691 drivers/i2c/i2c-core-base.c dev_set_name(&client->dev, "i2c-%s", acpi_dev_name(adev)); adev 103 drivers/ide/ide-acpi.c struct acpi_device *adev; adev 105 drivers/ide/ide-acpi.c if (!handle || acpi_bus_get_device(handle, &adev)) adev 108 drivers/ide/ide-acpi.c adev = acpi_find_child_device(adev, addr, false); adev 109 drivers/ide/ide-acpi.c return adev ? adev->handle : NULL; adev 1019 drivers/iio/accel/st_accel_core.c struct acpi_device *adev; adev 1041 drivers/iio/accel/st_accel_core.c adev = ACPI_COMPANION(adata->dev); adev 1042 drivers/iio/accel/st_accel_core.c if (!adev) adev 1046 drivers/iio/accel/st_accel_core.c status = acpi_evaluate_object(adev->handle, "_ONT", NULL, &buffer); adev 43 drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c static int asus_acpi_get_sensor_info(struct acpi_device *adev, adev 53 drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c status = acpi_evaluate_object(adev->handle, "CNF0", NULL, &buffer); adev 105 drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c struct acpi_device *adev; adev 115 drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c adev = ACPI_COMPANION(&client->dev); adev 116 drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c if (!adev) adev 119 drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c ret = acpi_dev_get_resources(adev, &resources, adev 138 drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c struct acpi_device *adev; adev 141 drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c adev = ACPI_COMPANION(&client->dev); adev 147 drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c ret = asus_acpi_get_sensor_info(adev, client, adev 165 drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c strlcpy(info.type, dev_name(&adev->dev), adev 627 drivers/input/keyboard/applespi.c struct acpi_device *adev = ACPI_COMPANION(&applespi->spi->dev); adev 631 drivers/input/keyboard/applespi.c if (!acpi_dev_get_property(adev, "spiCSDelay", ACPI_TYPE_BUFFER, &o)) adev 637 drivers/input/keyboard/applespi.c if (!acpi_dev_get_property(adev, "resetA2RUsec", ACPI_TYPE_BUFFER, &o)) adev 643 drivers/input/keyboard/applespi.c if (!acpi_dev_get_property(adev, "resetRecUsec", ACPI_TYPE_BUFFER, &o)) adev 369 drivers/input/touchscreen/chipone_icn8505.c struct acpi_device *adev; adev 373 drivers/input/touchscreen/chipone_icn8505.c adev = ACPI_COMPANION(dev); adev 374 drivers/input/touchscreen/chipone_icn8505.c if (!adev) adev 377 drivers/input/touchscreen/chipone_icn8505.c status = acpi_evaluate_object(adev->handle, "_SUB", NULL, &buffer); adev 130 drivers/iommu/amd_iommu.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 133 drivers/iommu/amd_iommu.c if (!adev) adev 136 drivers/iommu/amd_iommu.c hid = acpi_device_hid(adev); adev 137 drivers/iommu/amd_iommu.c uid = acpi_device_uid(adev); adev 701 drivers/iommu/dmar.c struct acpi_device *adev) adev 725 drivers/iommu/dmar.c dev_name(&adev->dev), dmaru->reg_base_addr, adev 733 drivers/iommu/dmar.c get_device(&adev->dev)); adev 740 drivers/iommu/dmar.c device_number, dev_name(&adev->dev)); adev 755 drivers/iommu/dmar.c struct acpi_device *adev; adev 764 drivers/iommu/dmar.c if (acpi_bus_get_device(h, &adev)) { adev 769 drivers/iommu/dmar.c dmar_acpi_insert_dev_scope(andd->device_number, adev); adev 4883 drivers/iommu/intel-iommu.c struct acpi_device *adev; adev 4888 drivers/iommu/intel-iommu.c adev = to_acpi_device(dev); adev 4889 drivers/iommu/intel-iommu.c mutex_lock(&adev->physical_node_lock); adev 4891 drivers/iommu/intel-iommu.c &adev->physical_node_list, node) { adev 4903 drivers/iommu/intel-iommu.c mutex_unlock(&adev->physical_node_lock); adev 109 drivers/mailbox/arm_mhu.c static int mhu_probe(struct amba_device *adev, const struct amba_id *id) adev 113 drivers/mailbox/arm_mhu.c struct device *dev = &adev->dev; adev 121 drivers/mailbox/arm_mhu.c mhu->base = devm_ioremap_resource(dev, &adev->res); adev 129 drivers/mailbox/arm_mhu.c mhu->mlink[i].irq = adev->irq[i]; adev 142 drivers/mailbox/arm_mhu.c amba_set_drvdata(adev, mhu); adev 130 drivers/mailbox/pl320-ipc.c static int pl320_probe(struct amba_device *adev, const struct amba_id *id) adev 134 drivers/mailbox/pl320-ipc.c ipc_base = ioremap(adev->res.start, resource_size(&adev->res)); adev 140 drivers/mailbox/pl320-ipc.c ipc_irq = adev->irq[0]; adev 141 drivers/mailbox/pl320-ipc.c ret = request_irq(ipc_irq, ipc_handler, 0, dev_name(&adev->dev), NULL); adev 99 drivers/media/pci/bt8xx/dvb-bt8xx.c static int is_pci_slot_eq(struct pci_dev* adev, struct pci_dev* bdev) adev 101 drivers/media/pci/bt8xx/dvb-bt8xx.c if ((adev->subsystem_vendor == bdev->subsystem_vendor) && adev 102 drivers/media/pci/bt8xx/dvb-bt8xx.c (adev->subsystem_device == bdev->subsystem_device) && adev 103 drivers/media/pci/bt8xx/dvb-bt8xx.c (adev->bus->number == bdev->bus->number) && adev 104 drivers/media/pci/bt8xx/dvb-bt8xx.c (PCI_SLOT(adev->devfn) == PCI_SLOT(bdev->devfn))) adev 40 drivers/media/usb/cx231xx/cx231xx-audio.c if (dev->adev.urb[i]) { adev 42 drivers/media/usb/cx231xx/cx231xx-audio.c usb_kill_urb(dev->adev.urb[i]); adev 44 drivers/media/usb/cx231xx/cx231xx-audio.c usb_unlink_urb(dev->adev.urb[i]); adev 46 drivers/media/usb/cx231xx/cx231xx-audio.c usb_free_urb(dev->adev.urb[i]); adev 47 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.urb[i] = NULL; adev 49 drivers/media/usb/cx231xx/cx231xx-audio.c kfree(dev->adev.transfer_buffer[i]); adev 50 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.transfer_buffer[i] = NULL; adev 64 drivers/media/usb/cx231xx/cx231xx-audio.c if (dev->adev.urb[i]) { adev 66 drivers/media/usb/cx231xx/cx231xx-audio.c usb_kill_urb(dev->adev.urb[i]); adev 68 drivers/media/usb/cx231xx/cx231xx-audio.c usb_unlink_urb(dev->adev.urb[i]); adev 70 drivers/media/usb/cx231xx/cx231xx-audio.c usb_free_urb(dev->adev.urb[i]); adev 71 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.urb[i] = NULL; adev 73 drivers/media/usb/cx231xx/cx231xx-audio.c kfree(dev->adev.transfer_buffer[i]); adev 74 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.transfer_buffer[i] = NULL; adev 113 drivers/media/usb/cx231xx/cx231xx-audio.c if (dev->adev.capture_pcm_substream) { adev 114 drivers/media/usb/cx231xx/cx231xx-audio.c substream = dev->adev.capture_pcm_substream; adev 128 drivers/media/usb/cx231xx/cx231xx-audio.c oldptr = dev->adev.hwptr_done_capture; adev 144 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.hwptr_done_capture += length; adev 145 drivers/media/usb/cx231xx/cx231xx-audio.c if (dev->adev.hwptr_done_capture >= adev 147 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.hwptr_done_capture -= adev 150 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.capture_transfer_done += length; adev 151 drivers/media/usb/cx231xx/cx231xx-audio.c if (dev->adev.capture_transfer_done >= adev 153 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.capture_transfer_done -= adev 204 drivers/media/usb/cx231xx/cx231xx-audio.c if (dev->adev.capture_pcm_substream) { adev 205 drivers/media/usb/cx231xx/cx231xx-audio.c substream = dev->adev.capture_pcm_substream; adev 215 drivers/media/usb/cx231xx/cx231xx-audio.c oldptr = dev->adev.hwptr_done_capture; adev 231 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.hwptr_done_capture += length; adev 232 drivers/media/usb/cx231xx/cx231xx-audio.c if (dev->adev.hwptr_done_capture >= adev 234 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.hwptr_done_capture -= adev 237 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.capture_transfer_done += length; adev 238 drivers/media/usb/cx231xx/cx231xx-audio.c if (dev->adev.capture_transfer_done >= adev 240 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.capture_transfer_done -= adev 271 drivers/media/usb/cx231xx/cx231xx-audio.c sb_size = CX231XX_ISO_NUM_AUDIO_PACKETS * dev->adev.max_pkt_size; adev 277 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.transfer_buffer[i] = kmalloc(sb_size, GFP_ATOMIC); adev 278 drivers/media/usb/cx231xx/cx231xx-audio.c if (!dev->adev.transfer_buffer[i]) adev 281 drivers/media/usb/cx231xx/cx231xx-audio.c memset(dev->adev.transfer_buffer[i], 0x80, sb_size); adev 285 drivers/media/usb/cx231xx/cx231xx-audio.c usb_free_urb(dev->adev.urb[j]); adev 286 drivers/media/usb/cx231xx/cx231xx-audio.c kfree(dev->adev.transfer_buffer[j]); adev 294 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.end_point_addr); adev 296 drivers/media/usb/cx231xx/cx231xx-audio.c urb->transfer_buffer = dev->adev.transfer_buffer[i]; adev 303 drivers/media/usb/cx231xx/cx231xx-audio.c j++, k += dev->adev.max_pkt_size) { adev 305 drivers/media/usb/cx231xx/cx231xx-audio.c urb->iso_frame_desc[j].length = dev->adev.max_pkt_size; adev 307 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.urb[i] = urb; adev 311 drivers/media/usb/cx231xx/cx231xx-audio.c errCode = usb_submit_urb(dev->adev.urb[i], GFP_ATOMIC); adev 332 drivers/media/usb/cx231xx/cx231xx-audio.c sb_size = CX231XX_NUM_AUDIO_PACKETS * dev->adev.max_pkt_size; adev 338 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.transfer_buffer[i] = kmalloc(sb_size, GFP_ATOMIC); adev 339 drivers/media/usb/cx231xx/cx231xx-audio.c if (!dev->adev.transfer_buffer[i]) adev 342 drivers/media/usb/cx231xx/cx231xx-audio.c memset(dev->adev.transfer_buffer[i], 0x80, sb_size); adev 346 drivers/media/usb/cx231xx/cx231xx-audio.c usb_free_urb(dev->adev.urb[j]); adev 347 drivers/media/usb/cx231xx/cx231xx-audio.c kfree(dev->adev.transfer_buffer[j]); adev 355 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.end_point_addr); adev 357 drivers/media/usb/cx231xx/cx231xx-audio.c urb->transfer_buffer = dev->adev.transfer_buffer[i]; adev 361 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.urb[i] = urb; adev 366 drivers/media/usb/cx231xx/cx231xx-audio.c errCode = usb_submit_urb(dev->adev.urb[i], GFP_ATOMIC); adev 455 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.users++; adev 459 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.capture_pcm_substream = substream; adev 487 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.users--; adev 495 drivers/media/usb/cx231xx/cx231xx-audio.c if (dev->adev.users == 0 && dev->adev.shutdown == 1) { adev 496 drivers/media/usb/cx231xx/cx231xx-audio.c dev_dbg(dev->dev, "audio users: %d\n", dev->adev.users); adev 498 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.shutdown = 0; adev 550 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.hwptr_done_capture = 0; adev 551 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.capture_transfer_done = 0; adev 583 drivers/media/usb/cx231xx/cx231xx-audio.c spin_lock(&dev->adev.slock); adev 595 drivers/media/usb/cx231xx/cx231xx-audio.c spin_unlock(&dev->adev.slock); adev 611 drivers/media/usb/cx231xx/cx231xx-audio.c spin_lock_irqsave(&dev->adev.slock, flags); adev 612 drivers/media/usb/cx231xx/cx231xx-audio.c hwptr_done = dev->adev.hwptr_done_capture; adev 613 drivers/media/usb/cx231xx/cx231xx-audio.c spin_unlock_irqrestore(&dev->adev.slock, flags); adev 640 drivers/media/usb/cx231xx/cx231xx-audio.c struct cx231xx_audio *adev = &dev->adev; adev 663 drivers/media/usb/cx231xx/cx231xx-audio.c spin_lock_init(&adev->slock); adev 683 drivers/media/usb/cx231xx/cx231xx-audio.c adev->sndcard = card; adev 684 drivers/media/usb/cx231xx/cx231xx-audio.c adev->udev = dev->udev; adev 697 drivers/media/usb/cx231xx/cx231xx-audio.c adev->end_point_addr = adev 701 drivers/media/usb/cx231xx/cx231xx-audio.c adev->num_alt = uif->num_altsetting; adev 704 drivers/media/usb/cx231xx/cx231xx-audio.c adev->end_point_addr, adev->num_alt); adev 705 drivers/media/usb/cx231xx/cx231xx-audio.c adev->alt_max_pkt_size = kmalloc_array(32, adev->num_alt, GFP_KERNEL); adev 706 drivers/media/usb/cx231xx/cx231xx-audio.c if (!adev->alt_max_pkt_size) { adev 711 drivers/media/usb/cx231xx/cx231xx-audio.c for (i = 0; i < adev->num_alt; i++) { adev 721 drivers/media/usb/cx231xx/cx231xx-audio.c adev->alt_max_pkt_size[i] = adev 725 drivers/media/usb/cx231xx/cx231xx-audio.c adev->alt_max_pkt_size[i]); adev 731 drivers/media/usb/cx231xx/cx231xx-audio.c kfree(adev->alt_max_pkt_size); adev 750 drivers/media/usb/cx231xx/cx231xx-audio.c if (dev->adev.sndcard) { adev 751 drivers/media/usb/cx231xx/cx231xx-audio.c snd_card_free(dev->adev.sndcard); adev 752 drivers/media/usb/cx231xx/cx231xx-audio.c kfree(dev->adev.alt_max_pkt_size); adev 753 drivers/media/usb/cx231xx/cx231xx-audio.c dev->adev.sndcard = NULL; adev 543 drivers/media/usb/cx231xx/cx231xx-core.c dev->adev.alt = alt; adev 544 drivers/media/usb/cx231xx/cx231xx-core.c if (dev->adev.alt_max_pkt_size != NULL) adev 545 drivers/media/usb/cx231xx/cx231xx-core.c max_pkt_size = dev->adev.max_pkt_size = adev 546 drivers/media/usb/cx231xx/cx231xx-core.c dev->adev.alt_max_pkt_size[dev->adev.alt]; adev 638 drivers/media/usb/cx231xx/cx231xx.h struct cx231xx_audio adev; adev 66 drivers/media/usb/em28xx/em28xx-audio.c for (i = 0; i < dev->adev.num_urb; i++) { adev 67 drivers/media/usb/em28xx/em28xx-audio.c struct urb *urb = dev->adev.urb[i]; adev 93 drivers/media/usb/em28xx/em28xx-audio.c atomic_set(&dev->adev.stream_started, 0); adev 110 drivers/media/usb/em28xx/em28xx-audio.c if (atomic_read(&dev->adev.stream_started) == 0) adev 113 drivers/media/usb/em28xx/em28xx-audio.c if (dev->adev.capture_pcm_substream) { adev 114 drivers/media/usb/em28xx/em28xx-audio.c substream = dev->adev.capture_pcm_substream; adev 128 drivers/media/usb/em28xx/em28xx-audio.c oldptr = dev->adev.hwptr_done_capture; adev 143 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.hwptr_done_capture += length; adev 144 drivers/media/usb/em28xx/em28xx-audio.c if (dev->adev.hwptr_done_capture >= adev 146 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.hwptr_done_capture -= adev 149 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.capture_transfer_done += length; adev 150 drivers/media/usb/em28xx/em28xx-audio.c if (dev->adev.capture_transfer_done >= adev 152 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.capture_transfer_done -= adev 178 drivers/media/usb/em28xx/em28xx-audio.c for (i = 0; i < dev->adev.num_urb; i++) { adev 179 drivers/media/usb/em28xx/em28xx-audio.c memset(dev->adev.transfer_buffer[i], 0x80, adev 180 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.urb[i]->transfer_buffer_length); adev 182 drivers/media/usb/em28xx/em28xx-audio.c err = usb_submit_urb(dev->adev.urb[i], GFP_ATOMIC); adev 188 drivers/media/usb/em28xx/em28xx-audio.c atomic_set(&dev->adev.stream_started, 0); adev 276 drivers/media/usb/em28xx/em28xx-audio.c if (dev->adev.users == 0) { adev 310 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.users++; adev 316 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.period * 95 / 100, adev 317 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.period * 105 / 100); adev 319 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.capture_pcm_substream = substream; adev 338 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.users--; adev 339 drivers/media/usb/em28xx/em28xx-audio.c if (atomic_read(&dev->adev.stream_started) > 0) { adev 340 drivers/media/usb/em28xx/em28xx-audio.c atomic_set(&dev->adev.stream_started, 0); adev 341 drivers/media/usb/em28xx/em28xx-audio.c schedule_work(&dev->adev.wq_trigger); adev 390 drivers/media/usb/em28xx/em28xx-audio.c struct em28xx_audio *adev = &dev->adev; adev 394 drivers/media/usb/em28xx/em28xx-audio.c if (atomic_read(&adev->stream_started) > 0) { adev 395 drivers/media/usb/em28xx/em28xx-audio.c atomic_set(&adev->stream_started, 0); adev 396 drivers/media/usb/em28xx/em28xx-audio.c schedule_work(&adev->wq_trigger); adev 409 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.hwptr_done_capture = 0; adev 410 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.capture_transfer_done = 0; adev 417 drivers/media/usb/em28xx/em28xx-audio.c struct em28xx_audio *adev = adev 419 drivers/media/usb/em28xx/em28xx-audio.c struct em28xx *dev = container_of(adev, struct em28xx, adev); adev 421 drivers/media/usb/em28xx/em28xx-audio.c if (atomic_read(&adev->stream_started)) { adev 443 drivers/media/usb/em28xx/em28xx-audio.c atomic_set(&dev->adev.stream_started, 1); adev 448 drivers/media/usb/em28xx/em28xx-audio.c atomic_set(&dev->adev.stream_started, 0); adev 453 drivers/media/usb/em28xx/em28xx-audio.c schedule_work(&dev->adev.wq_trigger); adev 468 drivers/media/usb/em28xx/em28xx-audio.c spin_lock_irqsave(&dev->adev.slock, flags); adev 469 drivers/media/usb/em28xx/em28xx-audio.c hwptr_done = dev->adev.hwptr_done_capture; adev 470 drivers/media/usb/em28xx/em28xx-audio.c spin_unlock_irqrestore(&dev->adev.slock, flags); adev 506 drivers/media/usb/em28xx/em28xx-audio.c struct snd_pcm_substream *substream = dev->adev.capture_pcm_substream; adev 547 drivers/media/usb/em28xx/em28xx-audio.c struct snd_pcm_substream *substream = dev->adev.capture_pcm_substream; adev 583 drivers/media/usb/em28xx/em28xx-audio.c struct snd_pcm_substream *substream = dev->adev.capture_pcm_substream; adev 625 drivers/media/usb/em28xx/em28xx-audio.c struct snd_pcm_substream *substream = dev->adev.capture_pcm_substream; adev 726 drivers/media/usb/em28xx/em28xx-audio.c for (i = 0; i < dev->adev.num_urb; i++) { adev 727 drivers/media/usb/em28xx/em28xx-audio.c struct urb *urb = dev->adev.urb[i]; adev 733 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.transfer_buffer[i], adev 738 drivers/media/usb/em28xx/em28xx-audio.c kfree(dev->adev.urb); adev 739 drivers/media/usb/em28xx/em28xx-audio.c kfree(dev->adev.transfer_buffer); adev 740 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.num_urb = 0; adev 840 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.period = urb_size * npackets; adev 844 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.transfer_buffer = kcalloc(num_urb, adev 845 drivers/media/usb/em28xx/em28xx-audio.c sizeof(*dev->adev.transfer_buffer), adev 847 drivers/media/usb/em28xx/em28xx-audio.c if (!dev->adev.transfer_buffer) adev 850 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.urb = kcalloc(num_urb, sizeof(*dev->adev.urb), GFP_KERNEL); adev 851 drivers/media/usb/em28xx/em28xx-audio.c if (!dev->adev.urb) { adev 852 drivers/media/usb/em28xx/em28xx-audio.c kfree(dev->adev.transfer_buffer); adev 857 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.num_urb = num_urb; adev 868 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.urb[i] = urb; adev 878 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.transfer_buffer[i] = buf; adev 901 drivers/media/usb/em28xx/em28xx-audio.c struct em28xx_audio *adev = &dev->adev; adev 931 drivers/media/usb/em28xx/em28xx-audio.c spin_lock_init(&adev->slock); adev 932 drivers/media/usb/em28xx/em28xx-audio.c adev->sndcard = card; adev 933 drivers/media/usb/em28xx/em28xx-audio.c adev->udev = udev; adev 948 drivers/media/usb/em28xx/em28xx-audio.c INIT_WORK(&adev->wq_trigger, audio_trigger); adev 982 drivers/media/usb/em28xx/em28xx-audio.c adev->sndcard = NULL; adev 1003 drivers/media/usb/em28xx/em28xx-audio.c if (dev->adev.sndcard) { adev 1004 drivers/media/usb/em28xx/em28xx-audio.c snd_card_disconnect(dev->adev.sndcard); adev 1005 drivers/media/usb/em28xx/em28xx-audio.c flush_work(&dev->adev.wq_trigger); adev 1009 drivers/media/usb/em28xx/em28xx-audio.c snd_card_free(dev->adev.sndcard); adev 1010 drivers/media/usb/em28xx/em28xx-audio.c dev->adev.sndcard = NULL; adev 1027 drivers/media/usb/em28xx/em28xx-audio.c atomic_set(&dev->adev.stream_started, 0); adev 1041 drivers/media/usb/em28xx/em28xx-audio.c schedule_work(&dev->adev.wq_trigger); adev 649 drivers/media/usb/em28xx/em28xx.h struct em28xx_audio adev; adev 203 drivers/media/usb/tm6000/tm6000-alsa.c struct snd_tm6000_card *chip = core->adev; adev 326 drivers/media/usb/tm6000/tm6000-alsa.c struct snd_tm6000_card *chip = core->adev; adev 450 drivers/media/usb/tm6000/tm6000-alsa.c dev->adev = chip; adev 474 drivers/media/usb/tm6000/tm6000-alsa.c dev->adev = NULL; adev 486 drivers/media/usb/tm6000/tm6000-alsa.c chip = dev->adev; adev 497 drivers/media/usb/tm6000/tm6000-alsa.c dev->adev = NULL; adev 234 drivers/media/usb/tm6000/tm6000.h struct snd_tm6000_card *adev; adev 59 drivers/memory/pl172.c static int pl172_timing_prop(struct amba_device *adev, adev 63 drivers/memory/pl172.c struct pl172_data *pl172 = amba_get_drvdata(adev); adev 72 drivers/memory/pl172.c dev_err(&adev->dev, "%s timing too tight\n", name); adev 79 drivers/memory/pl172.c dev_dbg(&adev->dev, "%s: %u cycle(s)\n", name, start + adev 85 drivers/memory/pl172.c static int pl172_setup_static(struct amba_device *adev, adev 88 drivers/memory/pl172.c struct pl172_data *pl172 = amba_get_drvdata(adev); adev 101 drivers/memory/pl172.c dev_err(&adev->dev, "invalid memory width cs%u\n", cs); adev 105 drivers/memory/pl172.c dev_err(&adev->dev, "memory-width property required\n"); adev 121 drivers/memory/pl172.c if (amba_part(adev) == 0x172 && adev 129 drivers/memory/pl172.c dev_dbg(&adev->dev, "mpmc static config cs%u: 0x%08x\n", cs, cfg); adev 132 drivers/memory/pl172.c ret = pl172_timing_prop(adev, np, "mpmc,write-enable-delay", adev 138 drivers/memory/pl172.c ret = pl172_timing_prop(adev, np, "mpmc,output-enable-delay", adev 144 drivers/memory/pl172.c ret = pl172_timing_prop(adev, np, "mpmc,read-access-delay", adev 150 drivers/memory/pl172.c ret = pl172_timing_prop(adev, np, "mpmc,page-mode-read-delay", adev 156 drivers/memory/pl172.c ret = pl172_timing_prop(adev, np, "mpmc,write-access-delay", adev 162 drivers/memory/pl172.c ret = pl172_timing_prop(adev, np, "mpmc,turn-round-delay", adev 170 drivers/memory/pl172.c dev_err(&adev->dev, "failed to configure cs%u\n", cs); adev 174 drivers/memory/pl172.c static int pl172_parse_cs_config(struct amba_device *adev, adev 181 drivers/memory/pl172.c dev_err(&adev->dev, "cs%u invalid\n", cs); adev 185 drivers/memory/pl172.c return pl172_setup_static(adev, np, cs); adev 188 drivers/memory/pl172.c dev_err(&adev->dev, "cs property required\n"); adev 197 drivers/memory/pl172.c static int pl172_probe(struct amba_device *adev, const struct amba_id *id) adev 199 drivers/memory/pl172.c struct device_node *child_np, *np = adev->dev.of_node; adev 200 drivers/memory/pl172.c struct device *dev = &adev->dev; adev 205 drivers/memory/pl172.c if (amba_part(adev) == 0x172) { adev 206 drivers/memory/pl172.c if (amba_rev(adev) < ARRAY_SIZE(pl172_revisions)) adev 207 drivers/memory/pl172.c rev = pl172_revisions[amba_rev(adev)]; adev 208 drivers/memory/pl172.c } else if (amba_part(adev) == 0x175) { adev 209 drivers/memory/pl172.c if (amba_rev(adev) < ARRAY_SIZE(pl175_revisions)) adev 210 drivers/memory/pl172.c rev = pl175_revisions[amba_rev(adev)]; adev 211 drivers/memory/pl172.c } else if (amba_part(adev) == 0x176) { adev 212 drivers/memory/pl172.c if (amba_rev(adev) < ARRAY_SIZE(pl176_revisions)) adev 213 drivers/memory/pl172.c rev = pl176_revisions[amba_rev(adev)]; adev 216 drivers/memory/pl172.c dev_info(dev, "ARM PL%x revision %s\n", amba_part(adev), rev); adev 241 drivers/memory/pl172.c ret = amba_request_regions(adev, NULL); adev 247 drivers/memory/pl172.c pl172->base = devm_ioremap(dev, adev->res.start, adev 248 drivers/memory/pl172.c resource_size(&adev->res)); adev 255 drivers/memory/pl172.c amba_set_drvdata(adev, pl172); adev 263 drivers/memory/pl172.c ret = pl172_parse_cs_config(adev, child_np); adev 273 drivers/memory/pl172.c amba_release_regions(adev); adev 279 drivers/memory/pl172.c static int pl172_remove(struct amba_device *adev) adev 281 drivers/memory/pl172.c struct pl172_data *pl172 = amba_get_drvdata(adev); adev 284 drivers/memory/pl172.c amba_release_regions(adev); adev 309 drivers/memory/pl353-smc.c static void pl353_smc_init_nand_interface(struct amba_device *adev, adev 349 drivers/memory/pl353-smc.c static int pl353_smc_probe(struct amba_device *adev, const struct amba_id *id) adev 355 drivers/memory/pl353-smc.c struct device_node *of_node = adev->dev.of_node; adev 356 drivers/memory/pl353-smc.c static void (*init)(struct amba_device *adev, adev 360 drivers/memory/pl353-smc.c pl353_smc = devm_kzalloc(&adev->dev, sizeof(*pl353_smc), GFP_KERNEL); adev 365 drivers/memory/pl353-smc.c res = &adev->res; adev 366 drivers/memory/pl353-smc.c pl353_smc_base = devm_ioremap_resource(&adev->dev, res); adev 370 drivers/memory/pl353-smc.c pl353_smc->aclk = devm_clk_get(&adev->dev, "apb_pclk"); adev 372 drivers/memory/pl353-smc.c dev_err(&adev->dev, "aclk clock not found.\n"); adev 376 drivers/memory/pl353-smc.c pl353_smc->memclk = devm_clk_get(&adev->dev, "memclk"); adev 378 drivers/memory/pl353-smc.c dev_err(&adev->dev, "memclk clock not found.\n"); adev 384 drivers/memory/pl353-smc.c dev_err(&adev->dev, "Unable to enable AXI clock.\n"); adev 390 drivers/memory/pl353-smc.c dev_err(&adev->dev, "Unable to enable memory clock.\n"); adev 394 drivers/memory/pl353-smc.c amba_set_drvdata(adev, pl353_smc); adev 404 drivers/memory/pl353-smc.c dev_warn(&adev->dev, "unsupported child node\n"); adev 410 drivers/memory/pl353-smc.c dev_err(&adev->dev, "no matching children\n"); adev 416 drivers/memory/pl353-smc.c init(adev, child); adev 417 drivers/memory/pl353-smc.c of_platform_device_create(child, NULL, &adev->dev); adev 429 drivers/memory/pl353-smc.c static int pl353_smc_remove(struct amba_device *adev) adev 431 drivers/memory/pl353-smc.c struct pl353_smc_data *pl353_smc = amba_get_drvdata(adev); adev 84 drivers/mfd/mfd-core.c struct acpi_device *adev; adev 99 drivers/mfd/mfd-core.c adev = parent; adev 107 drivers/mfd/mfd-core.c adev = child; adev 120 drivers/mfd/mfd-core.c adev = child; adev 127 drivers/mfd/mfd-core.c ACPI_COMPANION_SET(&pdev->dev, adev); adev 251 drivers/mfd/wm97xx-core.c static int wm97xx_ac97_probe(struct ac97_codec_device *adev) adev 258 drivers/mfd/wm97xx-core.c struct wm97xx_pdata *pdata = snd_ac97_codec_get_platdata(adev); adev 260 drivers/mfd/wm97xx-core.c wm97xx = devm_kzalloc(ac97_codec_dev2dev(adev), adev 265 drivers/mfd/wm97xx-core.c wm97xx->dev = ac97_codec_dev2dev(adev); adev 266 drivers/mfd/wm97xx-core.c wm97xx->ac97 = snd_ac97_compat_alloc(adev); adev 271 drivers/mfd/wm97xx-core.c ac97_set_drvdata(adev, wm97xx); adev 273 drivers/mfd/wm97xx-core.c adev->vendor_id); adev 279 drivers/mfd/wm97xx-core.c switch (adev->vendor_id) { adev 322 drivers/mfd/wm97xx-core.c static int wm97xx_ac97_remove(struct ac97_codec_device *adev) adev 324 drivers/mfd/wm97xx-core.c struct wm97xx_priv *wm97xx = ac97_get_drvdata(adev); adev 2138 drivers/mmc/host/mmci.c struct amba_device *adev = to_amba_device(dev); adev 2139 drivers/mmc/host/mmci.c struct mmc_host *mmc = amba_get_drvdata(adev); adev 2153 drivers/mmc/host/mmci.c struct amba_device *adev = to_amba_device(dev); adev 2154 drivers/mmc/host/mmci.c struct mmc_host *mmc = amba_get_drvdata(adev); adev 502 drivers/mmc/host/sdhci-acpi.c struct acpi_device *adev; adev 506 drivers/mmc/host/sdhci-acpi.c adev = ACPI_COMPANION(dev); adev 507 drivers/mmc/host/sdhci-acpi.c if (!adev) adev 510 drivers/mmc/host/sdhci-acpi.c hid = acpi_device_hid(adev); adev 317 drivers/net/ethernet/amd/xgbe/xgbe-platform.c pdata->adev = ACPI_COMPANION(dev); adev 1028 drivers/net/ethernet/amd/xgbe/xgbe.h struct acpi_device *adev; adev 868 drivers/net/ethernet/apm/xgene/xgene_enet_hw.c struct acpi_device *adev = acpi_phy_find_device(dev); adev 869 drivers/net/ethernet/apm/xgene/xgene_enet_hw.c if (adev) adev 870 drivers/net/ethernet/apm/xgene/xgene_enet_hw.c phy_dev = adev->driver_data; adev 1389 drivers/net/ethernet/cavium/thunder/thunder_bgx.c static int acpi_get_mac_address(struct device *dev, struct acpi_device *adev, adev 1395 drivers/net/ethernet/cavium/thunder/thunder_bgx.c addr = fwnode_get_mac_address(acpi_fwnode_handle(adev), mac, ETH_ALEN); adev 1413 drivers/net/ethernet/cavium/thunder/thunder_bgx.c struct acpi_device *adev; adev 1415 drivers/net/ethernet/cavium/thunder/thunder_bgx.c if (acpi_bus_get_device(handle, &adev)) adev 1418 drivers/net/ethernet/cavium/thunder/thunder_bgx.c acpi_get_mac_address(dev, adev, bgx->lmac[bgx->acpi_lmac_idx].mac); adev 283 drivers/net/phy/mdio-xgene.c struct acpi_device *adev; adev 288 drivers/net/phy/mdio-xgene.c if (acpi_bus_get_device(handle, &adev)) adev 291 drivers/net/phy/mdio-xgene.c if (acpi_dev_get_property(adev, "phy-channel", ACPI_TYPE_INTEGER, &obj)) adev 296 drivers/net/phy/mdio-xgene.c adev->driver_data = phy_dev; adev 1907 drivers/net/phy/sfp.c struct acpi_device *adev = ACPI_COMPANION(&pdev->dev); adev 1908 drivers/net/phy/sfp.c struct fwnode_handle *fw = acpi_fwnode_handle(adev); adev 983 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c struct acpi_device *adev; adev 985 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c adev = ACPI_COMPANION(dev); adev 986 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c if (adev) adev 987 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c adev->flags.power_manageable = 0; adev 46 drivers/pci/controller/dwc/pcie-al.c struct acpi_device *adev = to_acpi_device(dev); adev 47 drivers/pci/controller/dwc/pcie-al.c struct acpi_pci_root *root = acpi_driver_data(adev); adev 79 drivers/pci/controller/dwc/pcie-hisi.c struct acpi_device *adev = to_acpi_device(dev); adev 80 drivers/pci/controller/dwc/pcie-hisi.c struct acpi_pci_root *root = acpi_driver_data(adev); adev 373 drivers/pci/controller/pci-thunder-pem.c struct acpi_device *adev = to_acpi_device(dev); adev 374 drivers/pci/controller/pci-thunder-pem.c struct acpi_pci_root *root = acpi_driver_data(adev); adev 378 drivers/pci/controller/pci-thunder-pem.c res_pem = devm_kzalloc(&adev->dev, sizeof(*res_pem), GFP_KERNEL); adev 195 drivers/pci/controller/pci-xgene.c static int xgene_get_csr_resource(struct acpi_device *adev, adev 198 drivers/pci/controller/pci-xgene.c struct device *dev = &adev->dev; adev 206 drivers/pci/controller/pci-xgene.c ret = acpi_dev_get_resources(adev, &list, adev 229 drivers/pci/controller/pci-xgene.c struct acpi_device *adev = to_acpi_device(dev); adev 238 drivers/pci/controller/pci-xgene.c ret = xgene_get_csr_resource(adev, &csr); adev 47 drivers/pci/hotplug/acpiphp_glue.c static int acpiphp_hotplug_notify(struct acpi_device *adev, u32 type); adev 48 drivers/pci/hotplug/acpiphp_glue.c static void acpiphp_post_dock_fixup(struct acpi_device *adev); adev 59 drivers/pci/hotplug/acpiphp_glue.c static struct acpiphp_context *acpiphp_init_context(struct acpi_device *adev) adev 70 drivers/pci/hotplug/acpiphp_glue.c acpi_set_hp_context(adev, &context->hp); adev 80 drivers/pci/hotplug/acpiphp_glue.c static struct acpiphp_context *acpiphp_get_context(struct acpi_device *adev) adev 84 drivers/pci/hotplug/acpiphp_glue.c if (!adev->hp) adev 87 drivers/pci/hotplug/acpiphp_glue.c context = to_acpiphp_context(adev->hp); adev 120 drivers/pci/hotplug/acpiphp_glue.c static struct acpiphp_context *acpiphp_grab_context(struct acpi_device *adev) adev 125 drivers/pci/hotplug/acpiphp_glue.c context = acpiphp_get_context(adev); adev 181 drivers/pci/hotplug/acpiphp_glue.c static void acpiphp_post_dock_fixup(struct acpi_device *adev) adev 183 drivers/pci/hotplug/acpiphp_glue.c struct acpiphp_context *context = acpiphp_grab_context(adev); adev 223 drivers/pci/hotplug/acpiphp_glue.c struct acpi_device *adev; adev 240 drivers/pci/hotplug/acpiphp_glue.c if (acpi_bus_get_device(handle, &adev)) adev 247 drivers/pci/hotplug/acpiphp_glue.c context = acpiphp_init_context(adev); adev 262 drivers/pci/hotplug/acpiphp_glue.c if (!is_dock_device(adev) && acpi_has_method(handle, "_EJ0")) adev 294 drivers/pci/hotplug/acpiphp_glue.c if ((acpi_pci_check_ejectable(pbus, handle) || is_dock_device(adev)) adev 337 drivers/pci/hotplug/acpiphp_glue.c struct acpi_device *adev = func_to_acpi_device(func); adev 340 drivers/pci/hotplug/acpiphp_glue.c adev->hp->notify = NULL; adev 341 drivers/pci/hotplug/acpiphp_glue.c adev->hp->fixup = NULL; adev 425 drivers/pci/hotplug/acpiphp_glue.c struct acpi_device *adev = func_to_acpi_device(func); adev 427 drivers/pci/hotplug/acpiphp_glue.c acpi_bus_scan(adev->handle); adev 428 drivers/pci/hotplug/acpiphp_glue.c if (acpi_device_enumerated(adev)) adev 429 drivers/pci/hotplug/acpiphp_glue.c acpi_device_set_power(adev, ACPI_STATE_D0); adev 644 drivers/pci/hotplug/acpiphp_glue.c struct acpi_device *adev = ACPI_COMPANION(&dev->dev); adev 648 drivers/pci/hotplug/acpiphp_glue.c if (adev) { adev 652 drivers/pci/hotplug/acpiphp_glue.c status = acpi_evaluate_integer(adev->handle, "_STA", NULL, &sta); adev 665 drivers/pci/hotplug/acpiphp_glue.c if (adev) adev 666 drivers/pci/hotplug/acpiphp_glue.c acpi_bus_trim(adev); adev 749 drivers/pci/hotplug/acpiphp_glue.c void acpiphp_check_host_bridge(struct acpi_device *adev) adev 754 drivers/pci/hotplug/acpiphp_glue.c if (adev->hp) { adev 755 drivers/pci/hotplug/acpiphp_glue.c bridge = to_acpiphp_root_context(adev->hp)->root_bridge; adev 826 drivers/pci/hotplug/acpiphp_glue.c static int acpiphp_hotplug_notify(struct acpi_device *adev, u32 type) adev 830 drivers/pci/hotplug/acpiphp_glue.c context = acpiphp_grab_context(adev); adev 849 drivers/pci/hotplug/acpiphp_glue.c struct acpi_device *adev; adev 856 drivers/pci/hotplug/acpiphp_glue.c adev = ACPI_COMPANION(bus->bridge); adev 857 drivers/pci/hotplug/acpiphp_glue.c if (!adev) adev 860 drivers/pci/hotplug/acpiphp_glue.c handle = adev->handle; adev 886 drivers/pci/hotplug/acpiphp_glue.c acpi_set_hp_context(adev, &root_context->hp); adev 896 drivers/pci/hotplug/acpiphp_glue.c context = acpiphp_get_context(adev); adev 933 drivers/pci/hotplug/acpiphp_glue.c struct acpi_device *adev; adev 936 drivers/pci/hotplug/acpiphp_glue.c adev = ACPI_COMPANION(bridge->pci_bus->bridge); adev 937 drivers/pci/hotplug/acpiphp_glue.c root_context = to_acpiphp_root_context(adev->hp); adev 938 drivers/pci/hotplug/acpiphp_glue.c adev->hp = NULL; adev 31 drivers/pci/pci-acpi.c static int acpi_get_rc_addr(struct acpi_device *adev, struct resource *res) adev 33 drivers/pci/pci-acpi.c struct device *dev = &adev->dev; adev 41 drivers/pci/pci-acpi.c ret = acpi_dev_get_resources(adev, &list, adev 79 drivers/pci/pci-acpi.c struct acpi_device *adev; adev 91 drivers/pci/pci-acpi.c ret = acpi_bus_get_device(handle, &adev); adev 95 drivers/pci/pci-acpi.c ret = acpi_get_rc_addr(adev, res); adev 98 drivers/pci/pci-acpi.c dev_name(&adev->dev)); adev 828 drivers/pci/pci-acpi.c struct acpi_device *adev; adev 831 drivers/pci/pci-acpi.c adev = container_of(context, struct acpi_device, wakeup.context); adev 832 drivers/pci/pci-acpi.c root = acpi_driver_data(adev); adev 940 drivers/pci/pci-acpi.c struct acpi_device *adev; adev 955 drivers/pci/pci-acpi.c adev = ACPI_COMPANION(&root->dev); adev 961 drivers/pci/pci-acpi.c if (!adev && !pci_dev_is_added(root)) adev 962 drivers/pci/pci-acpi.c adev = acpi_pci_find_companion(&root->dev); adev 965 drivers/pci/pci-acpi.c if (!adev) adev 968 drivers/pci/pci-acpi.c fwnode = acpi_fwnode_handle(adev); adev 977 drivers/pci/pci-acpi.c struct acpi_device *adev = ACPI_COMPANION(&dev->dev); adev 978 drivers/pci/pci-acpi.c return adev ? acpi_device_power_manageable(adev) : false; adev 983 drivers/pci/pci-acpi.c struct acpi_device *adev = ACPI_COMPANION(&dev->dev); adev 994 drivers/pci/pci-acpi.c if (!adev || acpi_has_method(adev->handle, "_EJ0")) adev 1009 drivers/pci/pci-acpi.c error = acpi_device_set_power(adev, state_conv[state]); adev 1021 drivers/pci/pci-acpi.c struct acpi_device *adev = ACPI_COMPANION(&dev->dev); adev 1031 drivers/pci/pci-acpi.c if (!adev || !acpi_device_power_manageable(adev)) adev 1034 drivers/pci/pci-acpi.c state = adev->power.state; adev 1043 drivers/pci/pci-acpi.c struct acpi_device *adev = ACPI_COMPANION(&dev->dev); adev 1045 drivers/pci/pci-acpi.c if (adev && acpi_device_power_manageable(adev)) adev 1046 drivers/pci/pci-acpi.c acpi_device_update_power(adev, NULL); adev 1076 drivers/pci/pci-acpi.c struct acpi_device *adev = ACPI_COMPANION(&dev->dev); adev 1088 drivers/pci/pci-acpi.c if (!adev || !acpi_device_power_manageable(adev)) adev 1091 drivers/pci/pci-acpi.c if (adev->wakeup.flags.valid && adev 1092 drivers/pci/pci-acpi.c device_may_wakeup(&dev->dev) != !!adev->wakeup.prepare_count) adev 1098 drivers/pci/pci-acpi.c return !!adev->power.flags.dsw_present; adev 1237 drivers/pci/pci-acpi.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 1239 drivers/pci/pci-acpi.c if (!adev) adev 1242 drivers/pci/pci-acpi.c pci_acpi_optimize_delay(pci_dev, adev->handle); adev 1245 drivers/pci/pci-acpi.c pci_acpi_add_pm_notifier(adev, pci_dev); adev 1246 drivers/pci/pci-acpi.c if (!adev->wakeup.flags.valid) adev 1260 drivers/pci/pci-acpi.c acpi_device_power_add_dependent(adev, dev); adev 1265 drivers/pci/pci-acpi.c struct acpi_device *adev = ACPI_COMPANION(dev); adev 1268 drivers/pci/pci-acpi.c if (!adev) adev 1271 drivers/pci/pci-acpi.c pci_acpi_remove_pm_notifier(adev); adev 1272 drivers/pci/pci-acpi.c if (adev->wakeup.flags.valid) { adev 1273 drivers/pci/pci-acpi.c acpi_device_power_remove_dependent(adev, dev); adev 1646 drivers/pci/pci-driver.c struct acpi_device *adev = to_acpi_device_node(bridge->fwnode); adev 1648 drivers/pci/pci-driver.c ret = acpi_dma_configure(dev, acpi_get_dma_attr(adev)); adev 5992 drivers/pci/pci.c struct acpi_device *adev; adev 5997 drivers/pci/pci.c adev = ACPI_COMPANION(&pdev->dev); adev 5998 drivers/pci/pci.c if (!adev) adev 6001 drivers/pci/pci.c return adev->power.flags.power_resources && adev 6002 drivers/pci/pci.c acpi_has_method(adev->handle, "_PR3"); adev 345 drivers/perf/thunderx2_pmu.c static enum tx2_uncore_type get_tx2_pmu_type(struct acpi_device *adev) adev 358 drivers/perf/thunderx2_pmu.c if (!strcmp(acpi_device_hid(adev), devices[i].id)) adev 611 drivers/perf/thunderx2_pmu.c acpi_handle handle, struct acpi_device *adev, u32 type) adev 621 drivers/perf/thunderx2_pmu.c ret = acpi_dev_get_resources(adev, &list, NULL, NULL); adev 691 drivers/perf/thunderx2_pmu.c struct acpi_device *adev; adev 694 drivers/perf/thunderx2_pmu.c if (acpi_bus_get_device(handle, &adev)) adev 696 drivers/perf/thunderx2_pmu.c if (acpi_bus_get_status(adev) || !adev->status.present) adev 699 drivers/perf/thunderx2_pmu.c type = get_tx2_pmu_type(adev); adev 704 drivers/perf/thunderx2_pmu.c handle, adev, type); adev 1475 drivers/perf/xgene_pmu.c struct acpi_device *adev, u32 type) adev 1492 drivers/perf/xgene_pmu.c rc = acpi_dev_get_resources(adev, &resource_list, adev 1507 drivers/perf/xgene_pmu.c rc = acpi_dev_get_property(adev, "enable-bit-index", adev 1542 drivers/perf/xgene_pmu.c struct acpi_device *adev) adev 1548 drivers/perf/xgene_pmu.c if (!acpi_match_device_ids(adev, id)) adev 1563 drivers/perf/xgene_pmu.c struct acpi_device *adev; adev 1565 drivers/perf/xgene_pmu.c if (acpi_bus_get_device(handle, &adev)) adev 1567 drivers/perf/xgene_pmu.c if (acpi_bus_get_status(adev) || !adev->status.present) adev 1570 drivers/perf/xgene_pmu.c acpi_id = xgene_pmu_acpi_match_type(xgene_pmu_acpi_type_match, adev); adev 1574 drivers/perf/xgene_pmu.c ctx = acpi_get_pmu_hw_inf(xgene_pmu, adev, (u32)acpi_id->driver_data); adev 1679 drivers/pinctrl/intel/pinctrl-cherryview.c struct acpi_device *adev; adev 1683 drivers/pinctrl/intel/pinctrl-cherryview.c adev = ACPI_COMPANION(&pdev->dev); adev 1684 drivers/pinctrl/intel/pinctrl-cherryview.c if (!adev) adev 1692 drivers/pinctrl/intel/pinctrl-cherryview.c if (!strcmp(adev->pnp.unique_id, chv_communities[i]->uid)) { adev 1733 drivers/pinctrl/intel/pinctrl-cherryview.c status = acpi_install_address_space_handler(adev->handle, adev 1470 drivers/pinctrl/intel/pinctrl-intel.c struct acpi_device *adev; adev 1473 drivers/pinctrl/intel/pinctrl-intel.c adev = ACPI_COMPANION(&pdev->dev); adev 1474 drivers/pinctrl/intel/pinctrl-intel.c if (adev) { adev 1479 drivers/pinctrl/intel/pinctrl-intel.c if (!strcmp(adev->pnp.unique_id, table[i]->uid)) { adev 24 drivers/platform/chrome/chromeos_tbmc.c static int chromeos_tbmc_query_switch(struct acpi_device *adev, adev 30 drivers/platform/chrome/chromeos_tbmc.c status = acpi_evaluate_integer(adev->handle, "TBMC", NULL, &state); adev 43 drivers/platform/chrome/chromeos_tbmc.c struct acpi_device *adev = to_acpi_device(dev); adev 45 drivers/platform/chrome/chromeos_tbmc.c return chromeos_tbmc_query_switch(adev, adev->driver_data); adev 48 drivers/platform/chrome/chromeos_tbmc.c static void chromeos_tbmc_notify(struct acpi_device *adev, u32 event) adev 50 drivers/platform/chrome/chromeos_tbmc.c acpi_pm_wakeup_event(&adev->dev); adev 53 drivers/platform/chrome/chromeos_tbmc.c chromeos_tbmc_query_switch(adev, adev->driver_data); adev 56 drivers/platform/chrome/chromeos_tbmc.c dev_err(&adev->dev, "Unexpected event: 0x%08X\n", event); adev 62 drivers/platform/chrome/chromeos_tbmc.c struct acpi_device *adev = input_get_drvdata(idev); adev 64 drivers/platform/chrome/chromeos_tbmc.c return chromeos_tbmc_query_switch(adev, idev); adev 67 drivers/platform/chrome/chromeos_tbmc.c static int chromeos_tbmc_add(struct acpi_device *adev) adev 70 drivers/platform/chrome/chromeos_tbmc.c struct device *dev = &adev->dev; adev 78 drivers/platform/chrome/chromeos_tbmc.c idev->phys = acpi_device_hid(adev); adev 85 drivers/platform/chrome/chromeos_tbmc.c input_set_drvdata(idev, adev); adev 86 drivers/platform/chrome/chromeos_tbmc.c adev->driver_data = idev; adev 328 drivers/platform/chrome/cros_ec_lpc.c struct acpi_device *adev; adev 408 drivers/platform/chrome/cros_ec_lpc.c adev = ACPI_COMPANION(dev); adev 409 drivers/platform/chrome/cros_ec_lpc.c if (adev) { adev 410 drivers/platform/chrome/cros_ec_lpc.c status = acpi_install_notify_handler(adev->handle, adev 425 drivers/platform/chrome/cros_ec_lpc.c struct acpi_device *adev; adev 427 drivers/platform/chrome/cros_ec_lpc.c adev = ACPI_COMPANION(&pdev->dev); adev 428 drivers/platform/chrome/cros_ec_lpc.c if (adev) adev 429 drivers/platform/chrome/cros_ec_lpc.c acpi_remove_notify_handler(adev->handle, ACPI_ALL_NOTIFY, adev 213 drivers/platform/chrome/wilco_ec/event.c static int enqueue_events(struct acpi_device *adev, const u8 *buf, u32 length) adev 215 drivers/platform/chrome/wilco_ec/event.c struct event_device_data *dev_data = adev->driver_data; adev 226 drivers/platform/chrome/wilco_ec/event.c dev_err(&adev->dev, "Too many event words: %zu > %d\n", adev 233 drivers/platform/chrome/wilco_ec/event.c dev_err(&adev->dev, "Event exceeds buffer: %zu > %d\n", adev 262 drivers/platform/chrome/wilco_ec/event.c static void event_device_notify(struct acpi_device *adev, u32 value) adev 269 drivers/platform/chrome/wilco_ec/event.c dev_err(&adev->dev, "Invalid event: 0x%08x\n", value); adev 274 drivers/platform/chrome/wilco_ec/event.c status = acpi_evaluate_object(adev->handle, EC_ACPI_GET_EVENT, adev 277 drivers/platform/chrome/wilco_ec/event.c dev_err(&adev->dev, "Error executing ACPI method %s()\n", adev 284 drivers/platform/chrome/wilco_ec/event.c dev_err(&adev->dev, "Nothing returned from %s()\n", adev 289 drivers/platform/chrome/wilco_ec/event.c dev_err(&adev->dev, "Invalid object returned from %s()\n", adev 295 drivers/platform/chrome/wilco_ec/event.c dev_err(&adev->dev, "Invalid buffer length %d from %s()\n", adev 301 drivers/platform/chrome/wilco_ec/event.c enqueue_events(adev, obj->buffer.pointer, obj->buffer.length); adev 450 drivers/platform/chrome/wilco_ec/event.c static int event_device_add(struct acpi_device *adev) adev 458 drivers/platform/chrome/wilco_ec/event.c dev_err(&adev->dev, "Failed to find minor number: %d\n", error); adev 469 drivers/platform/chrome/wilco_ec/event.c adev->driver_data = dev_data; adev 503 drivers/platform/chrome/wilco_ec/event.c static int event_device_remove(struct acpi_device *adev) adev 505 drivers/platform/chrome/wilco_ec/event.c struct event_device_data *dev_data = adev->driver_data; adev 21 drivers/platform/x86/acer-wireless.c static void acer_wireless_notify(struct acpi_device *adev, u32 event) adev 23 drivers/platform/x86/acer-wireless.c struct input_dev *idev = acpi_driver_data(adev); adev 25 drivers/platform/x86/acer-wireless.c dev_dbg(&adev->dev, "event=%#x\n", event); adev 27 drivers/platform/x86/acer-wireless.c dev_notice(&adev->dev, "Unknown SMKB event: %#x\n", event); adev 35 drivers/platform/x86/acer-wireless.c static int acer_wireless_add(struct acpi_device *adev) adev 39 drivers/platform/x86/acer-wireless.c idev = devm_input_allocate_device(&adev->dev); adev 43 drivers/platform/x86/acer-wireless.c adev->driver_data = idev; adev 1886 drivers/platform/x86/acer-wmi.c struct acpi_device *adev; adev 1889 drivers/platform/x86/acer-wmi.c adev = acpi_dev_get_first_match_dev("BST0001", NULL, -1); adev 1890 drivers/platform/x86/acer-wmi.c if (!adev) adev 1893 drivers/platform/x86/acer-wmi.c gsensor_handle = acpi_device_handle(adev); adev 1894 drivers/platform/x86/acer-wmi.c acpi_dev_put(adev); adev 25 drivers/platform/x86/asus-wireless.c struct acpi_device *adev; adev 84 drivers/platform/x86/asus-wireless.c s = asus_wireless_method(acpi_device_handle(data->adev), "HSWC", adev 97 drivers/platform/x86/asus-wireless.c asus_wireless_method(acpi_device_handle(data->adev), "HSWC", adev 111 drivers/platform/x86/asus-wireless.c static void asus_wireless_notify(struct acpi_device *adev, u32 event) adev 113 drivers/platform/x86/asus-wireless.c struct asus_wireless_data *data = acpi_driver_data(adev); adev 115 drivers/platform/x86/asus-wireless.c dev_dbg(&adev->dev, "event=%#x\n", event); adev 117 drivers/platform/x86/asus-wireless.c dev_notice(&adev->dev, "Unknown ASHS event: %#x\n", event); adev 126 drivers/platform/x86/asus-wireless.c static int asus_wireless_add(struct acpi_device *adev) adev 132 drivers/platform/x86/asus-wireless.c data = devm_kzalloc(&adev->dev, sizeof(*data), GFP_KERNEL); adev 135 drivers/platform/x86/asus-wireless.c adev->driver_data = data; adev 136 drivers/platform/x86/asus-wireless.c data->adev = adev; adev 138 drivers/platform/x86/asus-wireless.c data->idev = devm_input_allocate_device(&adev->dev); adev 152 drivers/platform/x86/asus-wireless.c if (!strcmp((char *) id->id, acpi_device_hid(adev))) { adev 171 drivers/platform/x86/asus-wireless.c err = devm_led_classdev_register(&adev->dev, &data->led); adev 178 drivers/platform/x86/asus-wireless.c static int asus_wireless_remove(struct acpi_device *adev) adev 180 drivers/platform/x86/asus-wireless.c struct asus_wireless_data *data = acpi_driver_data(adev); adev 183 drivers/platform/x86/asus-wireless.c devm_led_classdev_unregister(&adev->dev, &data->led); adev 445 drivers/platform/x86/fujitsu-tablet.c static int acpi_fujitsu_add(struct acpi_device *adev) adev 450 drivers/platform/x86/fujitsu-tablet.c if (!adev) adev 453 drivers/platform/x86/fujitsu-tablet.c status = acpi_walk_resources(adev->handle, METHOD_NAME__CRS, adev 458 drivers/platform/x86/fujitsu-tablet.c sprintf(acpi_device_name(adev), "Fujitsu %s", acpi_device_hid(adev)); adev 459 drivers/platform/x86/fujitsu-tablet.c sprintf(acpi_device_class(adev), "%s", ACPI_FUJITSU_CLASS); adev 462 drivers/platform/x86/fujitsu-tablet.c "%s/input0", acpi_device_hid(adev)); adev 464 drivers/platform/x86/fujitsu-tablet.c error = input_fujitsu_setup(&adev->dev, adev 465 drivers/platform/x86/fujitsu-tablet.c acpi_device_name(adev), fujitsu.phys); adev 487 drivers/platform/x86/fujitsu-tablet.c static int acpi_fujitsu_remove(struct acpi_device *adev) adev 45 drivers/platform/x86/i2c-multi-instantiate.c static int i2c_multi_inst_count_resources(struct acpi_device *adev) adev 51 drivers/platform/x86/i2c-multi-instantiate.c ret = acpi_dev_get_resources(adev, &r, i2c_multi_inst_count, &count); adev 66 drivers/platform/x86/i2c-multi-instantiate.c struct acpi_device *adev; adev 77 drivers/platform/x86/i2c-multi-instantiate.c adev = ACPI_COMPANION(dev); adev 80 drivers/platform/x86/i2c-multi-instantiate.c ret = i2c_multi_inst_count_resources(adev); adev 98 drivers/platform/x86/i2c-multi-instantiate.c ret = acpi_dev_gpio_irq_get(adev, inst_data[i].irq_idx); adev 86 drivers/platform/x86/ideapad-laptop.c struct acpi_device *adev; adev 238 drivers/platform/x86/ideapad-laptop.c if (!read_ec_data(priv->adev->handle, VPCCMD_R_BL_MAX, &value)) adev 240 drivers/platform/x86/ideapad-laptop.c if (!read_ec_data(priv->adev->handle, VPCCMD_R_BL, &value)) adev 242 drivers/platform/x86/ideapad-laptop.c if (!read_ec_data(priv->adev->handle, VPCCMD_R_BL_POWER, &value)) adev 246 drivers/platform/x86/ideapad-laptop.c if (!read_ec_data(priv->adev->handle, VPCCMD_R_RF, &value)) adev 249 drivers/platform/x86/ideapad-laptop.c if (!read_ec_data(priv->adev->handle, VPCCMD_R_WIFI, &value)) adev 252 drivers/platform/x86/ideapad-laptop.c if (!read_ec_data(priv->adev->handle, VPCCMD_R_BT, &value)) adev 255 drivers/platform/x86/ideapad-laptop.c if (!read_ec_data(priv->adev->handle, VPCCMD_R_3G, &value)) adev 260 drivers/platform/x86/ideapad-laptop.c if (!read_ec_data(priv->adev->handle, VPCCMD_R_TOUCHPAD, &value)) adev 263 drivers/platform/x86/ideapad-laptop.c if (!read_ec_data(priv->adev->handle, VPCCMD_R_CAMERA, &value)) adev 268 drivers/platform/x86/ideapad-laptop.c if (!method_gbmd(priv->adev->handle, &value)) { adev 346 drivers/platform/x86/ideapad-laptop.c if (read_ec_data(priv->adev->handle, VPCCMD_R_CAMERA, &result)) adev 362 drivers/platform/x86/ideapad-laptop.c ret = write_ec_cmd(priv->adev->handle, VPCCMD_W_CAMERA, state); adev 377 drivers/platform/x86/ideapad-laptop.c if (read_ec_data(priv->adev->handle, VPCCMD_R_FAN, &result)) adev 395 drivers/platform/x86/ideapad-laptop.c ret = write_ec_cmd(priv->adev->handle, VPCCMD_W_FAN, state); adev 410 drivers/platform/x86/ideapad-laptop.c if (read_ec_data(priv->adev->handle, VPCCMD_R_TOUCHPAD, &result)) adev 428 drivers/platform/x86/ideapad-laptop.c ret = write_ec_cmd(priv->adev->handle, VPCCMD_W_TOUCHPAD, state); adev 443 drivers/platform/x86/ideapad-laptop.c if (method_gbmd(priv->adev->handle, &result)) adev 460 drivers/platform/x86/ideapad-laptop.c ret = method_int1(priv->adev->handle, "SBMC", state ? adev 477 drivers/platform/x86/ideapad-laptop.c int fail = read_method_int(priv->adev->handle, "HALS", &hals); adev 498 drivers/platform/x86/ideapad-laptop.c ret = method_int1(priv->adev->handle, "SALS", state ? adev 530 drivers/platform/x86/ideapad-laptop.c supported = !read_ec_data(priv->adev->handle, VPCCMD_R_FAN, adev 533 drivers/platform/x86/ideapad-laptop.c supported = acpi_has_method(priv->adev->handle, "GBMD") && adev 534 drivers/platform/x86/ideapad-laptop.c acpi_has_method(priv->adev->handle, "SBMC"); adev 536 drivers/platform/x86/ideapad-laptop.c supported = acpi_has_method(priv->adev->handle, "HALS") && adev 537 drivers/platform/x86/ideapad-laptop.c acpi_has_method(priv->adev->handle, "SALS"); adev 570 drivers/platform/x86/ideapad-laptop.c return write_ec_cmd(priv->priv->adev->handle, opcode, !blocked); adev 583 drivers/platform/x86/ideapad-laptop.c if (read_ec_data(priv->adev->handle, VPCCMD_R_RF, &hw_blocked)) adev 601 drivers/platform/x86/ideapad-laptop.c write_ec_cmd(priv->adev->handle, adev 616 drivers/platform/x86/ideapad-laptop.c if (read_ec_data(priv->adev->handle, ideapad_rfk_data[dev].opcode-1, adev 726 drivers/platform/x86/ideapad-laptop.c if (read_ec_data(priv->adev->handle, VPCCMD_R_NOVO, &long_pressed)) adev 738 drivers/platform/x86/ideapad-laptop.c read_ec_data(priv->adev->handle, VPCCMD_R_SPECIAL_BUTTONS, &value); adev 771 drivers/platform/x86/ideapad-laptop.c if (read_ec_data(priv->adev->handle, VPCCMD_R_BL, &now)) adev 783 drivers/platform/x86/ideapad-laptop.c if (write_ec_cmd(priv->adev->handle, VPCCMD_W_BL, adev 786 drivers/platform/x86/ideapad-laptop.c if (write_ec_cmd(priv->adev->handle, VPCCMD_W_BL_POWER, adev 804 drivers/platform/x86/ideapad-laptop.c if (read_ec_data(priv->adev->handle, VPCCMD_R_BL_MAX, &max)) adev 806 drivers/platform/x86/ideapad-laptop.c if (read_ec_data(priv->adev->handle, VPCCMD_R_BL, &now)) adev 808 drivers/platform/x86/ideapad-laptop.c if (read_ec_data(priv->adev->handle, VPCCMD_R_BL_POWER, &power)) adev 845 drivers/platform/x86/ideapad-laptop.c if (read_ec_data(priv->adev->handle, VPCCMD_R_BL_POWER, &power)) adev 856 drivers/platform/x86/ideapad-laptop.c read_ec_data(priv->adev->handle, VPCCMD_R_BL, &now); adev 871 drivers/platform/x86/ideapad-laptop.c if (!read_ec_data(priv->adev->handle, VPCCMD_R_TOUCHPAD, &value)) { adev 973 drivers/platform/x86/ideapad-laptop.c struct acpi_device *adev; adev 975 drivers/platform/x86/ideapad-laptop.c ret = acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev); adev 979 drivers/platform/x86/ideapad-laptop.c if (read_method_int(adev->handle, "_CFG", &cfg)) adev 988 drivers/platform/x86/ideapad-laptop.c priv->adev = adev; adev 1007 drivers/platform/x86/ideapad-laptop.c write_ec_cmd(priv->adev->handle, VPCCMD_W_RF, 1); adev 1021 drivers/platform/x86/ideapad-laptop.c ret = acpi_install_notify_handler(adev->handle, adev 1042 drivers/platform/x86/ideapad-laptop.c acpi_remove_notify_handler(priv->adev->handle, adev 1066 drivers/platform/x86/ideapad-laptop.c acpi_remove_notify_handler(priv->adev->handle, adev 84 drivers/platform/x86/intel_cht_int33fe.c struct acpi_device *adev; adev 87 drivers/platform/x86/intel_cht_int33fe.c adev = ACPI_COMPANION(dev); adev 88 drivers/platform/x86/intel_cht_int33fe.c if (!adev) adev 91 drivers/platform/x86/intel_cht_int33fe.c hid = acpi_device_hid(adev); adev 105 drivers/platform/x86/surface3-wmi.c static int s3_wmi_hp_notify(struct acpi_device *adev, u32 value) adev 115 drivers/platform/x86/surface3-wmi.c struct acpi_device *adev, **ts_adev; adev 117 drivers/platform/x86/surface3-wmi.c if (acpi_bus_get_device(handle, &adev)) adev 122 drivers/platform/x86/surface3-wmi.c if (strncmp(acpi_device_bid(adev), SPI_TS_OBJ_NAME, adev 131 drivers/platform/x86/surface3-wmi.c *ts_adev = adev; adev 138 drivers/platform/x86/surface3-wmi.c struct acpi_device *adev, *ts_adev = NULL; adev 144 drivers/platform/x86/surface3-wmi.c if (!handle || acpi_bus_get_device(handle, &adev)) adev 148 drivers/platform/x86/surface3-wmi.c if (!strcmp(ACPI_BUTTON_HID_LID, acpi_device_hid(adev))) { adev 149 drivers/platform/x86/surface3-wmi.c s3_wmi.pnp0c0d_adev = adev; adev 154 drivers/platform/x86/surface3-wmi.c if (strncmp(acpi_device_bid(adev), SPI_CTL_OBJ_NAME, adev 750 drivers/pwm/core.c struct acpi_device *adev = ACPI_COMPANION(chip->dev); adev 752 drivers/pwm/core.c if ((chip->dev == dev) || (adev && &adev->dev == dev)) { adev 301 drivers/rtc/rtc-pl031.c static int pl031_remove(struct amba_device *adev) adev 303 drivers/rtc/rtc-pl031.c struct pl031_local *ldata = dev_get_drvdata(&adev->dev); adev 305 drivers/rtc/rtc-pl031.c dev_pm_clear_wake_irq(&adev->dev); adev 306 drivers/rtc/rtc-pl031.c device_init_wakeup(&adev->dev, false); adev 307 drivers/rtc/rtc-pl031.c if (adev->irq[0]) adev 308 drivers/rtc/rtc-pl031.c free_irq(adev->irq[0], ldata); adev 309 drivers/rtc/rtc-pl031.c amba_release_regions(adev); adev 314 drivers/rtc/rtc-pl031.c static int pl031_probe(struct amba_device *adev, const struct amba_id *id) adev 322 drivers/rtc/rtc-pl031.c ret = amba_request_regions(adev, NULL); adev 326 drivers/rtc/rtc-pl031.c ldata = devm_kzalloc(&adev->dev, sizeof(struct pl031_local), adev 328 drivers/rtc/rtc-pl031.c ops = devm_kmemdup(&adev->dev, &vendor->ops, sizeof(vendor->ops), adev 336 drivers/rtc/rtc-pl031.c ldata->base = devm_ioremap(&adev->dev, adev->res.start, adev 337 drivers/rtc/rtc-pl031.c resource_size(&adev->res)); adev 343 drivers/rtc/rtc-pl031.c amba_set_drvdata(adev, ldata); adev 345 drivers/rtc/rtc-pl031.c dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev)); adev 346 drivers/rtc/rtc-pl031.c dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev)); adev 373 drivers/rtc/rtc-pl031.c if (!adev->irq[0]) { adev 380 drivers/rtc/rtc-pl031.c device_init_wakeup(&adev->dev, true); adev 381 drivers/rtc/rtc-pl031.c ldata->rtc = devm_rtc_allocate_device(&adev->dev); adev 391 drivers/rtc/rtc-pl031.c if (adev->irq[0]) { adev 392 drivers/rtc/rtc-pl031.c ret = request_irq(adev->irq[0], pl031_interrupt, adev 396 drivers/rtc/rtc-pl031.c dev_pm_set_wake_irq(&adev->dev, adev->irq[0]); adev 401 drivers/rtc/rtc-pl031.c amba_release_regions(adev); adev 873 drivers/s390/net/ctcm_mpc.c void mpc_group_ready(unsigned long adev) adev 875 drivers/s390/net/ctcm_mpc.c struct net_device *dev = (struct net_device *)adev; adev 233 drivers/s390/net/ctcm_mpc.h void mpc_group_ready(unsigned long adev); adev 43 drivers/soc/qcom/apr.c int apr_send_pkt(struct apr_device *adev, struct apr_pkt *pkt) adev 45 drivers/soc/qcom/apr.c struct apr *apr = dev_get_drvdata(adev->dev.parent); adev 50 drivers/soc/qcom/apr.c spin_lock_irqsave(&adev->lock, flags); adev 54 drivers/soc/qcom/apr.c hdr->src_svc = adev->svc_id; adev 55 drivers/soc/qcom/apr.c hdr->dest_domain = adev->domain_id; adev 56 drivers/soc/qcom/apr.c hdr->dest_svc = adev->svc_id; adev 59 drivers/soc/qcom/apr.c spin_unlock_irqrestore(&adev->lock, flags); adev 67 drivers/soc/qcom/apr.c struct apr_device *adev = to_apr_device(dev); adev 69 drivers/soc/qcom/apr.c kfree(adev); adev 189 drivers/soc/qcom/apr.c struct apr_device *adev = to_apr_device(dev); adev 201 drivers/soc/qcom/apr.c if (id->domain_id == adev->domain_id && adev 202 drivers/soc/qcom/apr.c id->svc_id == adev->svc_id) adev 212 drivers/soc/qcom/apr.c struct apr_device *adev = to_apr_device(dev); adev 215 drivers/soc/qcom/apr.c return adrv->probe(adev); adev 220 drivers/soc/qcom/apr.c struct apr_device *adev = to_apr_device(dev); adev 222 drivers/soc/qcom/apr.c struct apr *apr = dev_get_drvdata(adev->dev.parent); adev 227 drivers/soc/qcom/apr.c adrv->remove(adev); adev 229 drivers/soc/qcom/apr.c idr_remove(&apr->svcs_idr, adev->svc_id); adev 238 drivers/soc/qcom/apr.c struct apr_device *adev = to_apr_device(dev); adev 245 drivers/soc/qcom/apr.c return add_uevent_var(env, "MODALIAS=apr:%s", adev->name); adev 261 drivers/soc/qcom/apr.c struct apr_device *adev = NULL; adev 264 drivers/soc/qcom/apr.c adev = kzalloc(sizeof(*adev), GFP_KERNEL); adev 265 drivers/soc/qcom/apr.c if (!adev) adev 268 drivers/soc/qcom/apr.c spin_lock_init(&adev->lock); adev 270 drivers/soc/qcom/apr.c adev->svc_id = id->svc_id; adev 271 drivers/soc/qcom/apr.c adev->domain_id = id->domain_id; adev 272 drivers/soc/qcom/apr.c adev->version = id->svc_version; adev 274 drivers/soc/qcom/apr.c snprintf(adev->name, APR_NAME_SIZE, "%pOFn", np); adev 276 drivers/soc/qcom/apr.c strscpy(adev->name, id->name, APR_NAME_SIZE); adev 278 drivers/soc/qcom/apr.c dev_set_name(&adev->dev, "aprsvc:%s:%x:%x", adev->name, adev 281 drivers/soc/qcom/apr.c adev->dev.bus = &aprbus; adev 282 drivers/soc/qcom/apr.c adev->dev.parent = dev; adev 283 drivers/soc/qcom/apr.c adev->dev.of_node = np; adev 284 drivers/soc/qcom/apr.c adev->dev.release = apr_dev_release; adev 285 drivers/soc/qcom/apr.c adev->dev.driver = NULL; adev 288 drivers/soc/qcom/apr.c idr_alloc(&apr->svcs_idr, adev, id->svc_id, adev 292 drivers/soc/qcom/apr.c dev_info(dev, "Adding APR dev: %s\n", dev_name(&adev->dev)); adev 294 drivers/soc/qcom/apr.c ret = device_register(&adev->dev); adev 297 drivers/soc/qcom/apr.c put_device(&adev->dev); adev 357 drivers/soc/qcom/apr.c struct apr_device *adev = to_apr_device(dev); adev 359 drivers/soc/qcom/apr.c device_unregister(&adev->dev); adev 66 drivers/soundwire/intel_init.c struct acpi_device *adev; adev 71 drivers/soundwire/intel_init.c if (acpi_bus_get_device(res->handle, &adev)) adev 76 drivers/soundwire/intel_init.c ret = fwnode_property_read_u8_array(acpi_fwnode_handle(adev), adev 81 drivers/soundwire/intel_init.c dev_err(&adev->dev, adev 95 drivers/soundwire/intel_init.c dev_err(&adev->dev, "Link count %d exceeds max %d\n", adev 99 drivers/soundwire/intel_init.c dev_warn(&adev->dev, "No SoundWire links detected\n"); adev 103 drivers/soundwire/intel_init.c dev_dbg(&adev->dev, "Creating %d SDW Link devices\n", count); adev 119 drivers/soundwire/intel_init.c dev_dbg(&adev->dev, adev 139 drivers/soundwire/intel_init.c pdevinfo.fwnode = acpi_fwnode_handle(adev); adev 145 drivers/soundwire/intel_init.c dev_err(&adev->dev, adev 168 drivers/soundwire/intel_init.c struct acpi_device *adev; adev 176 drivers/soundwire/intel_init.c if (acpi_bus_get_device(handle, &adev)) { adev 75 drivers/soundwire/slave.c struct acpi_device *adev, *parent; adev 83 drivers/soundwire/slave.c list_for_each_entry(adev, &parent->children, node) { adev 89 drivers/soundwire/slave.c status = acpi_evaluate_integer(adev->handle, adev 111 drivers/soundwire/slave.c sdw_slave_add(bus, &id, acpi_fwnode_handle(adev)); adev 365 drivers/spi/spi-pl022.c struct amba_device *adev; adev 543 drivers/spi/spi-pl022.c dev_dbg(&pl022->adev->dev, "flush\n"); adev 683 drivers/spi/spi-pl022.c dev_dbg(&pl022->adev->dev, adev 824 drivers/spi/spi-pl022.c dma_sync_sg_for_cpu(&pl022->adev->dev, adev 830 drivers/spi/spi-pl022.c dev_dbg(&pl022->adev->dev, "SPI RX SG ENTRY: %d", i); adev 840 drivers/spi/spi-pl022.c dev_dbg(&pl022->adev->dev, "SPI TX SG ENTRY: %d", i); adev 890 drivers/spi/spi-pl022.c dev_dbg(&pl022->adev->dev, adev 904 drivers/spi/spi-pl022.c dev_dbg(&pl022->adev->dev, adev 1033 drivers/spi/spi-pl022.c dev_dbg(&pl022->adev->dev, "using %d pages for transfer\n", pages); adev 1122 drivers/spi/spi-pl022.c dev_dbg(&pl022->adev->dev, "no RX DMA channel!\n"); adev 1130 drivers/spi/spi-pl022.c dev_dbg(&pl022->adev->dev, "no TX DMA channel!\n"); adev 1138 drivers/spi/spi-pl022.c dev_info(&pl022->adev->dev, "setup for DMA on RX %s, TX %s\n", adev 1150 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1157 drivers/spi/spi-pl022.c struct device *dev = &pl022->adev->dev; adev 1257 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1279 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, "FIFO overrun\n"); adev 1281 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1320 drivers/spi/spi-pl022.c dev_warn(&pl022->adev->dev, "read %u surplus " adev 1350 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1355 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, "skipping this message\n"); adev 1430 drivers/spi/spi-pl022.c dev_dbg(&pl022->adev->dev, adev 1465 drivers/spi/spi-pl022.c dev_dbg(&pl022->adev->dev, adev 1492 drivers/spi/spi-pl022.c dev_warn(&pl022->adev->dev, "spi-pl022 CR0: %x\n", read_cr0); adev 1493 drivers/spi/spi-pl022.c dev_warn(&pl022->adev->dev, "spi-pl022 CR1: %x\n", read_cr1); adev 1494 drivers/spi/spi-pl022.c dev_warn(&pl022->adev->dev, "spi-pl022 DMACR: %x\n", read_dmacr); adev 1495 drivers/spi/spi-pl022.c dev_warn(&pl022->adev->dev, "spi-pl022 SR: %x\n", read_sr); adev 1496 drivers/spi/spi-pl022.c dev_warn(&pl022->adev->dev, adev 1545 drivers/spi/spi-pl022.c dev_dbg(&pl022->adev->dev, "polling transfer ongoing ...\n"); adev 1552 drivers/spi/spi-pl022.c dev_warn(&pl022->adev->dev, adev 1625 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1631 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1638 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1645 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1657 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1664 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1670 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1682 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1689 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1695 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1702 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1708 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1718 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1724 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1754 drivers/spi/spi-pl022.c dev_warn(&pl022->adev->dev, adev 1759 drivers/spi/spi-pl022.c dev_err(&pl022->adev->dev, adev 1806 drivers/spi/spi-pl022.c dev_dbg(&pl022->adev->dev, adev 1809 drivers/spi/spi-pl022.c dev_dbg(&pl022->adev->dev, "SSP cpsdvsr = %d, scr = %d\n", adev 2116 drivers/spi/spi-pl022.c static int pl022_probe(struct amba_device *adev, const struct amba_id *id) adev 2118 drivers/spi/spi-pl022.c struct device *dev = &adev->dev; adev 2120 drivers/spi/spi-pl022.c dev_get_platdata(&adev->dev); adev 2123 drivers/spi/spi-pl022.c struct device_node *np = adev->dev.of_node; adev 2126 drivers/spi/spi-pl022.c dev_info(&adev->dev, adev 2127 drivers/spi/spi-pl022.c "ARM PL022 driver, device ID: 0x%08x\n", adev->periphid); adev 2146 drivers/spi/spi-pl022.c dev_err(&adev->dev, "probe - cannot alloc SPI master\n"); adev 2153 drivers/spi/spi-pl022.c pl022->adev = adev; adev 2195 drivers/spi/spi-pl022.c dev_err(&adev->dev, adev 2199 drivers/spi/spi-pl022.c dev_err(&adev->dev, adev 2214 drivers/spi/spi-pl022.c dev_dbg(&adev->dev, "BUSNO: %d\n", master->bus_num); adev 2216 drivers/spi/spi-pl022.c status = amba_request_regions(adev, NULL); adev 2220 drivers/spi/spi-pl022.c pl022->phybase = adev->res.start; adev 2221 drivers/spi/spi-pl022.c pl022->virtbase = devm_ioremap(dev, adev->res.start, adev 2222 drivers/spi/spi-pl022.c resource_size(&adev->res)); adev 2227 drivers/spi/spi-pl022.c dev_info(&adev->dev, "mapped registers from %pa to %p\n", adev 2228 drivers/spi/spi-pl022.c &adev->res.start, pl022->virtbase); adev 2230 drivers/spi/spi-pl022.c pl022->clk = devm_clk_get(&adev->dev, NULL); adev 2233 drivers/spi/spi-pl022.c dev_err(&adev->dev, "could not retrieve SSP/SPI bus clock\n"); adev 2239 drivers/spi/spi-pl022.c dev_err(&adev->dev, "could not enable SSP/SPI bus clock\n"); adev 2252 drivers/spi/spi-pl022.c status = devm_request_irq(dev, adev->irq[0], pl022_interrupt_handler, adev 2255 drivers/spi/spi-pl022.c dev_err(&adev->dev, "probe - cannot get IRQ (%d)\n", status); adev 2276 drivers/spi/spi-pl022.c amba_set_drvdata(adev, pl022); adev 2277 drivers/spi/spi-pl022.c status = devm_spi_register_master(&adev->dev, master); adev 2279 drivers/spi/spi-pl022.c dev_err(&adev->dev, adev 2287 drivers/spi/spi-pl022.c dev_info(&adev->dev, adev 2306 drivers/spi/spi-pl022.c amba_release_regions(adev); adev 2315 drivers/spi/spi-pl022.c pl022_remove(struct amba_device *adev) adev 2317 drivers/spi/spi-pl022.c struct pl022 *pl022 = amba_get_drvdata(adev); adev 2326 drivers/spi/spi-pl022.c pm_runtime_get_noresume(&adev->dev); adev 2333 drivers/spi/spi-pl022.c amba_release_regions(adev); adev 1510 drivers/spi/spi-pxa2xx.c static int pxa2xx_spi_get_port_id(struct acpi_device *adev) adev 1515 drivers/spi/spi-pxa2xx.c if (adev && adev->pnp.unique_id && adev 1516 drivers/spi/spi-pxa2xx.c !kstrtouint(adev->pnp.unique_id, 0, &devid)) adev 1523 drivers/spi/spi-pxa2xx.c static int pxa2xx_spi_get_port_id(struct acpi_device *adev) adev 1544 drivers/spi/spi-pxa2xx.c struct acpi_device *adev; adev 1552 drivers/spi/spi-pxa2xx.c adev = ACPI_COMPANION(&pdev->dev); adev 1560 drivers/spi/spi-pxa2xx.c else if (adev) adev 1608 drivers/spi/spi-pxa2xx.c ssp->port_id = pxa2xx_spi_get_port_id(adev); adev 523 drivers/spi/spi.c struct acpi_device *adev = ACPI_COMPANION(&spi->dev); adev 525 drivers/spi/spi.c if (adev) { adev 526 drivers/spi/spi.c dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev)); adev 1973 drivers/spi/spi.c struct acpi_device *adev) adev 1981 drivers/spi/spi.c if (acpi_bus_get_status(adev) || !adev->status.present || adev 1982 drivers/spi/spi.c acpi_device_enumerated(adev)) adev 1989 drivers/spi/spi.c ret = acpi_dev_get_resources(adev, &resource_list, adev 1998 drivers/spi/spi.c !ACPI_FAILURE(acpi_get_parent(adev->handle, &parent_handle)) && adev 2001 drivers/spi/spi.c acpi_spi_parse_apple_properties(adev, &lookup); adev 2010 drivers/spi/spi.c dev_name(&adev->dev)); adev 2014 drivers/spi/spi.c ACPI_COMPANION_SET(&spi->dev, adev); adev 2021 drivers/spi/spi.c acpi_set_modalias(adev, acpi_device_hid(adev), spi->modalias, adev 2025 drivers/spi/spi.c spi->irq = acpi_dev_gpio_irq_get(adev, 0); adev 2027 drivers/spi/spi.c acpi_device_set_enumerated(adev); adev 2029 drivers/spi/spi.c adev->power.flags.ignore_parent = true; adev 2031 drivers/spi/spi.c adev->power.flags.ignore_parent = false; adev 2033 drivers/spi/spi.c dev_name(&adev->dev)); adev 2044 drivers/spi/spi.c struct acpi_device *adev; adev 2046 drivers/spi/spi.c if (acpi_bus_get_device(handle, &adev)) adev 2049 drivers/spi/spi.c return acpi_register_spi_device(ctlr, adev); adev 3747 drivers/spi/spi.c static struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev) adev 3751 drivers/spi/spi.c dev = class_find_device(&spi_master_class, NULL, adev, adev 3754 drivers/spi/spi.c dev = class_find_device(&spi_slave_class, NULL, adev, adev 3762 drivers/spi/spi.c static struct spi_device *acpi_spi_find_device_by_adev(struct acpi_device *adev) adev 3766 drivers/spi/spi.c dev = bus_find_device_by_acpi_dev(&spi_bus_type, adev); adev 3773 drivers/spi/spi.c struct acpi_device *adev = arg; adev 3779 drivers/spi/spi.c ctlr = acpi_spi_find_controller_by_adev(adev->parent); adev 3783 drivers/spi/spi.c acpi_register_spi_device(ctlr, adev); adev 3787 drivers/spi/spi.c if (!acpi_device_enumerated(adev)) adev 3790 drivers/spi/spi.c spi = acpi_spi_find_device_by_adev(adev); adev 31 drivers/staging/fieldbus/anybuss/anybuss-client.h int (*probe)(struct anybuss_client *adev); adev 32 drivers/staging/fieldbus/anybuss/anybuss-client.h int (*remove)(struct anybuss_client *adev); adev 1173 drivers/staging/fieldbus/anybuss/host.c struct anybuss_client *adev = adev 1176 drivers/staging/fieldbus/anybuss/host.c return adrv->anybus_id == be16_to_cpu(adev->anybus_id); adev 1183 drivers/staging/fieldbus/anybuss/host.c struct anybuss_client *adev = adev 1188 drivers/staging/fieldbus/anybuss/host.c return adrv->probe(adev); adev 74 drivers/thermal/intel/int340x_thermal/acpi_thermal_rel.c struct acpi_device *adev; adev 114 drivers/thermal/intel/int340x_thermal/acpi_thermal_rel.c result = acpi_bus_get_device(trt->source, &adev); adev 118 drivers/thermal/intel/int340x_thermal/acpi_thermal_rel.c result = acpi_bus_get_device(trt->target, &adev); adev 151 drivers/thermal/intel/int340x_thermal/acpi_thermal_rel.c struct acpi_device *adev; adev 194 drivers/thermal/intel/int340x_thermal/acpi_thermal_rel.c result = acpi_bus_get_device(art->source, &adev); adev 199 drivers/thermal/intel/int340x_thermal/acpi_thermal_rel.c result = acpi_bus_get_device(art->target, &adev); adev 45 drivers/thermal/intel/int340x_thermal/int3400_thermal.c struct acpi_device *adev; adev 129 drivers/thermal/intel/int340x_thermal/int3400_thermal.c status = acpi_evaluate_object(priv->adev->handle, "IDSP", NULL, &buf); adev 265 drivers/thermal/intel/int340x_thermal/int3400_thermal.c result = int3400_thermal_run_osc(priv->adev->handle, adev 283 drivers/thermal/intel/int340x_thermal/int3400_thermal.c struct acpi_device *adev = ACPI_COMPANION(&pdev->dev); adev 287 drivers/thermal/intel/int340x_thermal/int3400_thermal.c if (!adev) adev 294 drivers/thermal/intel/int340x_thermal/int3400_thermal.c priv->adev = adev; adev 300 drivers/thermal/intel/int340x_thermal/int3400_thermal.c result = acpi_parse_art(priv->adev->handle, &priv->art_count, adev 305 drivers/thermal/intel/int340x_thermal/int3400_thermal.c result = acpi_parse_trt(priv->adev->handle, &priv->trt_count, adev 324 drivers/thermal/intel/int340x_thermal/int3400_thermal.c priv->adev->handle); adev 331 drivers/thermal/intel/int340x_thermal/int3400_thermal.c priv->adev->handle, ACPI_DEVICE_NOTIFY, int3400_notify, adev 342 drivers/thermal/intel/int340x_thermal/int3400_thermal.c acpi_thermal_rel_misc_device_remove(priv->adev->handle); adev 357 drivers/thermal/intel/int340x_thermal/int3400_thermal.c priv->adev->handle, ACPI_DEVICE_NOTIFY, adev 361 drivers/thermal/intel/int340x_thermal/int3400_thermal.c acpi_thermal_rel_misc_device_remove(priv->adev->handle); adev 44 drivers/thermal/intel/int340x_thermal/int3402_thermal.c struct acpi_device *adev = ACPI_COMPANION(&pdev->dev); adev 48 drivers/thermal/intel/int340x_thermal/int3402_thermal.c if (!acpi_has_method(adev->handle, "_TMP")) adev 55 drivers/thermal/intel/int340x_thermal/int3402_thermal.c d->int340x_zone = int340x_thermal_zone_add(adev, NULL); adev 59 drivers/thermal/intel/int340x_thermal/int3402_thermal.c ret = acpi_install_notify_handler(adev->handle, adev 68 drivers/thermal/intel/int340x_thermal/int3402_thermal.c d->handle = adev->handle; adev 46 drivers/thermal/intel/int340x_thermal/int3403_thermal.c struct acpi_device *adev; adev 93 drivers/thermal/intel/int340x_thermal/int3403_thermal.c obj->int340x_zone = int340x_thermal_zone_add(priv->adev, NULL); adev 97 drivers/thermal/intel/int340x_thermal/int3403_thermal.c result = acpi_install_notify_handler(priv->adev->handle, adev 114 drivers/thermal/intel/int340x_thermal/int3403_thermal.c acpi_remove_notify_handler(priv->adev->handle, adev 139 drivers/thermal/intel/int340x_thermal/int3403_thermal.c status = acpi_evaluate_integer(priv->adev->handle, "PPPC", NULL, &level); adev 153 drivers/thermal/intel/int340x_thermal/int3403_thermal.c status = acpi_execute_simple_method(priv->adev->handle, "SPPC", state); adev 178 drivers/thermal/intel/int340x_thermal/int3403_thermal.c status = acpi_evaluate_object(priv->adev->handle, "PPSS", NULL, &buf); adev 192 drivers/thermal/intel/int340x_thermal/int3403_thermal.c thermal_cooling_device_register(acpi_device_bid(priv->adev), adev 224 drivers/thermal/intel/int340x_thermal/int3403_thermal.c priv->adev = ACPI_COMPANION(&(pdev->dev)); adev 225 drivers/thermal/intel/int340x_thermal/int3403_thermal.c if (!priv->adev) { adev 231 drivers/thermal/intel/int340x_thermal/int3403_thermal.c status = acpi_evaluate_integer(priv->adev->handle, "_TMP", adev 234 drivers/thermal/intel/int340x_thermal/int3403_thermal.c status = acpi_evaluate_integer(priv->adev->handle, "PTYP", adev 136 drivers/thermal/intel/int340x_thermal/int3406_thermal.c struct acpi_device *adev = ACPI_COMPANION(&pdev->dev); adev 160 drivers/thermal/intel/int340x_thermal/int3406_thermal.c d->cooling_dev = thermal_cooling_device_register(acpi_device_bid(adev), adev 165 drivers/thermal/intel/int340x_thermal/int3406_thermal.c ret = acpi_install_notify_handler(adev->handle, ACPI_DEVICE_NOTIFY, adev 23 drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c status = acpi_evaluate_integer(d->adev->handle, "_TMP", NULL, &tmp); adev 118 drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c status = acpi_execute_simple_method(d->adev->handle, name, adev 139 drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c status = acpi_evaluate_integer(d->adev->handle, "GTSH", NULL, &hyst); adev 177 drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c if (!int340x_thermal_get_trip_config(int34x_zone->adev->handle, "_CRT", adev 182 drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c if (!int340x_thermal_get_trip_config(int34x_zone->adev->handle, "_HOT", adev 187 drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c if (!int340x_thermal_get_trip_config(int34x_zone->adev->handle, "_PSV", adev 194 drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c if (int340x_thermal_get_trip_config(int34x_zone->adev->handle, adev 212 drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c struct int34x_thermal_zone *int340x_thermal_zone_add(struct acpi_device *adev, adev 226 drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c int34x_thermal_zone->adev = adev; adev 229 drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c status = acpi_evaluate_integer(adev->handle, "PATC", NULL, &trip_cnt); adev 248 drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c adev->handle); adev 251 drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c acpi_device_bid(adev), adev 21 drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.h struct acpi_device *adev; adev 58 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c struct acpi_device *adev; adev 284 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c status = acpi_evaluate_object(proc_priv->adev->handle, "PPCC", adev 349 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c struct acpi_device *adev; adev 355 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c adev = ACPI_COMPANION(dev); adev 356 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c if (!adev) adev 364 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c proc_priv->adev = adev; adev 371 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c status = acpi_evaluate_integer(adev->handle, "_TMP", NULL, &tmp); adev 379 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c proc_priv->int340x_zone = int340x_thermal_zone_add(adev, ops); adev 385 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c ret = acpi_install_notify_handler(adev->handle, ACPI_DEVICE_NOTIFY, adev 401 drivers/thermal/intel/int340x_thermal/processor_thermal_device.c acpi_remove_notify_handler(proc_priv->adev->handle, adev 81 drivers/thermal/intel/intel_pch_thermal.c struct acpi_device *adev; adev 85 drivers/thermal/intel/intel_pch_thermal.c adev = ACPI_COMPANION(&ptd->pdev->dev); adev 86 drivers/thermal/intel/intel_pch_thermal.c if (adev) { adev 90 drivers/thermal/intel/intel_pch_thermal.c status = acpi_evaluate_integer(adev->handle, "_PSV", NULL, adev 556 drivers/tty/serdev/core.c struct acpi_device *adev) adev 561 drivers/tty/serdev/core.c if (acpi_bus_get_status(adev) || !adev->status.present || adev 562 drivers/tty/serdev/core.c acpi_device_enumerated(adev)) adev 568 drivers/tty/serdev/core.c dev_name(&adev->dev)); adev 572 drivers/tty/serdev/core.c ACPI_COMPANION_SET(&serdev->dev, adev); adev 573 drivers/tty/serdev/core.c acpi_device_set_enumerated(adev); adev 595 drivers/tty/serdev/core.c struct acpi_device *adev; adev 597 drivers/tty/serdev/core.c if (acpi_bus_get_device(handle, &adev)) adev 601 drivers/tty/serdev/core.c if (!acpi_match_device_ids(adev, serdev_acpi_devices_blacklist)) adev 604 drivers/tty/serdev/core.c return acpi_serdev_register_device(ctrl, adev); adev 129 drivers/usb/core/usb-acpi.c struct acpi_device *adev; adev 134 drivers/usb/core/usb-acpi.c list_for_each_entry(adev, &parent->children, node) { adev 135 drivers/usb/core/usb-acpi.c if (acpi_device_adr(adev) == raw) adev 136 drivers/usb/core/usb-acpi.c return adev; adev 146 drivers/usb/core/usb-acpi.c struct acpi_device *adev; adev 159 drivers/usb/core/usb-acpi.c adev = ACPI_COMPANION(&udev->dev); adev 168 drivers/usb/core/usb-acpi.c acpi_bus_get_device(parent_handle, &adev); adev 172 drivers/usb/core/usb-acpi.c return usb_acpi_find_port(adev, port1); adev 178 drivers/usb/core/usb-acpi.c struct acpi_device *adev; adev 183 drivers/usb/core/usb-acpi.c adev = usb_acpi_get_companion_for_port(port_dev); adev 184 drivers/usb/core/usb-acpi.c if (!adev) adev 187 drivers/usb/core/usb-acpi.c handle = adev->handle; adev 196 drivers/usb/core/usb-acpi.c return adev; adev 202 drivers/usb/core/usb-acpi.c struct acpi_device *adev; adev 208 drivers/usb/core/usb-acpi.c adev = ACPI_COMPANION(udev->dev.parent); adev 209 drivers/usb/core/usb-acpi.c return acpi_find_child_device(adev, 0, false); adev 18 drivers/usb/typec/bus.c static int typec_altmode_set_state(struct typec_altmode *adev, int state) adev 20 drivers/usb/typec/bus.c bool is_port = is_typec_port(adev->dev.parent); adev 24 drivers/usb/typec/bus.c port_altmode = is_port ? to_altmode(adev) : to_altmode(adev)->partner; adev 51 drivers/usb/typec/bus.c int typec_altmode_notify(struct typec_altmode *adev, adev 59 drivers/usb/typec/bus.c if (!adev) adev 62 drivers/usb/typec/bus.c altmode = to_altmode(adev); adev 67 drivers/usb/typec/bus.c is_port = is_typec_port(adev->dev.parent); adev 77 drivers/usb/typec/bus.c if (partner->adev.ops && partner->adev.ops->notify) adev 78 drivers/usb/typec/bus.c return partner->adev.ops->notify(&partner->adev, conf, data); adev 92 drivers/usb/typec/bus.c int typec_altmode_enter(struct typec_altmode *adev) adev 94 drivers/usb/typec/bus.c struct altmode *partner = to_altmode(adev)->partner; adev 95 drivers/usb/typec/bus.c struct typec_altmode *pdev = &partner->adev; adev 98 drivers/usb/typec/bus.c if (!adev || adev->active) adev 105 drivers/usb/typec/bus.c ret = typec_altmode_set_state(adev, TYPEC_STATE_SAFE); adev 120 drivers/usb/typec/bus.c int typec_altmode_exit(struct typec_altmode *adev) adev 122 drivers/usb/typec/bus.c struct altmode *partner = to_altmode(adev)->partner; adev 123 drivers/usb/typec/bus.c struct typec_altmode *pdev = &partner->adev; adev 126 drivers/usb/typec/bus.c if (!adev || !adev->active) adev 133 drivers/usb/typec/bus.c ret = typec_altmode_set_state(adev, TYPEC_STATE_SAFE); adev 149 drivers/usb/typec/bus.c void typec_altmode_attention(struct typec_altmode *adev, u32 vdo) adev 151 drivers/usb/typec/bus.c struct typec_altmode *pdev = &to_altmode(adev)->partner->adev; adev 169 drivers/usb/typec/bus.c int typec_altmode_vdm(struct typec_altmode *adev, adev 175 drivers/usb/typec/bus.c if (!adev) adev 178 drivers/usb/typec/bus.c altmode = to_altmode(adev); adev 183 drivers/usb/typec/bus.c pdev = &altmode->partner->adev; adev 193 drivers/usb/typec/bus.c typec_altmode_get_partner(struct typec_altmode *adev) adev 195 drivers/usb/typec/bus.c if (!adev || !to_altmode(adev)->partner) adev 198 drivers/usb/typec/bus.c return &to_altmode(adev)->partner->adev; adev 213 drivers/usb/typec/bus.c struct typec_altmode *typec_altmode_get_plug(struct typec_altmode *adev, adev 216 drivers/usb/typec/bus.c struct altmode *port = to_altmode(adev)->partner; adev 219 drivers/usb/typec/bus.c get_device(&port->plug[index]->adev.dev); adev 220 drivers/usb/typec/bus.c return &port->plug[index]->adev; adev 332 drivers/usb/typec/bus.c struct device *port_dev = &alt->partner->adev.dev; adev 333 drivers/usb/typec/bus.c struct device *dev = &alt->adev.dev; adev 349 drivers/usb/typec/bus.c sysfs_remove_link(&alt->partner->adev.dev.kobj, "partner"); adev 350 drivers/usb/typec/bus.c sysfs_remove_link(&alt->adev.dev.kobj, "port"); adev 356 drivers/usb/typec/bus.c struct typec_altmode *adev = to_typec_altmode(dev); adev 357 drivers/usb/typec/bus.c struct altmode *altmode = to_altmode(adev); adev 370 drivers/usb/typec/bus.c ret = drv->probe(adev); adev 380 drivers/usb/typec/bus.c struct typec_altmode *adev = to_typec_altmode(dev); adev 381 drivers/usb/typec/bus.c struct altmode *altmode = to_altmode(adev); adev 388 drivers/usb/typec/bus.c if (adev->active) { adev 389 drivers/usb/typec/bus.c WARN_ON(typec_altmode_set_state(adev, TYPEC_STATE_SAFE)); adev 390 drivers/usb/typec/bus.c typec_altmode_update_active(adev, false); adev 393 drivers/usb/typec/bus.c adev->desc = NULL; adev 394 drivers/usb/typec/bus.c adev->ops = NULL; adev 13 drivers/usb/typec/bus.h struct typec_altmode adev; adev 29 drivers/usb/typec/bus.h #define to_altmode(d) container_of(d, struct altmode, adev) adev 153 drivers/usb/typec/class.c struct typec_altmode *adev = to_typec_altmode(dev); adev 159 drivers/usb/typec/class.c return ((adev->svid == id->svid) && (adev->mode == id->mode)); adev 164 drivers/usb/typec/class.c struct typec_altmode *adev = &altmode->adev; adev 165 drivers/usb/typec/class.c struct typec_device_id id = { adev->svid, adev->mode, }; adev 166 drivers/usb/typec/class.c struct typec_port *port = typec_altmode2port(adev); adev 179 drivers/usb/typec/class.c if (is_typec_plug(adev->dev.parent)) { adev 180 drivers/usb/typec/class.c struct typec_plug *plug = to_typec_plug(adev->dev.parent); adev 191 drivers/usb/typec/class.c struct typec_altmode *adev; adev 196 drivers/usb/typec/class.c adev = &partner->adev; adev 198 drivers/usb/typec/class.c if (is_typec_plug(adev->dev.parent)) { adev 199 drivers/usb/typec/class.c struct typec_plug *plug = to_typec_plug(adev->dev.parent); adev 205 drivers/usb/typec/class.c put_device(&adev->dev); adev 257 drivers/usb/typec/class.c return &altmode->adev; adev 261 drivers/usb/typec/class.c void typec_altmode_unregister_notifier(struct typec_altmode *adev, adev 264 drivers/usb/typec/class.c struct altmode *altmode = to_altmode(adev); adev 267 drivers/usb/typec/class.c put_device(&adev->dev); adev 279 drivers/usb/typec/class.c void typec_altmode_update_active(struct typec_altmode *adev, bool active) adev 283 drivers/usb/typec/class.c if (adev->active == active) adev 286 drivers/usb/typec/class.c if (!is_typec_port(adev->dev.parent) && adev->dev.driver) { adev 288 drivers/usb/typec/class.c module_put(adev->dev.driver->owner); adev 290 drivers/usb/typec/class.c WARN_ON(!try_module_get(adev->dev.driver->owner)); adev 293 drivers/usb/typec/class.c adev->active = active; adev 294 drivers/usb/typec/class.c snprintf(dir, sizeof(dir), "mode%d", adev->mode); adev 295 drivers/usb/typec/class.c sysfs_notify(&adev->dev.kobj, dir, "active"); adev 296 drivers/usb/typec/class.c sysfs_notify(&adev->dev.kobj, NULL, "active"); adev 297 drivers/usb/typec/class.c kobject_uevent(&adev->dev.kobj, KOBJ_CHANGE); adev 350 drivers/usb/typec/class.c struct typec_altmode *adev = to_typec_altmode(dev); adev 351 drivers/usb/typec/class.c struct altmode *altmode = to_altmode(adev); adev 359 drivers/usb/typec/class.c if (adev->active == enter) adev 362 drivers/usb/typec/class.c if (is_typec_port(adev->dev.parent)) { adev 363 drivers/usb/typec/class.c typec_altmode_update_active(adev, enter); adev 366 drivers/usb/typec/class.c if (altmode->partner && !enter && altmode->partner->adev.active) adev 367 drivers/usb/typec/class.c typec_altmode_exit(&altmode->partner->adev); adev 369 drivers/usb/typec/class.c if (enter && !altmode->partner->adev.active) { adev 376 drivers/usb/typec/class.c if (adev->ops && adev->ops->activate) { adev 377 drivers/usb/typec/class.c ret = adev->ops->activate(adev, enter); adev 412 drivers/usb/typec/class.c struct typec_altmode *adev = to_typec_altmode(dev); adev 414 drivers/usb/typec/class.c return sprintf(buf, "%u\n", adev->mode); adev 421 drivers/usb/typec/class.c struct typec_altmode *adev = to_typec_altmode(dev); adev 423 drivers/usb/typec/class.c return sprintf(buf, "%04x\n", adev->svid); adev 470 drivers/usb/typec/class.c altmode_id_remove(alt->adev.dev.parent, alt->id); adev 493 drivers/usb/typec/class.c alt->adev.svid = desc->svid; adev 494 drivers/usb/typec/class.c alt->adev.mode = desc->mode; adev 495 drivers/usb/typec/class.c alt->adev.vdo = desc->vdo; adev 505 drivers/usb/typec/class.c alt->adev.active = true; /* Enabled by default */ adev 513 drivers/usb/typec/class.c alt->adev.dev.parent = parent; adev 514 drivers/usb/typec/class.c alt->adev.dev.groups = alt->groups; adev 515 drivers/usb/typec/class.c alt->adev.dev.type = &typec_altmode_dev_type; adev 516 drivers/usb/typec/class.c dev_set_name(&alt->adev.dev, "%s.%u", dev_name(parent), id); adev 526 drivers/usb/typec/class.c alt->adev.dev.bus = &typec_bus; adev 528 drivers/usb/typec/class.c ret = device_register(&alt->adev.dev); adev 532 drivers/usb/typec/class.c put_device(&alt->adev.dev); adev 536 drivers/usb/typec/class.c return &alt->adev; adev 546 drivers/usb/typec/class.c void typec_unregister_altmode(struct typec_altmode *adev) adev 548 drivers/usb/typec/class.c if (IS_ERR_OR_NULL(adev)) adev 550 drivers/usb/typec/class.c typec_mux_put(to_altmode(adev)->mux); adev 551 drivers/usb/typec/class.c device_unregister(&adev->dev); adev 1503 drivers/usb/typec/class.c struct typec_altmode *adev; adev 1510 drivers/usb/typec/class.c adev = typec_register_altmode(&port->dev, desc); adev 1511 drivers/usb/typec/class.c if (IS_ERR(adev)) adev 1514 drivers/usb/typec/class.c to_altmode(adev)->mux = mux; adev 1516 drivers/usb/typec/class.c return adev; adev 1057 drivers/usb/typec/tcpm/tcpm.c struct typec_altmode *adev; adev 1077 drivers/usb/typec/tcpm/tcpm.c adev = typec_match_altmode(port->port_altmode, ALTMODE_DISCOVERY_MAX, adev 1105 drivers/usb/typec/tcpm/tcpm.c if (adev) adev 1106 drivers/usb/typec/tcpm/tcpm.c typec_altmode_attention(adev, p[1]); adev 1158 drivers/usb/typec/tcpm/tcpm.c if (adev && pdev) { adev 1161 drivers/usb/typec/tcpm/tcpm.c if (typec_altmode_vdm(adev, p[0], &p[1], cnt)) { adev 1162 drivers/usb/typec/tcpm/tcpm.c response[0] = VDO(adev->svid, 1, adev 1164 drivers/usb/typec/tcpm/tcpm.c response[0] |= VDO_OPOS(adev->mode); adev 1170 drivers/usb/typec/tcpm/tcpm.c if (adev && pdev) { adev 1174 drivers/usb/typec/tcpm/tcpm.c WARN_ON(typec_altmode_notify(adev, adev 1187 drivers/usb/typec/tcpm/tcpm.c if (adev) adev 1188 drivers/usb/typec/tcpm/tcpm.c WARN_ON(typec_altmode_notify(adev, adev 1201 drivers/usb/typec/tcpm/tcpm.c if (adev) adev 1202 drivers/usb/typec/tcpm/tcpm.c typec_altmode_vdm(adev, p[0], &p[1], cnt); adev 402 drivers/usb/typec/ucsi/ucsi.c struct typec_altmode **adev; adev 407 drivers/usb/typec/ucsi/ucsi.c adev = con->port_altmode; adev 410 drivers/usb/typec/ucsi/ucsi.c adev = con->partner_altmode; adev 416 drivers/usb/typec/ucsi/ucsi.c while (adev[i]) { adev 418 drivers/usb/typec/ucsi/ucsi.c (adev[i]->svid == USB_TYPEC_DP_SID || adev 419 drivers/usb/typec/ucsi/ucsi.c adev[i]->svid == USB_TYPEC_NVIDIA_VLINK_SID)) { adev 420 drivers/usb/typec/ucsi/ucsi.c pdev = typec_altmode_get_partner(adev[i]); adev 423 drivers/usb/typec/ucsi/ucsi.c typec_unregister_altmode(adev[i]); adev 424 drivers/usb/typec/ucsi/ucsi.c adev[i++] = NULL; adev 441 drivers/usb/typec/ucsi/ucsi.h void ucsi_displayport_remove_partner(struct typec_altmode *adev); adev 453 drivers/usb/typec/ucsi/ucsi.h ucsi_displayport_remove_partner(struct typec_altmode *adev) { } adev 23 drivers/vfio/platform/vfio_amba.c struct amba_device *adev = (struct amba_device *) vdev->opaque; adev 26 drivers/vfio/platform/vfio_amba.c return &adev->res; adev 33 drivers/vfio/platform/vfio_amba.c struct amba_device *adev = (struct amba_device *) vdev->opaque; adev 37 drivers/vfio/platform/vfio_amba.c ret = adev->irq[i]; adev 43 drivers/vfio/platform/vfio_amba.c static int vfio_amba_probe(struct amba_device *adev, const struct amba_id *id) adev 52 drivers/vfio/platform/vfio_amba.c vdev->name = kasprintf(GFP_KERNEL, "vfio-amba-%08x", adev->periphid); adev 58 drivers/vfio/platform/vfio_amba.c vdev->opaque = (void *) adev; adev 65 drivers/vfio/platform/vfio_amba.c ret = vfio_platform_probe_common(vdev, &adev->dev); adev 74 drivers/vfio/platform/vfio_amba.c static int vfio_amba_remove(struct amba_device *adev) adev 78 drivers/vfio/platform/vfio_amba.c vdev = vfio_platform_remove_common(&adev->dev); adev 53 drivers/vfio/platform/vfio_platform_common.c struct acpi_device *adev; adev 58 drivers/vfio/platform/vfio_platform_common.c adev = ACPI_COMPANION(dev); adev 59 drivers/vfio/platform/vfio_platform_common.c if (!adev) { adev 66 drivers/vfio/platform/vfio_platform_common.c vdev->acpihid = acpi_device_hid(adev); adev 72 drivers/watchdog/sp805_wdt.c struct amba_device *adev; adev 160 drivers/watchdog/sp805_wdt.c dev_err(&wdt->adev->dev, "clock enable fail"); adev 231 drivers/watchdog/sp805_wdt.c sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id) adev 236 drivers/watchdog/sp805_wdt.c wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL); adev 242 drivers/watchdog/sp805_wdt.c wdt->base = devm_ioremap_resource(&adev->dev, &adev->res); adev 246 drivers/watchdog/sp805_wdt.c if (adev->dev.of_node) { adev 247 drivers/watchdog/sp805_wdt.c wdt->clk = devm_clk_get(&adev->dev, NULL); adev 249 drivers/watchdog/sp805_wdt.c dev_err(&adev->dev, "Clock not found\n"); adev 253 drivers/watchdog/sp805_wdt.c } else if (has_acpi_companion(&adev->dev)) { adev 259 drivers/watchdog/sp805_wdt.c device_property_read_u64(&adev->dev, "clock-frequency", adev 262 drivers/watchdog/sp805_wdt.c dev_err(&adev->dev, "no clock-frequency property\n"); adev 267 drivers/watchdog/sp805_wdt.c wdt->adev = adev; adev 270 drivers/watchdog/sp805_wdt.c wdt->wdd.parent = &adev->dev; adev 282 drivers/watchdog/sp805_wdt.c watchdog_init_timeout(&wdt->wdd, 0, &adev->dev); adev 297 drivers/watchdog/sp805_wdt.c amba_set_drvdata(adev, wdt); adev 299 drivers/watchdog/sp805_wdt.c dev_info(&adev->dev, "registration successful\n"); adev 303 drivers/watchdog/sp805_wdt.c dev_err(&adev->dev, "Probe Failed!!!\n"); adev 307 drivers/watchdog/sp805_wdt.c static int sp805_wdt_remove(struct amba_device *adev) adev 309 drivers/watchdog/sp805_wdt.c struct sp805_wdt *wdt = amba_get_drvdata(adev); adev 152 drivers/xen/arm-device.c struct amba_device *adev = to_amba_device(data); adev 157 drivers/xen/arm-device.c r = xen_map_device_mmio(&adev->res, 1); adev 160 drivers/xen/arm-device.c r = xen_unmap_device_mmio(&adev->res, 1); adev 166 drivers/xen/arm-device.c dev_err(&adev->dev, "AMBA: Failed to %s device %s MMIO!\n", adev 169 drivers/xen/arm-device.c adev->dev.init_name); adev 109 include/acpi/acpi_bus.h int (*scan_dependent)(struct acpi_device *adev); adev 110 include/acpi/acpi_bus.h void (*notify_online)(struct acpi_device *adev); adev 437 include/acpi/acpi_bus.h static inline struct fwnode_handle *acpi_fwnode_handle(struct acpi_device *adev) adev 439 include/acpi/acpi_bus.h return &adev->fwnode; adev 450 include/acpi/acpi_bus.h static inline void acpi_set_device_status(struct acpi_device *adev, u32 sta) adev 452 include/acpi/acpi_bus.h *((u32 *)&adev->status) = sta; adev 455 include/acpi/acpi_bus.h static inline void acpi_set_hp_context(struct acpi_device *adev, adev 458 include/acpi/acpi_bus.h hp->self = adev; adev 459 include/acpi/acpi_bus.h adev->hp = hp; adev 462 include/acpi/acpi_bus.h void acpi_initialize_hp_context(struct acpi_device *adev, adev 499 include/acpi/acpi_bus.h void acpi_bus_put_acpi_device(struct acpi_device *adev); adev 512 include/acpi/acpi_bus.h int acpi_device_power_add_dependent(struct acpi_device *adev, adev 514 include/acpi/acpi_bus.h void acpi_device_power_remove_dependent(struct acpi_device *adev, adev 535 include/acpi/acpi_bus.h void acpi_set_modalias(struct acpi_device *adev, const char *default_id, adev 540 include/acpi/acpi_bus.h static inline bool acpi_device_enumerated(struct acpi_device *adev) adev 542 include/acpi/acpi_bus.h return adev && adev->flags.initialized && adev->flags.visited; adev 570 include/acpi/acpi_bus.h int acpi_bind_one(struct device *dev, struct acpi_device *adev); adev 586 include/acpi/acpi_bus.h bool acpi_dma_supported(struct acpi_device *adev); adev 587 include/acpi/acpi_bus.h enum dev_dma_attr acpi_get_dma_attr(struct acpi_device *adev); adev 601 include/acpi/acpi_bus.h bool acpi_device_always_present(struct acpi_device *adev); adev 603 include/acpi/acpi_bus.h static inline bool acpi_device_always_present(struct acpi_device *adev) adev 611 include/acpi/acpi_bus.h acpi_status acpi_add_pm_notifier(struct acpi_device *adev, struct device *dev, adev 613 include/acpi/acpi_bus.h acpi_status acpi_remove_pm_notifier(struct acpi_device *adev); adev 622 include/acpi/acpi_bus.h static inline acpi_status acpi_add_pm_notifier(struct acpi_device *adev, adev 628 include/acpi/acpi_bus.h static inline acpi_status acpi_remove_pm_notifier(struct acpi_device *adev) adev 666 include/acpi/acpi_bus.h static inline bool acpi_device_power_manageable(struct acpi_device *adev) adev 668 include/acpi/acpi_bus.h return adev->flags.power_manageable; adev 671 include/acpi/acpi_bus.h static inline bool acpi_device_can_wakeup(struct acpi_device *adev) adev 673 include/acpi/acpi_bus.h return adev->wakeup.flags.valid; adev 676 include/acpi/acpi_bus.h static inline bool acpi_device_can_poweroff(struct acpi_device *adev) adev 678 include/acpi/acpi_bus.h return adev->power.states[ACPI_STATE_D3_COLD].flags.valid || adev 680 include/acpi/acpi_bus.h adev->power.states[ACPI_STATE_D3_HOT].flags.explicit_set); adev 686 include/acpi/acpi_bus.h static inline void acpi_dev_put(struct acpi_device *adev) adev 688 include/acpi/acpi_bus.h put_device(&adev->dev); adev 110 include/acpi/acpi_drivers.h extern int is_dock_device(struct acpi_device *adev); adev 112 include/acpi/acpi_drivers.h static inline int is_dock_device(struct acpi_device *adev) adev 38 include/linux/acpi.h static inline acpi_handle acpi_device_handle(struct acpi_device *adev) adev 40 include/linux/acpi.h return adev ? adev->handle : NULL; adev 44 include/linux/acpi.h #define ACPI_COMPANION_SET(dev, adev) set_primary_fwnode(dev, (adev) ? \ adev 45 include/linux/acpi.h acpi_fwnode_handle(adev) : NULL) adev 95 include/linux/acpi.h static inline const char *acpi_dev_name(struct acpi_device *adev) adev 97 include/linux/acpi.h return dev_name(&adev->dev); adev 100 include/linux/acpi.h struct device *acpi_get_first_physical_node(struct acpi_device *adev); adev 439 include/linux/acpi.h int acpi_dev_get_resources(struct acpi_device *adev, struct list_head *list, adev 442 include/linux/acpi.h int acpi_dev_get_dma_resources(struct acpi_device *adev, adev 626 include/linux/acpi.h static inline void acpi_device_set_enumerated(struct acpi_device *adev) adev 628 include/linux/acpi.h adev->flags.visited = true; adev 631 include/linux/acpi.h static inline void acpi_device_clear_enumerated(struct acpi_device *adev) adev 633 include/linux/acpi.h adev->flags.visited = false; adev 669 include/linux/acpi.h #define ACPI_COMPANION_SET(dev, adev) do { } while (0) adev 692 include/linux/acpi.h static inline void acpi_dev_put(struct acpi_device *adev) {} adev 725 include/linux/acpi.h static inline struct fwnode_handle *acpi_fwnode_handle(struct acpi_device *adev) adev 740 include/linux/acpi.h static inline const char *acpi_dev_name(struct acpi_device *adev) adev 745 include/linux/acpi.h static inline struct device *acpi_get_first_physical_node(struct acpi_device *adev) adev 840 include/linux/acpi.h static inline bool acpi_dma_supported(struct acpi_device *adev) adev 845 include/linux/acpi.h static inline enum dev_dma_attr acpi_get_dma_attr(struct acpi_device *adev) adev 864 include/linux/acpi.h static inline void acpi_device_set_enumerated(struct acpi_device *adev) adev 868 include/linux/acpi.h static inline void acpi_device_clear_enumerated(struct acpi_device *adev) adev 1015 include/linux/acpi.h int acpi_dev_gpio_irq_get(struct acpi_device *adev, int index); adev 1022 include/linux/acpi.h static inline int acpi_dev_gpio_irq_get(struct acpi_device *adev, int index) adev 1031 include/linux/acpi.h int acpi_dev_get_property(const struct acpi_device *adev, const char *name, adev 1046 include/linux/acpi.h static inline bool acpi_dev_has_props(const struct acpi_device *adev) adev 1048 include/linux/acpi.h return !list_empty(&adev->data.properties); adev 1057 include/linux/acpi.h int acpi_dev_prop_read_single(struct acpi_device *adev, adev 1063 include/linux/acpi.h int acpi_dev_prop_read(const struct acpi_device *adev, const char *propname, adev 1125 include/linux/acpi.h static inline int acpi_dev_get_property(struct acpi_device *adev, adev 1155 include/linux/acpi.h static inline int acpi_dev_prop_get(const struct acpi_device *adev, adev 1162 include/linux/acpi.h static inline int acpi_dev_prop_read_single(const struct acpi_device *adev, adev 1178 include/linux/acpi.h static inline int acpi_dev_prop_read(const struct acpi_device *adev, adev 171 include/linux/device.h int device_match_acpi_dev(struct device *dev, const void *adev); adev 251 include/linux/device.h bus_find_device_by_acpi_dev(struct bus_type *bus, const struct acpi_device *adev) adev 253 include/linux/device.h return bus_find_device(bus, NULL, adev, device_match_acpi_dev); adev 257 include/linux/device.h bus_find_device_by_acpi_dev(struct bus_type *bus, const void *adev) adev 499 include/linux/device.h const struct acpi_device *adev) adev 501 include/linux/device.h return driver_find_device(drv, NULL, adev, device_match_acpi_dev); adev 505 include/linux/device.h driver_find_device_by_acpi_dev(struct device_driver *drv, const void *adev) adev 698 include/linux/device.h class_find_device_by_acpi_dev(struct class *class, const struct acpi_device *adev) adev 700 include/linux/device.h return class_find_device(class, NULL, adev, device_match_acpi_dev); adev 704 include/linux/device.h class_find_device_by_acpi_dev(struct class *class, const void *adev) adev 640 include/linux/gpio/consumer.h int acpi_dev_add_driver_gpios(struct acpi_device *adev, adev 642 include/linux/gpio/consumer.h void acpi_dev_remove_driver_gpios(struct acpi_device *adev); adev 652 include/linux/gpio/consumer.h static inline int acpi_dev_add_driver_gpios(struct acpi_device *adev, adev 657 include/linux/gpio/consumer.h static inline void acpi_dev_remove_driver_gpios(struct acpi_device *adev) {} adev 1168 include/linux/libata.h extern void ata_dev_disable(struct ata_device *adev); adev 1189 include/linux/libata.h extern struct ata_device *ata_dev_pair(struct ata_device *adev); adev 1780 include/linux/libata.h static inline int ata_using_mwdma(struct ata_device *adev) adev 1782 include/linux/libata.h if (adev->dma_mode >= XFER_MW_DMA_0 && adev->dma_mode <= XFER_MW_DMA_4) adev 1787 include/linux/libata.h static inline int ata_using_udma(struct ata_device *adev) adev 1789 include/linux/libata.h if (adev->dma_mode >= XFER_UDMA_0 && adev->dma_mode <= XFER_UDMA_7) adev 1794 include/linux/libata.h static inline int ata_dma_enabled(struct ata_device *adev) adev 1796 include/linux/libata.h return (adev->dma_mode == 0xFF ? 0 : 1); adev 101 include/linux/pci-acpi.h void acpiphp_check_host_bridge(struct acpi_device *adev); adev 106 include/linux/pci-acpi.h static inline void acpiphp_check_host_bridge(struct acpi_device *adev) { } adev 126 include/linux/soc/qcom/apr.h int apr_send_pkt(struct apr_device *adev, struct apr_pkt *pkt); adev 117 include/linux/usb/typec_altmode.h void typec_altmode_unregister_notifier(struct typec_altmode *adev, adev 98 include/sound/ac97/codec.h ac97_codec_dev2dev(struct ac97_codec_device *adev) adev 100 include/sound/ac97/codec.h return &adev->dev; adev 103 include/sound/ac97/codec.h static inline void *ac97_get_drvdata(struct ac97_codec_device *adev) adev 105 include/sound/ac97/codec.h return dev_get_drvdata(ac97_codec_dev2dev(adev)); adev 108 include/sound/ac97/codec.h static inline void ac97_set_drvdata(struct ac97_codec_device *adev, adev 111 include/sound/ac97/codec.h dev_set_drvdata(ac97_codec_dev2dev(adev), data); adev 114 include/sound/ac97/codec.h void *snd_ac97_codec_get_platdata(const struct ac97_codec_device *adev); adev 14 include/sound/ac97/compat.h struct snd_ac97 *snd_ac97_compat_alloc(struct ac97_codec_device *adev); adev 17 net/atm/atm_sysfs.c struct atm_dev *adev = to_atm_dev(cdev); adev 19 net/atm/atm_sysfs.c return scnprintf(buf, PAGE_SIZE, "%s\n", adev->type); adev 25 net/atm/atm_sysfs.c struct atm_dev *adev = to_atm_dev(cdev); adev 27 net/atm/atm_sysfs.c return scnprintf(buf, PAGE_SIZE, "%pM\n", adev->esi); adev 34 net/atm/atm_sysfs.c struct atm_dev *adev = to_atm_dev(cdev); adev 39 net/atm/atm_sysfs.c spin_lock_irqsave(&adev->lock, flags); adev 40 net/atm/atm_sysfs.c list_for_each_entry(aaddr, &adev->local, entry) { adev 54 net/atm/atm_sysfs.c spin_unlock_irqrestore(&adev->lock, flags); adev 62 net/atm/atm_sysfs.c struct atm_dev *adev = to_atm_dev(cdev); adev 64 net/atm/atm_sysfs.c return scnprintf(buf, PAGE_SIZE, "%d\n", adev->number); adev 70 net/atm/atm_sysfs.c struct atm_dev *adev = to_atm_dev(cdev); adev 73 net/atm/atm_sysfs.c adev->signal == ATM_PHY_SIG_LOST ? 0 : 1); adev 79 net/atm/atm_sysfs.c struct atm_dev *adev = to_atm_dev(cdev); adev 83 net/atm/atm_sysfs.c switch (adev->link_rate) { adev 94 net/atm/atm_sysfs.c link_rate = adev->link_rate * 8 * 53; adev 119 net/atm/atm_sysfs.c struct atm_dev *adev; adev 124 net/atm/atm_sysfs.c adev = to_atm_dev(cdev); adev 125 net/atm/atm_sysfs.c if (!adev) adev 128 net/atm/atm_sysfs.c if (add_uevent_var(env, "NAME=%s%d", adev->type, adev->number)) adev 136 net/atm/atm_sysfs.c struct atm_dev *adev = to_atm_dev(cdev); adev 138 net/atm/atm_sysfs.c kfree(adev); adev 147 net/atm/atm_sysfs.c int atm_register_sysfs(struct atm_dev *adev, struct device *parent) adev 149 net/atm/atm_sysfs.c struct device *cdev = &adev->class_dev; adev 154 net/atm/atm_sysfs.c dev_set_drvdata(cdev, adev); adev 156 net/atm/atm_sysfs.c dev_set_name(cdev, "%s%d", adev->type, adev->number); adev 176 net/atm/atm_sysfs.c void atm_unregister_sysfs(struct atm_dev *adev) adev 178 net/atm/atm_sysfs.c struct device *cdev = &adev->class_dev; adev 46 net/atm/resources.h int atm_register_sysfs(struct atm_dev *adev, struct device *parent); adev 47 net/atm/resources.h void atm_unregister_sysfs(struct atm_dev *adev); adev 92 sound/ac97/bus.c struct ac97_codec_device *adev; adev 95 sound/ac97/bus.c adev = to_ac97_device(dev); adev 96 sound/ac97/bus.c ac97_ctrl = adev->ac97_ctrl; adev 97 sound/ac97/bus.c ac97_ctrl->codecs[adev->num] = NULL; adev 99 sound/ac97/bus.c kfree(adev); adev 220 sound/ac97/bus.c void *snd_ac97_codec_get_platdata(const struct ac97_codec_device *adev) adev 222 sound/ac97/bus.c struct ac97_controller *ac97_ctrl = adev->ac97_ctrl; adev 224 sound/ac97/bus.c return ac97_ctrl->codecs_pdata[adev->num]; adev 437 sound/ac97/bus.c static int ac97_get_enable_clk(struct ac97_codec_device *adev) adev 441 sound/ac97/bus.c adev->clk = clk_get(&adev->dev, "ac97_clk"); adev 442 sound/ac97/bus.c if (IS_ERR(adev->clk)) adev 443 sound/ac97/bus.c return PTR_ERR(adev->clk); adev 445 sound/ac97/bus.c ret = clk_prepare_enable(adev->clk); adev 447 sound/ac97/bus.c clk_put(adev->clk); adev 452 sound/ac97/bus.c static void ac97_put_disable_clk(struct ac97_codec_device *adev) adev 454 sound/ac97/bus.c clk_disable_unprepare(adev->clk); adev 455 sound/ac97/bus.c clk_put(adev->clk); adev 475 sound/ac97/bus.c struct ac97_codec_device *adev = to_ac97_device(dev); adev 480 sound/ac97/bus.c if (adev->vendor_id == 0x0 || adev->vendor_id == 0xffffffff) adev 484 sound/ac97/bus.c if (ac97_ids_match(id[i].id, adev->vendor_id, id[i].mask)) adev 493 sound/ac97/bus.c struct ac97_codec_device *adev = to_ac97_device(dev); adev 497 sound/ac97/bus.c ret = ac97_get_enable_clk(adev); adev 505 sound/ac97/bus.c ret = adrv->probe(adev); adev 512 sound/ac97/bus.c ac97_put_disable_clk(adev); adev 519 sound/ac97/bus.c struct ac97_codec_device *adev = to_ac97_device(dev); adev 527 sound/ac97/bus.c ret = adrv->remove(adev); adev 530 sound/ac97/bus.c ac97_put_disable_clk(adev); adev 22 sound/ac97/snd_ac97_compat.c struct ac97_codec_device *adev = to_ac97_device(ac97->private_data); adev 23 sound/ac97/snd_ac97_compat.c struct ac97_controller *actrl = adev->ac97_ctrl; adev 31 sound/ac97/snd_ac97_compat.c struct ac97_codec_device *adev = to_ac97_device(ac97->private_data); adev 32 sound/ac97/snd_ac97_compat.c struct ac97_controller *actrl = adev->ac97_ctrl; adev 41 sound/ac97/snd_ac97_compat.c struct ac97_codec_device *adev = to_ac97_device(ac97->private_data); adev 42 sound/ac97/snd_ac97_compat.c struct ac97_controller *actrl = adev->ac97_ctrl; adev 50 sound/ac97/snd_ac97_compat.c struct ac97_codec_device *adev = to_ac97_device(ac97->private_data); adev 51 sound/ac97/snd_ac97_compat.c struct ac97_controller *actrl = adev->ac97_ctrl; adev 67 sound/ac97/snd_ac97_compat.c struct snd_ac97 *snd_ac97_compat_alloc(struct ac97_codec_device *adev) adev 76 sound/ac97/snd_ac97_compat.c ac97->private_data = adev; adev 79 sound/ac97/snd_ac97_compat.c ac97->dev.parent = &adev->dev; adev 81 sound/ac97/snd_ac97_compat.c dev_set_name(&ac97->dev, "%s-compat", dev_name(&adev->dev)); adev 101 sound/ac97/snd_ac97_compat.c struct ac97_codec_device *adev = to_ac97_device(ac97->private_data); adev 102 sound/ac97/snd_ac97_compat.c struct ac97_controller *actrl = adev->ac97_ctrl; adev 107 sound/ac97/snd_ac97_compat.c scanned = snd_ac97_bus_scan_one(actrl, adev->num); adev 108 sound/ac97/snd_ac97_compat.c if (ac97_ids_match(scanned, adev->vendor_id, id_mask)) adev 114 sound/ac97/snd_ac97_compat.c scanned = snd_ac97_bus_scan_one(actrl, adev->num); adev 115 sound/ac97/snd_ac97_compat.c if (ac97_ids_match(scanned, adev->vendor_id, id_mask)) adev 227 sound/soc/intel/boards/bytcht_cx2072x.c struct acpi_device *adev; adev 244 sound/soc/intel/boards/bytcht_cx2072x.c adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1); adev 245 sound/soc/intel/boards/bytcht_cx2072x.c if (adev) { adev 247 sound/soc/intel/boards/bytcht_cx2072x.c acpi_dev_name(adev)); adev 248 sound/soc/intel/boards/bytcht_cx2072x.c put_device(&adev->dev); adev 229 sound/soc/intel/boards/bytcht_da7213.c struct acpi_device *adev; adev 247 sound/soc/intel/boards/bytcht_da7213.c adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1); adev 248 sound/soc/intel/boards/bytcht_da7213.c if (adev) { adev 250 sound/soc/intel/boards/bytcht_da7213.c "i2c-%s", acpi_dev_name(adev)); adev 251 sound/soc/intel/boards/bytcht_da7213.c put_device(&adev->dev); adev 469 sound/soc/intel/boards/bytcht_es8316.c struct acpi_device *adev; adev 491 sound/soc/intel/boards/bytcht_es8316.c adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1); adev 492 sound/soc/intel/boards/bytcht_es8316.c if (adev) { adev 494 sound/soc/intel/boards/bytcht_es8316.c "i2c-%s", acpi_dev_name(adev)); adev 495 sound/soc/intel/boards/bytcht_es8316.c put_device(&adev->dev); adev 1165 sound/soc/intel/boards/bytcr_rt5640.c struct acpi_device *adev; adev 1190 sound/soc/intel/boards/bytcr_rt5640.c adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1); adev 1191 sound/soc/intel/boards/bytcr_rt5640.c if (adev) { adev 1193 sound/soc/intel/boards/bytcr_rt5640.c "i2c-%s", acpi_dev_name(adev)); adev 1194 sound/soc/intel/boards/bytcr_rt5640.c put_device(&adev->dev); adev 877 sound/soc/intel/boards/bytcr_rt5651.c struct acpi_device *adev; adev 905 sound/soc/intel/boards/bytcr_rt5651.c adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1); adev 906 sound/soc/intel/boards/bytcr_rt5651.c if (adev) { adev 908 sound/soc/intel/boards/bytcr_rt5651.c "i2c-%s", acpi_dev_name(adev)); adev 909 sound/soc/intel/boards/bytcr_rt5651.c put_device(&adev->dev); adev 532 sound/soc/intel/boards/cht_bsw_rt5645.c struct acpi_device *adev; adev 575 sound/soc/intel/boards/cht_bsw_rt5645.c adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1); adev 576 sound/soc/intel/boards/cht_bsw_rt5645.c if (adev) { adev 578 sound/soc/intel/boards/cht_bsw_rt5645.c "i2c-%s", acpi_dev_name(adev)); adev 579 sound/soc/intel/boards/cht_bsw_rt5645.c put_device(&adev->dev); adev 406 sound/soc/intel/boards/cht_bsw_rt5672.c struct acpi_device *adev; adev 416 sound/soc/intel/boards/cht_bsw_rt5672.c adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1); adev 417 sound/soc/intel/boards/cht_bsw_rt5672.c if (adev) { adev 419 sound/soc/intel/boards/cht_bsw_rt5672.c "i2c-%s", acpi_dev_name(adev)); adev 420 sound/soc/intel/boards/cht_bsw_rt5672.c put_device(&adev->dev); adev 125 sound/soc/qcom/qdsp6/q6adm.c static int q6adm_callback(struct apr_device *adev, struct apr_resp_pkt *data) adev 131 sound/soc/qcom/qdsp6/q6adm.c struct q6adm *adm = dev_get_drvdata(&adev->dev); adev 139 sound/soc/qcom/qdsp6/q6adm.c dev_err(&adev->dev, "Invalid port idx %d token %d\n", adev 144 sound/soc/qcom/qdsp6/q6adm.c dev_err(&adev->dev, "Invalid copp idx %d token %d\n", adev 152 sound/soc/qcom/qdsp6/q6adm.c dev_err(&adev->dev, "cmd = 0x%x return error = 0x%x\n", adev 172 sound/soc/qcom/qdsp6/q6adm.c dev_err(&adev->dev, "Unknown Cmd: 0x%x\n", adev 190 sound/soc/qcom/qdsp6/q6adm.c dev_err(&adev->dev, "Invalid coppid rxed %d\n", adev 204 sound/soc/qcom/qdsp6/q6adm.c dev_err(&adev->dev, "Unknown cmd:0x%x\n", adev 586 sound/soc/qcom/qdsp6/q6adm.c static int q6adm_probe(struct apr_device *adev) adev 588 sound/soc/qcom/qdsp6/q6adm.c struct device *dev = &adev->dev; adev 591 sound/soc/qcom/qdsp6/q6adm.c adm = devm_kzalloc(&adev->dev, sizeof(*adm), GFP_KERNEL); adev 595 sound/soc/qcom/qdsp6/q6adm.c adm->apr = adev; adev 596 sound/soc/qcom/qdsp6/q6adm.c dev_set_drvdata(&adev->dev, adm); adev 598 sound/soc/qcom/qdsp6/q6adm.c q6core_get_svc_api_info(adev->svc_id, &adm->ainfo); adev 608 sound/soc/qcom/qdsp6/q6adm.c static int q6adm_remove(struct apr_device *adev) adev 610 sound/soc/qcom/qdsp6/q6adm.c of_platform_depopulate(&adev->dev); adev 745 sound/soc/qcom/qdsp6/q6afe.c static int q6afe_callback(struct apr_device *adev, struct apr_resp_pkt *data) adev 747 sound/soc/qcom/qdsp6/q6afe.c struct q6afe *afe = dev_get_drvdata(&adev->dev); adev 1461 sound/soc/qcom/qdsp6/q6afe.c static int q6afe_probe(struct apr_device *adev) adev 1464 sound/soc/qcom/qdsp6/q6afe.c struct device *dev = &adev->dev; adev 1470 sound/soc/qcom/qdsp6/q6afe.c q6core_get_svc_api_info(adev->svc_id, &afe->ainfo); adev 1471 sound/soc/qcom/qdsp6/q6afe.c afe->apr = adev; adev 1482 sound/soc/qcom/qdsp6/q6afe.c static int q6afe_remove(struct apr_device *adev) adev 1484 sound/soc/qcom/qdsp6/q6afe.c of_platform_depopulate(&adev->dev); adev 174 sound/soc/qcom/qdsp6/q6asm.c struct apr_device *adev; adev 187 sound/soc/qcom/qdsp6/q6asm.c struct apr_device *adev; adev 222 sound/soc/qcom/qdsp6/q6asm.c rc = apr_send_pkt(a->adev, pkt); adev 522 sound/soc/qcom/qdsp6/q6asm.c static int32_t q6asm_stream_callback(struct apr_device *adev, adev 526 sound/soc/qcom/qdsp6/q6asm.c struct q6asm *q6asm = dev_get_drvdata(&adev->dev); adev 665 sound/soc/qcom/qdsp6/q6asm.c static int q6asm_srvc_callback(struct apr_device *adev, adev 668 sound/soc/qcom/qdsp6/q6asm.c struct q6asm *q6asm = dev_get_drvdata(&adev->dev); adev 680 sound/soc/qcom/qdsp6/q6asm.c return q6asm_stream_callback(adev, data, session_id); adev 685 sound/soc/qcom/qdsp6/q6asm.c dev_err(&adev->dev, "Audio Client not active\n"); adev 703 sound/soc/qcom/qdsp6/q6asm.c dev_err(&adev->dev, "command[0x%x] not expecting rsp\n", adev 721 sound/soc/qcom/qdsp6/q6asm.c dev_dbg(&adev->dev, "command[0x%x]success [0x%x]\n", adev 790 sound/soc/qcom/qdsp6/q6asm.c ac->adev = a->adev; adev 810 sound/soc/qcom/qdsp6/q6asm.c rc = apr_send_pkt(ac->adev, pkt); adev 922 sound/soc/qcom/qdsp6/q6asm.c rc = apr_send_pkt(ac->adev, pkt); adev 1123 sound/soc/qcom/qdsp6/q6asm.c rc = apr_send_pkt(ac->adev, pkt); adev 1251 sound/soc/qcom/qdsp6/q6asm.c rc = apr_send_pkt(ac->adev, pkt); adev 1307 sound/soc/qcom/qdsp6/q6asm.c return apr_send_pkt(ac->adev, &pkt); adev 1346 sound/soc/qcom/qdsp6/q6asm.c static int q6asm_probe(struct apr_device *adev) adev 1348 sound/soc/qcom/qdsp6/q6asm.c struct device *dev = &adev->dev; adev 1355 sound/soc/qcom/qdsp6/q6asm.c q6core_get_svc_api_info(adev->svc_id, &q6asm->ainfo); adev 1358 sound/soc/qcom/qdsp6/q6asm.c q6asm->adev = adev; adev 1366 sound/soc/qcom/qdsp6/q6asm.c static int q6asm_remove(struct apr_device *adev) adev 1368 sound/soc/qcom/qdsp6/q6asm.c of_platform_depopulate(&adev->dev); adev 54 sound/soc/qcom/qdsp6/q6core.c struct apr_device *adev; adev 70 sound/soc/qcom/qdsp6/q6core.c static int q6core_callback(struct apr_device *adev, struct apr_resp_pkt *data) adev 72 sound/soc/qcom/qdsp6/q6core.c struct q6core *core = dev_get_drvdata(&adev->dev); adev 140 sound/soc/qcom/qdsp6/q6core.c dev_err(&adev->dev, "Message id from adsp core svc: 0x%x\n", adev 153 sound/soc/qcom/qdsp6/q6core.c struct apr_device *adev = core->adev; adev 162 sound/soc/qcom/qdsp6/q6core.c rc = apr_send_pkt(adev, &pkt); adev 183 sound/soc/qcom/qdsp6/q6core.c struct apr_device *adev = core->adev; adev 192 sound/soc/qcom/qdsp6/q6core.c rc = apr_send_pkt(adev, &pkt); adev 208 sound/soc/qcom/qdsp6/q6core.c struct apr_device *adev = core->adev; adev 219 sound/soc/qcom/qdsp6/q6core.c rc = apr_send_pkt(adev, &pkt); adev 328 sound/soc/qcom/qdsp6/q6core.c static int q6core_probe(struct apr_device *adev) adev 334 sound/soc/qcom/qdsp6/q6core.c dev_set_drvdata(&adev->dev, g_core); adev 337 sound/soc/qcom/qdsp6/q6core.c g_core->adev = adev; adev 342 sound/soc/qcom/qdsp6/q6core.c static int q6core_exit(struct apr_device *adev) adev 344 sound/soc/qcom/qdsp6/q6core.c struct q6core *core = dev_get_drvdata(&adev->dev); adev 36 sound/soc/soc-acpi.c struct acpi_device *adev; adev 42 sound/soc/soc-acpi.c if (acpi_bus_get_device(handle, &adev)) adev 45 sound/soc/soc-acpi.c if (adev->status.present && adev->status.functional) { adev 2696 tools/testing/nvdimm/test/nfit.c struct acpi_device *adev; adev 2711 tools/testing/nvdimm/test/nfit.c adev = devm_kzalloc(dev, sizeof(*adev), GFP_KERNEL); adev 2712 tools/testing/nvdimm/test/nfit.c if (!adev) adev 2714 tools/testing/nvdimm/test/nfit.c *adev = (struct acpi_device) { adev 2739 tools/testing/nvdimm/test/nfit.c .dev = &adev->dev, adev 2751 tools/testing/nvdimm/test/nfit.c .adev = adev,