add_l             112 arch/riscv/mm/sifive_l2_cache.c 	unsigned int add_h, add_l;
add_l             116 arch/riscv/mm/sifive_l2_cache.c 		add_l = readl(l2_base + SIFIVE_L2_DIRECCFIX_LOW);
add_l             117 arch/riscv/mm/sifive_l2_cache.c 		pr_err("L2CACHE: DirError @ 0x%08X.%08X\n", add_h, add_l);
add_l             125 arch/riscv/mm/sifive_l2_cache.c 		add_l = readl(l2_base + SIFIVE_L2_DATECCFIX_LOW);
add_l             126 arch/riscv/mm/sifive_l2_cache.c 		pr_err("L2CACHE: DataError @ 0x%08X.%08X\n", add_h, add_l);
add_l             134 arch/riscv/mm/sifive_l2_cache.c 		add_l = readl(l2_base + SIFIVE_L2_DATECCFAIL_LOW);
add_l             135 arch/riscv/mm/sifive_l2_cache.c 		pr_err("L2CACHE: DataFail @ 0x%08X.%08X\n", add_h, add_l);
add_l             166 drivers/mtd/lpddr/lpddr2_nvm.c 	map_word add_l = { {0} }, add_h = { {0} }, mpr_l = { {0} },
add_l             175 drivers/mtd/lpddr/lpddr2_nvm.c 	add_l.x[0]	= cmd_add & 0x0000FFFF;
add_l             187 drivers/mtd/lpddr/lpddr2_nvm.c 	map_write(map, add_l, ow_reg_add(map, CMD_ADD_L_OFS));
add_l             194 drivers/mtd/lpddr/lpddr2_nvm.c 		map_write(map, add_l, ow_reg_add(map, CMD_ADD_L_OFS) + 2);