actual_dispclk_set_mhz   90 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c 	int actual_dispclk_set_mhz = -1;
actual_dispclk_set_mhz   95 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c 	actual_dispclk_set_mhz = rv1_vbios_smu_send_msg_with_param(
actual_dispclk_set_mhz  101 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c 	actual_dispclk_set_mhz = REG_READ(MP1_SMN_C2PMSG_83) * 1000;
actual_dispclk_set_mhz  105 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c 			if (clk_mgr->dfs_bypass_disp_clk != actual_dispclk_set_mhz)
actual_dispclk_set_mhz  107 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c 						actual_dispclk_set_mhz / 7);
actual_dispclk_set_mhz  111 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c 	return actual_dispclk_set_mhz * 1000;
actual_dispclk_set_mhz   84 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c 	int actual_dispclk_set_mhz = -1;
actual_dispclk_set_mhz   93 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c 	actual_dispclk_set_mhz = rn_vbios_smu_send_msg_with_param(
actual_dispclk_set_mhz  100 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c 			if (clk_mgr->dfs_bypass_disp_clk != actual_dispclk_set_mhz)
actual_dispclk_set_mhz  102 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c 						actual_dispclk_set_mhz / 7);
actual_dispclk_set_mhz  106 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c 	return actual_dispclk_set_mhz * 1000;