accel_dev 128 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c static void adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev, accel_dev 131 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c switch (accel_dev->accel_pci_dev.sku) { accel_dev 136 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c dev_err(&GET_DEV(accel_dev), accel_dev 152 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c static void adf_enable_error_correction(struct adf_accel_dev *accel_dev) accel_dev 154 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c struct adf_hw_device_data *hw_device = accel_dev->hw_device; accel_dev 155 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c struct adf_bar *misc_bar = &GET_BARS(accel_dev)[ADF_C3XXX_PMISC_BAR]; accel_dev 180 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c static void adf_enable_ints(struct adf_accel_dev *accel_dev) accel_dev 184 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c addr = (&GET_BARS(accel_dev)[ADF_C3XXX_PMISC_BAR])->virt_addr; accel_dev 193 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c static int adf_pf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev) accel_dev 85 drivers/crypto/qat/qat_c3xxx/adf_drv.c static void adf_cleanup_pci_dev(struct adf_accel_dev *accel_dev) accel_dev 87 drivers/crypto/qat/qat_c3xxx/adf_drv.c pci_release_regions(accel_dev->accel_pci_dev.pci_dev); accel_dev 88 drivers/crypto/qat/qat_c3xxx/adf_drv.c pci_disable_device(accel_dev->accel_pci_dev.pci_dev); accel_dev 91 drivers/crypto/qat/qat_c3xxx/adf_drv.c static void adf_cleanup_accel(struct adf_accel_dev *accel_dev) accel_dev 93 drivers/crypto/qat/qat_c3xxx/adf_drv.c struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev; accel_dev 103 drivers/crypto/qat/qat_c3xxx/adf_drv.c if (accel_dev->hw_device) { accel_dev 106 drivers/crypto/qat/qat_c3xxx/adf_drv.c adf_clean_hw_data_c3xxx(accel_dev->hw_device); accel_dev 111 drivers/crypto/qat/qat_c3xxx/adf_drv.c kfree(accel_dev->hw_device); accel_dev 112 drivers/crypto/qat/qat_c3xxx/adf_drv.c accel_dev->hw_device = NULL; accel_dev 114 drivers/crypto/qat/qat_c3xxx/adf_drv.c adf_cfg_dev_remove(accel_dev); accel_dev 115 drivers/crypto/qat/qat_c3xxx/adf_drv.c debugfs_remove(accel_dev->debugfs_dir); accel_dev 116 drivers/crypto/qat/qat_c3xxx/adf_drv.c adf_devmgr_rm_dev(accel_dev, NULL); accel_dev 121 drivers/crypto/qat/qat_c3xxx/adf_drv.c struct adf_accel_dev *accel_dev; accel_dev 145 drivers/crypto/qat/qat_c3xxx/adf_drv.c accel_dev = kzalloc_node(sizeof(*accel_dev), GFP_KERNEL, accel_dev 147 drivers/crypto/qat/qat_c3xxx/adf_drv.c if (!accel_dev) accel_dev 150 drivers/crypto/qat/qat_c3xxx/adf_drv.c INIT_LIST_HEAD(&accel_dev->crypto_list); accel_dev 151 drivers/crypto/qat/qat_c3xxx/adf_drv.c accel_pci_dev = &accel_dev->accel_pci_dev; accel_dev 156 drivers/crypto/qat/qat_c3xxx/adf_drv.c if (adf_devmgr_add_dev(accel_dev, NULL)) { accel_dev 158 drivers/crypto/qat/qat_c3xxx/adf_drv.c kfree(accel_dev); accel_dev 162 drivers/crypto/qat/qat_c3xxx/adf_drv.c accel_dev->owner = THIS_MODULE; accel_dev 171 drivers/crypto/qat/qat_c3xxx/adf_drv.c accel_dev->hw_device = hw_data; accel_dev 172 drivers/crypto/qat/qat_c3xxx/adf_drv.c adf_init_hw_data_c3xxx(accel_dev->hw_device); accel_dev 195 drivers/crypto/qat/qat_c3xxx/adf_drv.c accel_dev->debugfs_dir = debugfs_create_dir(name, NULL); accel_dev 198 drivers/crypto/qat/qat_c3xxx/adf_drv.c ret = adf_cfg_dev_add(accel_dev); accel_dev 250 drivers/crypto/qat/qat_c3xxx/adf_drv.c if (adf_enable_aer(accel_dev, &adf_driver)) { accel_dev 262 drivers/crypto/qat/qat_c3xxx/adf_drv.c ret = qat_crypto_dev_config(accel_dev); accel_dev 266 drivers/crypto/qat/qat_c3xxx/adf_drv.c ret = adf_dev_init(accel_dev); accel_dev 270 drivers/crypto/qat/qat_c3xxx/adf_drv.c ret = adf_dev_start(accel_dev); accel_dev 277 drivers/crypto/qat/qat_c3xxx/adf_drv.c adf_dev_stop(accel_dev); accel_dev 279 drivers/crypto/qat/qat_c3xxx/adf_drv.c adf_dev_shutdown(accel_dev); accel_dev 285 drivers/crypto/qat/qat_c3xxx/adf_drv.c adf_cleanup_accel(accel_dev); accel_dev 286 drivers/crypto/qat/qat_c3xxx/adf_drv.c kfree(accel_dev); accel_dev 292 drivers/crypto/qat/qat_c3xxx/adf_drv.c struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev); accel_dev 294 drivers/crypto/qat/qat_c3xxx/adf_drv.c if (!accel_dev) { accel_dev 298 drivers/crypto/qat/qat_c3xxx/adf_drv.c adf_dev_stop(accel_dev); accel_dev 299 drivers/crypto/qat/qat_c3xxx/adf_drv.c adf_dev_shutdown(accel_dev); accel_dev 300 drivers/crypto/qat/qat_c3xxx/adf_drv.c adf_disable_aer(accel_dev); accel_dev 301 drivers/crypto/qat/qat_c3xxx/adf_drv.c adf_cleanup_accel(accel_dev); accel_dev 302 drivers/crypto/qat/qat_c3xxx/adf_drv.c adf_cleanup_pci_dev(accel_dev); accel_dev 303 drivers/crypto/qat/qat_c3xxx/adf_drv.c kfree(accel_dev); accel_dev 103 drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c static int adf_vf_int_noop(struct adf_accel_dev *accel_dev) accel_dev 108 drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c static void adf_vf_void_noop(struct adf_accel_dev *accel_dev) accel_dev 84 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c static void adf_cleanup_pci_dev(struct adf_accel_dev *accel_dev) accel_dev 86 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c pci_release_regions(accel_dev->accel_pci_dev.pci_dev); accel_dev 87 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c pci_disable_device(accel_dev->accel_pci_dev.pci_dev); accel_dev 90 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c static void adf_cleanup_accel(struct adf_accel_dev *accel_dev) accel_dev 92 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev; accel_dev 103 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c if (accel_dev->hw_device) { accel_dev 106 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c adf_clean_hw_data_c3xxxiov(accel_dev->hw_device); accel_dev 111 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c kfree(accel_dev->hw_device); accel_dev 112 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c accel_dev->hw_device = NULL; accel_dev 114 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c adf_cfg_dev_remove(accel_dev); accel_dev 115 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c debugfs_remove(accel_dev->debugfs_dir); accel_dev 117 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c adf_devmgr_rm_dev(accel_dev, pf); accel_dev 122 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c struct adf_accel_dev *accel_dev; accel_dev 139 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c accel_dev = kzalloc_node(sizeof(*accel_dev), GFP_KERNEL, accel_dev 141 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c if (!accel_dev) accel_dev 144 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c accel_dev->is_vf = true; accel_dev 146 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c accel_pci_dev = &accel_dev->accel_pci_dev; accel_dev 150 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c if (adf_devmgr_add_dev(accel_dev, pf)) { accel_dev 152 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c kfree(accel_dev); accel_dev 155 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c INIT_LIST_HEAD(&accel_dev->crypto_list); accel_dev 157 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c accel_dev->owner = THIS_MODULE; accel_dev 165 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c accel_dev->hw_device = hw_data; accel_dev 166 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c adf_init_hw_data_c3xxxiov(accel_dev->hw_device); accel_dev 179 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c accel_dev->debugfs_dir = debugfs_create_dir(name, NULL); accel_dev 182 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c ret = adf_cfg_dev_add(accel_dev); accel_dev 230 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c init_completion(&accel_dev->vf.iov_msg_completion); accel_dev 232 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c ret = qat_crypto_dev_config(accel_dev); accel_dev 236 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c set_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); accel_dev 238 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c ret = adf_dev_init(accel_dev); accel_dev 242 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c ret = adf_dev_start(accel_dev); accel_dev 249 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c adf_dev_stop(accel_dev); accel_dev 251 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c adf_dev_shutdown(accel_dev); accel_dev 257 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c adf_cleanup_accel(accel_dev); accel_dev 258 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c kfree(accel_dev); accel_dev 264 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev); accel_dev 266 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c if (!accel_dev) { accel_dev 270 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c adf_dev_stop(accel_dev); accel_dev 271 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c adf_dev_shutdown(accel_dev); accel_dev 272 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c adf_cleanup_accel(accel_dev); accel_dev 273 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c adf_cleanup_pci_dev(accel_dev); accel_dev 274 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c kfree(accel_dev); accel_dev 135 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c static void adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev, accel_dev 138 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c switch (accel_dev->accel_pci_dev.sku) { accel_dev 146 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c dev_err(&GET_DEV(accel_dev), accel_dev 162 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c static void adf_enable_error_correction(struct adf_accel_dev *accel_dev) accel_dev 164 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c struct adf_hw_device_data *hw_device = accel_dev->hw_device; accel_dev 165 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c struct adf_bar *misc_bar = &GET_BARS(accel_dev)[ADF_C62X_PMISC_BAR]; accel_dev 190 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c static void adf_enable_ints(struct adf_accel_dev *accel_dev) accel_dev 194 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c addr = (&GET_BARS(accel_dev)[ADF_C62X_PMISC_BAR])->virt_addr; accel_dev 203 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c static int adf_pf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev) accel_dev 85 drivers/crypto/qat/qat_c62x/adf_drv.c static void adf_cleanup_pci_dev(struct adf_accel_dev *accel_dev) accel_dev 87 drivers/crypto/qat/qat_c62x/adf_drv.c pci_release_regions(accel_dev->accel_pci_dev.pci_dev); accel_dev 88 drivers/crypto/qat/qat_c62x/adf_drv.c pci_disable_device(accel_dev->accel_pci_dev.pci_dev); accel_dev 91 drivers/crypto/qat/qat_c62x/adf_drv.c static void adf_cleanup_accel(struct adf_accel_dev *accel_dev) accel_dev 93 drivers/crypto/qat/qat_c62x/adf_drv.c struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev; accel_dev 103 drivers/crypto/qat/qat_c62x/adf_drv.c if (accel_dev->hw_device) { accel_dev 106 drivers/crypto/qat/qat_c62x/adf_drv.c adf_clean_hw_data_c62x(accel_dev->hw_device); accel_dev 111 drivers/crypto/qat/qat_c62x/adf_drv.c kfree(accel_dev->hw_device); accel_dev 112 drivers/crypto/qat/qat_c62x/adf_drv.c accel_dev->hw_device = NULL; accel_dev 114 drivers/crypto/qat/qat_c62x/adf_drv.c adf_cfg_dev_remove(accel_dev); accel_dev 115 drivers/crypto/qat/qat_c62x/adf_drv.c debugfs_remove(accel_dev->debugfs_dir); accel_dev 116 drivers/crypto/qat/qat_c62x/adf_drv.c adf_devmgr_rm_dev(accel_dev, NULL); accel_dev 121 drivers/crypto/qat/qat_c62x/adf_drv.c struct adf_accel_dev *accel_dev; accel_dev 145 drivers/crypto/qat/qat_c62x/adf_drv.c accel_dev = kzalloc_node(sizeof(*accel_dev), GFP_KERNEL, accel_dev 147 drivers/crypto/qat/qat_c62x/adf_drv.c if (!accel_dev) accel_dev 150 drivers/crypto/qat/qat_c62x/adf_drv.c INIT_LIST_HEAD(&accel_dev->crypto_list); accel_dev 151 drivers/crypto/qat/qat_c62x/adf_drv.c accel_pci_dev = &accel_dev->accel_pci_dev; accel_dev 156 drivers/crypto/qat/qat_c62x/adf_drv.c if (adf_devmgr_add_dev(accel_dev, NULL)) { accel_dev 158 drivers/crypto/qat/qat_c62x/adf_drv.c kfree(accel_dev); accel_dev 162 drivers/crypto/qat/qat_c62x/adf_drv.c accel_dev->owner = THIS_MODULE; accel_dev 171 drivers/crypto/qat/qat_c62x/adf_drv.c accel_dev->hw_device = hw_data; accel_dev 172 drivers/crypto/qat/qat_c62x/adf_drv.c adf_init_hw_data_c62x(accel_dev->hw_device); accel_dev 195 drivers/crypto/qat/qat_c62x/adf_drv.c accel_dev->debugfs_dir = debugfs_create_dir(name, NULL); accel_dev 198 drivers/crypto/qat/qat_c62x/adf_drv.c ret = adf_cfg_dev_add(accel_dev); accel_dev 250 drivers/crypto/qat/qat_c62x/adf_drv.c if (adf_enable_aer(accel_dev, &adf_driver)) { accel_dev 262 drivers/crypto/qat/qat_c62x/adf_drv.c ret = qat_crypto_dev_config(accel_dev); accel_dev 266 drivers/crypto/qat/qat_c62x/adf_drv.c ret = adf_dev_init(accel_dev); accel_dev 270 drivers/crypto/qat/qat_c62x/adf_drv.c ret = adf_dev_start(accel_dev); accel_dev 277 drivers/crypto/qat/qat_c62x/adf_drv.c adf_dev_stop(accel_dev); accel_dev 279 drivers/crypto/qat/qat_c62x/adf_drv.c adf_dev_shutdown(accel_dev); accel_dev 285 drivers/crypto/qat/qat_c62x/adf_drv.c adf_cleanup_accel(accel_dev); accel_dev 286 drivers/crypto/qat/qat_c62x/adf_drv.c kfree(accel_dev); accel_dev 292 drivers/crypto/qat/qat_c62x/adf_drv.c struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev); accel_dev 294 drivers/crypto/qat/qat_c62x/adf_drv.c if (!accel_dev) { accel_dev 298 drivers/crypto/qat/qat_c62x/adf_drv.c adf_dev_stop(accel_dev); accel_dev 299 drivers/crypto/qat/qat_c62x/adf_drv.c adf_dev_shutdown(accel_dev); accel_dev 300 drivers/crypto/qat/qat_c62x/adf_drv.c adf_disable_aer(accel_dev); accel_dev 301 drivers/crypto/qat/qat_c62x/adf_drv.c adf_cleanup_accel(accel_dev); accel_dev 302 drivers/crypto/qat/qat_c62x/adf_drv.c adf_cleanup_pci_dev(accel_dev); accel_dev 303 drivers/crypto/qat/qat_c62x/adf_drv.c kfree(accel_dev); accel_dev 103 drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c static int adf_vf_int_noop(struct adf_accel_dev *accel_dev) accel_dev 108 drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c static void adf_vf_void_noop(struct adf_accel_dev *accel_dev) accel_dev 84 drivers/crypto/qat/qat_c62xvf/adf_drv.c static void adf_cleanup_pci_dev(struct adf_accel_dev *accel_dev) accel_dev 86 drivers/crypto/qat/qat_c62xvf/adf_drv.c pci_release_regions(accel_dev->accel_pci_dev.pci_dev); accel_dev 87 drivers/crypto/qat/qat_c62xvf/adf_drv.c pci_disable_device(accel_dev->accel_pci_dev.pci_dev); accel_dev 90 drivers/crypto/qat/qat_c62xvf/adf_drv.c static void adf_cleanup_accel(struct adf_accel_dev *accel_dev) accel_dev 92 drivers/crypto/qat/qat_c62xvf/adf_drv.c struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev; accel_dev 103 drivers/crypto/qat/qat_c62xvf/adf_drv.c if (accel_dev->hw_device) { accel_dev 106 drivers/crypto/qat/qat_c62xvf/adf_drv.c adf_clean_hw_data_c62xiov(accel_dev->hw_device); accel_dev 111 drivers/crypto/qat/qat_c62xvf/adf_drv.c kfree(accel_dev->hw_device); accel_dev 112 drivers/crypto/qat/qat_c62xvf/adf_drv.c accel_dev->hw_device = NULL; accel_dev 114 drivers/crypto/qat/qat_c62xvf/adf_drv.c adf_cfg_dev_remove(accel_dev); accel_dev 115 drivers/crypto/qat/qat_c62xvf/adf_drv.c debugfs_remove(accel_dev->debugfs_dir); accel_dev 117 drivers/crypto/qat/qat_c62xvf/adf_drv.c adf_devmgr_rm_dev(accel_dev, pf); accel_dev 122 drivers/crypto/qat/qat_c62xvf/adf_drv.c struct adf_accel_dev *accel_dev; accel_dev 139 drivers/crypto/qat/qat_c62xvf/adf_drv.c accel_dev = kzalloc_node(sizeof(*accel_dev), GFP_KERNEL, accel_dev 141 drivers/crypto/qat/qat_c62xvf/adf_drv.c if (!accel_dev) accel_dev 144 drivers/crypto/qat/qat_c62xvf/adf_drv.c accel_dev->is_vf = true; accel_dev 146 drivers/crypto/qat/qat_c62xvf/adf_drv.c accel_pci_dev = &accel_dev->accel_pci_dev; accel_dev 150 drivers/crypto/qat/qat_c62xvf/adf_drv.c if (adf_devmgr_add_dev(accel_dev, pf)) { accel_dev 152 drivers/crypto/qat/qat_c62xvf/adf_drv.c kfree(accel_dev); accel_dev 155 drivers/crypto/qat/qat_c62xvf/adf_drv.c INIT_LIST_HEAD(&accel_dev->crypto_list); accel_dev 157 drivers/crypto/qat/qat_c62xvf/adf_drv.c accel_dev->owner = THIS_MODULE; accel_dev 165 drivers/crypto/qat/qat_c62xvf/adf_drv.c accel_dev->hw_device = hw_data; accel_dev 166 drivers/crypto/qat/qat_c62xvf/adf_drv.c adf_init_hw_data_c62xiov(accel_dev->hw_device); accel_dev 179 drivers/crypto/qat/qat_c62xvf/adf_drv.c accel_dev->debugfs_dir = debugfs_create_dir(name, NULL); accel_dev 182 drivers/crypto/qat/qat_c62xvf/adf_drv.c ret = adf_cfg_dev_add(accel_dev); accel_dev 230 drivers/crypto/qat/qat_c62xvf/adf_drv.c init_completion(&accel_dev->vf.iov_msg_completion); accel_dev 232 drivers/crypto/qat/qat_c62xvf/adf_drv.c ret = qat_crypto_dev_config(accel_dev); accel_dev 236 drivers/crypto/qat/qat_c62xvf/adf_drv.c set_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); accel_dev 238 drivers/crypto/qat/qat_c62xvf/adf_drv.c ret = adf_dev_init(accel_dev); accel_dev 242 drivers/crypto/qat/qat_c62xvf/adf_drv.c ret = adf_dev_start(accel_dev); accel_dev 249 drivers/crypto/qat/qat_c62xvf/adf_drv.c adf_dev_stop(accel_dev); accel_dev 251 drivers/crypto/qat/qat_c62xvf/adf_drv.c adf_dev_shutdown(accel_dev); accel_dev 257 drivers/crypto/qat/qat_c62xvf/adf_drv.c adf_cleanup_accel(accel_dev); accel_dev 258 drivers/crypto/qat/qat_c62xvf/adf_drv.c kfree(accel_dev); accel_dev 264 drivers/crypto/qat/qat_c62xvf/adf_drv.c struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev); accel_dev 266 drivers/crypto/qat/qat_c62xvf/adf_drv.c if (!accel_dev) { accel_dev 270 drivers/crypto/qat/qat_c62xvf/adf_drv.c adf_dev_stop(accel_dev); accel_dev 271 drivers/crypto/qat/qat_c62xvf/adf_drv.c adf_dev_shutdown(accel_dev); accel_dev 272 drivers/crypto/qat/qat_c62xvf/adf_drv.c adf_cleanup_accel(accel_dev); accel_dev 273 drivers/crypto/qat/qat_c62xvf/adf_drv.c adf_cleanup_pci_dev(accel_dev); accel_dev 274 drivers/crypto/qat/qat_c62xvf/adf_drv.c kfree(accel_dev); accel_dev 167 drivers/crypto/qat/qat_common/adf_accel_devices.h int (*alloc_irq)(struct adf_accel_dev *accel_dev); accel_dev 168 drivers/crypto/qat/qat_common/adf_accel_devices.h void (*free_irq)(struct adf_accel_dev *accel_dev); accel_dev 169 drivers/crypto/qat/qat_common/adf_accel_devices.h void (*enable_error_correction)(struct adf_accel_dev *accel_dev); accel_dev 170 drivers/crypto/qat/qat_common/adf_accel_devices.h int (*init_admin_comms)(struct adf_accel_dev *accel_dev); accel_dev 171 drivers/crypto/qat/qat_common/adf_accel_devices.h void (*exit_admin_comms)(struct adf_accel_dev *accel_dev); accel_dev 172 drivers/crypto/qat/qat_common/adf_accel_devices.h int (*send_admin_init)(struct adf_accel_dev *accel_dev); accel_dev 173 drivers/crypto/qat/qat_common/adf_accel_devices.h int (*init_arb)(struct adf_accel_dev *accel_dev); accel_dev 174 drivers/crypto/qat/qat_common/adf_accel_devices.h void (*exit_arb)(struct adf_accel_dev *accel_dev); accel_dev 175 drivers/crypto/qat/qat_common/adf_accel_devices.h void (*get_arb_mapping)(struct adf_accel_dev *accel_dev, accel_dev 177 drivers/crypto/qat/qat_common/adf_accel_devices.h void (*disable_iov)(struct adf_accel_dev *accel_dev); accel_dev 178 drivers/crypto/qat/qat_common/adf_accel_devices.h void (*enable_ints)(struct adf_accel_dev *accel_dev); accel_dev 179 drivers/crypto/qat/qat_common/adf_accel_devices.h int (*enable_vf2pf_comms)(struct adf_accel_dev *accel_dev); accel_dev 180 drivers/crypto/qat/qat_common/adf_accel_devices.h void (*reset_device)(struct adf_accel_dev *accel_dev); accel_dev 204 drivers/crypto/qat/qat_common/adf_accel_devices.h #define GET_DEV(accel_dev) ((accel_dev)->accel_pci_dev.pci_dev->dev) accel_dev 205 drivers/crypto/qat/qat_common/adf_accel_devices.h #define GET_BARS(accel_dev) ((accel_dev)->accel_pci_dev.pci_bars) accel_dev 206 drivers/crypto/qat/qat_common/adf_accel_devices.h #define GET_HW_DATA(accel_dev) (accel_dev->hw_device) accel_dev 207 drivers/crypto/qat/qat_common/adf_accel_devices.h #define GET_MAX_BANKS(accel_dev) (GET_HW_DATA(accel_dev)->num_banks) accel_dev 208 drivers/crypto/qat/qat_common/adf_accel_devices.h #define GET_MAX_ACCELENGINES(accel_dev) (GET_HW_DATA(accel_dev)->num_engines) accel_dev 220 drivers/crypto/qat/qat_common/adf_accel_devices.h struct adf_accel_dev *accel_dev; accel_dev 54 drivers/crypto/qat/qat_common/adf_accel_engine.c int adf_ae_fw_load(struct adf_accel_dev *accel_dev) accel_dev 56 drivers/crypto/qat/qat_common/adf_accel_engine.c struct adf_fw_loader_data *loader_data = accel_dev->fw_loader; accel_dev 57 drivers/crypto/qat/qat_common/adf_accel_engine.c struct adf_hw_device_data *hw_device = accel_dev->hw_device; accel_dev 65 drivers/crypto/qat/qat_common/adf_accel_engine.c &accel_dev->accel_pci_dev.pci_dev->dev)) { accel_dev 66 drivers/crypto/qat/qat_common/adf_accel_engine.c dev_err(&GET_DEV(accel_dev), "Failed to load MMP firmware %s\n", accel_dev 71 drivers/crypto/qat/qat_common/adf_accel_engine.c &accel_dev->accel_pci_dev.pci_dev->dev)) { accel_dev 72 drivers/crypto/qat/qat_common/adf_accel_engine.c dev_err(&GET_DEV(accel_dev), "Failed to load UOF firmware %s\n", accel_dev 82 drivers/crypto/qat/qat_common/adf_accel_engine.c dev_err(&GET_DEV(accel_dev), "Failed to load MMP\n"); accel_dev 86 drivers/crypto/qat/qat_common/adf_accel_engine.c dev_err(&GET_DEV(accel_dev), "Failed to map FW\n"); accel_dev 90 drivers/crypto/qat/qat_common/adf_accel_engine.c dev_err(&GET_DEV(accel_dev), "Failed to load UOF\n"); accel_dev 96 drivers/crypto/qat/qat_common/adf_accel_engine.c adf_ae_fw_release(accel_dev); accel_dev 100 drivers/crypto/qat/qat_common/adf_accel_engine.c void adf_ae_fw_release(struct adf_accel_dev *accel_dev) accel_dev 102 drivers/crypto/qat/qat_common/adf_accel_engine.c struct adf_fw_loader_data *loader_data = accel_dev->fw_loader; accel_dev 103 drivers/crypto/qat/qat_common/adf_accel_engine.c struct adf_hw_device_data *hw_device = accel_dev->hw_device; accel_dev 117 drivers/crypto/qat/qat_common/adf_accel_engine.c int adf_ae_start(struct adf_accel_dev *accel_dev) accel_dev 119 drivers/crypto/qat/qat_common/adf_accel_engine.c struct adf_fw_loader_data *loader_data = accel_dev->fw_loader; accel_dev 120 drivers/crypto/qat/qat_common/adf_accel_engine.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 121 drivers/crypto/qat/qat_common/adf_accel_engine.c uint32_t ae_ctr, ae, max_aes = GET_MAX_ACCELENGINES(accel_dev); accel_dev 132 drivers/crypto/qat/qat_common/adf_accel_engine.c dev_info(&GET_DEV(accel_dev), accel_dev 134 drivers/crypto/qat/qat_common/adf_accel_engine.c accel_dev->accel_id, ae_ctr); accel_dev 138 drivers/crypto/qat/qat_common/adf_accel_engine.c int adf_ae_stop(struct adf_accel_dev *accel_dev) accel_dev 140 drivers/crypto/qat/qat_common/adf_accel_engine.c struct adf_fw_loader_data *loader_data = accel_dev->fw_loader; accel_dev 141 drivers/crypto/qat/qat_common/adf_accel_engine.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 142 drivers/crypto/qat/qat_common/adf_accel_engine.c uint32_t ae_ctr, ae, max_aes = GET_MAX_ACCELENGINES(accel_dev); accel_dev 153 drivers/crypto/qat/qat_common/adf_accel_engine.c dev_info(&GET_DEV(accel_dev), accel_dev 155 drivers/crypto/qat/qat_common/adf_accel_engine.c accel_dev->accel_id, ae_ctr); accel_dev 159 drivers/crypto/qat/qat_common/adf_accel_engine.c static int adf_ae_reset(struct adf_accel_dev *accel_dev, int ae) accel_dev 161 drivers/crypto/qat/qat_common/adf_accel_engine.c struct adf_fw_loader_data *loader_data = accel_dev->fw_loader; accel_dev 170 drivers/crypto/qat/qat_common/adf_accel_engine.c int adf_ae_init(struct adf_accel_dev *accel_dev) accel_dev 173 drivers/crypto/qat/qat_common/adf_accel_engine.c struct adf_hw_device_data *hw_device = accel_dev->hw_device; accel_dev 182 drivers/crypto/qat/qat_common/adf_accel_engine.c accel_dev->fw_loader = loader_data; accel_dev 183 drivers/crypto/qat/qat_common/adf_accel_engine.c if (qat_hal_init(accel_dev)) { accel_dev 184 drivers/crypto/qat/qat_common/adf_accel_engine.c dev_err(&GET_DEV(accel_dev), "Failed to init the AEs\n"); accel_dev 188 drivers/crypto/qat/qat_common/adf_accel_engine.c if (adf_ae_reset(accel_dev, 0)) { accel_dev 189 drivers/crypto/qat/qat_common/adf_accel_engine.c dev_err(&GET_DEV(accel_dev), "Failed to reset the AEs\n"); accel_dev 197 drivers/crypto/qat/qat_common/adf_accel_engine.c int adf_ae_shutdown(struct adf_accel_dev *accel_dev) accel_dev 199 drivers/crypto/qat/qat_common/adf_accel_engine.c struct adf_fw_loader_data *loader_data = accel_dev->fw_loader; accel_dev 200 drivers/crypto/qat/qat_common/adf_accel_engine.c struct adf_hw_device_data *hw_device = accel_dev->hw_device; accel_dev 206 drivers/crypto/qat/qat_common/adf_accel_engine.c kfree(accel_dev->fw_loader); accel_dev 207 drivers/crypto/qat/qat_common/adf_accel_engine.c accel_dev->fw_loader = NULL; accel_dev 154 drivers/crypto/qat/qat_common/adf_admin.c static int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae, accel_dev 157 drivers/crypto/qat/qat_common/adf_admin.c struct adf_admin_comms *admin = accel_dev->admin; accel_dev 184 drivers/crypto/qat/qat_common/adf_admin.c dev_err(&GET_DEV(accel_dev), accel_dev 191 drivers/crypto/qat/qat_common/adf_admin.c static int adf_send_admin_cmd(struct adf_accel_dev *accel_dev, int cmd) accel_dev 193 drivers/crypto/qat/qat_common/adf_admin.c struct adf_hw_device_data *hw_device = accel_dev->hw_device; accel_dev 203 drivers/crypto/qat/qat_common/adf_admin.c req.init_cfg_ptr = accel_dev->admin->const_tbl_addr; accel_dev 207 drivers/crypto/qat/qat_common/adf_admin.c if (adf_put_admin_msg_sync(accel_dev, i, &req, &resp) || accel_dev 222 drivers/crypto/qat/qat_common/adf_admin.c int adf_send_admin_init(struct adf_accel_dev *accel_dev) accel_dev 224 drivers/crypto/qat/qat_common/adf_admin.c int ret = adf_send_admin_cmd(accel_dev, ICP_QAT_FW_INIT_ME); accel_dev 228 drivers/crypto/qat/qat_common/adf_admin.c return adf_send_admin_cmd(accel_dev, ICP_QAT_FW_CONSTANTS_CFG); accel_dev 232 drivers/crypto/qat/qat_common/adf_admin.c int adf_init_admin_comms(struct adf_accel_dev *accel_dev) accel_dev 235 drivers/crypto/qat/qat_common/adf_admin.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 237 drivers/crypto/qat/qat_common/adf_admin.c &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; accel_dev 243 drivers/crypto/qat/qat_common/adf_admin.c admin = kzalloc_node(sizeof(*accel_dev->admin), GFP_KERNEL, accel_dev 244 drivers/crypto/qat/qat_common/adf_admin.c dev_to_node(&GET_DEV(accel_dev))); accel_dev 247 drivers/crypto/qat/qat_common/adf_admin.c admin->virt_addr = dma_alloc_coherent(&GET_DEV(accel_dev), PAGE_SIZE, accel_dev 250 drivers/crypto/qat/qat_common/adf_admin.c dev_err(&GET_DEV(accel_dev), "Failed to allocate dma buff\n"); accel_dev 255 drivers/crypto/qat/qat_common/adf_admin.c admin->virt_tbl_addr = dma_alloc_coherent(&GET_DEV(accel_dev), accel_dev 260 drivers/crypto/qat/qat_common/adf_admin.c dev_err(&GET_DEV(accel_dev), "Failed to allocate const_tbl\n"); accel_dev 261 drivers/crypto/qat/qat_common/adf_admin.c dma_free_coherent(&GET_DEV(accel_dev), PAGE_SIZE, accel_dev 273 drivers/crypto/qat/qat_common/adf_admin.c accel_dev->admin = admin; accel_dev 278 drivers/crypto/qat/qat_common/adf_admin.c void adf_exit_admin_comms(struct adf_accel_dev *accel_dev) accel_dev 280 drivers/crypto/qat/qat_common/adf_admin.c struct adf_admin_comms *admin = accel_dev->admin; accel_dev 286 drivers/crypto/qat/qat_common/adf_admin.c dma_free_coherent(&GET_DEV(accel_dev), PAGE_SIZE, accel_dev 289 drivers/crypto/qat/qat_common/adf_admin.c dma_free_coherent(&GET_DEV(accel_dev), PAGE_SIZE, accel_dev 294 drivers/crypto/qat/qat_common/adf_admin.c accel_dev->admin = NULL; accel_dev 61 drivers/crypto/qat/qat_common/adf_aer.c struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev); accel_dev 64 drivers/crypto/qat/qat_common/adf_aer.c if (!accel_dev) { accel_dev 80 drivers/crypto/qat/qat_common/adf_aer.c struct adf_accel_dev *accel_dev; accel_dev 85 drivers/crypto/qat/qat_common/adf_aer.c void adf_reset_sbr(struct adf_accel_dev *accel_dev) accel_dev 87 drivers/crypto/qat/qat_common/adf_aer.c struct pci_dev *pdev = accel_to_pci_dev(accel_dev); accel_dev 95 drivers/crypto/qat/qat_common/adf_aer.c dev_info(&GET_DEV(accel_dev), accel_dev 98 drivers/crypto/qat/qat_common/adf_aer.c dev_info(&GET_DEV(accel_dev), "Secondary bus reset\n"); accel_dev 110 drivers/crypto/qat/qat_common/adf_aer.c void adf_reset_flr(struct adf_accel_dev *accel_dev) accel_dev 112 drivers/crypto/qat/qat_common/adf_aer.c pcie_flr(accel_to_pci_dev(accel_dev)); accel_dev 116 drivers/crypto/qat/qat_common/adf_aer.c void adf_dev_restore(struct adf_accel_dev *accel_dev) accel_dev 118 drivers/crypto/qat/qat_common/adf_aer.c struct adf_hw_device_data *hw_device = accel_dev->hw_device; accel_dev 119 drivers/crypto/qat/qat_common/adf_aer.c struct pci_dev *pdev = accel_to_pci_dev(accel_dev); accel_dev 122 drivers/crypto/qat/qat_common/adf_aer.c dev_info(&GET_DEV(accel_dev), "Resetting device qat_dev%d\n", accel_dev 123 drivers/crypto/qat/qat_common/adf_aer.c accel_dev->accel_id); accel_dev 124 drivers/crypto/qat/qat_common/adf_aer.c hw_device->reset_device(accel_dev); accel_dev 134 drivers/crypto/qat/qat_common/adf_aer.c struct adf_accel_dev *accel_dev = reset_data->accel_dev; accel_dev 136 drivers/crypto/qat/qat_common/adf_aer.c adf_dev_restarting_notify(accel_dev); accel_dev 137 drivers/crypto/qat/qat_common/adf_aer.c adf_dev_stop(accel_dev); accel_dev 138 drivers/crypto/qat/qat_common/adf_aer.c adf_dev_shutdown(accel_dev); accel_dev 139 drivers/crypto/qat/qat_common/adf_aer.c if (adf_dev_init(accel_dev) || adf_dev_start(accel_dev)) { accel_dev 141 drivers/crypto/qat/qat_common/adf_aer.c dev_err(&GET_DEV(accel_dev), "Restart device failed\n"); accel_dev 146 drivers/crypto/qat/qat_common/adf_aer.c adf_dev_restarted_notify(accel_dev); accel_dev 147 drivers/crypto/qat/qat_common/adf_aer.c clear_bit(ADF_STATUS_RESTARTING, &accel_dev->status); accel_dev 156 drivers/crypto/qat/qat_common/adf_aer.c static int adf_dev_aer_schedule_reset(struct adf_accel_dev *accel_dev, accel_dev 161 drivers/crypto/qat/qat_common/adf_aer.c if (!adf_dev_started(accel_dev) || accel_dev 162 drivers/crypto/qat/qat_common/adf_aer.c test_bit(ADF_STATUS_RESTARTING, &accel_dev->status)) accel_dev 165 drivers/crypto/qat/qat_common/adf_aer.c set_bit(ADF_STATUS_RESTARTING, &accel_dev->status); accel_dev 169 drivers/crypto/qat/qat_common/adf_aer.c reset_data->accel_dev = accel_dev; accel_dev 183 drivers/crypto/qat/qat_common/adf_aer.c dev_err(&GET_DEV(accel_dev), accel_dev 195 drivers/crypto/qat/qat_common/adf_aer.c struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev); accel_dev 197 drivers/crypto/qat/qat_common/adf_aer.c if (!accel_dev) { accel_dev 201 drivers/crypto/qat/qat_common/adf_aer.c if (adf_dev_aer_schedule_reset(accel_dev, ADF_DEV_RESET_SYNC)) accel_dev 230 drivers/crypto/qat/qat_common/adf_aer.c int adf_enable_aer(struct adf_accel_dev *accel_dev, struct pci_driver *adf) accel_dev 232 drivers/crypto/qat/qat_common/adf_aer.c struct pci_dev *pdev = accel_to_pci_dev(accel_dev); accel_dev 250 drivers/crypto/qat/qat_common/adf_aer.c void adf_disable_aer(struct adf_accel_dev *accel_dev) accel_dev 252 drivers/crypto/qat/qat_common/adf_aer.c struct pci_dev *pdev = accel_to_pci_dev(accel_dev); accel_dev 128 drivers/crypto/qat/qat_common/adf_cfg.c int adf_cfg_dev_add(struct adf_accel_dev *accel_dev) accel_dev 137 drivers/crypto/qat/qat_common/adf_cfg.c accel_dev->cfg = dev_cfg_data; accel_dev 141 drivers/crypto/qat/qat_common/adf_cfg.c accel_dev->debugfs_dir, accel_dev 150 drivers/crypto/qat/qat_common/adf_cfg.c void adf_cfg_del_all(struct adf_accel_dev *accel_dev) accel_dev 152 drivers/crypto/qat/qat_common/adf_cfg.c struct adf_cfg_device_data *dev_cfg_data = accel_dev->cfg; accel_dev 157 drivers/crypto/qat/qat_common/adf_cfg.c clear_bit(ADF_STATUS_CONFIGURED, &accel_dev->status); accel_dev 170 drivers/crypto/qat/qat_common/adf_cfg.c void adf_cfg_dev_remove(struct adf_accel_dev *accel_dev) accel_dev 172 drivers/crypto/qat/qat_common/adf_cfg.c struct adf_cfg_device_data *dev_cfg_data = accel_dev->cfg; accel_dev 182 drivers/crypto/qat/qat_common/adf_cfg.c accel_dev->cfg = NULL; accel_dev 231 drivers/crypto/qat/qat_common/adf_cfg.c static struct adf_cfg_section *adf_cfg_sec_find(struct adf_accel_dev *accel_dev, accel_dev 234 drivers/crypto/qat/qat_common/adf_cfg.c struct adf_cfg_device_data *cfg = accel_dev->cfg; accel_dev 246 drivers/crypto/qat/qat_common/adf_cfg.c static int adf_cfg_key_val_get(struct adf_accel_dev *accel_dev, accel_dev 251 drivers/crypto/qat/qat_common/adf_cfg.c struct adf_cfg_section *sec = adf_cfg_sec_find(accel_dev, sec_name); accel_dev 277 drivers/crypto/qat/qat_common/adf_cfg.c int adf_cfg_add_key_value_param(struct adf_accel_dev *accel_dev, accel_dev 282 drivers/crypto/qat/qat_common/adf_cfg.c struct adf_cfg_device_data *cfg = accel_dev->cfg; accel_dev 284 drivers/crypto/qat/qat_common/adf_cfg.c struct adf_cfg_section *section = adf_cfg_sec_find(accel_dev, accel_dev 305 drivers/crypto/qat/qat_common/adf_cfg.c dev_err(&GET_DEV(accel_dev), "Unknown type given.\n"); accel_dev 328 drivers/crypto/qat/qat_common/adf_cfg.c int adf_cfg_section_add(struct adf_accel_dev *accel_dev, const char *name) accel_dev 330 drivers/crypto/qat/qat_common/adf_cfg.c struct adf_cfg_device_data *cfg = accel_dev->cfg; accel_dev 331 drivers/crypto/qat/qat_common/adf_cfg.c struct adf_cfg_section *sec = adf_cfg_sec_find(accel_dev, name); accel_dev 349 drivers/crypto/qat/qat_common/adf_cfg.c int adf_cfg_get_param_value(struct adf_accel_dev *accel_dev, accel_dev 353 drivers/crypto/qat/qat_common/adf_cfg.c struct adf_cfg_device_data *cfg = accel_dev->cfg; accel_dev 357 drivers/crypto/qat/qat_common/adf_cfg.c ret = adf_cfg_key_val_get(accel_dev, section, name, value); accel_dev 76 drivers/crypto/qat/qat_common/adf_cfg.h int adf_cfg_dev_add(struct adf_accel_dev *accel_dev); accel_dev 77 drivers/crypto/qat/qat_common/adf_cfg.h void adf_cfg_dev_remove(struct adf_accel_dev *accel_dev); accel_dev 78 drivers/crypto/qat/qat_common/adf_cfg.h int adf_cfg_section_add(struct adf_accel_dev *accel_dev, const char *name); accel_dev 79 drivers/crypto/qat/qat_common/adf_cfg.h void adf_cfg_del_all(struct adf_accel_dev *accel_dev); accel_dev 80 drivers/crypto/qat/qat_common/adf_cfg.h int adf_cfg_add_key_value_param(struct adf_accel_dev *accel_dev, accel_dev 84 drivers/crypto/qat/qat_common/adf_cfg.h int adf_cfg_get_param_value(struct adf_accel_dev *accel_dev, accel_dev 88 drivers/crypto/qat/qat_common/adf_common_drv.h int (*event_hld)(struct adf_accel_dev *accel_dev, accel_dev 104 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_dev_init(struct adf_accel_dev *accel_dev); accel_dev 105 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_dev_start(struct adf_accel_dev *accel_dev); accel_dev 106 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_dev_stop(struct adf_accel_dev *accel_dev); accel_dev 107 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_dev_shutdown(struct adf_accel_dev *accel_dev); accel_dev 109 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_iov_putmsg(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr); accel_dev 110 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_pf2vf_notify_restarting(struct adf_accel_dev *accel_dev); accel_dev 111 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev); accel_dev 121 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev, accel_dev 123 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev, accel_dev 131 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev); accel_dev 132 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_dev_started(struct adf_accel_dev *accel_dev); accel_dev 133 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev); accel_dev 134 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev); accel_dev 135 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_ae_init(struct adf_accel_dev *accel_dev); accel_dev 136 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_ae_shutdown(struct adf_accel_dev *accel_dev); accel_dev 137 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_ae_fw_load(struct adf_accel_dev *accel_dev); accel_dev 138 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_ae_fw_release(struct adf_accel_dev *accel_dev); accel_dev 139 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_ae_start(struct adf_accel_dev *accel_dev); accel_dev 140 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_ae_stop(struct adf_accel_dev *accel_dev); accel_dev 142 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_enable_aer(struct adf_accel_dev *accel_dev, struct pci_driver *adf); accel_dev 143 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_disable_aer(struct adf_accel_dev *accel_dev); accel_dev 144 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_reset_sbr(struct adf_accel_dev *accel_dev); accel_dev 145 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_reset_flr(struct adf_accel_dev *accel_dev); accel_dev 146 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_dev_restore(struct adf_accel_dev *accel_dev); accel_dev 149 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_init_admin_comms(struct adf_accel_dev *accel_dev); accel_dev 150 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_exit_admin_comms(struct adf_accel_dev *accel_dev); accel_dev 151 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_send_admin_init(struct adf_accel_dev *accel_dev); accel_dev 152 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_init_arb(struct adf_accel_dev *accel_dev); accel_dev 153 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_exit_arb(struct adf_accel_dev *accel_dev); accel_dev 156 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_dev_get(struct adf_accel_dev *accel_dev); accel_dev 157 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_dev_put(struct adf_accel_dev *accel_dev); accel_dev 158 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_dev_in_use(struct adf_accel_dev *accel_dev); accel_dev 159 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_init_etr_data(struct adf_accel_dev *accel_dev); accel_dev 160 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev); accel_dev 163 drivers/crypto/qat/qat_common/adf_common_drv.h int qat_crypto_dev_config(struct adf_accel_dev *accel_dev); accel_dev 173 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev); accel_dev 174 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_isr_resource_free(struct adf_accel_dev *accel_dev); accel_dev 175 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev); accel_dev 176 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev); accel_dev 178 drivers/crypto/qat/qat_common/adf_common_drv.h int qat_hal_init(struct adf_accel_dev *accel_dev); accel_dev 234 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_disable_sriov(struct adf_accel_dev *accel_dev); accel_dev 235 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_disable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, accel_dev 237 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, accel_dev 239 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev); accel_dev 240 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev); accel_dev 242 drivers/crypto/qat/qat_common/adf_common_drv.h int adf_vf2pf_init(struct adf_accel_dev *accel_dev); accel_dev 243 drivers/crypto/qat/qat_common/adf_common_drv.h void adf_vf2pf_shutdown(struct adf_accel_dev *accel_dev); accel_dev 254 drivers/crypto/qat/qat_common/adf_common_drv.h static inline void adf_disable_sriov(struct adf_accel_dev *accel_dev) accel_dev 258 drivers/crypto/qat/qat_common/adf_common_drv.h static inline void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev) accel_dev 262 drivers/crypto/qat/qat_common/adf_common_drv.h static inline void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev) accel_dev 266 drivers/crypto/qat/qat_common/adf_common_drv.h static inline int adf_vf2pf_init(struct adf_accel_dev *accel_dev) accel_dev 271 drivers/crypto/qat/qat_common/adf_common_drv.h static inline void adf_vf2pf_shutdown(struct adf_accel_dev *accel_dev) accel_dev 151 drivers/crypto/qat/qat_common/adf_ctl_drv.c static int adf_add_key_value_data(struct adf_accel_dev *accel_dev, accel_dev 159 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (adf_cfg_add_key_value_param(accel_dev, section, accel_dev 162 drivers/crypto/qat/qat_common/adf_ctl_drv.c dev_err(&GET_DEV(accel_dev), accel_dev 167 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (adf_cfg_add_key_value_param(accel_dev, section, accel_dev 170 drivers/crypto/qat/qat_common/adf_ctl_drv.c dev_err(&GET_DEV(accel_dev), accel_dev 178 drivers/crypto/qat/qat_common/adf_ctl_drv.c static int adf_copy_key_value_data(struct adf_accel_dev *accel_dev, accel_dev 190 drivers/crypto/qat/qat_common/adf_ctl_drv.c dev_err(&GET_DEV(accel_dev), accel_dev 195 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (adf_cfg_section_add(accel_dev, section.name)) { accel_dev 196 drivers/crypto/qat/qat_common/adf_ctl_drv.c dev_err(&GET_DEV(accel_dev), accel_dev 206 drivers/crypto/qat/qat_common/adf_ctl_drv.c dev_err(&GET_DEV(accel_dev), accel_dev 210 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (adf_add_key_value_data(accel_dev, section.name, accel_dev 220 drivers/crypto/qat/qat_common/adf_ctl_drv.c adf_cfg_del_all(accel_dev); accel_dev 229 drivers/crypto/qat/qat_common/adf_ctl_drv.c struct adf_accel_dev *accel_dev; accel_dev 235 drivers/crypto/qat/qat_common/adf_ctl_drv.c accel_dev = adf_devmgr_get_dev_by_id(ctl_data->device_id); accel_dev 236 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (!accel_dev) { accel_dev 241 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (adf_dev_started(accel_dev)) { accel_dev 246 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (adf_copy_key_value_data(accel_dev, ctl_data)) { accel_dev 250 drivers/crypto/qat/qat_common/adf_ctl_drv.c set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status); accel_dev 275 drivers/crypto/qat/qat_common/adf_ctl_drv.c struct adf_accel_dev *accel_dev; accel_dev 277 drivers/crypto/qat/qat_common/adf_ctl_drv.c list_for_each_entry(accel_dev, adf_devmgr_get_head(), list) { accel_dev 278 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (id == accel_dev->accel_id || id == ADF_CFG_ALL_DEVICES) { accel_dev 279 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (!adf_dev_started(accel_dev)) accel_dev 283 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (!accel_dev->is_vf) accel_dev 286 drivers/crypto/qat/qat_common/adf_ctl_drv.c adf_dev_stop(accel_dev); accel_dev 287 drivers/crypto/qat/qat_common/adf_ctl_drv.c adf_dev_shutdown(accel_dev); accel_dev 291 drivers/crypto/qat/qat_common/adf_ctl_drv.c list_for_each_entry(accel_dev, adf_devmgr_get_head(), list) { accel_dev 292 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (id == accel_dev->accel_id || id == ADF_CFG_ALL_DEVICES) { accel_dev 293 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (!adf_dev_started(accel_dev)) accel_dev 296 drivers/crypto/qat/qat_common/adf_ctl_drv.c adf_dev_stop(accel_dev); accel_dev 297 drivers/crypto/qat/qat_common/adf_ctl_drv.c adf_dev_shutdown(accel_dev); accel_dev 340 drivers/crypto/qat/qat_common/adf_ctl_drv.c struct adf_accel_dev *accel_dev; accel_dev 347 drivers/crypto/qat/qat_common/adf_ctl_drv.c accel_dev = adf_devmgr_get_dev_by_id(ctl_data->device_id); accel_dev 348 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (!accel_dev) accel_dev 351 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (!adf_dev_started(accel_dev)) { accel_dev 352 drivers/crypto/qat/qat_common/adf_ctl_drv.c dev_info(&GET_DEV(accel_dev), accel_dev 355 drivers/crypto/qat/qat_common/adf_ctl_drv.c ret = adf_dev_init(accel_dev); accel_dev 357 drivers/crypto/qat/qat_common/adf_ctl_drv.c ret = adf_dev_start(accel_dev); accel_dev 359 drivers/crypto/qat/qat_common/adf_ctl_drv.c dev_info(&GET_DEV(accel_dev), accel_dev 364 drivers/crypto/qat/qat_common/adf_ctl_drv.c dev_err(&GET_DEV(accel_dev), "Failed to start qat_dev%d\n", accel_dev 366 drivers/crypto/qat/qat_common/adf_ctl_drv.c adf_dev_stop(accel_dev); accel_dev 367 drivers/crypto/qat/qat_common/adf_ctl_drv.c adf_dev_shutdown(accel_dev); accel_dev 391 drivers/crypto/qat/qat_common/adf_ctl_drv.c struct adf_accel_dev *accel_dev; accel_dev 399 drivers/crypto/qat/qat_common/adf_ctl_drv.c accel_dev = adf_devmgr_get_dev_by_id(dev_info.accel_id); accel_dev 400 drivers/crypto/qat/qat_common/adf_ctl_drv.c if (!accel_dev) accel_dev 403 drivers/crypto/qat/qat_common/adf_ctl_drv.c hw_data = accel_dev->hw_device; accel_dev 404 drivers/crypto/qat/qat_common/adf_ctl_drv.c dev_info.state = adf_dev_started(accel_dev) ? DEV_UP : DEV_DOWN; accel_dev 413 drivers/crypto/qat/qat_common/adf_ctl_drv.c dev_info.bus = accel_to_pci_dev(accel_dev)->bus->number; accel_dev 414 drivers/crypto/qat/qat_common/adf_ctl_drv.c dev_info.dev = PCI_SLOT(accel_to_pci_dev(accel_dev)->devfn); accel_dev 415 drivers/crypto/qat/qat_common/adf_ctl_drv.c dev_info.fun = PCI_FUNC(accel_to_pci_dev(accel_dev)->devfn); accel_dev 419 drivers/crypto/qat/qat_common/adf_ctl_drv.c dev_err(&GET_DEV(accel_dev), "failed to copy status.\n"); accel_dev 183 drivers/crypto/qat/qat_common/adf_dev_mgr.c int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev, accel_dev 190 drivers/crypto/qat/qat_common/adf_dev_mgr.c dev_err(&GET_DEV(accel_dev), "Only support up to %d devices\n", accel_dev 196 drivers/crypto/qat/qat_common/adf_dev_mgr.c atomic_set(&accel_dev->ref_count, 0); accel_dev 199 drivers/crypto/qat/qat_common/adf_dev_mgr.c if (!accel_dev->is_vf || (accel_dev->is_vf && !pf)) { accel_dev 206 drivers/crypto/qat/qat_common/adf_dev_mgr.c if (ptr == accel_dev) { accel_dev 212 drivers/crypto/qat/qat_common/adf_dev_mgr.c list_add_tail(&accel_dev->list, &accel_table); accel_dev 213 drivers/crypto/qat/qat_common/adf_dev_mgr.c accel_dev->accel_id = adf_find_free_id(); accel_dev 214 drivers/crypto/qat/qat_common/adf_dev_mgr.c if (accel_dev->accel_id > ADF_MAX_DEVICES) { accel_dev 225 drivers/crypto/qat/qat_common/adf_dev_mgr.c map->id = accel_dev->accel_id; accel_dev 229 drivers/crypto/qat/qat_common/adf_dev_mgr.c } else if (accel_dev->is_vf && pf) { accel_dev 233 drivers/crypto/qat/qat_common/adf_dev_mgr.c map = adf_find_vf(adf_get_vf_num(accel_dev)); accel_dev 237 drivers/crypto/qat/qat_common/adf_dev_mgr.c accel_dev->accel_id = map->id; accel_dev 238 drivers/crypto/qat/qat_common/adf_dev_mgr.c list_add_tail(&accel_dev->list, &accel_table); accel_dev 256 drivers/crypto/qat/qat_common/adf_dev_mgr.c accel_dev->accel_id = adf_find_free_id(); accel_dev 257 drivers/crypto/qat/qat_common/adf_dev_mgr.c if (accel_dev->accel_id > ADF_MAX_DEVICES) { accel_dev 263 drivers/crypto/qat/qat_common/adf_dev_mgr.c list_add_tail(&accel_dev->list, &accel_table); accel_dev 264 drivers/crypto/qat/qat_common/adf_dev_mgr.c map->bdf = adf_get_vf_num(accel_dev); accel_dev 265 drivers/crypto/qat/qat_common/adf_dev_mgr.c map->id = accel_dev->accel_id; accel_dev 291 drivers/crypto/qat/qat_common/adf_dev_mgr.c void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev, accel_dev 295 drivers/crypto/qat/qat_common/adf_dev_mgr.c if (!accel_dev->is_vf || (accel_dev->is_vf && !pf)) { accel_dev 296 drivers/crypto/qat/qat_common/adf_dev_mgr.c id_map[accel_dev->accel_id] = 0; accel_dev 298 drivers/crypto/qat/qat_common/adf_dev_mgr.c } else if (accel_dev->is_vf && pf) { accel_dev 301 drivers/crypto/qat/qat_common/adf_dev_mgr.c map = adf_find_vf(adf_get_vf_num(accel_dev)); accel_dev 303 drivers/crypto/qat/qat_common/adf_dev_mgr.c dev_err(&GET_DEV(accel_dev), "Failed to find VF map\n"); accel_dev 315 drivers/crypto/qat/qat_common/adf_dev_mgr.c list_del(&accel_dev->list); accel_dev 423 drivers/crypto/qat/qat_common/adf_dev_mgr.c int adf_dev_in_use(struct adf_accel_dev *accel_dev) accel_dev 425 drivers/crypto/qat/qat_common/adf_dev_mgr.c return atomic_read(&accel_dev->ref_count) != 0; accel_dev 440 drivers/crypto/qat/qat_common/adf_dev_mgr.c int adf_dev_get(struct adf_accel_dev *accel_dev) accel_dev 442 drivers/crypto/qat/qat_common/adf_dev_mgr.c if (atomic_add_return(1, &accel_dev->ref_count) == 1) accel_dev 443 drivers/crypto/qat/qat_common/adf_dev_mgr.c if (!try_module_get(accel_dev->owner)) accel_dev 460 drivers/crypto/qat/qat_common/adf_dev_mgr.c void adf_dev_put(struct adf_accel_dev *accel_dev) accel_dev 462 drivers/crypto/qat/qat_common/adf_dev_mgr.c if (atomic_sub_return(1, &accel_dev->ref_count) == 0) accel_dev 463 drivers/crypto/qat/qat_common/adf_dev_mgr.c module_put(accel_dev->owner); accel_dev 475 drivers/crypto/qat/qat_common/adf_dev_mgr.c int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev) accel_dev 477 drivers/crypto/qat/qat_common/adf_dev_mgr.c return test_bit(ADF_STATUS_RESTARTING, &accel_dev->status); accel_dev 489 drivers/crypto/qat/qat_common/adf_dev_mgr.c int adf_dev_started(struct adf_accel_dev *accel_dev) accel_dev 491 drivers/crypto/qat/qat_common/adf_dev_mgr.c return test_bit(ADF_STATUS_STARTED, &accel_dev->status); accel_dev 79 drivers/crypto/qat/qat_common/adf_hw_arbiter.c int adf_init_arb(struct adf_accel_dev *accel_dev) accel_dev 81 drivers/crypto/qat/qat_common/adf_hw_arbiter.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 82 drivers/crypto/qat/qat_common/adf_hw_arbiter.c void __iomem *csr = accel_dev->transport->banks[0].csr_addr; accel_dev 97 drivers/crypto/qat/qat_common/adf_hw_arbiter.c hw_data->get_arb_mapping(accel_dev, &thd_2_arb_cfg); accel_dev 116 drivers/crypto/qat/qat_common/adf_hw_arbiter.c void adf_exit_arb(struct adf_accel_dev *accel_dev) accel_dev 118 drivers/crypto/qat/qat_common/adf_hw_arbiter.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 122 drivers/crypto/qat/qat_common/adf_hw_arbiter.c if (!accel_dev->transport) accel_dev 125 drivers/crypto/qat/qat_common/adf_hw_arbiter.c csr = accel_dev->transport->banks[0].csr_addr; accel_dev 140 drivers/crypto/qat/qat_common/adf_hw_arbiter.c for (i = 0; i < GET_MAX_BANKS(accel_dev); i++) accel_dev 103 drivers/crypto/qat/qat_common/adf_init.c int adf_dev_init(struct adf_accel_dev *accel_dev) accel_dev 107 drivers/crypto/qat/qat_common/adf_init.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 110 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), accel_dev 115 drivers/crypto/qat/qat_common/adf_init.c if (!test_bit(ADF_STATUS_CONFIGURED, &accel_dev->status)) { accel_dev 116 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), "Device not configured\n"); accel_dev 120 drivers/crypto/qat/qat_common/adf_init.c if (adf_init_etr_data(accel_dev)) { accel_dev 121 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), "Failed initialize etr\n"); accel_dev 125 drivers/crypto/qat/qat_common/adf_init.c if (hw_data->init_admin_comms && hw_data->init_admin_comms(accel_dev)) { accel_dev 126 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), "Failed initialize admin comms\n"); accel_dev 130 drivers/crypto/qat/qat_common/adf_init.c if (hw_data->init_arb && hw_data->init_arb(accel_dev)) { accel_dev 131 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), "Failed initialize hw arbiter\n"); accel_dev 135 drivers/crypto/qat/qat_common/adf_init.c hw_data->enable_ints(accel_dev); accel_dev 137 drivers/crypto/qat/qat_common/adf_init.c if (adf_ae_init(accel_dev)) { accel_dev 138 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), accel_dev 142 drivers/crypto/qat/qat_common/adf_init.c set_bit(ADF_STATUS_AE_INITIALISED, &accel_dev->status); accel_dev 144 drivers/crypto/qat/qat_common/adf_init.c if (adf_ae_fw_load(accel_dev)) { accel_dev 145 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), accel_dev 149 drivers/crypto/qat/qat_common/adf_init.c set_bit(ADF_STATUS_AE_UCODE_LOADED, &accel_dev->status); accel_dev 151 drivers/crypto/qat/qat_common/adf_init.c if (hw_data->alloc_irq(accel_dev)) { accel_dev 152 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), "Failed to allocate interrupts\n"); accel_dev 155 drivers/crypto/qat/qat_common/adf_init.c set_bit(ADF_STATUS_IRQ_ALLOCATED, &accel_dev->status); accel_dev 164 drivers/crypto/qat/qat_common/adf_init.c if (service->event_hld(accel_dev, ADF_EVENT_INIT)) { accel_dev 165 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), accel_dev 170 drivers/crypto/qat/qat_common/adf_init.c set_bit(accel_dev->accel_id, service->init_status); accel_dev 173 drivers/crypto/qat/qat_common/adf_init.c hw_data->enable_error_correction(accel_dev); accel_dev 174 drivers/crypto/qat/qat_common/adf_init.c hw_data->enable_vf2pf_comms(accel_dev); accel_dev 190 drivers/crypto/qat/qat_common/adf_init.c int adf_dev_start(struct adf_accel_dev *accel_dev) accel_dev 192 drivers/crypto/qat/qat_common/adf_init.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 196 drivers/crypto/qat/qat_common/adf_init.c set_bit(ADF_STATUS_STARTING, &accel_dev->status); accel_dev 198 drivers/crypto/qat/qat_common/adf_init.c if (adf_ae_start(accel_dev)) { accel_dev 199 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), "AE Start Failed\n"); accel_dev 202 drivers/crypto/qat/qat_common/adf_init.c set_bit(ADF_STATUS_AE_STARTED, &accel_dev->status); accel_dev 204 drivers/crypto/qat/qat_common/adf_init.c if (hw_data->send_admin_init(accel_dev)) { accel_dev 205 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), "Failed to send init message\n"); accel_dev 211 drivers/crypto/qat/qat_common/adf_init.c if (service->event_hld(accel_dev, ADF_EVENT_START)) { accel_dev 212 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), accel_dev 217 drivers/crypto/qat/qat_common/adf_init.c set_bit(accel_dev->accel_id, service->start_status); accel_dev 220 drivers/crypto/qat/qat_common/adf_init.c clear_bit(ADF_STATUS_STARTING, &accel_dev->status); accel_dev 221 drivers/crypto/qat/qat_common/adf_init.c set_bit(ADF_STATUS_STARTED, &accel_dev->status); accel_dev 223 drivers/crypto/qat/qat_common/adf_init.c if (!list_empty(&accel_dev->crypto_list) && accel_dev 225 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), accel_dev 227 drivers/crypto/qat/qat_common/adf_init.c set_bit(ADF_STATUS_STARTING, &accel_dev->status); accel_dev 228 drivers/crypto/qat/qat_common/adf_init.c clear_bit(ADF_STATUS_STARTED, &accel_dev->status); accel_dev 245 drivers/crypto/qat/qat_common/adf_init.c void adf_dev_stop(struct adf_accel_dev *accel_dev) accel_dev 252 drivers/crypto/qat/qat_common/adf_init.c if (!adf_dev_started(accel_dev) && accel_dev 253 drivers/crypto/qat/qat_common/adf_init.c !test_bit(ADF_STATUS_STARTING, &accel_dev->status)) accel_dev 256 drivers/crypto/qat/qat_common/adf_init.c clear_bit(ADF_STATUS_STARTING, &accel_dev->status); accel_dev 257 drivers/crypto/qat/qat_common/adf_init.c clear_bit(ADF_STATUS_STARTED, &accel_dev->status); accel_dev 259 drivers/crypto/qat/qat_common/adf_init.c if (!list_empty(&accel_dev->crypto_list)) { accel_dev 266 drivers/crypto/qat/qat_common/adf_init.c if (!test_bit(accel_dev->accel_id, service->start_status)) accel_dev 268 drivers/crypto/qat/qat_common/adf_init.c ret = service->event_hld(accel_dev, ADF_EVENT_STOP); accel_dev 270 drivers/crypto/qat/qat_common/adf_init.c clear_bit(accel_dev->accel_id, service->start_status); accel_dev 273 drivers/crypto/qat/qat_common/adf_init.c clear_bit(accel_dev->accel_id, service->start_status); accel_dev 280 drivers/crypto/qat/qat_common/adf_init.c if (test_bit(ADF_STATUS_AE_STARTED, &accel_dev->status)) { accel_dev 281 drivers/crypto/qat/qat_common/adf_init.c if (adf_ae_stop(accel_dev)) accel_dev 282 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), "failed to stop AE\n"); accel_dev 284 drivers/crypto/qat/qat_common/adf_init.c clear_bit(ADF_STATUS_AE_STARTED, &accel_dev->status); accel_dev 296 drivers/crypto/qat/qat_common/adf_init.c void adf_dev_shutdown(struct adf_accel_dev *accel_dev) accel_dev 298 drivers/crypto/qat/qat_common/adf_init.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 303 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), accel_dev 308 drivers/crypto/qat/qat_common/adf_init.c if (test_bit(ADF_STATUS_AE_UCODE_LOADED, &accel_dev->status)) { accel_dev 309 drivers/crypto/qat/qat_common/adf_init.c adf_ae_fw_release(accel_dev); accel_dev 310 drivers/crypto/qat/qat_common/adf_init.c clear_bit(ADF_STATUS_AE_UCODE_LOADED, &accel_dev->status); accel_dev 313 drivers/crypto/qat/qat_common/adf_init.c if (test_bit(ADF_STATUS_AE_INITIALISED, &accel_dev->status)) { accel_dev 314 drivers/crypto/qat/qat_common/adf_init.c if (adf_ae_shutdown(accel_dev)) accel_dev 315 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), accel_dev 319 drivers/crypto/qat/qat_common/adf_init.c &accel_dev->status); accel_dev 324 drivers/crypto/qat/qat_common/adf_init.c if (!test_bit(accel_dev->accel_id, service->init_status)) accel_dev 326 drivers/crypto/qat/qat_common/adf_init.c if (service->event_hld(accel_dev, ADF_EVENT_SHUTDOWN)) accel_dev 327 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), accel_dev 331 drivers/crypto/qat/qat_common/adf_init.c clear_bit(accel_dev->accel_id, service->init_status); accel_dev 334 drivers/crypto/qat/qat_common/adf_init.c hw_data->disable_iov(accel_dev); accel_dev 336 drivers/crypto/qat/qat_common/adf_init.c if (test_bit(ADF_STATUS_IRQ_ALLOCATED, &accel_dev->status)) { accel_dev 337 drivers/crypto/qat/qat_common/adf_init.c hw_data->free_irq(accel_dev); accel_dev 338 drivers/crypto/qat/qat_common/adf_init.c clear_bit(ADF_STATUS_IRQ_ALLOCATED, &accel_dev->status); accel_dev 342 drivers/crypto/qat/qat_common/adf_init.c if (!test_bit(ADF_STATUS_RESTARTING, &accel_dev->status)) accel_dev 343 drivers/crypto/qat/qat_common/adf_init.c adf_cfg_del_all(accel_dev); accel_dev 346 drivers/crypto/qat/qat_common/adf_init.c hw_data->exit_arb(accel_dev); accel_dev 349 drivers/crypto/qat/qat_common/adf_init.c hw_data->exit_admin_comms(accel_dev); accel_dev 351 drivers/crypto/qat/qat_common/adf_init.c adf_cleanup_etr_data(accel_dev); accel_dev 352 drivers/crypto/qat/qat_common/adf_init.c adf_dev_restore(accel_dev); accel_dev 356 drivers/crypto/qat/qat_common/adf_init.c int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev) accel_dev 363 drivers/crypto/qat/qat_common/adf_init.c if (service->event_hld(accel_dev, ADF_EVENT_RESTARTING)) accel_dev 364 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), accel_dev 371 drivers/crypto/qat/qat_common/adf_init.c int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev) accel_dev 378 drivers/crypto/qat/qat_common/adf_init.c if (service->event_hld(accel_dev, ADF_EVENT_RESTARTED)) accel_dev 379 drivers/crypto/qat/qat_common/adf_init.c dev_err(&GET_DEV(accel_dev), accel_dev 62 drivers/crypto/qat/qat_common/adf_isr.c static int adf_enable_msix(struct adf_accel_dev *accel_dev) accel_dev 64 drivers/crypto/qat/qat_common/adf_isr.c struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev; accel_dev 65 drivers/crypto/qat/qat_common/adf_isr.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 69 drivers/crypto/qat/qat_common/adf_isr.c if (!accel_dev->pf.vf_info) { accel_dev 83 drivers/crypto/qat/qat_common/adf_isr.c dev_err(&GET_DEV(accel_dev), "Failed to enable MSI-X IRQ(s)\n"); accel_dev 105 drivers/crypto/qat/qat_common/adf_isr.c struct adf_accel_dev *accel_dev = dev_ptr; accel_dev 109 drivers/crypto/qat/qat_common/adf_isr.c if (accel_dev->pf.vf_info) { accel_dev 110 drivers/crypto/qat/qat_common/adf_isr.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 112 drivers/crypto/qat/qat_common/adf_isr.c &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; accel_dev 128 drivers/crypto/qat/qat_common/adf_isr.c adf_disable_vf2pf_interrupts(accel_dev, vf_mask); accel_dev 137 drivers/crypto/qat/qat_common/adf_isr.c vf_info = accel_dev->pf.vf_info + i; accel_dev 140 drivers/crypto/qat/qat_common/adf_isr.c dev_info(&GET_DEV(accel_dev), accel_dev 157 drivers/crypto/qat/qat_common/adf_isr.c dev_dbg(&GET_DEV(accel_dev), "qat_dev%d spurious AE interrupt\n", accel_dev 158 drivers/crypto/qat/qat_common/adf_isr.c accel_dev->accel_id); accel_dev 163 drivers/crypto/qat/qat_common/adf_isr.c static int adf_request_irqs(struct adf_accel_dev *accel_dev) accel_dev 165 drivers/crypto/qat/qat_common/adf_isr.c struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev; accel_dev 166 drivers/crypto/qat/qat_common/adf_isr.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 168 drivers/crypto/qat/qat_common/adf_isr.c struct adf_etr_data *etr_data = accel_dev->transport; accel_dev 173 drivers/crypto/qat/qat_common/adf_isr.c if (!accel_dev->pf.vf_info) { accel_dev 180 drivers/crypto/qat/qat_common/adf_isr.c "qat%d-bundle%d", accel_dev->accel_id, i); accel_dev 184 drivers/crypto/qat/qat_common/adf_isr.c dev_err(&GET_DEV(accel_dev), accel_dev 190 drivers/crypto/qat/qat_common/adf_isr.c cpu = ((accel_dev->accel_id * hw_data->num_banks) + accel_dev 200 drivers/crypto/qat/qat_common/adf_isr.c "qat%d-ae-cluster", accel_dev->accel_id); accel_dev 201 drivers/crypto/qat/qat_common/adf_isr.c ret = request_irq(msixe[i].vector, adf_msix_isr_ae, 0, name, accel_dev); accel_dev 203 drivers/crypto/qat/qat_common/adf_isr.c dev_err(&GET_DEV(accel_dev), accel_dev 211 drivers/crypto/qat/qat_common/adf_isr.c static void adf_free_irqs(struct adf_accel_dev *accel_dev) accel_dev 213 drivers/crypto/qat/qat_common/adf_isr.c struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev; accel_dev 214 drivers/crypto/qat/qat_common/adf_isr.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 216 drivers/crypto/qat/qat_common/adf_isr.c struct adf_etr_data *etr_data = accel_dev->transport; accel_dev 226 drivers/crypto/qat/qat_common/adf_isr.c free_irq(msixe[i].vector, accel_dev); accel_dev 229 drivers/crypto/qat/qat_common/adf_isr.c static int adf_isr_alloc_msix_entry_table(struct adf_accel_dev *accel_dev) accel_dev 234 drivers/crypto/qat/qat_common/adf_isr.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 238 drivers/crypto/qat/qat_common/adf_isr.c if (!accel_dev->pf.vf_info) accel_dev 242 drivers/crypto/qat/qat_common/adf_isr.c GFP_KERNEL, dev_to_node(&GET_DEV(accel_dev))); accel_dev 256 drivers/crypto/qat/qat_common/adf_isr.c accel_dev->accel_pci_dev.msix_entries.num_entries = msix_num_entries; accel_dev 257 drivers/crypto/qat/qat_common/adf_isr.c accel_dev->accel_pci_dev.msix_entries.entries = entries; accel_dev 258 drivers/crypto/qat/qat_common/adf_isr.c accel_dev->accel_pci_dev.msix_entries.names = names; accel_dev 268 drivers/crypto/qat/qat_common/adf_isr.c static void adf_isr_free_msix_entry_table(struct adf_accel_dev *accel_dev) accel_dev 270 drivers/crypto/qat/qat_common/adf_isr.c char **names = accel_dev->accel_pci_dev.msix_entries.names; accel_dev 273 drivers/crypto/qat/qat_common/adf_isr.c kfree(accel_dev->accel_pci_dev.msix_entries.entries); accel_dev 274 drivers/crypto/qat/qat_common/adf_isr.c for (i = 0; i < accel_dev->accel_pci_dev.msix_entries.num_entries; i++) accel_dev 279 drivers/crypto/qat/qat_common/adf_isr.c static int adf_setup_bh(struct adf_accel_dev *accel_dev) accel_dev 281 drivers/crypto/qat/qat_common/adf_isr.c struct adf_etr_data *priv_data = accel_dev->transport; accel_dev 282 drivers/crypto/qat/qat_common/adf_isr.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 292 drivers/crypto/qat/qat_common/adf_isr.c static void adf_cleanup_bh(struct adf_accel_dev *accel_dev) accel_dev 294 drivers/crypto/qat/qat_common/adf_isr.c struct adf_etr_data *priv_data = accel_dev->transport; accel_dev 295 drivers/crypto/qat/qat_common/adf_isr.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 310 drivers/crypto/qat/qat_common/adf_isr.c void adf_isr_resource_free(struct adf_accel_dev *accel_dev) accel_dev 312 drivers/crypto/qat/qat_common/adf_isr.c adf_free_irqs(accel_dev); accel_dev 313 drivers/crypto/qat/qat_common/adf_isr.c adf_cleanup_bh(accel_dev); accel_dev 314 drivers/crypto/qat/qat_common/adf_isr.c adf_disable_msix(&accel_dev->accel_pci_dev); accel_dev 315 drivers/crypto/qat/qat_common/adf_isr.c adf_isr_free_msix_entry_table(accel_dev); accel_dev 327 drivers/crypto/qat/qat_common/adf_isr.c int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev) accel_dev 331 drivers/crypto/qat/qat_common/adf_isr.c ret = adf_isr_alloc_msix_entry_table(accel_dev); accel_dev 334 drivers/crypto/qat/qat_common/adf_isr.c if (adf_enable_msix(accel_dev)) accel_dev 337 drivers/crypto/qat/qat_common/adf_isr.c if (adf_setup_bh(accel_dev)) accel_dev 340 drivers/crypto/qat/qat_common/adf_isr.c if (adf_request_irqs(accel_dev)) accel_dev 345 drivers/crypto/qat/qat_common/adf_isr.c adf_isr_resource_free(accel_dev); accel_dev 59 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev) accel_dev 61 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev; accel_dev 62 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 69 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev) accel_dev 71 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev; accel_dev 72 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 79 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, accel_dev 82 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 84 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; accel_dev 103 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c void adf_disable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask) accel_dev 105 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 107 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; accel_dev 126 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c static int __adf_iov_putmsg(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr) accel_dev 128 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev; accel_dev 129 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 139 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c if (accel_dev->is_vf) { accel_dev 141 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c lock = &accel_dev->vf.vf2pf_lock; accel_dev 149 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c lock = &accel_dev->pf.vf_info[vf_nr].pf2vf_lock; accel_dev 162 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_dbg(&GET_DEV(accel_dev), accel_dev 178 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_dbg(&GET_DEV(accel_dev), accel_dev 199 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_dbg(&GET_DEV(accel_dev), "ACK not received from remote\n"); accel_dev 221 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c int adf_iov_putmsg(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr) accel_dev 227 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c ret = __adf_iov_putmsg(accel_dev, msg, vf_nr); accel_dev 238 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c struct adf_accel_dev *accel_dev = vf_info->accel_dev; accel_dev 239 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 241 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c struct adf_bar *pmisc = &GET_BARS(accel_dev)[bar_id]; accel_dev 267 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_dbg(&GET_DEV(accel_dev), accel_dev 272 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_err(&GET_DEV(accel_dev), accel_dev 278 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_err(&GET_DEV(accel_dev), accel_dev 284 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_dbg(&GET_DEV(accel_dev), accel_dev 293 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_dbg(&GET_DEV(accel_dev), accel_dev 309 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_dbg(&GET_DEV(accel_dev), accel_dev 317 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_dbg(&GET_DEV(accel_dev), accel_dev 327 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c if (resp && adf_iov_putmsg(accel_dev, resp, vf_nr)) accel_dev 328 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_err(&GET_DEV(accel_dev), "Failed to send response to VF\n"); accel_dev 331 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c adf_enable_vf2pf_interrupts(accel_dev, (1 << vf_nr)); accel_dev 334 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_dbg(&GET_DEV(accel_dev), "Unknown message from VF%d (0x%x);\n", accel_dev 338 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c void adf_pf2vf_notify_restarting(struct adf_accel_dev *accel_dev) accel_dev 343 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c int i, num_vfs = pci_num_vf(accel_to_pci_dev(accel_dev)); accel_dev 345 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c for (i = 0, vf = accel_dev->pf.vf_info; i < num_vfs; i++, vf++) { accel_dev 346 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c if (vf->init && adf_iov_putmsg(accel_dev, msg, i)) accel_dev 347 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_err(&GET_DEV(accel_dev), accel_dev 352 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c static int adf_vf2pf_request_version(struct adf_accel_dev *accel_dev) accel_dev 355 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 365 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c ret = adf_iov_putmsg(accel_dev, msg, 0); accel_dev 367 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_err(&GET_DEV(accel_dev), accel_dev 373 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c if (!wait_for_completion_timeout(&accel_dev->vf.iov_msg_completion, accel_dev 375 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_err(&GET_DEV(accel_dev), accel_dev 381 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c switch (accel_dev->vf.compatible) { accel_dev 386 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c if (accel_dev->vf.pf_version >= hw_data->min_iov_compat_ver) accel_dev 390 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_err(&GET_DEV(accel_dev), accel_dev 392 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c accel_dev->vf.pf_version, accel_dev 396 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c dev_err(&GET_DEV(accel_dev), accel_dev 410 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c int adf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev) accel_dev 412 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c adf_enable_pf2vf_interrupts(accel_dev); accel_dev 413 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c return adf_vf2pf_request_version(accel_dev); accel_dev 110 drivers/crypto/qat/qat_common/adf_sriov.c static int adf_enable_sriov(struct adf_accel_dev *accel_dev) accel_dev 112 drivers/crypto/qat/qat_common/adf_sriov.c struct pci_dev *pdev = accel_to_pci_dev(accel_dev); accel_dev 114 drivers/crypto/qat/qat_common/adf_sriov.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 116 drivers/crypto/qat/qat_common/adf_sriov.c &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; accel_dev 122 drivers/crypto/qat/qat_common/adf_sriov.c for (i = 0, vf_info = accel_dev->pf.vf_info; i < totalvfs; accel_dev 125 drivers/crypto/qat/qat_common/adf_sriov.c vf_info->accel_dev = accel_dev; accel_dev 152 drivers/crypto/qat/qat_common/adf_sriov.c adf_enable_vf2pf_interrupts(accel_dev, GENMASK_ULL(totalvfs - 1, 0)); accel_dev 171 drivers/crypto/qat/qat_common/adf_sriov.c void adf_disable_sriov(struct adf_accel_dev *accel_dev) accel_dev 173 drivers/crypto/qat/qat_common/adf_sriov.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 175 drivers/crypto/qat/qat_common/adf_sriov.c &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; accel_dev 177 drivers/crypto/qat/qat_common/adf_sriov.c int totalvfs = pci_sriov_get_totalvfs(accel_to_pci_dev(accel_dev)); accel_dev 182 drivers/crypto/qat/qat_common/adf_sriov.c if (!accel_dev->pf.vf_info) accel_dev 185 drivers/crypto/qat/qat_common/adf_sriov.c adf_pf2vf_notify_restarting(accel_dev); accel_dev 187 drivers/crypto/qat/qat_common/adf_sriov.c pci_disable_sriov(accel_to_pci_dev(accel_dev)); accel_dev 190 drivers/crypto/qat/qat_common/adf_sriov.c adf_disable_vf2pf_interrupts(accel_dev, 0xFFFFFFFF); accel_dev 206 drivers/crypto/qat/qat_common/adf_sriov.c for (i = 0, vf = accel_dev->pf.vf_info; i < totalvfs; i++, vf++) { accel_dev 212 drivers/crypto/qat/qat_common/adf_sriov.c kfree(accel_dev->pf.vf_info); accel_dev 213 drivers/crypto/qat/qat_common/adf_sriov.c accel_dev->pf.vf_info = NULL; accel_dev 227 drivers/crypto/qat/qat_common/adf_sriov.c struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev); accel_dev 232 drivers/crypto/qat/qat_common/adf_sriov.c if (!accel_dev) { accel_dev 240 drivers/crypto/qat/qat_common/adf_sriov.c if (accel_dev->pf.vf_info) { accel_dev 245 drivers/crypto/qat/qat_common/adf_sriov.c if (adf_dev_started(accel_dev)) { accel_dev 246 drivers/crypto/qat/qat_common/adf_sriov.c if (adf_devmgr_in_reset(accel_dev) || accel_dev 247 drivers/crypto/qat/qat_common/adf_sriov.c adf_dev_in_use(accel_dev)) { accel_dev 248 drivers/crypto/qat/qat_common/adf_sriov.c dev_err(&GET_DEV(accel_dev), "Device busy\n"); accel_dev 252 drivers/crypto/qat/qat_common/adf_sriov.c adf_dev_stop(accel_dev); accel_dev 253 drivers/crypto/qat/qat_common/adf_sriov.c adf_dev_shutdown(accel_dev); accel_dev 256 drivers/crypto/qat/qat_common/adf_sriov.c if (adf_cfg_section_add(accel_dev, ADF_KERNEL_SEC)) accel_dev 259 drivers/crypto/qat/qat_common/adf_sriov.c if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, accel_dev 263 drivers/crypto/qat/qat_common/adf_sriov.c set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status); accel_dev 266 drivers/crypto/qat/qat_common/adf_sriov.c accel_dev->pf.vf_info = kcalloc(totalvfs, accel_dev 269 drivers/crypto/qat/qat_common/adf_sriov.c if (!accel_dev->pf.vf_info) accel_dev 272 drivers/crypto/qat/qat_common/adf_sriov.c if (adf_dev_init(accel_dev)) { accel_dev 273 drivers/crypto/qat/qat_common/adf_sriov.c dev_err(&GET_DEV(accel_dev), "Failed to init qat_dev%d\n", accel_dev 274 drivers/crypto/qat/qat_common/adf_sriov.c accel_dev->accel_id); accel_dev 278 drivers/crypto/qat/qat_common/adf_sriov.c if (adf_dev_start(accel_dev)) { accel_dev 279 drivers/crypto/qat/qat_common/adf_sriov.c dev_err(&GET_DEV(accel_dev), "Failed to start qat_dev%d\n", accel_dev 280 drivers/crypto/qat/qat_common/adf_sriov.c accel_dev->accel_id); accel_dev 284 drivers/crypto/qat/qat_common/adf_sriov.c ret = adf_enable_sriov(accel_dev); accel_dev 181 drivers/crypto/qat/qat_common/adf_transport.c struct adf_accel_dev *accel_dev = bank->accel_dev; accel_dev 182 drivers/crypto/qat/qat_common/adf_transport.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 188 drivers/crypto/qat/qat_common/adf_transport.c ring->base_addr = dma_alloc_coherent(&GET_DEV(accel_dev), accel_dev 197 drivers/crypto/qat/qat_common/adf_transport.c dev_err(&GET_DEV(accel_dev), "Ring address not aligned\n"); accel_dev 198 drivers/crypto/qat/qat_common/adf_transport.c dma_free_coherent(&GET_DEV(accel_dev), ring_size_bytes, accel_dev 224 drivers/crypto/qat/qat_common/adf_transport.c dma_free_coherent(&GET_DEV(ring->bank->accel_dev), accel_dev 230 drivers/crypto/qat/qat_common/adf_transport.c int adf_create_ring(struct adf_accel_dev *accel_dev, const char *section, accel_dev 236 drivers/crypto/qat/qat_common/adf_transport.c struct adf_etr_data *transport_data = accel_dev->transport; accel_dev 243 drivers/crypto/qat/qat_common/adf_transport.c if (bank_num >= GET_MAX_BANKS(accel_dev)) { accel_dev 244 drivers/crypto/qat/qat_common/adf_transport.c dev_err(&GET_DEV(accel_dev), "Invalid bank number\n"); accel_dev 248 drivers/crypto/qat/qat_common/adf_transport.c dev_err(&GET_DEV(accel_dev), "Invalid msg size\n"); accel_dev 253 drivers/crypto/qat/qat_common/adf_transport.c dev_err(&GET_DEV(accel_dev), accel_dev 257 drivers/crypto/qat/qat_common/adf_transport.c if (adf_cfg_get_param_value(accel_dev, section, ring_name, val)) { accel_dev 258 drivers/crypto/qat/qat_common/adf_transport.c dev_err(&GET_DEV(accel_dev), "Section %s, no such entry : %s\n", accel_dev 263 drivers/crypto/qat/qat_common/adf_transport.c dev_err(&GET_DEV(accel_dev), "Can't get ring number\n"); accel_dev 267 drivers/crypto/qat/qat_common/adf_transport.c dev_err(&GET_DEV(accel_dev), "Invalid ring number\n"); accel_dev 273 drivers/crypto/qat/qat_common/adf_transport.c dev_err(&GET_DEV(accel_dev), "Ring %d, %s already exists.\n", accel_dev 294 drivers/crypto/qat/qat_common/adf_transport.c dev_err(&GET_DEV(accel_dev), accel_dev 354 drivers/crypto/qat/qat_common/adf_transport.c static inline int adf_get_cfg_int(struct adf_accel_dev *accel_dev, accel_dev 363 drivers/crypto/qat/qat_common/adf_transport.c if (adf_cfg_get_param_value(accel_dev, section, key_buf, val_buf)) accel_dev 375 drivers/crypto/qat/qat_common/adf_transport.c if (adf_get_cfg_int(bank->accel_dev, section, accel_dev 385 drivers/crypto/qat/qat_common/adf_transport.c static int adf_init_bank(struct adf_accel_dev *accel_dev, accel_dev 389 drivers/crypto/qat/qat_common/adf_transport.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 397 drivers/crypto/qat/qat_common/adf_transport.c bank->accel_dev = accel_dev; accel_dev 403 drivers/crypto/qat/qat_common/adf_transport.c if ((adf_get_cfg_int(accel_dev, "Accelerator0", accel_dev 418 drivers/crypto/qat/qat_common/adf_transport.c dev_to_node(&GET_DEV(accel_dev))); accel_dev 423 drivers/crypto/qat/qat_common/adf_transport.c dev_err(&GET_DEV(accel_dev), accel_dev 432 drivers/crypto/qat/qat_common/adf_transport.c dev_err(&GET_DEV(accel_dev), accel_dev 459 drivers/crypto/qat/qat_common/adf_transport.c int adf_init_etr_data(struct adf_accel_dev *accel_dev) accel_dev 462 drivers/crypto/qat/qat_common/adf_transport.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 469 drivers/crypto/qat/qat_common/adf_transport.c dev_to_node(&GET_DEV(accel_dev))); accel_dev 473 drivers/crypto/qat/qat_common/adf_transport.c num_banks = GET_MAX_BANKS(accel_dev); accel_dev 476 drivers/crypto/qat/qat_common/adf_transport.c dev_to_node(&GET_DEV(accel_dev))); accel_dev 482 drivers/crypto/qat/qat_common/adf_transport.c accel_dev->transport = etr_data; accel_dev 484 drivers/crypto/qat/qat_common/adf_transport.c csr_addr = accel_dev->accel_pci_dev.pci_bars[i].virt_addr; accel_dev 488 drivers/crypto/qat/qat_common/adf_transport.c accel_dev->debugfs_dir); accel_dev 491 drivers/crypto/qat/qat_common/adf_transport.c ret = adf_init_bank(accel_dev, &etr_data->banks[i], i, accel_dev 504 drivers/crypto/qat/qat_common/adf_transport.c accel_dev->transport = NULL; accel_dev 514 drivers/crypto/qat/qat_common/adf_transport.c struct adf_accel_dev *accel_dev = bank->accel_dev; accel_dev 515 drivers/crypto/qat/qat_common/adf_transport.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 528 drivers/crypto/qat/qat_common/adf_transport.c static void adf_cleanup_etr_handles(struct adf_accel_dev *accel_dev) accel_dev 530 drivers/crypto/qat/qat_common/adf_transport.c struct adf_etr_data *etr_data = accel_dev->transport; accel_dev 531 drivers/crypto/qat/qat_common/adf_transport.c uint32_t i, num_banks = GET_MAX_BANKS(accel_dev); accel_dev 547 drivers/crypto/qat/qat_common/adf_transport.c void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev) accel_dev 549 drivers/crypto/qat/qat_common/adf_transport.c struct adf_etr_data *etr_data = accel_dev->transport; accel_dev 552 drivers/crypto/qat/qat_common/adf_transport.c adf_cleanup_etr_handles(accel_dev); accel_dev 556 drivers/crypto/qat/qat_common/adf_transport.c accel_dev->transport = NULL; accel_dev 56 drivers/crypto/qat/qat_common/adf_transport.h int adf_create_ring(struct adf_accel_dev *accel_dev, const char *section, accel_dev 263 drivers/crypto/qat/qat_common/adf_transport_debug.c struct adf_accel_dev *accel_dev = bank->accel_dev; accel_dev 264 drivers/crypto/qat/qat_common/adf_transport_debug.c struct dentry *parent = accel_dev->transport->debug; accel_dev 79 drivers/crypto/qat/qat_common/adf_transport_internal.h struct adf_accel_dev *accel_dev; accel_dev 59 drivers/crypto/qat/qat_common/adf_vf2pf_msg.c int adf_vf2pf_init(struct adf_accel_dev *accel_dev) accel_dev 64 drivers/crypto/qat/qat_common/adf_vf2pf_msg.c if (adf_iov_putmsg(accel_dev, msg, 0)) { accel_dev 65 drivers/crypto/qat/qat_common/adf_vf2pf_msg.c dev_err(&GET_DEV(accel_dev), accel_dev 69 drivers/crypto/qat/qat_common/adf_vf2pf_msg.c set_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); accel_dev 82 drivers/crypto/qat/qat_common/adf_vf2pf_msg.c void adf_vf2pf_shutdown(struct adf_accel_dev *accel_dev) accel_dev 87 drivers/crypto/qat/qat_common/adf_vf2pf_msg.c if (test_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status)) accel_dev 88 drivers/crypto/qat/qat_common/adf_vf2pf_msg.c if (adf_iov_putmsg(accel_dev, msg, 0)) accel_dev 89 drivers/crypto/qat/qat_common/adf_vf2pf_msg.c dev_err(&GET_DEV(accel_dev), accel_dev 71 drivers/crypto/qat/qat_common/adf_vf_isr.c struct adf_accel_dev *accel_dev; accel_dev 75 drivers/crypto/qat/qat_common/adf_vf_isr.c static int adf_enable_msi(struct adf_accel_dev *accel_dev) accel_dev 77 drivers/crypto/qat/qat_common/adf_vf_isr.c struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev; accel_dev 81 drivers/crypto/qat/qat_common/adf_vf_isr.c dev_err(&GET_DEV(accel_dev), accel_dev 86 drivers/crypto/qat/qat_common/adf_vf_isr.c accel_dev->vf.irq_name = kzalloc(ADF_MAX_MSIX_VECTOR_NAME, GFP_KERNEL); accel_dev 87 drivers/crypto/qat/qat_common/adf_vf_isr.c if (!accel_dev->vf.irq_name) accel_dev 93 drivers/crypto/qat/qat_common/adf_vf_isr.c static void adf_disable_msi(struct adf_accel_dev *accel_dev) accel_dev 95 drivers/crypto/qat/qat_common/adf_vf_isr.c struct pci_dev *pdev = accel_to_pci_dev(accel_dev); accel_dev 97 drivers/crypto/qat/qat_common/adf_vf_isr.c kfree(accel_dev->vf.irq_name); accel_dev 105 drivers/crypto/qat/qat_common/adf_vf_isr.c struct adf_accel_dev *accel_dev = stop_data->accel_dev; accel_dev 107 drivers/crypto/qat/qat_common/adf_vf_isr.c adf_dev_stop(accel_dev); accel_dev 108 drivers/crypto/qat/qat_common/adf_vf_isr.c adf_dev_shutdown(accel_dev); accel_dev 111 drivers/crypto/qat/qat_common/adf_vf_isr.c adf_enable_pf2vf_interrupts(accel_dev); accel_dev 117 drivers/crypto/qat/qat_common/adf_vf_isr.c struct adf_accel_dev *accel_dev = data; accel_dev 118 drivers/crypto/qat/qat_common/adf_vf_isr.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 120 drivers/crypto/qat/qat_common/adf_vf_isr.c &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; accel_dev 135 drivers/crypto/qat/qat_common/adf_vf_isr.c dev_dbg(&GET_DEV(accel_dev), accel_dev 138 drivers/crypto/qat/qat_common/adf_vf_isr.c clear_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); accel_dev 142 drivers/crypto/qat/qat_common/adf_vf_isr.c dev_err(&GET_DEV(accel_dev), accel_dev 144 drivers/crypto/qat/qat_common/adf_vf_isr.c accel_dev->accel_id); accel_dev 147 drivers/crypto/qat/qat_common/adf_vf_isr.c stop_data->accel_dev = accel_dev; accel_dev 156 drivers/crypto/qat/qat_common/adf_vf_isr.c dev_dbg(&GET_DEV(accel_dev), accel_dev 158 drivers/crypto/qat/qat_common/adf_vf_isr.c accel_dev->vf.pf_version = accel_dev 161 drivers/crypto/qat/qat_common/adf_vf_isr.c accel_dev->vf.compatible = accel_dev 164 drivers/crypto/qat/qat_common/adf_vf_isr.c complete(&accel_dev->vf.iov_msg_completion); accel_dev 175 drivers/crypto/qat/qat_common/adf_vf_isr.c adf_enable_pf2vf_interrupts(accel_dev); accel_dev 178 drivers/crypto/qat/qat_common/adf_vf_isr.c dev_err(&GET_DEV(accel_dev), accel_dev 183 drivers/crypto/qat/qat_common/adf_vf_isr.c static int adf_setup_pf2vf_bh(struct adf_accel_dev *accel_dev) accel_dev 185 drivers/crypto/qat/qat_common/adf_vf_isr.c tasklet_init(&accel_dev->vf.pf2vf_bh_tasklet, accel_dev 186 drivers/crypto/qat/qat_common/adf_vf_isr.c (void *)adf_pf2vf_bh_handler, (unsigned long)accel_dev); accel_dev 188 drivers/crypto/qat/qat_common/adf_vf_isr.c mutex_init(&accel_dev->vf.vf2pf_lock); accel_dev 192 drivers/crypto/qat/qat_common/adf_vf_isr.c static void adf_cleanup_pf2vf_bh(struct adf_accel_dev *accel_dev) accel_dev 194 drivers/crypto/qat/qat_common/adf_vf_isr.c tasklet_disable(&accel_dev->vf.pf2vf_bh_tasklet); accel_dev 195 drivers/crypto/qat/qat_common/adf_vf_isr.c tasklet_kill(&accel_dev->vf.pf2vf_bh_tasklet); accel_dev 196 drivers/crypto/qat/qat_common/adf_vf_isr.c mutex_destroy(&accel_dev->vf.vf2pf_lock); accel_dev 201 drivers/crypto/qat/qat_common/adf_vf_isr.c struct adf_accel_dev *accel_dev = privdata; accel_dev 202 drivers/crypto/qat/qat_common/adf_vf_isr.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 204 drivers/crypto/qat/qat_common/adf_vf_isr.c &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; accel_dev 214 drivers/crypto/qat/qat_common/adf_vf_isr.c adf_disable_pf2vf_interrupts(accel_dev); accel_dev 217 drivers/crypto/qat/qat_common/adf_vf_isr.c tasklet_hi_schedule(&accel_dev->vf.pf2vf_bh_tasklet); accel_dev 223 drivers/crypto/qat/qat_common/adf_vf_isr.c struct adf_etr_data *etr_data = accel_dev->transport; accel_dev 236 drivers/crypto/qat/qat_common/adf_vf_isr.c static int adf_request_msi_irq(struct adf_accel_dev *accel_dev) accel_dev 238 drivers/crypto/qat/qat_common/adf_vf_isr.c struct pci_dev *pdev = accel_to_pci_dev(accel_dev); accel_dev 242 drivers/crypto/qat/qat_common/adf_vf_isr.c snprintf(accel_dev->vf.irq_name, ADF_MAX_MSIX_VECTOR_NAME, accel_dev 245 drivers/crypto/qat/qat_common/adf_vf_isr.c ret = request_irq(pdev->irq, adf_isr, 0, accel_dev->vf.irq_name, accel_dev 246 drivers/crypto/qat/qat_common/adf_vf_isr.c (void *)accel_dev); accel_dev 248 drivers/crypto/qat/qat_common/adf_vf_isr.c dev_err(&GET_DEV(accel_dev), "failed to enable irq for %s\n", accel_dev 249 drivers/crypto/qat/qat_common/adf_vf_isr.c accel_dev->vf.irq_name); accel_dev 252 drivers/crypto/qat/qat_common/adf_vf_isr.c cpu = accel_dev->accel_id % num_online_cpus(); accel_dev 258 drivers/crypto/qat/qat_common/adf_vf_isr.c static int adf_setup_bh(struct adf_accel_dev *accel_dev) accel_dev 260 drivers/crypto/qat/qat_common/adf_vf_isr.c struct adf_etr_data *priv_data = accel_dev->transport; accel_dev 267 drivers/crypto/qat/qat_common/adf_vf_isr.c static void adf_cleanup_bh(struct adf_accel_dev *accel_dev) accel_dev 269 drivers/crypto/qat/qat_common/adf_vf_isr.c struct adf_etr_data *priv_data = accel_dev->transport; accel_dev 281 drivers/crypto/qat/qat_common/adf_vf_isr.c void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev) accel_dev 283 drivers/crypto/qat/qat_common/adf_vf_isr.c struct pci_dev *pdev = accel_to_pci_dev(accel_dev); accel_dev 286 drivers/crypto/qat/qat_common/adf_vf_isr.c free_irq(pdev->irq, (void *)accel_dev); accel_dev 287 drivers/crypto/qat/qat_common/adf_vf_isr.c adf_cleanup_bh(accel_dev); accel_dev 288 drivers/crypto/qat/qat_common/adf_vf_isr.c adf_cleanup_pf2vf_bh(accel_dev); accel_dev 289 drivers/crypto/qat/qat_common/adf_vf_isr.c adf_disable_msi(accel_dev); accel_dev 301 drivers/crypto/qat/qat_common/adf_vf_isr.c int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev) accel_dev 303 drivers/crypto/qat/qat_common/adf_vf_isr.c if (adf_enable_msi(accel_dev)) accel_dev 306 drivers/crypto/qat/qat_common/adf_vf_isr.c if (adf_setup_pf2vf_bh(accel_dev)) accel_dev 309 drivers/crypto/qat/qat_common/adf_vf_isr.c if (adf_setup_bh(accel_dev)) accel_dev 312 drivers/crypto/qat/qat_common/adf_vf_isr.c if (adf_request_msi_irq(accel_dev)) accel_dev 317 drivers/crypto/qat/qat_common/adf_vf_isr.c adf_vf_isr_resource_free(accel_dev); accel_dev 624 drivers/crypto/qat/qat_common/qat_algs.c dev = &GET_DEV(inst->accel_dev); accel_dev 678 drivers/crypto/qat/qat_common/qat_algs.c struct device *dev = &GET_DEV(inst->accel_dev); accel_dev 712 drivers/crypto/qat/qat_common/qat_algs.c struct device *dev = &GET_DEV(inst->accel_dev); accel_dev 726 drivers/crypto/qat/qat_common/qat_algs.c dev_to_node(&GET_DEV(inst->accel_dev))); accel_dev 760 drivers/crypto/qat/qat_common/qat_algs.c dev_to_node(&GET_DEV(inst->accel_dev))); accel_dev 842 drivers/crypto/qat/qat_common/qat_algs.c struct device *dev = &GET_DEV(ctx->inst->accel_dev); accel_dev 976 drivers/crypto/qat/qat_common/qat_algs.c dev = &GET_DEV(inst->accel_dev); accel_dev 1056 drivers/crypto/qat/qat_common/qat_algs.c struct device *dev = &GET_DEV(ctx->inst->accel_dev); accel_dev 1116 drivers/crypto/qat/qat_common/qat_algs.c struct device *dev = &GET_DEV(ctx->inst->accel_dev); accel_dev 1207 drivers/crypto/qat/qat_common/qat_algs.c dev = &GET_DEV(inst->accel_dev); accel_dev 1239 drivers/crypto/qat/qat_common/qat_algs.c dev = &GET_DEV(inst->accel_dev); accel_dev 189 drivers/crypto/qat/qat_common/qat_asym_algs.c struct device *dev = &GET_DEV(req->ctx.dh->inst->accel_dev); accel_dev 262 drivers/crypto/qat/qat_common/qat_asym_algs.c struct device *dev = &GET_DEV(inst->accel_dev); accel_dev 444 drivers/crypto/qat/qat_common/qat_asym_algs.c struct device *dev = &GET_DEV(inst->accel_dev); accel_dev 492 drivers/crypto/qat/qat_common/qat_asym_algs.c struct device *dev = &GET_DEV(ctx->inst->accel_dev); accel_dev 547 drivers/crypto/qat/qat_common/qat_asym_algs.c struct device *dev = &GET_DEV(ctx->inst->accel_dev); accel_dev 557 drivers/crypto/qat/qat_common/qat_asym_algs.c struct device *dev = &GET_DEV(req->ctx.rsa->inst->accel_dev); accel_dev 691 drivers/crypto/qat/qat_common/qat_asym_algs.c struct device *dev = &GET_DEV(inst->accel_dev); accel_dev 825 drivers/crypto/qat/qat_common/qat_asym_algs.c struct device *dev = &GET_DEV(inst->accel_dev); accel_dev 976 drivers/crypto/qat/qat_common/qat_asym_algs.c struct device *dev = &GET_DEV(inst->accel_dev); accel_dev 1008 drivers/crypto/qat/qat_common/qat_asym_algs.c struct device *dev = &GET_DEV(inst->accel_dev); accel_dev 1033 drivers/crypto/qat/qat_common/qat_asym_algs.c struct device *dev = &GET_DEV(inst->accel_dev); accel_dev 1069 drivers/crypto/qat/qat_common/qat_asym_algs.c struct device *dev = &GET_DEV(inst->accel_dev); accel_dev 1205 drivers/crypto/qat/qat_common/qat_asym_algs.c struct device *dev = &GET_DEV(ctx->inst->accel_dev); accel_dev 1284 drivers/crypto/qat/qat_common/qat_asym_algs.c struct device *dev = &GET_DEV(ctx->inst->accel_dev); accel_dev 65 drivers/crypto/qat/qat_common/qat_crypto.c adf_dev_put(inst->accel_dev); accel_dev 68 drivers/crypto/qat/qat_common/qat_crypto.c static int qat_crypto_free_instances(struct adf_accel_dev *accel_dev) accel_dev 73 drivers/crypto/qat/qat_common/qat_crypto.c list_for_each_entry_safe(inst, tmp, &accel_dev->crypto_list, list) { accel_dev 97 drivers/crypto/qat/qat_common/qat_crypto.c struct adf_accel_dev *accel_dev = NULL, *tmp_dev; accel_dev 110 drivers/crypto/qat/qat_common/qat_crypto.c accel_dev = tmp_dev; accel_dev 116 drivers/crypto/qat/qat_common/qat_crypto.c if (!accel_dev) { accel_dev 122 drivers/crypto/qat/qat_common/qat_crypto.c accel_dev = tmp_dev; accel_dev 128 drivers/crypto/qat/qat_common/qat_crypto.c if (!accel_dev) accel_dev 132 drivers/crypto/qat/qat_common/qat_crypto.c list_for_each_entry(tmp_inst, &accel_dev->crypto_list, list) { accel_dev 142 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_dev_get(accel_dev)) { accel_dev 143 drivers/crypto/qat/qat_common/qat_crypto.c dev_err(&GET_DEV(accel_dev), "Could not increment dev refctr\n"); accel_dev 160 drivers/crypto/qat/qat_common/qat_crypto.c int qat_crypto_dev_config(struct adf_accel_dev *accel_dev) accel_dev 163 drivers/crypto/qat/qat_common/qat_crypto.c int banks = GET_MAX_BANKS(accel_dev); accel_dev 169 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_section_add(accel_dev, ADF_KERNEL_SEC)) accel_dev 171 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_section_add(accel_dev, "Accelerator0")) accel_dev 176 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, accel_dev 182 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, accel_dev 188 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, accel_dev 194 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, accel_dev 200 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, accel_dev 206 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, accel_dev 212 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, accel_dev 218 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, accel_dev 224 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_add_key_value_param(accel_dev, "Accelerator0", accel_dev 230 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, accel_dev 234 drivers/crypto/qat/qat_common/qat_crypto.c set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status); accel_dev 237 drivers/crypto/qat/qat_common/qat_crypto.c dev_err(&GET_DEV(accel_dev), "Failed to start QAT accel dev\n"); accel_dev 242 drivers/crypto/qat/qat_common/qat_crypto.c static int qat_crypto_create_instances(struct adf_accel_dev *accel_dev) accel_dev 252 drivers/crypto/qat/qat_common/qat_crypto.c INIT_LIST_HEAD(&accel_dev->crypto_list); accel_dev 254 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_get_param_value(accel_dev, SEC, key, val)) accel_dev 262 drivers/crypto/qat/qat_common/qat_crypto.c dev_to_node(&GET_DEV(accel_dev))); accel_dev 266 drivers/crypto/qat/qat_common/qat_crypto.c list_add_tail(&inst->list, &accel_dev->crypto_list); accel_dev 269 drivers/crypto/qat/qat_common/qat_crypto.c inst->accel_dev = accel_dev; accel_dev 271 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_get_param_value(accel_dev, SEC, key, val)) accel_dev 277 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_get_param_value(accel_dev, SEC, key, val)) accel_dev 286 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_cfg_get_param_value(accel_dev, SEC, key, val)) accel_dev 295 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_create_ring(accel_dev, SEC, bank, num_msg_sym, accel_dev 301 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_create_ring(accel_dev, SEC, bank, num_msg_asym, accel_dev 307 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_create_ring(accel_dev, SEC, bank, num_msg_sym, accel_dev 313 drivers/crypto/qat/qat_common/qat_crypto.c if (adf_create_ring(accel_dev, SEC, bank, num_msg_asym, accel_dev 320 drivers/crypto/qat/qat_common/qat_crypto.c qat_crypto_free_instances(accel_dev); accel_dev 324 drivers/crypto/qat/qat_common/qat_crypto.c static int qat_crypto_init(struct adf_accel_dev *accel_dev) accel_dev 326 drivers/crypto/qat/qat_common/qat_crypto.c if (qat_crypto_create_instances(accel_dev)) accel_dev 332 drivers/crypto/qat/qat_common/qat_crypto.c static int qat_crypto_shutdown(struct adf_accel_dev *accel_dev) accel_dev 334 drivers/crypto/qat/qat_common/qat_crypto.c return qat_crypto_free_instances(accel_dev); accel_dev 337 drivers/crypto/qat/qat_common/qat_crypto.c static int qat_crypto_event_handler(struct adf_accel_dev *accel_dev, accel_dev 344 drivers/crypto/qat/qat_common/qat_crypto.c ret = qat_crypto_init(accel_dev); accel_dev 347 drivers/crypto/qat/qat_common/qat_crypto.c ret = qat_crypto_shutdown(accel_dev); accel_dev 60 drivers/crypto/qat/qat_common/qat_crypto.h struct adf_accel_dev *accel_dev; accel_dev 691 drivers/crypto/qat/qat_common/qat_hal.c int qat_hal_init(struct adf_accel_dev *accel_dev) accel_dev 696 drivers/crypto/qat/qat_common/qat_hal.c struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev; accel_dev 697 drivers/crypto/qat/qat_common/qat_hal.c struct adf_hw_device_data *hw_data = accel_dev->hw_device; accel_dev 729 drivers/crypto/qat/qat_common/qat_hal.c handle->hal_handle->revision_id = accel_dev->accel_pci_dev.revid; accel_dev 750 drivers/crypto/qat/qat_common/qat_hal.c dev_err(&GET_DEV(accel_dev), "qat_hal_clr_reset error\n"); accel_dev 767 drivers/crypto/qat/qat_common/qat_hal.c accel_dev->fw_loader->fw_loader = handle; accel_dev 145 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c static void adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev, accel_dev 148 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c switch (accel_dev->accel_pci_dev.sku) { accel_dev 158 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c dev_err(&GET_DEV(accel_dev), accel_dev 174 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c static void adf_enable_error_correction(struct adf_accel_dev *accel_dev) accel_dev 176 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c struct adf_hw_device_data *hw_device = accel_dev->hw_device; accel_dev 177 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c struct adf_bar *misc_bar = &GET_BARS(accel_dev)[ADF_DH895XCC_PMISC_BAR]; accel_dev 202 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c static void adf_enable_ints(struct adf_accel_dev *accel_dev) accel_dev 206 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c addr = (&GET_BARS(accel_dev)[ADF_DH895XCC_PMISC_BAR])->virt_addr; accel_dev 210 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c accel_dev->pf.vf_info ? 0 : accel_dev 211 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c GENMASK_ULL(GET_MAX_BANKS(accel_dev) - 1, 0)); accel_dev 216 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c static int adf_pf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev) accel_dev 85 drivers/crypto/qat/qat_dh895xcc/adf_drv.c static void adf_cleanup_pci_dev(struct adf_accel_dev *accel_dev) accel_dev 87 drivers/crypto/qat/qat_dh895xcc/adf_drv.c pci_release_regions(accel_dev->accel_pci_dev.pci_dev); accel_dev 88 drivers/crypto/qat/qat_dh895xcc/adf_drv.c pci_disable_device(accel_dev->accel_pci_dev.pci_dev); accel_dev 91 drivers/crypto/qat/qat_dh895xcc/adf_drv.c static void adf_cleanup_accel(struct adf_accel_dev *accel_dev) accel_dev 93 drivers/crypto/qat/qat_dh895xcc/adf_drv.c struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev; accel_dev 103 drivers/crypto/qat/qat_dh895xcc/adf_drv.c if (accel_dev->hw_device) { accel_dev 106 drivers/crypto/qat/qat_dh895xcc/adf_drv.c adf_clean_hw_data_dh895xcc(accel_dev->hw_device); accel_dev 111 drivers/crypto/qat/qat_dh895xcc/adf_drv.c kfree(accel_dev->hw_device); accel_dev 112 drivers/crypto/qat/qat_dh895xcc/adf_drv.c accel_dev->hw_device = NULL; accel_dev 114 drivers/crypto/qat/qat_dh895xcc/adf_drv.c adf_cfg_dev_remove(accel_dev); accel_dev 115 drivers/crypto/qat/qat_dh895xcc/adf_drv.c debugfs_remove(accel_dev->debugfs_dir); accel_dev 116 drivers/crypto/qat/qat_dh895xcc/adf_drv.c adf_devmgr_rm_dev(accel_dev, NULL); accel_dev 121 drivers/crypto/qat/qat_dh895xcc/adf_drv.c struct adf_accel_dev *accel_dev; accel_dev 145 drivers/crypto/qat/qat_dh895xcc/adf_drv.c accel_dev = kzalloc_node(sizeof(*accel_dev), GFP_KERNEL, accel_dev 147 drivers/crypto/qat/qat_dh895xcc/adf_drv.c if (!accel_dev) accel_dev 150 drivers/crypto/qat/qat_dh895xcc/adf_drv.c INIT_LIST_HEAD(&accel_dev->crypto_list); accel_dev 151 drivers/crypto/qat/qat_dh895xcc/adf_drv.c accel_pci_dev = &accel_dev->accel_pci_dev; accel_dev 156 drivers/crypto/qat/qat_dh895xcc/adf_drv.c if (adf_devmgr_add_dev(accel_dev, NULL)) { accel_dev 158 drivers/crypto/qat/qat_dh895xcc/adf_drv.c kfree(accel_dev); accel_dev 162 drivers/crypto/qat/qat_dh895xcc/adf_drv.c accel_dev->owner = THIS_MODULE; accel_dev 171 drivers/crypto/qat/qat_dh895xcc/adf_drv.c accel_dev->hw_device = hw_data; accel_dev 172 drivers/crypto/qat/qat_dh895xcc/adf_drv.c adf_init_hw_data_dh895xcc(accel_dev->hw_device); accel_dev 195 drivers/crypto/qat/qat_dh895xcc/adf_drv.c accel_dev->debugfs_dir = debugfs_create_dir(name, NULL); accel_dev 198 drivers/crypto/qat/qat_dh895xcc/adf_drv.c ret = adf_cfg_dev_add(accel_dev); accel_dev 252 drivers/crypto/qat/qat_dh895xcc/adf_drv.c if (adf_enable_aer(accel_dev, &adf_driver)) { accel_dev 264 drivers/crypto/qat/qat_dh895xcc/adf_drv.c ret = qat_crypto_dev_config(accel_dev); accel_dev 268 drivers/crypto/qat/qat_dh895xcc/adf_drv.c ret = adf_dev_init(accel_dev); accel_dev 272 drivers/crypto/qat/qat_dh895xcc/adf_drv.c ret = adf_dev_start(accel_dev); accel_dev 279 drivers/crypto/qat/qat_dh895xcc/adf_drv.c adf_dev_stop(accel_dev); accel_dev 281 drivers/crypto/qat/qat_dh895xcc/adf_drv.c adf_dev_shutdown(accel_dev); accel_dev 287 drivers/crypto/qat/qat_dh895xcc/adf_drv.c adf_cleanup_accel(accel_dev); accel_dev 288 drivers/crypto/qat/qat_dh895xcc/adf_drv.c kfree(accel_dev); accel_dev 294 drivers/crypto/qat/qat_dh895xcc/adf_drv.c struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev); accel_dev 296 drivers/crypto/qat/qat_dh895xcc/adf_drv.c if (!accel_dev) { accel_dev 300 drivers/crypto/qat/qat_dh895xcc/adf_drv.c adf_dev_stop(accel_dev); accel_dev 301 drivers/crypto/qat/qat_dh895xcc/adf_drv.c adf_dev_shutdown(accel_dev); accel_dev 302 drivers/crypto/qat/qat_dh895xcc/adf_drv.c adf_disable_aer(accel_dev); accel_dev 303 drivers/crypto/qat/qat_dh895xcc/adf_drv.c adf_cleanup_accel(accel_dev); accel_dev 304 drivers/crypto/qat/qat_dh895xcc/adf_drv.c adf_cleanup_pci_dev(accel_dev); accel_dev 305 drivers/crypto/qat/qat_dh895xcc/adf_drv.c kfree(accel_dev); accel_dev 103 drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c static int adf_vf_int_noop(struct adf_accel_dev *accel_dev) accel_dev 108 drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c static void adf_vf_void_noop(struct adf_accel_dev *accel_dev) accel_dev 84 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c static void adf_cleanup_pci_dev(struct adf_accel_dev *accel_dev) accel_dev 86 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c pci_release_regions(accel_dev->accel_pci_dev.pci_dev); accel_dev 87 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c pci_disable_device(accel_dev->accel_pci_dev.pci_dev); accel_dev 90 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c static void adf_cleanup_accel(struct adf_accel_dev *accel_dev) accel_dev 92 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev; accel_dev 103 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c if (accel_dev->hw_device) { accel_dev 106 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c adf_clean_hw_data_dh895xcciov(accel_dev->hw_device); accel_dev 111 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c kfree(accel_dev->hw_device); accel_dev 112 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c accel_dev->hw_device = NULL; accel_dev 114 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c adf_cfg_dev_remove(accel_dev); accel_dev 115 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c debugfs_remove(accel_dev->debugfs_dir); accel_dev 117 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c adf_devmgr_rm_dev(accel_dev, pf); accel_dev 122 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c struct adf_accel_dev *accel_dev; accel_dev 139 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c accel_dev = kzalloc_node(sizeof(*accel_dev), GFP_KERNEL, accel_dev 141 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c if (!accel_dev) accel_dev 144 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c accel_dev->is_vf = true; accel_dev 146 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c accel_pci_dev = &accel_dev->accel_pci_dev; accel_dev 150 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c if (adf_devmgr_add_dev(accel_dev, pf)) { accel_dev 152 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c kfree(accel_dev); accel_dev 155 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c INIT_LIST_HEAD(&accel_dev->crypto_list); accel_dev 157 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c accel_dev->owner = THIS_MODULE; accel_dev 165 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c accel_dev->hw_device = hw_data; accel_dev 166 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c adf_init_hw_data_dh895xcciov(accel_dev->hw_device); accel_dev 179 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c accel_dev->debugfs_dir = debugfs_create_dir(name, NULL); accel_dev 182 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c ret = adf_cfg_dev_add(accel_dev); accel_dev 230 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c init_completion(&accel_dev->vf.iov_msg_completion); accel_dev 232 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c ret = qat_crypto_dev_config(accel_dev); accel_dev 236 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c set_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); accel_dev 238 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c ret = adf_dev_init(accel_dev); accel_dev 242 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c ret = adf_dev_start(accel_dev); accel_dev 249 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c adf_dev_stop(accel_dev); accel_dev 251 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c adf_dev_shutdown(accel_dev); accel_dev 257 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c adf_cleanup_accel(accel_dev); accel_dev 258 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c kfree(accel_dev); accel_dev 264 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev); accel_dev 266 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c if (!accel_dev) { accel_dev 270 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c adf_dev_stop(accel_dev); accel_dev 271 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c adf_dev_shutdown(accel_dev); accel_dev 272 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c adf_cleanup_accel(accel_dev); accel_dev 273 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c adf_cleanup_pci_dev(accel_dev); accel_dev 274 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c kfree(accel_dev);