abpr 132 arch/arm64/kvm/vgic-sys-reg-v3.c vmcr.abpr = (p->regval & ICC_BPR1_EL1_MASK) >> abpr 136 arch/arm64/kvm/vgic-sys-reg-v3.c p->regval = (vmcr.abpr << ICC_BPR1_EL1_SHIFT) & abpr 297 virt/kvm/arm/vgic/vgic-mmio-v2.c val = vmcr.abpr; abpr 344 virt/kvm/arm/vgic/vgic-mmio-v2.c vmcr.abpr = val; abpr 237 virt/kvm/arm/vgic/vgic-v2.c vmcr |= (vmcrp->abpr << GICH_VMCR_ALIAS_BINPOINT_SHIFT) & abpr 267 virt/kvm/arm/vgic/vgic-v2.c vmcrp->abpr = (vmcr & GICH_VMCR_ALIAS_BINPOINT_MASK) >> abpr 226 virt/kvm/arm/vgic/vgic-v3.c vmcr |= (vmcrp->abpr << ICH_VMCR_BPR1_SHIFT) & ICH_VMCR_BPR1_MASK; abpr 259 virt/kvm/arm/vgic/vgic-v3.c vmcrp->abpr = (vmcr & ICH_VMCR_BPR1_MASK) >> ICH_VMCR_BPR1_SHIFT; abpr 144 virt/kvm/arm/vgic/vgic.h u32 abpr;