_shift 12 arch/mips/include/asm/mach-ralink/pinmux.h #define GRP(_name, _func, _mask, _shift) \ _shift 13 arch/mips/include/asm/mach-ralink/pinmux.h { .name = _name, .mask = _mask, .shift = _shift, \ _shift 17 arch/mips/include/asm/mach-ralink/pinmux.h #define GRP_G(_name, _func, _mask, _gpio, _shift) \ _shift 18 arch/mips/include/asm/mach-ralink/pinmux.h { .name = _name, .mask = _mask, .shift = _shift, \ _shift 185 drivers/bcma/sprom.c #define SPEX(_field, _offset, _mask, _shift) \ _shift 186 drivers/bcma/sprom.c bus->sprom._field = ((sprom[SPOFF(_offset)] & (_mask)) >> (_shift)) _shift 188 drivers/bcma/sprom.c #define SPEX32(_field, _offset, _mask, _shift) \ _shift 190 drivers/bcma/sprom.c sprom[SPOFF(_offset)]) & (_mask)) >> (_shift)) _shift 192 drivers/bcma/sprom.c #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ _shift 194 drivers/bcma/sprom.c SPEX(_field[0], _offset + 0, _mask, _shift); \ _shift 195 drivers/bcma/sprom.c SPEX(_field[1], _offset + 2, _mask, _shift); \ _shift 196 drivers/bcma/sprom.c SPEX(_field[2], _offset + 4, _mask, _shift); \ _shift 197 drivers/bcma/sprom.c SPEX(_field[3], _offset + 6, _mask, _shift); \ _shift 198 drivers/bcma/sprom.c SPEX(_field[4], _offset + 8, _mask, _shift); \ _shift 199 drivers/bcma/sprom.c SPEX(_field[5], _offset + 10, _mask, _shift); \ _shift 200 drivers/bcma/sprom.c SPEX(_field[6], _offset + 12, _mask, _shift); \ _shift 201 drivers/bcma/sprom.c SPEX(_field[7], _offset + 14, _mask, _shift); \ _shift 29 drivers/clk/actions/owl-divider.h #define OWL_DIVIDER_HW(_reg, _shift, _width, _div_flags, _table) \ _shift 32 drivers/clk/actions/owl-divider.h .shift = _shift, \ _shift 39 drivers/clk/actions/owl-divider.h _shift, _width, _table, _div_flags, _flags) \ _shift 41 drivers/clk/actions/owl-divider.h .div_hw = OWL_DIVIDER_HW(_reg, _shift, _width, \ _shift 35 drivers/clk/actions/owl-factor.h #define OWL_FACTOR_HW(_reg, _shift, _width, _fct_flags, _table) \ _shift 38 drivers/clk/actions/owl-factor.h .shift = _shift, \ _shift 45 drivers/clk/actions/owl-factor.h _shift, _width, _table, _fct_flags, _flags) \ _shift 47 drivers/clk/actions/owl-factor.h .factor_hw = OWL_FACTOR_HW(_reg, _shift, \ _shift 27 drivers/clk/actions/owl-mux.h #define OWL_MUX_HW(_reg, _shift, _width) \ _shift 30 drivers/clk/actions/owl-mux.h .shift = _shift, \ _shift 35 drivers/clk/actions/owl-mux.h _shift, _width, _flags) \ _shift 37 drivers/clk/actions/owl-mux.h .mux_hw = OWL_MUX_HW(_reg, _shift, _width), \ _shift 41 drivers/clk/actions/owl-pll.h #define OWL_PLL_HW(_reg, _bfreq, _bit_idx, _shift, \ _shift 47 drivers/clk/actions/owl-pll.h .shift = _shift, \ _shift 56 drivers/clk/actions/owl-pll.h _shift, _width, _min_mul, _max_mul, _table, _flags) \ _shift 58 drivers/clk/actions/owl-pll.h .pll_hw = OWL_PLL_HW(_reg, _bfreq, _bit_idx, _shift, \ _shift 71 drivers/clk/actions/owl-pll.h _shift, _width, _min_mul, _max_mul, _table, _flags) \ _shift 73 drivers/clk/actions/owl-pll.h .pll_hw = OWL_PLL_HW(_reg, _bfreq, _bit_idx, _shift, \ _shift 85 drivers/clk/actions/owl-pll.h _shift, _width, _min_mul, _max_mul, _delay, _table, \ _shift 88 drivers/clk/actions/owl-pll.h .pll_hw = OWL_PLL_HW(_reg, _bfreq, _bit_idx, _shift, \ _shift 299 drivers/clk/bcm/clk-kona.h #define DIVIDER(_offset, _shift, _width) \ _shift 302 drivers/clk/bcm/clk-kona.h .u.s.shift = (_shift), \ _shift 309 drivers/clk/bcm/clk-kona.h #define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \ _shift 312 drivers/clk/bcm/clk-kona.h .u.s.shift = (_shift), \ _shift 350 drivers/clk/bcm/clk-kona.h #define SELECTOR(_offset, _shift, _width) \ _shift 353 drivers/clk/bcm/clk-kona.h .shift = (_shift), \ _shift 1119 drivers/clk/clk-stm32mp1.c #define DIV_TABLE(_id, _name, _parent, _flags, _offset, _shift, _width,\ _shift 1128 drivers/clk/clk-stm32mp1.c .shift = _shift,\ _shift 1136 drivers/clk/clk-stm32mp1.c #define DIV(_id, _name, _parent, _flags, _offset, _shift, _width, _div_flags)\ _shift 1137 drivers/clk/clk-stm32mp1.c DIV_TABLE(_id, _name, _parent, _flags, _offset, _shift, _width,\ _shift 1140 drivers/clk/clk-stm32mp1.c #define MUX(_id, _name, _parents, _flags, _offset, _shift, _width, _mux_flags)\ _shift 1149 drivers/clk/clk-stm32mp1.c .shift = _shift,\ _shift 1246 drivers/clk/clk-stm32mp1.c #define _STM32_MUX(_offset, _shift, _width, _mux_flags, _mmux, _ops)\ _shift 1250 drivers/clk/clk-stm32mp1.c .shift = _shift,\ _shift 1259 drivers/clk/clk-stm32mp1.c #define _MUX(_offset, _shift, _width, _mux_flags)\ _shift 1260 drivers/clk/clk-stm32mp1.c _STM32_MUX(_offset, _shift, _width, _mux_flags, NULL, NULL)\ _shift 1597 drivers/clk/clk-stm32mp1.c #define _K_MUX(_id, _offset, _shift, _width, _mux_flags, _mmux, _ops)\ _shift 1601 drivers/clk/clk-stm32mp1.c .shift = _shift,\ _shift 1610 drivers/clk/clk-stm32mp1.c #define K_MUX(_id, _offset, _shift, _width, _mux_flags)\ _shift 1611 drivers/clk/clk-stm32mp1.c _K_MUX(_id, _offset, _shift, _width, _mux_flags,\ _shift 1614 drivers/clk/clk-stm32mp1.c #define K_MMUX(_id, _offset, _shift, _width, _mux_flags)\ _shift 1615 drivers/clk/clk-stm32mp1.c _K_MUX(_id, _offset, _shift, _width, _mux_flags,\ _shift 46 drivers/clk/mediatek/clk-gate.h #define GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift, \ _shift 52 drivers/clk/mediatek/clk-gate.h .shift = _shift, \ _shift 57 drivers/clk/mediatek/clk-gate.h #define GATE_MTK(_id, _name, _parent, _regs, _shift, _ops) \ _shift 58 drivers/clk/mediatek/clk-gate.h GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift, _ops, 0) _shift 18 drivers/clk/mediatek/clk-mt2701-aud.c #define GATE_AUDIO0(_id, _name, _parent, _shift) { \ _shift 23 drivers/clk/mediatek/clk-mt2701-aud.c .shift = _shift, \ _shift 27 drivers/clk/mediatek/clk-mt2701-aud.c #define GATE_AUDIO1(_id, _name, _parent, _shift) { \ _shift 32 drivers/clk/mediatek/clk-mt2701-aud.c .shift = _shift, \ _shift 36 drivers/clk/mediatek/clk-mt2701-aud.c #define GATE_AUDIO2(_id, _name, _parent, _shift) { \ _shift 41 drivers/clk/mediatek/clk-mt2701-aud.c .shift = _shift, \ _shift 45 drivers/clk/mediatek/clk-mt2701-aud.c #define GATE_AUDIO3(_id, _name, _parent, _shift) { \ _shift 50 drivers/clk/mediatek/clk-mt2701-aud.c .shift = _shift, \ _shift 27 drivers/clk/mediatek/clk-mt2701-bdp.c #define GATE_BDP0(_id, _name, _parent, _shift) { \ _shift 32 drivers/clk/mediatek/clk-mt2701-bdp.c .shift = _shift, \ _shift 36 drivers/clk/mediatek/clk-mt2701-bdp.c #define GATE_BDP1(_id, _name, _parent, _shift) { \ _shift 41 drivers/clk/mediatek/clk-mt2701-bdp.c .shift = _shift, \ _shift 19 drivers/clk/mediatek/clk-mt2701-eth.c #define GATE_ETH(_id, _name, _parent, _shift) { \ _shift 24 drivers/clk/mediatek/clk-mt2701-eth.c .shift = _shift, \ _shift 19 drivers/clk/mediatek/clk-mt2701-g3d.c #define GATE_G3D(_id, _name, _parent, _shift) { \ _shift 24 drivers/clk/mediatek/clk-mt2701-g3d.c .shift = _shift, \ _shift 19 drivers/clk/mediatek/clk-mt2701-hif.c #define GATE_HIF(_id, _name, _parent, _shift) { \ _shift 24 drivers/clk/mediatek/clk-mt2701-hif.c .shift = _shift, \ _shift 21 drivers/clk/mediatek/clk-mt2701-img.c #define GATE_IMG(_id, _name, _parent, _shift) { \ _shift 26 drivers/clk/mediatek/clk-mt2701-img.c .shift = _shift, \ _shift 27 drivers/clk/mediatek/clk-mt2701-mm.c #define GATE_DISP0(_id, _name, _parent, _shift) { \ _shift 32 drivers/clk/mediatek/clk-mt2701-mm.c .shift = _shift, \ _shift 36 drivers/clk/mediatek/clk-mt2701-mm.c #define GATE_DISP1(_id, _name, _parent, _shift) { \ _shift 41 drivers/clk/mediatek/clk-mt2701-mm.c .shift = _shift, \ _shift 27 drivers/clk/mediatek/clk-mt2701-vdec.c #define GATE_VDEC0(_id, _name, _parent, _shift) { \ _shift 32 drivers/clk/mediatek/clk-mt2701-vdec.c .shift = _shift, \ _shift 36 drivers/clk/mediatek/clk-mt2701-vdec.c #define GATE_VDEC1(_id, _name, _parent, _shift) { \ _shift 41 drivers/clk/mediatek/clk-mt2701-vdec.c .shift = _shift, \ _shift 638 drivers/clk/mediatek/clk-mt2701.c #define GATE_TOP_AUD(_id, _name, _parent, _shift) { \ _shift 643 drivers/clk/mediatek/clk-mt2701.c .shift = _shift, \ _shift 703 drivers/clk/mediatek/clk-mt2701.c #define GATE_ICG(_id, _name, _parent, _shift) { \ _shift 708 drivers/clk/mediatek/clk-mt2701.c .shift = _shift, \ _shift 804 drivers/clk/mediatek/clk-mt2701.c #define GATE_PERI0(_id, _name, _parent, _shift) { \ _shift 809 drivers/clk/mediatek/clk-mt2701.c .shift = _shift, \ _shift 813 drivers/clk/mediatek/clk-mt2701.c #define GATE_PERI1(_id, _name, _parent, _shift) { \ _shift 818 drivers/clk/mediatek/clk-mt2701.c .shift = _shift, \ _shift 21 drivers/clk/mediatek/clk-mt2712-bdp.c #define GATE_BDP(_id, _name, _parent, _shift) { \ _shift 26 drivers/clk/mediatek/clk-mt2712-bdp.c .shift = _shift, \ _shift 21 drivers/clk/mediatek/clk-mt2712-img.c #define GATE_IMG(_id, _name, _parent, _shift) { \ _shift 26 drivers/clk/mediatek/clk-mt2712-img.c .shift = _shift, \ _shift 21 drivers/clk/mediatek/clk-mt2712-jpgdec.c #define GATE_JPGDEC(_id, _name, _parent, _shift) { \ _shift 26 drivers/clk/mediatek/clk-mt2712-jpgdec.c .shift = _shift, \ _shift 21 drivers/clk/mediatek/clk-mt2712-mfg.c #define GATE_MFG(_id, _name, _parent, _shift) { \ _shift 26 drivers/clk/mediatek/clk-mt2712-mfg.c .shift = _shift, \ _shift 33 drivers/clk/mediatek/clk-mt2712-mm.c #define GATE_MM0(_id, _name, _parent, _shift) { \ _shift 38 drivers/clk/mediatek/clk-mt2712-mm.c .shift = _shift, \ _shift 42 drivers/clk/mediatek/clk-mt2712-mm.c #define GATE_MM1(_id, _name, _parent, _shift) { \ _shift 47 drivers/clk/mediatek/clk-mt2712-mm.c .shift = _shift, \ _shift 51 drivers/clk/mediatek/clk-mt2712-mm.c #define GATE_MM2(_id, _name, _parent, _shift) { \ _shift 56 drivers/clk/mediatek/clk-mt2712-mm.c .shift = _shift, \ _shift 27 drivers/clk/mediatek/clk-mt2712-vdec.c #define GATE_VDEC0(_id, _name, _parent, _shift) { \ _shift 32 drivers/clk/mediatek/clk-mt2712-vdec.c .shift = _shift, \ _shift 36 drivers/clk/mediatek/clk-mt2712-vdec.c #define GATE_VDEC1(_id, _name, _parent, _shift) { \ _shift 41 drivers/clk/mediatek/clk-mt2712-vdec.c .shift = _shift, \ _shift 21 drivers/clk/mediatek/clk-mt2712-venc.c #define GATE_VENC(_id, _name, _parent, _shift) { \ _shift 26 drivers/clk/mediatek/clk-mt2712-venc.c .shift = _shift, \ _shift 960 drivers/clk/mediatek/clk-mt2712.c #define GATE_TOP0(_id, _name, _parent, _shift) { \ _shift 965 drivers/clk/mediatek/clk-mt2712.c .shift = _shift, \ _shift 969 drivers/clk/mediatek/clk-mt2712.c #define GATE_TOP1(_id, _name, _parent, _shift) { \ _shift 974 drivers/clk/mediatek/clk-mt2712.c .shift = _shift, \ _shift 1000 drivers/clk/mediatek/clk-mt2712.c #define GATE_INFRA(_id, _name, _parent, _shift) { \ _shift 1005 drivers/clk/mediatek/clk-mt2712.c .shift = _shift, \ _shift 1037 drivers/clk/mediatek/clk-mt2712.c #define GATE_PERI0(_id, _name, _parent, _shift) { \ _shift 1042 drivers/clk/mediatek/clk-mt2712.c .shift = _shift, \ _shift 1046 drivers/clk/mediatek/clk-mt2712.c #define GATE_PERI1(_id, _name, _parent, _shift) { \ _shift 1051 drivers/clk/mediatek/clk-mt2712.c .shift = _shift, \ _shift 1055 drivers/clk/mediatek/clk-mt2712.c #define GATE_PERI2(_id, _name, _parent, _shift) { \ _shift 1060 drivers/clk/mediatek/clk-mt2712.c .shift = _shift, \ _shift 30 drivers/clk/mediatek/clk-mt6779-aud.c #define GATE_AUDIO0(_id, _name, _parent, _shift) \ _shift 31 drivers/clk/mediatek/clk-mt6779-aud.c GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift, \ _shift 33 drivers/clk/mediatek/clk-mt6779-aud.c #define GATE_AUDIO1(_id, _name, _parent, _shift) \ _shift 34 drivers/clk/mediatek/clk-mt6779-aud.c GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift, \ _shift 20 drivers/clk/mediatek/clk-mt6779-cam.c #define GATE_CAM(_id, _name, _parent, _shift) \ _shift 21 drivers/clk/mediatek/clk-mt6779-cam.c GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, \ _shift 20 drivers/clk/mediatek/clk-mt6779-img.c #define GATE_IMG(_id, _name, _parent, _shift) \ _shift 21 drivers/clk/mediatek/clk-mt6779-img.c GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, \ _shift 20 drivers/clk/mediatek/clk-mt6779-ipe.c #define GATE_IPE(_id, _name, _parent, _shift) \ _shift 21 drivers/clk/mediatek/clk-mt6779-ipe.c GATE_MTK(_id, _name, _parent, &ipe_cg_regs, _shift, \ _shift 21 drivers/clk/mediatek/clk-mt6779-mfg.c #define GATE_MFG(_id, _name, _parent, _shift) \ _shift 22 drivers/clk/mediatek/clk-mt6779-mfg.c GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, \ _shift 26 drivers/clk/mediatek/clk-mt6779-mm.c #define GATE_MM0(_id, _name, _parent, _shift) \ _shift 27 drivers/clk/mediatek/clk-mt6779-mm.c GATE_MTK(_id, _name, _parent, &mm0_cg_regs, _shift, \ _shift 29 drivers/clk/mediatek/clk-mt6779-mm.c #define GATE_MM1(_id, _name, _parent, _shift) \ _shift 30 drivers/clk/mediatek/clk-mt6779-mm.c GATE_MTK(_id, _name, _parent, &mm1_cg_regs, _shift, \ _shift 27 drivers/clk/mediatek/clk-mt6779-vdec.c #define GATE_VDEC0_I(_id, _name, _parent, _shift) \ _shift 28 drivers/clk/mediatek/clk-mt6779-vdec.c GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, \ _shift 30 drivers/clk/mediatek/clk-mt6779-vdec.c #define GATE_VDEC1_I(_id, _name, _parent, _shift) \ _shift 31 drivers/clk/mediatek/clk-mt6779-vdec.c GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, \ _shift 21 drivers/clk/mediatek/clk-mt6779-venc.c #define GATE_VENC_I(_id, _name, _parent, _shift) \ _shift 22 drivers/clk/mediatek/clk-mt6779-venc.c GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, \ _shift 867 drivers/clk/mediatek/clk-mt6779.c #define GATE_INFRA0(_id, _name, _parent, _shift) \ _shift 868 drivers/clk/mediatek/clk-mt6779.c GATE_MTK(_id, _name, _parent, &infra0_cg_regs, _shift, \ _shift 870 drivers/clk/mediatek/clk-mt6779.c #define GATE_INFRA1(_id, _name, _parent, _shift) \ _shift 871 drivers/clk/mediatek/clk-mt6779.c GATE_MTK(_id, _name, _parent, &infra1_cg_regs, _shift, \ _shift 873 drivers/clk/mediatek/clk-mt6779.c #define GATE_INFRA2(_id, _name, _parent, _shift) \ _shift 874 drivers/clk/mediatek/clk-mt6779.c GATE_MTK(_id, _name, _parent, &infra2_cg_regs, _shift, \ _shift 876 drivers/clk/mediatek/clk-mt6779.c #define GATE_INFRA3(_id, _name, _parent, _shift) \ _shift 877 drivers/clk/mediatek/clk-mt6779.c GATE_MTK(_id, _name, _parent, &infra3_cg_regs, _shift, \ _shift 1103 drivers/clk/mediatek/clk-mt6779.c #define GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, _flags) \ _shift 1105 drivers/clk/mediatek/clk-mt6779.c _shift, &mtk_clk_gate_ops_no_setclr_inv, _flags) _shift 1107 drivers/clk/mediatek/clk-mt6779.c #define GATE_APMIXED(_id, _name, _parent, _shift) \ _shift 1108 drivers/clk/mediatek/clk-mt6779.c GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, 0) _shift 19 drivers/clk/mediatek/clk-mt6797-img.c #define GATE_IMG(_id, _name, _parent, _shift) { \ _shift 24 drivers/clk/mediatek/clk-mt6797-img.c .shift = _shift, \ _shift 26 drivers/clk/mediatek/clk-mt6797-mm.c #define GATE_MM0(_id, _name, _parent, _shift) { \ _shift 31 drivers/clk/mediatek/clk-mt6797-mm.c .shift = _shift, \ _shift 35 drivers/clk/mediatek/clk-mt6797-mm.c #define GATE_MM1(_id, _name, _parent, _shift) { \ _shift 40 drivers/clk/mediatek/clk-mt6797-mm.c .shift = _shift, \ _shift 27 drivers/clk/mediatek/clk-mt6797-vdec.c #define GATE_VDEC0(_id, _name, _parent, _shift) { \ _shift 32 drivers/clk/mediatek/clk-mt6797-vdec.c .shift = _shift, \ _shift 36 drivers/clk/mediatek/clk-mt6797-vdec.c #define GATE_VDEC1(_id, _name, _parent, _shift) { \ _shift 41 drivers/clk/mediatek/clk-mt6797-vdec.c .shift = _shift, \ _shift 21 drivers/clk/mediatek/clk-mt6797-venc.c #define GATE_VENC(_id, _name, _parent, _shift) { \ _shift 26 drivers/clk/mediatek/clk-mt6797-venc.c .shift = _shift, \ _shift 423 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG0(_id, _name, _parent, _shift) { \ _shift 428 drivers/clk/mediatek/clk-mt6797.c .shift = _shift, \ _shift 432 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG1(_id, _name, _parent, _shift) \ _shift 433 drivers/clk/mediatek/clk-mt6797.c GATE_ICG1_FLAGS(_id, _name, _parent, _shift, 0) _shift 435 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG1_FLAGS(_id, _name, _parent, _shift, _flags) { \ _shift 440 drivers/clk/mediatek/clk-mt6797.c .shift = _shift, \ _shift 445 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG2(_id, _name, _parent, _shift) \ _shift 446 drivers/clk/mediatek/clk-mt6797.c GATE_ICG2_FLAGS(_id, _name, _parent, _shift, 0) _shift 448 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG2_FLAGS(_id, _name, _parent, _shift, _flags) { \ _shift 453 drivers/clk/mediatek/clk-mt6797.c .shift = _shift, \ _shift 19 drivers/clk/mediatek/clk-mt7622-aud.c #define GATE_AUDIO0(_id, _name, _parent, _shift) { \ _shift 24 drivers/clk/mediatek/clk-mt7622-aud.c .shift = _shift, \ _shift 28 drivers/clk/mediatek/clk-mt7622-aud.c #define GATE_AUDIO1(_id, _name, _parent, _shift) { \ _shift 33 drivers/clk/mediatek/clk-mt7622-aud.c .shift = _shift, \ _shift 37 drivers/clk/mediatek/clk-mt7622-aud.c #define GATE_AUDIO2(_id, _name, _parent, _shift) { \ _shift 42 drivers/clk/mediatek/clk-mt7622-aud.c .shift = _shift, \ _shift 46 drivers/clk/mediatek/clk-mt7622-aud.c #define GATE_AUDIO3(_id, _name, _parent, _shift) { \ _shift 51 drivers/clk/mediatek/clk-mt7622-aud.c .shift = _shift, \ _shift 19 drivers/clk/mediatek/clk-mt7622-eth.c #define GATE_ETH(_id, _name, _parent, _shift) { \ _shift 24 drivers/clk/mediatek/clk-mt7622-eth.c .shift = _shift, \ _shift 48 drivers/clk/mediatek/clk-mt7622-eth.c #define GATE_SGMII(_id, _name, _parent, _shift) { \ _shift 53 drivers/clk/mediatek/clk-mt7622-eth.c .shift = _shift, \ _shift 19 drivers/clk/mediatek/clk-mt7622-hif.c #define GATE_PCIE(_id, _name, _parent, _shift) { \ _shift 24 drivers/clk/mediatek/clk-mt7622-hif.c .shift = _shift, \ _shift 28 drivers/clk/mediatek/clk-mt7622-hif.c #define GATE_SSUSB(_id, _name, _parent, _shift) { \ _shift 33 drivers/clk/mediatek/clk-mt7622-hif.c .shift = _shift, \ _shift 52 drivers/clk/mediatek/clk-mt7622.c #define GATE_APMIXED(_id, _name, _parent, _shift) { \ _shift 57 drivers/clk/mediatek/clk-mt7622.c .shift = _shift, \ _shift 61 drivers/clk/mediatek/clk-mt7622.c #define GATE_INFRA(_id, _name, _parent, _shift) { \ _shift 66 drivers/clk/mediatek/clk-mt7622.c .shift = _shift, \ _shift 70 drivers/clk/mediatek/clk-mt7622.c #define GATE_TOP0(_id, _name, _parent, _shift) { \ _shift 75 drivers/clk/mediatek/clk-mt7622.c .shift = _shift, \ _shift 79 drivers/clk/mediatek/clk-mt7622.c #define GATE_TOP1(_id, _name, _parent, _shift) { \ _shift 84 drivers/clk/mediatek/clk-mt7622.c .shift = _shift, \ _shift 88 drivers/clk/mediatek/clk-mt7622.c #define GATE_PERI0(_id, _name, _parent, _shift) { \ _shift 93 drivers/clk/mediatek/clk-mt7622.c .shift = _shift, \ _shift 97 drivers/clk/mediatek/clk-mt7622.c #define GATE_PERI1(_id, _name, _parent, _shift) { \ _shift 102 drivers/clk/mediatek/clk-mt7622.c .shift = _shift, \ _shift 19 drivers/clk/mediatek/clk-mt7629-eth.c #define GATE_ETH(_id, _name, _parent, _shift) { \ _shift 24 drivers/clk/mediatek/clk-mt7629-eth.c .shift = _shift, \ _shift 48 drivers/clk/mediatek/clk-mt7629-eth.c #define GATE_SGMII(_id, _name, _parent, _shift) { \ _shift 53 drivers/clk/mediatek/clk-mt7629-eth.c .shift = _shift, \ _shift 19 drivers/clk/mediatek/clk-mt7629-hif.c #define GATE_PCIE(_id, _name, _parent, _shift) { \ _shift 24 drivers/clk/mediatek/clk-mt7629-hif.c .shift = _shift, \ _shift 28 drivers/clk/mediatek/clk-mt7629-hif.c #define GATE_SSUSB(_id, _name, _parent, _shift) { \ _shift 33 drivers/clk/mediatek/clk-mt7629-hif.c .shift = _shift, \ _shift 52 drivers/clk/mediatek/clk-mt7629.c #define GATE_APMIXED(_id, _name, _parent, _shift) { \ _shift 57 drivers/clk/mediatek/clk-mt7629.c .shift = _shift, \ _shift 61 drivers/clk/mediatek/clk-mt7629.c #define GATE_INFRA(_id, _name, _parent, _shift) { \ _shift 66 drivers/clk/mediatek/clk-mt7629.c .shift = _shift, \ _shift 70 drivers/clk/mediatek/clk-mt7629.c #define GATE_PERI0(_id, _name, _parent, _shift) { \ _shift 75 drivers/clk/mediatek/clk-mt7629.c .shift = _shift, \ _shift 79 drivers/clk/mediatek/clk-mt7629.c #define GATE_PERI1(_id, _name, _parent, _shift) { \ _shift 84 drivers/clk/mediatek/clk-mt7629.c .shift = _shift, \ _shift 403 drivers/clk/mediatek/clk-mt8135.c #define GATE_ICG(_id, _name, _parent, _shift) { \ _shift 408 drivers/clk/mediatek/clk-mt8135.c .shift = _shift, \ _shift 440 drivers/clk/mediatek/clk-mt8135.c #define GATE_PERI0(_id, _name, _parent, _shift) { \ _shift 445 drivers/clk/mediatek/clk-mt8135.c .shift = _shift, \ _shift 449 drivers/clk/mediatek/clk-mt8135.c #define GATE_PERI1(_id, _name, _parent, _shift) { \ _shift 454 drivers/clk/mediatek/clk-mt8135.c .shift = _shift, \ _shift 622 drivers/clk/mediatek/clk-mt8173.c #define GATE_ICG(_id, _name, _parent, _shift) { \ _shift 627 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ _shift 661 drivers/clk/mediatek/clk-mt8173.c #define GATE_PERI0(_id, _name, _parent, _shift) { \ _shift 666 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ _shift 670 drivers/clk/mediatek/clk-mt8173.c #define GATE_PERI1(_id, _name, _parent, _shift) { \ _shift 675 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ _shift 737 drivers/clk/mediatek/clk-mt8173.c #define GATE_IMG(_id, _name, _parent, _shift) { \ _shift 742 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ _shift 768 drivers/clk/mediatek/clk-mt8173.c #define GATE_MM0(_id, _name, _parent, _shift) { \ _shift 773 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ _shift 777 drivers/clk/mediatek/clk-mt8173.c #define GATE_MM1(_id, _name, _parent, _shift) { \ _shift 782 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ _shift 855 drivers/clk/mediatek/clk-mt8173.c #define GATE_VDEC0(_id, _name, _parent, _shift) { \ _shift 860 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ _shift 864 drivers/clk/mediatek/clk-mt8173.c #define GATE_VDEC1(_id, _name, _parent, _shift) { \ _shift 869 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ _shift 878 drivers/clk/mediatek/clk-mt8173.c #define GATE_VENC(_id, _name, _parent, _shift) { \ _shift 883 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ _shift 894 drivers/clk/mediatek/clk-mt8173.c #define GATE_VENCLT(_id, _name, _parent, _shift) { \ _shift 899 drivers/clk/mediatek/clk-mt8173.c .shift = _shift, \ _shift 27 drivers/clk/mediatek/clk-mt8183-audio.c #define GATE_AUDIO0(_id, _name, _parent, _shift) \ _shift 28 drivers/clk/mediatek/clk-mt8183-audio.c GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift, \ _shift 31 drivers/clk/mediatek/clk-mt8183-audio.c #define GATE_AUDIO1(_id, _name, _parent, _shift) \ _shift 32 drivers/clk/mediatek/clk-mt8183-audio.c GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift, \ _shift 20 drivers/clk/mediatek/clk-mt8183-cam.c #define GATE_CAM(_id, _name, _parent, _shift) \ _shift 21 drivers/clk/mediatek/clk-mt8183-cam.c GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, \ _shift 20 drivers/clk/mediatek/clk-mt8183-img.c #define GATE_IMG(_id, _name, _parent, _shift) \ _shift 21 drivers/clk/mediatek/clk-mt8183-img.c GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, \ _shift 20 drivers/clk/mediatek/clk-mt8183-ipu0.c #define GATE_IPU_CORE0(_id, _name, _parent, _shift) \ _shift 21 drivers/clk/mediatek/clk-mt8183-ipu0.c GATE_MTK(_id, _name, _parent, &ipu_core0_cg_regs, _shift, \ _shift 20 drivers/clk/mediatek/clk-mt8183-ipu1.c #define GATE_IPU_CORE1(_id, _name, _parent, _shift) \ _shift 21 drivers/clk/mediatek/clk-mt8183-ipu1.c GATE_MTK(_id, _name, _parent, &ipu_core1_cg_regs, _shift, \ _shift 20 drivers/clk/mediatek/clk-mt8183-ipu_adl.c #define GATE_IPU_ADL_I(_id, _name, _parent, _shift) \ _shift 21 drivers/clk/mediatek/clk-mt8183-ipu_adl.c GATE_MTK(_id, _name, _parent, &ipu_adl_cg_regs, _shift, \ _shift 44 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN(_id, _name, _parent, _shift) \ _shift 45 drivers/clk/mediatek/clk-mt8183-ipu_conn.c GATE_MTK(_id, _name, _parent, &ipu_conn_cg_regs, _shift, \ _shift 48 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN_APB(_id, _name, _parent, _shift) \ _shift 49 drivers/clk/mediatek/clk-mt8183-ipu_conn.c GATE_MTK(_id, _name, _parent, &ipu_conn_apb_cg_regs, _shift, \ _shift 52 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN_AXI_I(_id, _name, _parent, _shift) \ _shift 53 drivers/clk/mediatek/clk-mt8183-ipu_conn.c GATE_MTK(_id, _name, _parent, &ipu_conn_axi_cg_regs, _shift, \ _shift 56 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN_AXI1_I(_id, _name, _parent, _shift) \ _shift 57 drivers/clk/mediatek/clk-mt8183-ipu_conn.c GATE_MTK(_id, _name, _parent, &ipu_conn_axi1_cg_regs, _shift, \ _shift 60 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN_AXI2_I(_id, _name, _parent, _shift) \ _shift 61 drivers/clk/mediatek/clk-mt8183-ipu_conn.c GATE_MTK(_id, _name, _parent, &ipu_conn_axi2_cg_regs, _shift, \ _shift 21 drivers/clk/mediatek/clk-mt8183-mfgcfg.c #define GATE_MFG(_id, _name, _parent, _shift) \ _shift 22 drivers/clk/mediatek/clk-mt8183-mfgcfg.c GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, \ _shift 26 drivers/clk/mediatek/clk-mt8183-mm.c #define GATE_MM0(_id, _name, _parent, _shift) \ _shift 27 drivers/clk/mediatek/clk-mt8183-mm.c GATE_MTK(_id, _name, _parent, &mm0_cg_regs, _shift, \ _shift 30 drivers/clk/mediatek/clk-mt8183-mm.c #define GATE_MM1(_id, _name, _parent, _shift) \ _shift 31 drivers/clk/mediatek/clk-mt8183-mm.c GATE_MTK(_id, _name, _parent, &mm1_cg_regs, _shift, \ _shift 26 drivers/clk/mediatek/clk-mt8183-vdec.c #define GATE_VDEC0_I(_id, _name, _parent, _shift) \ _shift 27 drivers/clk/mediatek/clk-mt8183-vdec.c GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, \ _shift 30 drivers/clk/mediatek/clk-mt8183-vdec.c #define GATE_VDEC1_I(_id, _name, _parent, _shift) \ _shift 31 drivers/clk/mediatek/clk-mt8183-vdec.c GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, \ _shift 20 drivers/clk/mediatek/clk-mt8183-venc.c #define GATE_VENC_I(_id, _name, _parent, _shift) \ _shift 21 drivers/clk/mediatek/clk-mt8183-venc.c GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, \ _shift 756 drivers/clk/mediatek/clk-mt8183.c #define GATE_TOP(_id, _name, _parent, _shift) \ _shift 757 drivers/clk/mediatek/clk-mt8183.c GATE_MTK(_id, _name, _parent, &top_cg_regs, _shift, \ _shift 790 drivers/clk/mediatek/clk-mt8183.c #define GATE_INFRA0(_id, _name, _parent, _shift) \ _shift 791 drivers/clk/mediatek/clk-mt8183.c GATE_MTK(_id, _name, _parent, &infra0_cg_regs, _shift, \ _shift 794 drivers/clk/mediatek/clk-mt8183.c #define GATE_INFRA1(_id, _name, _parent, _shift) \ _shift 795 drivers/clk/mediatek/clk-mt8183.c GATE_MTK(_id, _name, _parent, &infra1_cg_regs, _shift, \ _shift 798 drivers/clk/mediatek/clk-mt8183.c #define GATE_INFRA2(_id, _name, _parent, _shift) \ _shift 799 drivers/clk/mediatek/clk-mt8183.c GATE_MTK(_id, _name, _parent, &infra2_cg_regs, _shift, \ _shift 802 drivers/clk/mediatek/clk-mt8183.c #define GATE_INFRA3(_id, _name, _parent, _shift) \ _shift 803 drivers/clk/mediatek/clk-mt8183.c GATE_MTK(_id, _name, _parent, &infra3_cg_regs, _shift, \ _shift 1013 drivers/clk/mediatek/clk-mt8183.c #define GATE_PERI(_id, _name, _parent, _shift) \ _shift 1014 drivers/clk/mediatek/clk-mt8183.c GATE_MTK(_id, _name, _parent, &peri_cg_regs, _shift, \ _shift 1027 drivers/clk/mediatek/clk-mt8183.c #define GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, _flags) \ _shift 1029 drivers/clk/mediatek/clk-mt8183.c _shift, &mtk_clk_gate_ops_no_setclr_inv, _flags) _shift 1031 drivers/clk/mediatek/clk-mt8183.c #define GATE_APMIXED(_id, _name, _parent, _shift) \ _shift 1032 drivers/clk/mediatek/clk-mt8183.c GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, 0) _shift 25 drivers/clk/mediatek/clk-mt8516-aud.c #define GATE_AUD(_id, _name, _parent, _shift) { \ _shift 30 drivers/clk/mediatek/clk-mt8516-aud.c .shift = _shift, \ _shift 467 drivers/clk/mediatek/clk-mt8516.c #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ _shift 472 drivers/clk/mediatek/clk-mt8516.c .div_shift = _shift, \ _shift 527 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP1(_id, _name, _parent, _shift) { \ _shift 532 drivers/clk/mediatek/clk-mt8516.c .shift = _shift, \ _shift 536 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP2(_id, _name, _parent, _shift) { \ _shift 541 drivers/clk/mediatek/clk-mt8516.c .shift = _shift, \ _shift 545 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP2_I(_id, _name, _parent, _shift) { \ _shift 550 drivers/clk/mediatek/clk-mt8516.c .shift = _shift, \ _shift 554 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP3(_id, _name, _parent, _shift) { \ _shift 559 drivers/clk/mediatek/clk-mt8516.c .shift = _shift, \ _shift 563 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP4_I(_id, _name, _parent, _shift) { \ _shift 568 drivers/clk/mediatek/clk-mt8516.c .shift = _shift, \ _shift 572 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP5(_id, _name, _parent, _shift) { \ _shift 577 drivers/clk/mediatek/clk-mt8516.c .shift = _shift, \ _shift 81 drivers/clk/mediatek/clk-mtk.h #define MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, _shift, \ _shift 86 drivers/clk/mediatek/clk-mtk.h .mux_shift = _shift, \ _shift 101 drivers/clk/mediatek/clk-mtk.h #define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \ _shift 104 drivers/clk/mediatek/clk-mtk.h _shift, _width, _gate, _flags, 0) _shift 110 drivers/clk/mediatek/clk-mtk.h #define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) \ _shift 111 drivers/clk/mediatek/clk-mtk.h MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \ _shift 114 drivers/clk/mediatek/clk-mtk.h #define MUX(_id, _name, _parents, _reg, _shift, _width) \ _shift 116 drivers/clk/mediatek/clk-mtk.h _shift, _width, CLK_SET_RATE_PARENT) _shift 118 drivers/clk/mediatek/clk-mtk.h #define MUX_FLAGS(_id, _name, _parents, _reg, _shift, _width, _flags) { \ _shift 122 drivers/clk/mediatek/clk-mtk.h .mux_shift = _shift, \ _shift 190 drivers/clk/mediatek/clk-mtk.h #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ _shift 195 drivers/clk/mediatek/clk-mtk.h .div_shift = _shift, \ _shift 46 drivers/clk/mediatek/clk-mux.h _mux_set_ofs, _mux_clr_ofs, _shift, _width, \ _shift 54 drivers/clk/mediatek/clk-mux.h .mux_shift = _shift, \ _shift 65 drivers/clk/mediatek/clk-mux.h _mux_set_ofs, _mux_clr_ofs, _shift, _width, \ _shift 68 drivers/clk/mediatek/clk-mux.h _mux_set_ofs, _mux_clr_ofs, _shift, _width, \ _shift 73 drivers/clk/mediatek/clk-mux.h _mux_set_ofs, _mux_clr_ofs, _shift, _width, \ _shift 76 drivers/clk/mediatek/clk-mux.h _mux_ofs, _mux_set_ofs, _mux_clr_ofs, _shift, \ _shift 42 drivers/clk/meson/axg-audio.c #define AUD_MUX(_name, _reg, _mask, _shift, _dflags, _pdata, _iflags) \ _shift 47 drivers/clk/meson/axg-audio.c .shift = (_shift), \ _shift 59 drivers/clk/meson/axg-audio.c #define AUD_DIV(_name, _reg, _shift, _width, _dflags, _phws, _iflags) \ _shift 63 drivers/clk/meson/axg-audio.c .shift = (_shift), \ _shift 424 drivers/clk/meson/axg-audio.c #define AUD_TDM_PAD_CTRL(_name, _reg, _shift, _parents) \ _shift 425 drivers/clk/meson/axg-audio.c AUD_MUX(tdm_##_name, _reg, 0x7, _shift, 0, _parents, \ _shift 137 drivers/clk/mvebu/armada-37xx-periph.c #define PERIPH_MUX(_name, _shift) \ _shift 140 drivers/clk/mvebu/armada-37xx-periph.c .shift = _shift, \ _shift 158 drivers/clk/mvebu/armada-37xx-periph.c #define PERIPH_DIV(_name, _reg, _shift, _table) \ _shift 162 drivers/clk/mvebu/armada-37xx-periph.c .shift = _shift, \ _shift 180 drivers/clk/mvebu/armada-37xx-periph.c #define PERIPH_CLK_FULL_DD(_name, _bit, _shift, _reg1, _reg2, _shift1, _shift2)\ _shift 182 drivers/clk/mvebu/armada-37xx-periph.c static PERIPH_MUX(_name, _shift); \ _shift 185 drivers/clk/mvebu/armada-37xx-periph.c #define PERIPH_CLK_FULL(_name, _bit, _shift, _reg, _shift1, _table) \ _shift 187 drivers/clk/mvebu/armada-37xx-periph.c static PERIPH_MUX(_name, _shift); \ _shift 190 drivers/clk/mvebu/armada-37xx-periph.c #define PERIPH_CLK_GATE_DIV(_name, _bit, _reg, _shift, _table) \ _shift 192 drivers/clk/mvebu/armada-37xx-periph.c static PERIPH_DIV(_name, _reg, _shift, _table); _shift 194 drivers/clk/mvebu/armada-37xx-periph.c #define PERIPH_CLK_MUX_DD(_name, _shift, _reg1, _reg2, _shift1, _shift2)\ _shift 195 drivers/clk/mvebu/armada-37xx-periph.c static PERIPH_MUX(_name, _shift); \ _shift 1109 drivers/clk/nxp/clk-lpc32xx.c #define LPC32XX_DEFINE_MUX(_idx, _reg, _shift, _mask, _table, _flags) \ _shift 1121 drivers/clk/nxp/clk-lpc32xx.c .shift = (_shift), \ _shift 1130 drivers/clk/nxp/clk-lpc32xx.c #define LPC32XX_DEFINE_DIV(_idx, _reg, _shift, _width, _table, _flags) \ _shift 1139 drivers/clk/nxp/clk-lpc32xx.c .shift = (_shift), \ _shift 19 drivers/clk/pistachio/clk.h #define GATE(_id, _name, _pname, _reg, _shift) \ _shift 23 drivers/clk/pistachio/clk.h .shift = _shift, \ _shift 39 drivers/clk/pistachio/clk.h #define MUX(_id, _name, _pnames, _reg, _shift) \ _shift 43 drivers/clk/pistachio/clk.h .shift = _shift, \ _shift 27 drivers/clk/sprd/div.h #define _SPRD_DIV_CLK(_shift, _width) \ _shift 29 drivers/clk/sprd/div.h .shift = _shift, \ _shift 39 drivers/clk/sprd/div.h _shift, _width, _flags) \ _shift 41 drivers/clk/sprd/div.h .div = _SPRD_DIV_CLK(_shift, _width), \ _shift 32 drivers/clk/sprd/mux.h #define _SPRD_MUX_CLK(_shift, _width, _table) \ _shift 34 drivers/clk/sprd/mux.h .shift = _shift, \ _shift 40 drivers/clk/sprd/mux.h _reg, _shift, _width, \ _shift 43 drivers/clk/sprd/mux.h .mux = _SPRD_MUX_CLK(_shift, _width, _table), \ _shift 55 drivers/clk/sprd/mux.h _shift, _width, _flags) \ _shift 57 drivers/clk/sprd/mux.h _reg, _shift, _width, _flags) _shift 38 drivers/clk/st/clkgen.h #define CLKGEN_FIELD(_offset, _mask, _shift) { \ _shift 41 drivers/clk/st/clkgen.h .shift = _shift, \ _shift 43 drivers/clk/sunxi-ng/ccu_div.h #define _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, _flags) \ _shift 45 drivers/clk/sunxi-ng/ccu_div.h .shift = _shift, \ _shift 51 drivers/clk/sunxi-ng/ccu_div.h #define _SUNXI_CCU_DIV_TABLE(_shift, _width, _table) \ _shift 52 drivers/clk/sunxi-ng/ccu_div.h _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, 0) _shift 54 drivers/clk/sunxi-ng/ccu_div.h #define _SUNXI_CCU_DIV_OFFSET_MAX_FLAGS(_shift, _width, _off, _max, _flags) \ _shift 56 drivers/clk/sunxi-ng/ccu_div.h .shift = _shift, \ _shift 63 drivers/clk/sunxi-ng/ccu_div.h #define _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, _max, _flags) \ _shift 64 drivers/clk/sunxi-ng/ccu_div.h _SUNXI_CCU_DIV_OFFSET_MAX_FLAGS(_shift, _width, 1, _max, _flags) _shift 66 drivers/clk/sunxi-ng/ccu_div.h #define _SUNXI_CCU_DIV_FLAGS(_shift, _width, _flags) \ _shift 67 drivers/clk/sunxi-ng/ccu_div.h _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, 0, _flags) _shift 69 drivers/clk/sunxi-ng/ccu_div.h #define _SUNXI_CCU_DIV_MAX(_shift, _width, _max) \ _shift 70 drivers/clk/sunxi-ng/ccu_div.h _SUNXI_CCU_DIV_MAX_FLAGS(_shift, _width, _max, 0) _shift 72 drivers/clk/sunxi-ng/ccu_div.h #define _SUNXI_CCU_DIV_OFFSET(_shift, _width, _offset) \ _shift 73 drivers/clk/sunxi-ng/ccu_div.h _SUNXI_CCU_DIV_OFFSET_MAX_FLAGS(_shift, _width, _offset, 0, 0) _shift 75 drivers/clk/sunxi-ng/ccu_div.h #define _SUNXI_CCU_DIV(_shift, _width) \ _shift 76 drivers/clk/sunxi-ng/ccu_div.h _SUNXI_CCU_DIV_FLAGS(_shift, _width, 0) _shift 88 drivers/clk/sunxi-ng/ccu_div.h _shift, _width, \ _shift 91 drivers/clk/sunxi-ng/ccu_div.h .div = _SUNXI_CCU_DIV_TABLE(_shift, _width, \ _shift 105 drivers/clk/sunxi-ng/ccu_div.h _shift, _width, \ _shift 108 drivers/clk/sunxi-ng/ccu_div.h _shift, _width, _table, 0, \ _shift 17 drivers/clk/sunxi-ng/ccu_mult.h #define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \ _shift 22 drivers/clk/sunxi-ng/ccu_mult.h .shift = _shift, \ _shift 26 drivers/clk/sunxi-ng/ccu_mult.h #define _SUNXI_CCU_MULT_MIN(_shift, _width, _min) \ _shift 27 drivers/clk/sunxi-ng/ccu_mult.h _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, _min, 0) _shift 29 drivers/clk/sunxi-ng/ccu_mult.h #define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset) \ _shift 30 drivers/clk/sunxi-ng/ccu_mult.h _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, 1, 0) _shift 32 drivers/clk/sunxi-ng/ccu_mult.h #define _SUNXI_CCU_MULT(_shift, _width) \ _shift 33 drivers/clk/sunxi-ng/ccu_mult.h _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, 1, 0) _shift 32 drivers/clk/sunxi-ng/ccu_mux.h #define _SUNXI_CCU_MUX_TABLE(_shift, _width, _table) \ _shift 34 drivers/clk/sunxi-ng/ccu_mux.h .shift = _shift, \ _shift 39 drivers/clk/sunxi-ng/ccu_mux.h #define _SUNXI_CCU_MUX(_shift, _width) \ _shift 40 drivers/clk/sunxi-ng/ccu_mux.h _SUNXI_CCU_MUX_TABLE(_shift, _width, NULL) _shift 51 drivers/clk/sunxi-ng/ccu_mux.h _reg, _shift, _width, _gate, \ _shift 55 drivers/clk/sunxi-ng/ccu_mux.h .mux = _SUNXI_CCU_MUX_TABLE(_shift, _width, _table), \ _shift 66 drivers/clk/sunxi-ng/ccu_mux.h _shift, _width, _gate, _flags) \ _shift 68 drivers/clk/sunxi-ng/ccu_mux.h _reg, _shift, _width, _gate, \ _shift 71 drivers/clk/sunxi-ng/ccu_mux.h #define SUNXI_CCU_MUX(_struct, _name, _parents, _reg, _shift, _width, \ _shift 74 drivers/clk/sunxi-ng/ccu_mux.h _reg, _shift, _width, 0, _flags) _shift 20 drivers/clk/sunxi-ng/ccu_phase.h #define SUNXI_CCU_PHASE(_struct, _name, _parent, _reg, _shift, _width, _flags) \ _shift 22 drivers/clk/sunxi-ng/ccu_phase.h .shift = _shift, \ _shift 98 drivers/clk/zte/clk.h #define MUX_F(_id, _name, _parent, _reg, _shift, _width, _flag, _mflag) \ _shift 103 drivers/clk/zte/clk.h .shift = _shift, \ _shift 114 drivers/clk/zte/clk.h #define MUX(_id, _name, _parent, _reg, _shift, _width) \ _shift 115 drivers/clk/zte/clk.h MUX_F(_id, _name, _parent, _reg, _shift, _width, 0, 0) _shift 122 drivers/clk/zte/clk.h #define DIV_T(_id, _name, _parent, _reg, _shift, _width, _flag, _table) \ _shift 126 drivers/clk/zte/clk.h .shift = _shift, \ _shift 37 drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h .type ## _shift = DC_GPIO_DDC ## id ## _ ## type ## __DC_GPIO_DDC ## id ## cd ## _ ## type ## __SHIFT _shift 62 drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h .type ## _shift = DC_GPIO_DDCVGA_ ## type ## __DC_GPIO_DDCVGA ## cd ## _ ## type ## __SHIFT _shift 79 drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h .type ## _shift = DC_GPIO_I2CPAD_ ## type ## __DC_GPIO_ ## cd ## _ ## type ## __SHIFT _shift 34 drivers/gpu/drm/amd/display/dc/gpio/generic_regs.h .type ## _shift = DC_GPIO_GENERIC_ ## type ## __DC_GPIO_GENERIC ## id ## _ ## type ## __SHIFT _shift 42 drivers/gpu/drm/amd/display/dc/gpio/hpd_regs.h .type ## _shift = DC_GPIO_HPD_ ## type ## __DC_GPIO_HPD ## id ## _ ## type ## __SHIFT _shift 35 drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.c gpio->regs->field_name ## _shift, gpio->regs->field_name ## _mask _shift 20 drivers/gpu/drm/rockchip/rockchip_vop_reg.c #define _VOP_REG(off, _mask, _shift, _write_mask, _relaxed) \ _shift 24 drivers/gpu/drm/rockchip/rockchip_vop_reg.c .shift = _shift, \ _shift 29 drivers/gpu/drm/rockchip/rockchip_vop_reg.c #define VOP_REG(off, _mask, _shift) \ _shift 30 drivers/gpu/drm/rockchip/rockchip_vop_reg.c _VOP_REG(off, _mask, _shift, false, true) _shift 32 drivers/gpu/drm/rockchip/rockchip_vop_reg.c #define VOP_REG_SYNC(off, _mask, _shift) \ _shift 33 drivers/gpu/drm/rockchip/rockchip_vop_reg.c _VOP_REG(off, _mask, _shift, false, false) _shift 35 drivers/gpu/drm/rockchip/rockchip_vop_reg.c #define VOP_REG_MASK_SYNC(off, _mask, _shift) \ _shift 36 drivers/gpu/drm/rockchip/rockchip_vop_reg.c _VOP_REG(off, _mask, _shift, true, false) _shift 141 drivers/iio/adc/ad7476.c #define _AD7476_CHAN(bits, _shift, _info_mask_sep) \ _shift 151 drivers/iio/adc/ad7476.c .shift = (_shift), \ _shift 647 drivers/iio/adc/ina2xx-adc.c #define INA219_CHAN_VOLTAGE(_index, _address, _shift) { \ _shift 662 drivers/iio/adc/ina2xx-adc.c .shift = _shift, \ _shift 663 drivers/iio/adc/ina2xx-adc.c .realbits = 16 - _shift, \ _shift 396 drivers/iio/dac/ad5064.c #define AD5064_CHANNEL(chan, addr, bits, _shift, _ext_info) { \ _shift 408 drivers/iio/dac/ad5064.c .shift = (_shift), \ _shift 141 drivers/iio/dac/ad5446.c #define _AD5446_CHANNEL(bits, storage, _shift, ext) { \ _shift 152 drivers/iio/dac/ad5446.c .shift = (_shift), \ _shift 191 drivers/iio/dac/ad5686.c #define AD5868_CHANNEL(chan, addr, bits, _shift) { \ _shift 203 drivers/iio/dac/ad5686.c .shift = (_shift), \ _shift 208 drivers/iio/dac/ad5686.c #define DECLARE_AD5693_CHANNELS(name, bits, _shift) \ _shift 210 drivers/iio/dac/ad5686.c AD5868_CHANNEL(0, 0, bits, _shift), \ _shift 213 drivers/iio/dac/ad5686.c #define DECLARE_AD5686_CHANNELS(name, bits, _shift) \ _shift 215 drivers/iio/dac/ad5686.c AD5868_CHANNEL(0, 1, bits, _shift), \ _shift 216 drivers/iio/dac/ad5686.c AD5868_CHANNEL(1, 2, bits, _shift), \ _shift 217 drivers/iio/dac/ad5686.c AD5868_CHANNEL(2, 4, bits, _shift), \ _shift 218 drivers/iio/dac/ad5686.c AD5868_CHANNEL(3, 8, bits, _shift), \ _shift 221 drivers/iio/dac/ad5686.c #define DECLARE_AD5676_CHANNELS(name, bits, _shift) \ _shift 223 drivers/iio/dac/ad5686.c AD5868_CHANNEL(0, 0, bits, _shift), \ _shift 224 drivers/iio/dac/ad5686.c AD5868_CHANNEL(1, 1, bits, _shift), \ _shift 225 drivers/iio/dac/ad5686.c AD5868_CHANNEL(2, 2, bits, _shift), \ _shift 226 drivers/iio/dac/ad5686.c AD5868_CHANNEL(3, 3, bits, _shift), \ _shift 227 drivers/iio/dac/ad5686.c AD5868_CHANNEL(4, 4, bits, _shift), \ _shift 228 drivers/iio/dac/ad5686.c AD5868_CHANNEL(5, 5, bits, _shift), \ _shift 229 drivers/iio/dac/ad5686.c AD5868_CHANNEL(6, 6, bits, _shift), \ _shift 230 drivers/iio/dac/ad5686.c AD5868_CHANNEL(7, 7, bits, _shift), \ _shift 233 drivers/iio/dac/ad5686.c #define DECLARE_AD5679_CHANNELS(name, bits, _shift) \ _shift 235 drivers/iio/dac/ad5686.c AD5868_CHANNEL(0, 0, bits, _shift), \ _shift 236 drivers/iio/dac/ad5686.c AD5868_CHANNEL(1, 1, bits, _shift), \ _shift 237 drivers/iio/dac/ad5686.c AD5868_CHANNEL(2, 2, bits, _shift), \ _shift 238 drivers/iio/dac/ad5686.c AD5868_CHANNEL(3, 3, bits, _shift), \ _shift 239 drivers/iio/dac/ad5686.c AD5868_CHANNEL(4, 4, bits, _shift), \ _shift 240 drivers/iio/dac/ad5686.c AD5868_CHANNEL(5, 5, bits, _shift), \ _shift 241 drivers/iio/dac/ad5686.c AD5868_CHANNEL(6, 6, bits, _shift), \ _shift 242 drivers/iio/dac/ad5686.c AD5868_CHANNEL(7, 7, bits, _shift), \ _shift 243 drivers/iio/dac/ad5686.c AD5868_CHANNEL(8, 8, bits, _shift), \ _shift 244 drivers/iio/dac/ad5686.c AD5868_CHANNEL(9, 9, bits, _shift), \ _shift 245 drivers/iio/dac/ad5686.c AD5868_CHANNEL(10, 10, bits, _shift), \ _shift 246 drivers/iio/dac/ad5686.c AD5868_CHANNEL(11, 11, bits, _shift), \ _shift 247 drivers/iio/dac/ad5686.c AD5868_CHANNEL(12, 12, bits, _shift), \ _shift 248 drivers/iio/dac/ad5686.c AD5868_CHANNEL(13, 13, bits, _shift), \ _shift 249 drivers/iio/dac/ad5686.c AD5868_CHANNEL(14, 14, bits, _shift), \ _shift 250 drivers/iio/dac/ad5686.c AD5868_CHANNEL(15, 15, bits, _shift), \ _shift 294 drivers/iio/dac/ad5791.c #define AD5791_CHAN(bits, _shift) { \ _shift 307 drivers/iio/dac/ad5791.c .shift = (_shift), \ _shift 2481 drivers/media/pci/ddbridge/ddbridge-core.c #define IRQ_HANDLE_NIBBLE(_shift) { \ _shift 2482 drivers/media/pci/ddbridge/ddbridge-core.c if (s & (0x0000000f << ((_shift) & 0x1f))) { \ _shift 2483 drivers/media/pci/ddbridge/ddbridge-core.c IRQ_HANDLE(0 + (_shift)); \ _shift 2484 drivers/media/pci/ddbridge/ddbridge-core.c IRQ_HANDLE(1 + (_shift)); \ _shift 2485 drivers/media/pci/ddbridge/ddbridge-core.c IRQ_HANDLE(2 + (_shift)); \ _shift 2486 drivers/media/pci/ddbridge/ddbridge-core.c IRQ_HANDLE(3 + (_shift)); \ _shift 2490 drivers/media/pci/ddbridge/ddbridge-core.c #define IRQ_HANDLE_BYTE(_shift) { \ _shift 2491 drivers/media/pci/ddbridge/ddbridge-core.c if (s & (0x000000ff << ((_shift) & 0x1f))) { \ _shift 2492 drivers/media/pci/ddbridge/ddbridge-core.c IRQ_HANDLE(0 + (_shift)); \ _shift 2493 drivers/media/pci/ddbridge/ddbridge-core.c IRQ_HANDLE(1 + (_shift)); \ _shift 2494 drivers/media/pci/ddbridge/ddbridge-core.c IRQ_HANDLE(2 + (_shift)); \ _shift 2495 drivers/media/pci/ddbridge/ddbridge-core.c IRQ_HANDLE(3 + (_shift)); \ _shift 2496 drivers/media/pci/ddbridge/ddbridge-core.c IRQ_HANDLE(4 + (_shift)); \ _shift 2497 drivers/media/pci/ddbridge/ddbridge-core.c IRQ_HANDLE(5 + (_shift)); \ _shift 2498 drivers/media/pci/ddbridge/ddbridge-core.c IRQ_HANDLE(6 + (_shift)); \ _shift 2499 drivers/media/pci/ddbridge/ddbridge-core.c IRQ_HANDLE(7 + (_shift)); \ _shift 52 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h #define MLXSW_AFK_ELEMENT_INFO(_type, _element, _offset, _shift, _size) \ _shift 58 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h .shift = _shift, \ _shift 64 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h #define MLXSW_AFK_ELEMENT_INFO_U32(_element, _offset, _shift, _size) \ _shift 66 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h _element, _offset, _shift, _size) _shift 117 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h _shift, _size, _u32_key_diff, _avoid_size_check) \ _shift 123 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h .shift = _shift, \ _shift 131 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h #define MLXSW_AFK_ELEMENT_INST_U32(_element, _offset, _shift, _size) \ _shift 133 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h _element, _offset, _shift, _size, 0, false) _shift 136 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h _shift, _size, _key_diff, \ _shift 139 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h _element, _offset, _shift, _size, \ _shift 266 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM8(_type, _cname, _iname, _offset, _shift, _sizebits) \ _shift 269 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ _shift 282 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM8_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ _shift 288 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ _shift 307 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM16(_type, _cname, _iname, _offset, _shift, _sizebits) \ _shift 310 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ _shift 323 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM16_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ _shift 329 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ _shift 348 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM32(_type, _cname, _iname, _offset, _shift, _sizebits) \ _shift 351 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ _shift 364 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM32_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ _shift 370 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ _shift 389 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM64(_type, _cname, _iname, _offset, _shift, _sizebits) \ _shift 392 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ _shift 405 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM64_INDEXED(_type, _cname, _iname, _offset, _shift, \ _shift 411 drivers/net/ethernet/mellanox/mlxsw/item.h .shift = _shift, \ _shift 256 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c #define MLXSW_SP2_AFK_BLOCK_LAYOUT(_block, _offset, _shift) \ _shift 260 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c .shift = _shift, \ _shift 404 drivers/phy/tegra/xusb-tegra124.c #define TEGRA124_LANE(_name, _offset, _shift, _mask, _type) \ _shift 408 drivers/phy/tegra/xusb-tegra124.c .shift = _shift, \ _shift 112 drivers/phy/tegra/xusb-tegra186.c #define TEGRA186_LANE(_name, _offset, _shift, _mask, _type) \ _shift 116 drivers/phy/tegra/xusb-tegra186.c .shift = _shift, \ _shift 839 drivers/phy/tegra/xusb-tegra210.c #define TEGRA210_LANE(_name, _offset, _shift, _mask, _type) \ _shift 843 drivers/phy/tegra/xusb-tegra210.c .shift = _shift, \ _shift 499 drivers/pinctrl/pinctrl-pistachio.c #define FUNCTION_SCENARIO(_name, _reg, _shift, _mask) \ _shift 507 drivers/pinctrl/pinctrl-pistachio.c .scenario_shift = _shift, \ _shift 662 drivers/pinctrl/pinctrl-pistachio.c #define MFIO_MUX_PIN_GROUP(_pin, _f0, _f1, _f2, _reg, _shift, _mask) \ _shift 672 drivers/pinctrl/pinctrl-pistachio.c .mux_shift = _shift, \ _shift 827 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c #define TEGRA124_LANE(_name, _offset, _shift, _mask, _iddq, _funcs) \ _shift 831 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c .shift = _shift, \ _shift 287 drivers/regulator/max8997-regulator.c int *_reg, int *_shift, int *_mask) _shift 346 drivers/regulator/max8997-regulator.c *_shift = shift; _shift 118 drivers/regulator/max8998.c int *_reg, int *_shift, int *_mask) _shift 174 drivers/regulator/max8998.c *_shift = shift; _shift 371 drivers/regulator/tps6524x-regulator.c #define __MK_FIELD(_reg, _mask, _shift) \ _shift 372 drivers/regulator/tps6524x-regulator.c { .reg = (_reg), .mask = (_mask), .shift = (_shift), } _shift 171 drivers/ssb/pci.c #define SPEX16(_outvar, _offset, _mask, _shift) \ _shift 172 drivers/ssb/pci.c out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift)) _shift 173 drivers/ssb/pci.c #define SPEX32(_outvar, _offset, _mask, _shift) \ _shift 175 drivers/ssb/pci.c in[SPOFF(_offset)]) & (_mask)) >> (_shift)) _shift 176 drivers/ssb/pci.c #define SPEX(_outvar, _offset, _mask, _shift) \ _shift 177 drivers/ssb/pci.c SPEX16(_outvar, _offset, _mask, _shift) _shift 179 drivers/ssb/pci.c #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ _shift 181 drivers/ssb/pci.c SPEX(_field[0], _offset + 0, _mask, _shift); \ _shift 182 drivers/ssb/pci.c SPEX(_field[1], _offset + 2, _mask, _shift); \ _shift 183 drivers/ssb/pci.c SPEX(_field[2], _offset + 4, _mask, _shift); \ _shift 184 drivers/ssb/pci.c SPEX(_field[3], _offset + 6, _mask, _shift); \ _shift 185 drivers/ssb/pci.c SPEX(_field[4], _offset + 8, _mask, _shift); \ _shift 186 drivers/ssb/pci.c SPEX(_field[5], _offset + 10, _mask, _shift); \ _shift 187 drivers/ssb/pci.c SPEX(_field[6], _offset + 12, _mask, _shift); \ _shift 188 drivers/ssb/pci.c SPEX(_field[7], _offset + 14, _mask, _shift); \ _shift 133 include/linux/iio/adc/ad_sigma_delta.h _storagebits, _shift, _extend_name, _type, _mask_all) \ _shift 151 include/linux/iio/adc/ad_sigma_delta.h .shift = (_shift), \ _shift 157 include/linux/iio/adc/ad_sigma_delta.h _storagebits, _shift) \ _shift 159 include/linux/iio/adc/ad_sigma_delta.h _storagebits, _shift, NULL, IIO_VOLTAGE, \ _shift 163 include/linux/iio/adc/ad_sigma_delta.h _storagebits, _shift) \ _shift 165 include/linux/iio/adc/ad_sigma_delta.h _storagebits, _shift, "shorted", IIO_VOLTAGE, \ _shift 169 include/linux/iio/adc/ad_sigma_delta.h _storagebits, _shift) \ _shift 171 include/linux/iio/adc/ad_sigma_delta.h _storagebits, _shift, NULL, IIO_VOLTAGE, \ _shift 175 include/linux/iio/adc/ad_sigma_delta.h _storagebits, _shift) \ _shift 177 include/linux/iio/adc/ad_sigma_delta.h _storagebits, _shift, NULL, IIO_VOLTAGE, 0) _shift 179 include/linux/iio/adc/ad_sigma_delta.h #define AD_SD_TEMP_CHANNEL(_si, _address, _bits, _storagebits, _shift) \ _shift 181 include/linux/iio/adc/ad_sigma_delta.h _storagebits, _shift, NULL, IIO_TEMP, \ _shift 185 include/linux/iio/adc/ad_sigma_delta.h _shift) \ _shift 187 include/linux/iio/adc/ad_sigma_delta.h _storagebits, _shift, "supply", IIO_VOLTAGE, \ _shift 151 include/linux/sh_clk.h #define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \ _shift 155 include/linux/sh_clk.h .enable_bit = _shift, \ _shift 53 include/math-emu/op-common.h _FP_I_TYPE _shift; \ _shift 54 include/math-emu/op-common.h _FP_FRAC_CLZ_##wc(_shift, X); \ _shift 55 include/math-emu/op-common.h _shift -= _FP_FRACXBITS_##fs; \ _shift 56 include/math-emu/op-common.h _FP_FRAC_SLL_##wc(X, (_shift+_FP_WORKBITS)); \ _shift 57 include/math-emu/op-common.h X##_e -= _FP_EXPBIAS_##fs - 1 + _shift; \