_pwr_reg 918 drivers/clk/mediatek/clk-mt2701.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ _pwr_reg 923 drivers/clk/mediatek/clk-mt2701.c .pwr_reg = _pwr_reg, \ _pwr_reg 1166 drivers/clk/mediatek/clk-mt2712.c #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _pwr_reg 1173 drivers/clk/mediatek/clk-mt2712.c .pwr_reg = _pwr_reg, \ _pwr_reg 1189 drivers/clk/mediatek/clk-mt2712.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _pwr_reg 1192 drivers/clk/mediatek/clk-mt2712.c PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ _pwr_reg 1142 drivers/clk/mediatek/clk-mt6779.c #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ _pwr_reg 1150 drivers/clk/mediatek/clk-mt6779.c .pwr_reg = _pwr_reg, \ _pwr_reg 1169 drivers/clk/mediatek/clk-mt6779.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ _pwr_reg 1174 drivers/clk/mediatek/clk-mt6779.c PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ _pwr_reg 614 drivers/clk/mediatek/clk-mt6797.c #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _pwr_reg 620 drivers/clk/mediatek/clk-mt6797.c .pwr_reg = _pwr_reg, \ _pwr_reg 634 drivers/clk/mediatek/clk-mt6797.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _pwr_reg 637 drivers/clk/mediatek/clk-mt6797.c PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _pwr_reg 24 drivers/clk/mediatek/clk-mt7622.c #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\ _pwr_reg 30 drivers/clk/mediatek/clk-mt7622.c .pwr_reg = _pwr_reg, \ _pwr_reg 45 drivers/clk/mediatek/clk-mt7622.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _pwr_reg 48 drivers/clk/mediatek/clk-mt7622.c PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\ _pwr_reg 24 drivers/clk/mediatek/clk-mt7629.c #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _pwr_reg 30 drivers/clk/mediatek/clk-mt7629.c .pwr_reg = _pwr_reg, \ _pwr_reg 45 drivers/clk/mediatek/clk-mt7629.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _pwr_reg 48 drivers/clk/mediatek/clk-mt7629.c PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _pwr_reg 596 drivers/clk/mediatek/clk-mt8135.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, _pd_shift, _tuner_reg, _pcw_reg, _pcw_shift) { \ _pwr_reg 600 drivers/clk/mediatek/clk-mt8135.c .pwr_reg = _pwr_reg, \ _pwr_reg 1025 drivers/clk/mediatek/clk-mt8173.c #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _pwr_reg 1031 drivers/clk/mediatek/clk-mt8173.c .pwr_reg = _pwr_reg, \ _pwr_reg 1045 drivers/clk/mediatek/clk-mt8173.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _pwr_reg 1048 drivers/clk/mediatek/clk-mt8173.c PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _pwr_reg 1067 drivers/clk/mediatek/clk-mt8183.c #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ _pwr_reg 1075 drivers/clk/mediatek/clk-mt8183.c .pwr_reg = _pwr_reg, \ _pwr_reg 1094 drivers/clk/mediatek/clk-mt8183.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ _pwr_reg 1099 drivers/clk/mediatek/clk-mt8183.c PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ _pwr_reg 736 drivers/clk/mediatek/clk-mt8516.c #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _pwr_reg 742 drivers/clk/mediatek/clk-mt8516.c .pwr_reg = _pwr_reg, \ _pwr_reg 756 drivers/clk/mediatek/clk-mt8516.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _pwr_reg 759 drivers/clk/mediatek/clk-mt8516.c PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \