_pvr 125 arch/microblaze/include/asm/pvr.h #define PVR_IS_FULL(_pvr) (_pvr.pvr[0] & PVR0_PVR_FULL_MASK) _pvr 126 arch/microblaze/include/asm/pvr.h #define PVR_USE_BARREL(_pvr) (_pvr.pvr[0] & PVR0_USE_BARREL_MASK) _pvr 127 arch/microblaze/include/asm/pvr.h #define PVR_USE_DIV(_pvr) (_pvr.pvr[0] & PVR0_USE_DIV_MASK) _pvr 128 arch/microblaze/include/asm/pvr.h #define PVR_USE_HW_MUL(_pvr) (_pvr.pvr[0] & PVR0_USE_HW_MUL_MASK) _pvr 129 arch/microblaze/include/asm/pvr.h #define PVR_USE_FPU(_pvr) (_pvr.pvr[0] & PVR0_USE_FPU_MASK) _pvr 130 arch/microblaze/include/asm/pvr.h #define PVR_USE_FPU2(_pvr) (_pvr.pvr[2] & PVR2_USE_FPU2_MASK) _pvr 131 arch/microblaze/include/asm/pvr.h #define PVR_USE_ICACHE(_pvr) (_pvr.pvr[0] & PVR0_USE_ICACHE_MASK) _pvr 132 arch/microblaze/include/asm/pvr.h #define PVR_USE_DCACHE(_pvr) (_pvr.pvr[0] & PVR0_USE_DCACHE_MASK) _pvr 133 arch/microblaze/include/asm/pvr.h #define PVR_VERSION(_pvr) ((_pvr.pvr[0] & PVR0_VERSION_MASK) >> 8) _pvr 134 arch/microblaze/include/asm/pvr.h #define PVR_USER1(_pvr) (_pvr.pvr[0] & PVR0_USER1_MASK) _pvr 135 arch/microblaze/include/asm/pvr.h #define PVR_USER2(_pvr) (_pvr.pvr[1] & PVR1_USER2_MASK) _pvr 137 arch/microblaze/include/asm/pvr.h #define PVR_D_OPB(_pvr) (_pvr.pvr[2] & PVR2_D_OPB_MASK) _pvr 138 arch/microblaze/include/asm/pvr.h #define PVR_D_LMB(_pvr) (_pvr.pvr[2] & PVR2_D_LMB_MASK) _pvr 139 arch/microblaze/include/asm/pvr.h #define PVR_I_OPB(_pvr) (_pvr.pvr[2] & PVR2_I_OPB_MASK) _pvr 140 arch/microblaze/include/asm/pvr.h #define PVR_I_LMB(_pvr) (_pvr.pvr[2] & PVR2_I_LMB_MASK) _pvr 141 arch/microblaze/include/asm/pvr.h #define PVR_INTERRUPT_IS_EDGE(_pvr) \ _pvr 142 arch/microblaze/include/asm/pvr.h (_pvr.pvr[2] & PVR2_INTERRUPT_IS_EDGE_MASK) _pvr 143 arch/microblaze/include/asm/pvr.h #define PVR_EDGE_IS_POSITIVE(_pvr) \ _pvr 144 arch/microblaze/include/asm/pvr.h (_pvr.pvr[2] & PVR2_EDGE_IS_POSITIVE_MASK) _pvr 145 arch/microblaze/include/asm/pvr.h #define PVR_USE_MSR_INSTR(_pvr) (_pvr.pvr[2] & PVR2_USE_MSR_INSTR) _pvr 146 arch/microblaze/include/asm/pvr.h #define PVR_USE_PCMP_INSTR(_pvr) (_pvr.pvr[2] & PVR2_USE_PCMP_INSTR) _pvr 147 arch/microblaze/include/asm/pvr.h #define PVR_AREA_OPTIMISED(_pvr) (_pvr.pvr[2] & PVR2_AREA_OPTIMISED) _pvr 148 arch/microblaze/include/asm/pvr.h #define PVR_USE_MUL64(_pvr) (_pvr.pvr[2] & PVR2_USE_MUL64_MASK) _pvr 149 arch/microblaze/include/asm/pvr.h #define PVR_OPCODE_0x0_ILLEGAL(_pvr) \ _pvr 150 arch/microblaze/include/asm/pvr.h (_pvr.pvr[2] & PVR2_OPCODE_0x0_ILL_MASK) _pvr 151 arch/microblaze/include/asm/pvr.h #define PVR_UNALIGNED_EXCEPTION(_pvr) \ _pvr 152 arch/microblaze/include/asm/pvr.h (_pvr.pvr[2] & PVR2_UNALIGNED_EXC_MASK) _pvr 153 arch/microblaze/include/asm/pvr.h #define PVR_ILL_OPCODE_EXCEPTION(_pvr) \ _pvr 154 arch/microblaze/include/asm/pvr.h (_pvr.pvr[2] & PVR2_ILL_OPCODE_EXC_MASK) _pvr 155 arch/microblaze/include/asm/pvr.h #define PVR_IOPB_BUS_EXCEPTION(_pvr) \ _pvr 156 arch/microblaze/include/asm/pvr.h (_pvr.pvr[2] & PVR2_IOPB_BUS_EXC_MASK) _pvr 157 arch/microblaze/include/asm/pvr.h #define PVR_DOPB_BUS_EXCEPTION(_pvr) \ _pvr 158 arch/microblaze/include/asm/pvr.h (_pvr.pvr[2] & PVR2_DOPB_BUS_EXC_MASK) _pvr 159 arch/microblaze/include/asm/pvr.h #define PVR_DIV_ZERO_EXCEPTION(_pvr) \ _pvr 160 arch/microblaze/include/asm/pvr.h (_pvr.pvr[2] & PVR2_DIV_ZERO_EXC_MASK) _pvr 161 arch/microblaze/include/asm/pvr.h #define PVR_FPU_EXCEPTION(_pvr) (_pvr.pvr[2] & PVR2_FPU_EXC_MASK) _pvr 162 arch/microblaze/include/asm/pvr.h #define PVR_FSL_EXCEPTION(_pvr) (_pvr.pvr[2] & PVR2_USE_EXTEND_FSL) _pvr 164 arch/microblaze/include/asm/pvr.h #define PVR_DEBUG_ENABLED(_pvr) (_pvr.pvr[3] & PVR3_DEBUG_ENABLED_MASK) _pvr 165 arch/microblaze/include/asm/pvr.h #define PVR_NUMBER_OF_PC_BRK(_pvr) \ _pvr 166 arch/microblaze/include/asm/pvr.h ((_pvr.pvr[3] & PVR3_NUMBER_OF_PC_BRK_MASK) >> 25) _pvr 167 arch/microblaze/include/asm/pvr.h #define PVR_NUMBER_OF_RD_ADDR_BRK(_pvr) \ _pvr 168 arch/microblaze/include/asm/pvr.h ((_pvr.pvr[3] & PVR3_NUMBER_OF_RD_ADDR_BRK_MASK) >> 19) _pvr 169 arch/microblaze/include/asm/pvr.h #define PVR_NUMBER_OF_WR_ADDR_BRK(_pvr) \ _pvr 170 arch/microblaze/include/asm/pvr.h ((_pvr.pvr[3] & PVR3_NUMBER_OF_WR_ADDR_BRK_MASK) >> 13) _pvr 171 arch/microblaze/include/asm/pvr.h #define PVR_FSL_LINKS(_pvr) ((_pvr.pvr[3] & PVR3_FSL_LINKS_MASK) >> 7) _pvr 173 arch/microblaze/include/asm/pvr.h #define PVR_ICACHE_ADDR_TAG_BITS(_pvr) \ _pvr 174 arch/microblaze/include/asm/pvr.h ((_pvr.pvr[4] & PVR4_ICACHE_ADDR_TAG_BITS_MASK) >> 26) _pvr 175 arch/microblaze/include/asm/pvr.h #define PVR_ICACHE_USE_FSL(_pvr) \ _pvr 176 arch/microblaze/include/asm/pvr.h (_pvr.pvr[4] & PVR4_ICACHE_USE_FSL_MASK) _pvr 177 arch/microblaze/include/asm/pvr.h #define PVR_ICACHE_ALLOW_WR(_pvr) \ _pvr 178 arch/microblaze/include/asm/pvr.h (_pvr.pvr[4] & PVR4_ICACHE_ALLOW_WR_MASK) _pvr 179 arch/microblaze/include/asm/pvr.h #define PVR_ICACHE_LINE_LEN(_pvr) \ _pvr 180 arch/microblaze/include/asm/pvr.h (1 << ((_pvr.pvr[4] & PVR4_ICACHE_LINE_LEN_MASK) >> 21)) _pvr 181 arch/microblaze/include/asm/pvr.h #define PVR_ICACHE_BYTE_SIZE(_pvr) \ _pvr 182 arch/microblaze/include/asm/pvr.h (1 << ((_pvr.pvr[4] & PVR4_ICACHE_BYTE_SIZE_MASK) >> 16)) _pvr 184 arch/microblaze/include/asm/pvr.h #define PVR_DCACHE_ADDR_TAG_BITS(_pvr) \ _pvr 185 arch/microblaze/include/asm/pvr.h ((_pvr.pvr[5] & PVR5_DCACHE_ADDR_TAG_BITS_MASK) >> 26) _pvr 186 arch/microblaze/include/asm/pvr.h #define PVR_DCACHE_USE_FSL(_pvr) (_pvr.pvr[5] & PVR5_DCACHE_USE_FSL_MASK) _pvr 187 arch/microblaze/include/asm/pvr.h #define PVR_DCACHE_ALLOW_WR(_pvr) \ _pvr 188 arch/microblaze/include/asm/pvr.h (_pvr.pvr[5] & PVR5_DCACHE_ALLOW_WR_MASK) _pvr 190 arch/microblaze/include/asm/pvr.h #define PVR_DCACHE_LINE_LEN(_pvr) \ _pvr 191 arch/microblaze/include/asm/pvr.h (1 << ((_pvr.pvr[5] & PVR5_DCACHE_LINE_LEN_MASK) >> 21)) _pvr 192 arch/microblaze/include/asm/pvr.h #define PVR_DCACHE_BYTE_SIZE(_pvr) \ _pvr 193 arch/microblaze/include/asm/pvr.h (1 << ((_pvr.pvr[5] & PVR5_DCACHE_BYTE_SIZE_MASK) >> 16)) _pvr 195 arch/microblaze/include/asm/pvr.h #define PVR_DCACHE_USE_WRITEBACK(_pvr) \ _pvr 196 arch/microblaze/include/asm/pvr.h ((_pvr.pvr[5] & PVR5_DCACHE_USE_WRITEBACK) >> 14) _pvr 198 arch/microblaze/include/asm/pvr.h #define PVR_ICACHE_BASEADDR(_pvr) \ _pvr 199 arch/microblaze/include/asm/pvr.h (_pvr.pvr[6] & PVR6_ICACHE_BASEADDR_MASK) _pvr 200 arch/microblaze/include/asm/pvr.h #define PVR_ICACHE_HIGHADDR(_pvr) \ _pvr 201 arch/microblaze/include/asm/pvr.h (_pvr.pvr[7] & PVR7_ICACHE_HIGHADDR_MASK) _pvr 202 arch/microblaze/include/asm/pvr.h #define PVR_DCACHE_BASEADDR(_pvr) \ _pvr 203 arch/microblaze/include/asm/pvr.h (_pvr.pvr[8] & PVR8_DCACHE_BASEADDR_MASK) _pvr 204 arch/microblaze/include/asm/pvr.h #define PVR_DCACHE_HIGHADDR(_pvr) \ _pvr 205 arch/microblaze/include/asm/pvr.h (_pvr.pvr[9] & PVR9_DCACHE_HIGHADDR_MASK) _pvr 207 arch/microblaze/include/asm/pvr.h #define PVR_TARGET_FAMILY(_pvr) \ _pvr 208 arch/microblaze/include/asm/pvr.h ((_pvr.pvr[10] & PVR10_TARGET_FAMILY_MASK) >> 24) _pvr 210 arch/microblaze/include/asm/pvr.h #define PVR_MSR_RESET_VALUE(_pvr) \ _pvr 211 arch/microblaze/include/asm/pvr.h (_pvr.pvr[11] & PVR11_MSR_RESET_VALUE_MASK) _pvr 214 arch/microblaze/include/asm/pvr.h #define PVR_USE_MMU(_pvr) ((_pvr.pvr[11] & PVR11_USE_MMU) >> 30) _pvr 215 arch/microblaze/include/asm/pvr.h #define PVR_MMU_ITLB_SIZE(_pvr) (_pvr.pvr[11] & PVR11_MMU_ITLB_SIZE) _pvr 216 arch/microblaze/include/asm/pvr.h #define PVR_MMU_DTLB_SIZE(_pvr) (_pvr.pvr[11] & PVR11_MMU_DTLB_SIZE) _pvr 217 arch/microblaze/include/asm/pvr.h #define PVR_MMU_TLB_ACCESS(_pvr) (_pvr.pvr[11] & PVR11_MMU_TLB_ACCESS) _pvr 218 arch/microblaze/include/asm/pvr.h #define PVR_MMU_ZONES(_pvr) (_pvr.pvr[11] & PVR11_MMU_ZONES) _pvr 222 arch/microblaze/include/asm/pvr.h #define PVR_ENDIAN(_pvr) (_pvr.pvr[0] & PVR0_ENDI)