_phws              27 drivers/clk/meson/axg-audio.c #define AUD_GATE(_name, _reg, _bit, _phws, _iflags)			\
_phws              36 drivers/clk/meson/axg-audio.c 		.parent_hws = (const struct clk_hw *[]) { &_phws.hw },	\
_phws              59 drivers/clk/meson/axg-audio.c #define AUD_DIV(_name, _reg, _shift, _width, _dflags, _phws, _iflags)	\
_phws              70 drivers/clk/meson/axg-audio.c 		.parent_hws = (const struct clk_hw *[]) { &_phws.hw },	\
_phws             199 drivers/clk/meson/axg-audio.c 			 _hi_shift, _hi_width, _phws, _iflags)		\
_phws             216 drivers/clk/meson/axg-audio.c 		.parent_hws = (const struct clk_hw *[]) { &_phws.hw },	\
_phws             246 drivers/clk/meson/axg-audio.c 			 _phws, _iflags)				\
_phws             268 drivers/clk/meson/axg-audio.c 		.parent_hws = (const struct clk_hw *[]) { &_phws.hw },	\