_parents 34 drivers/clk/actions/owl-mux.h #define OWL_MUX(_struct, _name, _parents, _reg, \ _parents 41 drivers/clk/actions/owl-mux.h _parents, \ _parents 89 drivers/clk/clk-oxnas.c #define OXNAS_GATE(_name, _bit, _parents) \ _parents 95 drivers/clk/clk-oxnas.c .parent_names = _parents, \ _parents 96 drivers/clk/clk-oxnas.c .num_parents = ARRAY_SIZE(_parents), \ _parents 567 drivers/clk/clk-stm32h7.c #define M_MCLOCF(_name, _parents, _mux_offset, _mux_shift, _mux_width, _flags)\ _parents 570 drivers/clk/clk-stm32h7.c .parents = _parents,\ _parents 571 drivers/clk/clk-stm32h7.c .num_parents = ARRAY_SIZE(_parents),\ _parents 578 drivers/clk/clk-stm32h7.c #define M_MCLOC(_name, _parents, _mux_offset, _mux_shift, _mux_width)\ _parents 579 drivers/clk/clk-stm32h7.c M_MCLOCF(_name, _parents, _mux_offset, _mux_shift, _mux_width, 0)\ _parents 1178 drivers/clk/clk-stm32h7.c #define M_MCO_F(_name, _parents, _mux_offset, _mux_shift, _mux_width,\ _parents 1186 drivers/clk/clk-stm32h7.c .parent_name = _parents,\ _parents 1187 drivers/clk/clk-stm32h7.c .num_parents = ARRAY_SIZE(_parents),\ _parents 1140 drivers/clk/clk-stm32mp1.c #define MUX(_id, _name, _parents, _flags, _offset, _shift, _width, _mux_flags)\ _parents 1144 drivers/clk/clk-stm32mp1.c .parent_names = _parents,\ _parents 1145 drivers/clk/clk-stm32mp1.c .num_parents = ARRAY_SIZE(_parents),\ _parents 1270 drivers/clk/clk-stm32mp1.c #define COMPOSITE(_id, _name, _parents, _flags, _gate, _mux, _div)\ _parents 1274 drivers/clk/clk-stm32mp1.c .parent_names = _parents,\ _parents 1275 drivers/clk/clk-stm32mp1.c .num_parents = ARRAY_SIZE(_parents),\ _parents 1288 drivers/clk/clk-stm32mp1.c #define KCLK(_id, _name, _parents, _flags, _mgate, _mmux)\ _parents 1289 drivers/clk/clk-stm32mp1.c COMPOSITE(_id, _name, _parents, CLK_OPS_PARENT_ENABLE |\ _parents 81 drivers/clk/mediatek/clk-mtk.h #define MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, _shift, \ _parents 91 drivers/clk/mediatek/clk-mtk.h .parent_names = _parents, \ _parents 92 drivers/clk/mediatek/clk-mtk.h .num_parents = ARRAY_SIZE(_parents), \ _parents 101 drivers/clk/mediatek/clk-mtk.h #define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \ _parents 103 drivers/clk/mediatek/clk-mtk.h MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, \ _parents 110 drivers/clk/mediatek/clk-mtk.h #define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) \ _parents 111 drivers/clk/mediatek/clk-mtk.h MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \ _parents 114 drivers/clk/mediatek/clk-mtk.h #define MUX(_id, _name, _parents, _reg, _shift, _width) \ _parents 115 drivers/clk/mediatek/clk-mtk.h MUX_FLAGS(_id, _name, _parents, _reg, \ _parents 118 drivers/clk/mediatek/clk-mtk.h #define MUX_FLAGS(_id, _name, _parents, _reg, _shift, _width, _flags) { \ _parents 126 drivers/clk/mediatek/clk-mtk.h .parent_names = _parents, \ _parents 127 drivers/clk/mediatek/clk-mtk.h .num_parents = ARRAY_SIZE(_parents), \ _parents 45 drivers/clk/mediatek/clk-mux.h #define GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ _parents 58 drivers/clk/mediatek/clk-mux.h .parent_names = _parents, \ _parents 59 drivers/clk/mediatek/clk-mux.h .num_parents = ARRAY_SIZE(_parents), \ _parents 64 drivers/clk/mediatek/clk-mux.h #define MUX_GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ _parents 67 drivers/clk/mediatek/clk-mux.h GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ _parents 72 drivers/clk/mediatek/clk-mux.h #define MUX_GATE_CLR_SET_UPD(_id, _name, _parents, _mux_ofs, \ _parents 75 drivers/clk/mediatek/clk-mux.h MUX_GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, \ _parents 424 drivers/clk/meson/axg-audio.c #define AUD_TDM_PAD_CTRL(_name, _reg, _shift, _parents) \ _parents 425 drivers/clk/meson/axg-audio.c AUD_MUX(tdm_##_name, _reg, 0x7, _shift, 0, _parents, \ _parents 18 drivers/clk/pxa/clk-pxa.h static const char *const name ## _parents[] __initconst _parents 32 drivers/clk/pxa/clk-pxa.h name ## _parents, \ _parents 33 drivers/clk/pxa/clk-pxa.h ARRAY_SIZE(name ## _parents), \ _parents 47 drivers/clk/pxa/clk-pxa.h name ## _parents, \ _parents 48 drivers/clk/pxa/clk-pxa.h ARRAY_SIZE(name ## _parents), \ _parents 64 drivers/clk/pxa/clk-pxa.h name ## _parents, \ _parents 65 drivers/clk/pxa/clk-pxa.h ARRAY_SIZE(name ## _parents), \ _parents 81 drivers/clk/pxa/clk-pxa.h name ## _parents, \ _parents 82 drivers/clk/pxa/clk-pxa.h ARRAY_SIZE(name ## _parents), \ _parents 230 drivers/clk/qcom/lcc-mdm9615.c static const char * const lcc_##prefix##_parents[] = { \ _parents 243 drivers/clk/qcom/lcc-mdm9615.c .parent_names = lcc_##prefix##_parents, \ _parents 258 drivers/clk/qcom/lcc-mdm9615.c .parent_names = lcc_##prefix##_parents, \ _parents 228 drivers/clk/qcom/lcc-msm8960.c static const char * const lcc_##prefix##_parents[] = { \ _parents 241 drivers/clk/qcom/lcc-msm8960.c .parent_names = lcc_##prefix##_parents, \ _parents 256 drivers/clk/qcom/lcc-msm8960.c .parent_names = lcc_##prefix##_parents, \ _parents 39 drivers/clk/sprd/mux.h #define SPRD_MUX_CLK_TABLE(_struct, _name, _parents, _table, \ _parents 48 drivers/clk/sprd/mux.h _parents, \ _parents 54 drivers/clk/sprd/mux.h #define SPRD_MUX_CLK(_struct, _name, _parents, _reg, \ _parents 56 drivers/clk/sprd/mux.h SPRD_MUX_CLK_TABLE(_struct, _name, _parents, NULL, \ _parents 112 drivers/clk/sunxi-ng/ccu_div.h _parents, _table, \ _parents 124 drivers/clk/sunxi-ng/ccu_div.h _parents, \ _parents 130 drivers/clk/sunxi-ng/ccu_div.h #define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ _parents 134 drivers/clk/sunxi-ng/ccu_div.h _parents, NULL, \ _parents 139 drivers/clk/sunxi-ng/ccu_div.h #define SUNXI_CCU_M_WITH_MUX(_struct, _name, _parents, _reg, \ _parents 143 drivers/clk/sunxi-ng/ccu_div.h _parents, NULL, \ _parents 34 drivers/clk/sunxi-ng/ccu_mp.h #define SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(_struct, _name, _parents, _reg, \ _parents 49 drivers/clk/sunxi-ng/ccu_mp.h _parents, \ _parents 55 drivers/clk/sunxi-ng/ccu_mp.h #define SUNXI_CCU_MP_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ _parents 68 drivers/clk/sunxi-ng/ccu_mp.h _parents, \ _parents 74 drivers/clk/sunxi-ng/ccu_mp.h #define SUNXI_CCU_MP_WITH_MUX(_struct, _name, _parents, _reg, \ _parents 79 drivers/clk/sunxi-ng/ccu_mp.h SUNXI_CCU_MP_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ _parents 103 drivers/clk/sunxi-ng/ccu_mp.h #define SUNXI_CCU_MP_MMC_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ _parents 114 drivers/clk/sunxi-ng/ccu_mp.h _parents, \ _parents 50 drivers/clk/sunxi-ng/ccu_mux.h #define SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, _table, \ _parents 59 drivers/clk/sunxi-ng/ccu_mux.h _parents, \ _parents 65 drivers/clk/sunxi-ng/ccu_mux.h #define SUNXI_CCU_MUX_WITH_GATE(_struct, _name, _parents, _reg, \ _parents 67 drivers/clk/sunxi-ng/ccu_mux.h SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, NULL, \ _parents 71 drivers/clk/sunxi-ng/ccu_mux.h #define SUNXI_CCU_MUX(_struct, _name, _parents, _reg, _shift, _width, \ _parents 73 drivers/clk/sunxi-ng/ccu_mux.h SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, NULL, \ _parents 34 drivers/clk/sunxi-ng/ccu_nkm.h #define SUNXI_CCU_NKM_WITH_MUX_GATE_LOCK(_struct, _name, _parents, _reg, \ _parents 50 drivers/clk/sunxi-ng/ccu_nkm.h _parents, \ _parents 132 drivers/clk/tegra/clk-tegra-periph.c #define MUX(_name, _parents, _offset, \ _parents 134 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _parents 136 drivers/clk/tegra/clk-tegra-periph.c _clk_num, _gate_flags, _clk_id, _parents##_idx, 0,\ _parents 139 drivers/clk/tegra/clk-tegra-periph.c #define MUX_FLAGS(_name, _parents, _offset,\ _parents 141 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _parents 143 drivers/clk/tegra/clk-tegra-periph.c _clk_num, _gate_flags, _clk_id, _parents##_idx, flags,\ _parents 146 drivers/clk/tegra/clk-tegra-periph.c #define MUX8(_name, _parents, _offset, \ _parents 148 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _parents 150 drivers/clk/tegra/clk-tegra-periph.c _clk_num, _gate_flags, _clk_id, _parents##_idx, 0,\ _parents 153 drivers/clk/tegra/clk-tegra-periph.c #define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock) \ _parents 154 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \ _parents 157 drivers/clk/tegra/clk-tegra-periph.c _parents##_idx, 0, _lock) _parents 159 drivers/clk/tegra/clk-tegra-periph.c #define MUX8_NOGATE(_name, _parents, _offset, _clk_id) \ _parents 160 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \ _parents 163 drivers/clk/tegra/clk-tegra-periph.c _parents##_idx, 0, NULL) _parents 165 drivers/clk/tegra/clk-tegra-periph.c #define INT(_name, _parents, _offset, \ _parents 167 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _parents 170 drivers/clk/tegra/clk-tegra-periph.c _clk_id, _parents##_idx, 0, NULL) _parents 172 drivers/clk/tegra/clk-tegra-periph.c #define INT_FLAGS(_name, _parents, _offset,\ _parents 174 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _parents 177 drivers/clk/tegra/clk-tegra-periph.c _clk_id, _parents##_idx, flags, NULL) _parents 179 drivers/clk/tegra/clk-tegra-periph.c #define INT8(_name, _parents, _offset,\ _parents 181 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _parents 184 drivers/clk/tegra/clk-tegra-periph.c _clk_id, _parents##_idx, 0, NULL) _parents 186 drivers/clk/tegra/clk-tegra-periph.c #define UART(_name, _parents, _offset,\ _parents 188 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _parents 191 drivers/clk/tegra/clk-tegra-periph.c _parents##_idx, 0, NULL) _parents 193 drivers/clk/tegra/clk-tegra-periph.c #define UART8(_name, _parents, _offset,\ _parents 195 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _parents 198 drivers/clk/tegra/clk-tegra-periph.c _parents##_idx, 0, NULL) _parents 200 drivers/clk/tegra/clk-tegra-periph.c #define I2C(_name, _parents, _offset,\ _parents 202 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _parents 205 drivers/clk/tegra/clk-tegra-periph.c _parents##_idx, 0, NULL) _parents 207 drivers/clk/tegra/clk-tegra-periph.c #define XUSB(_name, _parents, _offset, \ _parents 209 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \ _parents 212 drivers/clk/tegra/clk-tegra-periph.c _clk_id, _parents##_idx, 0, NULL) _parents 221 drivers/clk/tegra/clk-tegra-periph.c #define NODIV(_name, _parents, _offset, \ _parents 224 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _parents 227 drivers/clk/tegra/clk-tegra-periph.c _clk_id, _parents##_idx, 0, _lock) _parents 41 drivers/clk/tegra/clk-tegra-pmc.c .parents = clk_out ##_num ##_parents,\ _parents 42 drivers/clk/tegra/clk-tegra-pmc.c .num_parents = ARRAY_SIZE(clk_out ##_num ##_parents),\ _parents 115 drivers/clk/tegra/clk-tegra114.c #define MUX8(_name, _parents, _offset, \ _parents 117 drivers/clk/tegra/clk-tegra114.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _parents 119 drivers/clk/tegra/clk-tegra114.c _clk_num, _gate_flags, _clk_id, _parents##_idx, 0,\ _parents 135 drivers/clk/tegra/clk-tegra20.c #define TEGRA_INIT_DATA_MUX(_name, _parents, _offset, \ _parents 137 drivers/clk/tegra/clk-tegra20.c TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset, \ _parents 142 drivers/clk/tegra/clk-tegra20.c #define TEGRA_INIT_DATA_DIV16(_name, _parents, _offset, \ _parents 144 drivers/clk/tegra/clk-tegra20.c TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset, \ _parents 149 drivers/clk/tegra/clk-tegra20.c #define TEGRA_INIT_DATA_NODIV(_name, _parents, _offset, \ _parents 152 drivers/clk/tegra/clk-tegra20.c TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset, \ _parents 156 drivers/clk/tegra/clk-tegra30.c #define TEGRA_INIT_DATA_MUX(_name, _parents, _offset, \ _parents 158 drivers/clk/tegra/clk-tegra30.c TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset, \ _parents 162 drivers/clk/tegra/clk-tegra30.c #define TEGRA_INIT_DATA_MUX8(_name, _parents, _offset, \ _parents 164 drivers/clk/tegra/clk-tegra30.c TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset, \ _parents 168 drivers/clk/tegra/clk-tegra30.c #define TEGRA_INIT_DATA_INT(_name, _parents, _offset, \ _parents 170 drivers/clk/tegra/clk-tegra30.c TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset, \ _parents 175 drivers/clk/tegra/clk-tegra30.c #define TEGRA_INIT_DATA_NODIV(_name, _parents, _offset, \ _parents 178 drivers/clk/tegra/clk-tegra30.c TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset, \ _parents 944 include/linux/clk-provider.h #define CLK_HW_INIT_PARENTS(_name, _parents, _ops, _flags) \ _parents 948 include/linux/clk-provider.h .parent_names = _parents, \ _parents 949 include/linux/clk-provider.h .num_parents = ARRAY_SIZE(_parents), \ _parents 953 include/linux/clk-provider.h #define CLK_HW_INIT_PARENTS_HW(_name, _parents, _ops, _flags) \ _parents 957 include/linux/clk-provider.h .parent_hws = _parents, \ _parents 958 include/linux/clk-provider.h .num_parents = ARRAY_SIZE(_parents), \ _parents 962 include/linux/clk-provider.h #define CLK_HW_INIT_PARENTS_DATA(_name, _parents, _ops, _flags) \ _parents 966 include/linux/clk-provider.h .parent_data = _parents, \ _parents 967 include/linux/clk-provider.h .num_parents = ARRAY_SIZE(_parents), \ _parents 175 include/linux/sh_clk.h #define SH_CLK_DIV6_EXT(_reg, _flags, _parents, \ _parents 182 include/linux/sh_clk.h .parent_table = _parents, \