_parent           125 arch/sh/kernel/cpu/sh4a/clock-sh7343.c #define MSTP(_parent, _reg, _bit, _flags) \
_parent           126 arch/sh/kernel/cpu/sh4a/clock-sh7343.c   SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
_parent           128 arch/sh/kernel/cpu/sh4a/clock-sh7366.c #define MSTP(_parent, _reg, _bit, _flags) \
_parent           129 arch/sh/kernel/cpu/sh4a/clock-sh7366.c   SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
_parent            37 drivers/clk/actions/owl-composite.h #define OWL_COMP_DIV(_struct, _name, _parent,				\
_parent            46 drivers/clk/actions/owl-composite.h 						     _parent,		\
_parent            52 drivers/clk/actions/owl-composite.h #define OWL_COMP_DIV_FIXED(_struct, _name, _parent,			\
_parent            60 drivers/clk/actions/owl-composite.h 						     _parent,		\
_parent            66 drivers/clk/actions/owl-composite.h #define OWL_COMP_FACTOR(_struct, _name, _parent,			\
_parent            75 drivers/clk/actions/owl-composite.h 						     _parent,		\
_parent            81 drivers/clk/actions/owl-composite.h #define OWL_COMP_FIXED_FACTOR(_struct, _name, _parent,			\
_parent            91 drivers/clk/actions/owl-composite.h 						 _parent,		\
_parent            97 drivers/clk/actions/owl-composite.h #define OWL_COMP_PASS(_struct, _name, _parent,				\
_parent           105 drivers/clk/actions/owl-composite.h 						     _parent,		\
_parent            38 drivers/clk/actions/owl-divider.h #define OWL_DIVIDER(_struct, _name, _parent, _reg,			\
_parent            46 drivers/clk/actions/owl-divider.h 						      _parent,		\
_parent            44 drivers/clk/actions/owl-factor.h #define OWL_FACTOR(_struct, _name, _parent, _reg,			\
_parent            52 drivers/clk/actions/owl-factor.h 						      _parent,		\
_parent            16 drivers/clk/actions/owl-fixed-factor.h #define OWL_FIX_FACT(_struct, _name, _parent, _mul, _div, _flags)	\
_parent            21 drivers/clk/actions/owl-fixed-factor.h 					      _parent,			\
_parent            34 drivers/clk/actions/owl-gate.h #define OWL_GATE(_struct, _name, _parent, _reg,				\
_parent            41 drivers/clk/actions/owl-gate.h 						      _parent,		\
_parent            55 drivers/clk/actions/owl-pll.h #define OWL_PLL(_struct, _name, _parent, _reg, _bfreq, _bit_idx,	\
_parent            64 drivers/clk/actions/owl-pll.h 					       _parent,			\
_parent           598 drivers/clk/clk-stm32h7.c #define OSC_CLKF(_name, _parent, _gate_offset, _bit_idx, _bit_rdy, _flags)\
_parent           601 drivers/clk/clk-stm32h7.c 	.parent		= _parent,\
_parent           608 drivers/clk/clk-stm32h7.c #define OSC_CLK(_name, _parent, _gate_offset, _bit_idx, _bit_rdy)\
_parent           609 drivers/clk/clk-stm32h7.c 	OSC_CLKF(_name, _parent, _gate_offset, _bit_idx, _bit_rdy, 0)
_parent           938 drivers/clk/clk-stm32h7.c #define M_ODF_F(_name, _parent, _gate_offset,  _bit_idx, _rate_offset,\
_parent           945 drivers/clk/clk-stm32h7.c 	.parent_name = &(const char *) {_parent},\
_parent           950 drivers/clk/clk-stm32h7.c #define M_ODF(_name, _parent, _gate_offset,  _bit_idx, _rate_offset,\
_parent           952 drivers/clk/clk-stm32h7.c M_ODF_F(_name, _parent, _gate_offset,  _bit_idx, _rate_offset,\
_parent           986 drivers/clk/clk-stm32h7.c #define PER_CLKF(_gate_offset, _bit_idx, _name, _parent, _flags)\
_parent           991 drivers/clk/clk-stm32h7.c 	.parent		= _parent,\
_parent           995 drivers/clk/clk-stm32h7.c #define PER_CLK(_gate_offset, _bit_idx, _name, _parent)\
_parent           996 drivers/clk/clk-stm32h7.c 	PER_CLKF(_gate_offset, _bit_idx, _name, _parent, 0)
_parent          1092 drivers/clk/clk-stm32mp1.c #define GATE(_id, _name, _parent, _flags, _offset, _bit_idx, _gate_flags)\
_parent          1096 drivers/clk/clk-stm32mp1.c 	.parent_name	= _parent,\
_parent          1106 drivers/clk/clk-stm32mp1.c #define FIXED_FACTOR(_id, _name, _parent, _flags, _mult, _div)\
_parent          1110 drivers/clk/clk-stm32mp1.c 	.parent_name	= _parent,\
_parent          1119 drivers/clk/clk-stm32mp1.c #define DIV_TABLE(_id, _name, _parent, _flags, _offset, _shift, _width,\
_parent          1124 drivers/clk/clk-stm32mp1.c 	.parent_name	= _parent,\
_parent          1136 drivers/clk/clk-stm32mp1.c #define DIV(_id, _name, _parent, _flags, _offset, _shift, _width, _div_flags)\
_parent          1137 drivers/clk/clk-stm32mp1.c 	DIV_TABLE(_id, _name, _parent, _flags, _offset, _shift, _width,\
_parent          1156 drivers/clk/clk-stm32mp1.c #define PLL(_id, _name, _parent, _flags, _offset)\
_parent          1160 drivers/clk/clk-stm32mp1.c 	.parent_name	= _parent,\
_parent          1168 drivers/clk/clk-stm32mp1.c #define STM32_CKTIM(_name, _parent, _flags, _offset_apbdiv, _offset_timpre)\
_parent          1172 drivers/clk/clk-stm32mp1.c 	.parent_name	= _parent,\
_parent          1181 drivers/clk/clk-stm32mp1.c #define STM32_TIM(_id, _name, _parent, _offset_set, _bit_idx)\
_parent          1182 drivers/clk/clk-stm32mp1.c 		  GATE_MP1(_id, _name, _parent, CLK_SET_RATE_PARENT,\
_parent          1186 drivers/clk/clk-stm32mp1.c #define STM32_GATE(_id, _name, _parent, _flags, _gate)\
_parent          1190 drivers/clk/clk-stm32mp1.c 	.parent_name	= _parent,\
_parent          1221 drivers/clk/clk-stm32mp1.c #define GATE_MP1(_id, _name, _parent, _flags, _offset, _bit_idx, _gate_flags)\
_parent          1222 drivers/clk/clk-stm32mp1.c 	STM32_GATE(_id, _name, _parent, _flags,\
_parent          1225 drivers/clk/clk-stm32mp1.c #define MGATE_MP1(_id, _name, _parent, _flags, _mgate)\
_parent          1226 drivers/clk/clk-stm32mp1.c 	STM32_GATE(_id, _name, _parent, _flags,\
_parent          1264 drivers/clk/clk-stm32mp1.c #define PARENT(_parent) ((const char *[]) { _parent})
_parent          1285 drivers/clk/clk-stm32mp1.c #define PCLK(_id, _name, _parent, _flags, _mgate)\
_parent          1286 drivers/clk/clk-stm32mp1.c 	MGATE_MP1(_id, _name, _parent, _flags, _mgate)
_parent            46 drivers/clk/mediatek/clk-gate.h #define GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift,	\
_parent            50 drivers/clk/mediatek/clk-gate.h 		.parent_name = _parent,				\
_parent            57 drivers/clk/mediatek/clk-gate.h #define GATE_MTK(_id, _name, _parent, _regs, _shift, _ops)		\
_parent            58 drivers/clk/mediatek/clk-gate.h 	GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift, _ops, 0)
_parent            18 drivers/clk/mediatek/clk-mt2701-aud.c #define GATE_AUDIO0(_id, _name, _parent, _shift) {	\
_parent            21 drivers/clk/mediatek/clk-mt2701-aud.c 		.parent_name = _parent,			\
_parent            27 drivers/clk/mediatek/clk-mt2701-aud.c #define GATE_AUDIO1(_id, _name, _parent, _shift) {	\
_parent            30 drivers/clk/mediatek/clk-mt2701-aud.c 		.parent_name = _parent,			\
_parent            36 drivers/clk/mediatek/clk-mt2701-aud.c #define GATE_AUDIO2(_id, _name, _parent, _shift) {	\
_parent            39 drivers/clk/mediatek/clk-mt2701-aud.c 		.parent_name = _parent,			\
_parent            45 drivers/clk/mediatek/clk-mt2701-aud.c #define GATE_AUDIO3(_id, _name, _parent, _shift) {	\
_parent            48 drivers/clk/mediatek/clk-mt2701-aud.c 		.parent_name = _parent,			\
_parent            27 drivers/clk/mediatek/clk-mt2701-bdp.c #define GATE_BDP0(_id, _name, _parent, _shift) {	\
_parent            30 drivers/clk/mediatek/clk-mt2701-bdp.c 		.parent_name = _parent,			\
_parent            36 drivers/clk/mediatek/clk-mt2701-bdp.c #define GATE_BDP1(_id, _name, _parent, _shift) {	\
_parent            39 drivers/clk/mediatek/clk-mt2701-bdp.c 		.parent_name = _parent,			\
_parent            19 drivers/clk/mediatek/clk-mt2701-eth.c #define GATE_ETH(_id, _name, _parent, _shift) {		\
_parent            22 drivers/clk/mediatek/clk-mt2701-eth.c 		.parent_name = _parent,			\
_parent            19 drivers/clk/mediatek/clk-mt2701-g3d.c #define GATE_G3D(_id, _name, _parent, _shift) {	\
_parent            22 drivers/clk/mediatek/clk-mt2701-g3d.c 		.parent_name = _parent,			\
_parent            19 drivers/clk/mediatek/clk-mt2701-hif.c #define GATE_HIF(_id, _name, _parent, _shift) {		\
_parent            22 drivers/clk/mediatek/clk-mt2701-hif.c 		.parent_name = _parent,			\
_parent            21 drivers/clk/mediatek/clk-mt2701-img.c #define GATE_IMG(_id, _name, _parent, _shift) {		\
_parent            24 drivers/clk/mediatek/clk-mt2701-img.c 		.parent_name = _parent,			\
_parent            27 drivers/clk/mediatek/clk-mt2701-mm.c #define GATE_DISP0(_id, _name, _parent, _shift) {	\
_parent            30 drivers/clk/mediatek/clk-mt2701-mm.c 		.parent_name = _parent,			\
_parent            36 drivers/clk/mediatek/clk-mt2701-mm.c #define GATE_DISP1(_id, _name, _parent, _shift) {	\
_parent            39 drivers/clk/mediatek/clk-mt2701-mm.c 		.parent_name = _parent,			\
_parent            27 drivers/clk/mediatek/clk-mt2701-vdec.c #define GATE_VDEC0(_id, _name, _parent, _shift) {	\
_parent            30 drivers/clk/mediatek/clk-mt2701-vdec.c 		.parent_name = _parent,			\
_parent            36 drivers/clk/mediatek/clk-mt2701-vdec.c #define GATE_VDEC1(_id, _name, _parent, _shift) {	\
_parent            39 drivers/clk/mediatek/clk-mt2701-vdec.c 		.parent_name = _parent,			\
_parent           638 drivers/clk/mediatek/clk-mt2701.c #define GATE_TOP_AUD(_id, _name, _parent, _shift) {	\
_parent           641 drivers/clk/mediatek/clk-mt2701.c 		.parent_name = _parent,			\
_parent           703 drivers/clk/mediatek/clk-mt2701.c #define GATE_ICG(_id, _name, _parent, _shift) {		\
_parent           706 drivers/clk/mediatek/clk-mt2701.c 		.parent_name = _parent,			\
_parent           804 drivers/clk/mediatek/clk-mt2701.c #define GATE_PERI0(_id, _name, _parent, _shift) {	\
_parent           807 drivers/clk/mediatek/clk-mt2701.c 		.parent_name = _parent,			\
_parent           813 drivers/clk/mediatek/clk-mt2701.c #define GATE_PERI1(_id, _name, _parent, _shift) {	\
_parent           816 drivers/clk/mediatek/clk-mt2701.c 		.parent_name = _parent,			\
_parent            21 drivers/clk/mediatek/clk-mt2712-bdp.c #define GATE_BDP(_id, _name, _parent, _shift) {	\
_parent            24 drivers/clk/mediatek/clk-mt2712-bdp.c 		.parent_name = _parent,			\
_parent            21 drivers/clk/mediatek/clk-mt2712-img.c #define GATE_IMG(_id, _name, _parent, _shift) {	\
_parent            24 drivers/clk/mediatek/clk-mt2712-img.c 		.parent_name = _parent,			\
_parent            21 drivers/clk/mediatek/clk-mt2712-jpgdec.c #define GATE_JPGDEC(_id, _name, _parent, _shift) {	\
_parent            24 drivers/clk/mediatek/clk-mt2712-jpgdec.c 		.parent_name = _parent,			\
_parent            21 drivers/clk/mediatek/clk-mt2712-mfg.c #define GATE_MFG(_id, _name, _parent, _shift) {	\
_parent            24 drivers/clk/mediatek/clk-mt2712-mfg.c 		.parent_name = _parent,			\
_parent            33 drivers/clk/mediatek/clk-mt2712-mm.c #define GATE_MM0(_id, _name, _parent, _shift) {	\
_parent            36 drivers/clk/mediatek/clk-mt2712-mm.c 		.parent_name = _parent,			\
_parent            42 drivers/clk/mediatek/clk-mt2712-mm.c #define GATE_MM1(_id, _name, _parent, _shift) {	\
_parent            45 drivers/clk/mediatek/clk-mt2712-mm.c 		.parent_name = _parent,			\
_parent            51 drivers/clk/mediatek/clk-mt2712-mm.c #define GATE_MM2(_id, _name, _parent, _shift) {	\
_parent            54 drivers/clk/mediatek/clk-mt2712-mm.c 		.parent_name = _parent,			\
_parent            27 drivers/clk/mediatek/clk-mt2712-vdec.c #define GATE_VDEC0(_id, _name, _parent, _shift) {	\
_parent            30 drivers/clk/mediatek/clk-mt2712-vdec.c 		.parent_name = _parent,			\
_parent            36 drivers/clk/mediatek/clk-mt2712-vdec.c #define GATE_VDEC1(_id, _name, _parent, _shift) {	\
_parent            39 drivers/clk/mediatek/clk-mt2712-vdec.c 		.parent_name = _parent,			\
_parent            21 drivers/clk/mediatek/clk-mt2712-venc.c #define GATE_VENC(_id, _name, _parent, _shift) {	\
_parent            24 drivers/clk/mediatek/clk-mt2712-venc.c 		.parent_name = _parent,			\
_parent           960 drivers/clk/mediatek/clk-mt2712.c #define GATE_TOP0(_id, _name, _parent, _shift) {	\
_parent           963 drivers/clk/mediatek/clk-mt2712.c 		.parent_name = _parent,			\
_parent           969 drivers/clk/mediatek/clk-mt2712.c #define GATE_TOP1(_id, _name, _parent, _shift) {	\
_parent           972 drivers/clk/mediatek/clk-mt2712.c 		.parent_name = _parent,			\
_parent          1000 drivers/clk/mediatek/clk-mt2712.c #define GATE_INFRA(_id, _name, _parent, _shift) {	\
_parent          1003 drivers/clk/mediatek/clk-mt2712.c 		.parent_name = _parent,			\
_parent          1037 drivers/clk/mediatek/clk-mt2712.c #define GATE_PERI0(_id, _name, _parent, _shift) {	\
_parent          1040 drivers/clk/mediatek/clk-mt2712.c 		.parent_name = _parent,			\
_parent          1046 drivers/clk/mediatek/clk-mt2712.c #define GATE_PERI1(_id, _name, _parent, _shift) {	\
_parent          1049 drivers/clk/mediatek/clk-mt2712.c 		.parent_name = _parent,			\
_parent          1055 drivers/clk/mediatek/clk-mt2712.c #define GATE_PERI2(_id, _name, _parent, _shift) {	\
_parent          1058 drivers/clk/mediatek/clk-mt2712.c 		.parent_name = _parent,			\
_parent            30 drivers/clk/mediatek/clk-mt6779-aud.c #define GATE_AUDIO0(_id, _name, _parent, _shift)		\
_parent            31 drivers/clk/mediatek/clk-mt6779-aud.c 	GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift,	\
_parent            33 drivers/clk/mediatek/clk-mt6779-aud.c #define GATE_AUDIO1(_id, _name, _parent, _shift)		\
_parent            34 drivers/clk/mediatek/clk-mt6779-aud.c 	GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift,	\
_parent            20 drivers/clk/mediatek/clk-mt6779-cam.c #define GATE_CAM(_id, _name, _parent, _shift)			\
_parent            21 drivers/clk/mediatek/clk-mt6779-cam.c 	GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift,	\
_parent            20 drivers/clk/mediatek/clk-mt6779-img.c #define GATE_IMG(_id, _name, _parent, _shift)			\
_parent            21 drivers/clk/mediatek/clk-mt6779-img.c 	GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift,	\
_parent            20 drivers/clk/mediatek/clk-mt6779-ipe.c #define GATE_IPE(_id, _name, _parent, _shift)			\
_parent            21 drivers/clk/mediatek/clk-mt6779-ipe.c 	GATE_MTK(_id, _name, _parent, &ipe_cg_regs, _shift,	\
_parent            21 drivers/clk/mediatek/clk-mt6779-mfg.c #define GATE_MFG(_id, _name, _parent, _shift)			\
_parent            22 drivers/clk/mediatek/clk-mt6779-mfg.c 	GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift,	\
_parent            26 drivers/clk/mediatek/clk-mt6779-mm.c #define GATE_MM0(_id, _name, _parent, _shift)			\
_parent            27 drivers/clk/mediatek/clk-mt6779-mm.c 	GATE_MTK(_id, _name, _parent, &mm0_cg_regs, _shift,	\
_parent            29 drivers/clk/mediatek/clk-mt6779-mm.c #define GATE_MM1(_id, _name, _parent, _shift)			\
_parent            30 drivers/clk/mediatek/clk-mt6779-mm.c 	GATE_MTK(_id, _name, _parent, &mm1_cg_regs, _shift,	\
_parent            27 drivers/clk/mediatek/clk-mt6779-vdec.c #define GATE_VDEC0_I(_id, _name, _parent, _shift)		\
_parent            28 drivers/clk/mediatek/clk-mt6779-vdec.c 	GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift,	\
_parent            30 drivers/clk/mediatek/clk-mt6779-vdec.c #define GATE_VDEC1_I(_id, _name, _parent, _shift)		\
_parent            31 drivers/clk/mediatek/clk-mt6779-vdec.c 	GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift,	\
_parent            21 drivers/clk/mediatek/clk-mt6779-venc.c #define GATE_VENC_I(_id, _name, _parent, _shift)		\
_parent            22 drivers/clk/mediatek/clk-mt6779-venc.c 	GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift,	\
_parent           867 drivers/clk/mediatek/clk-mt6779.c #define GATE_INFRA0(_id, _name, _parent, _shift)		\
_parent           868 drivers/clk/mediatek/clk-mt6779.c 	GATE_MTK(_id, _name, _parent, &infra0_cg_regs, _shift,	\
_parent           870 drivers/clk/mediatek/clk-mt6779.c #define GATE_INFRA1(_id, _name, _parent, _shift)		\
_parent           871 drivers/clk/mediatek/clk-mt6779.c 	GATE_MTK(_id, _name, _parent, &infra1_cg_regs, _shift,	\
_parent           873 drivers/clk/mediatek/clk-mt6779.c #define GATE_INFRA2(_id, _name, _parent, _shift)		\
_parent           874 drivers/clk/mediatek/clk-mt6779.c 	GATE_MTK(_id, _name, _parent, &infra2_cg_regs, _shift,	\
_parent           876 drivers/clk/mediatek/clk-mt6779.c #define GATE_INFRA3(_id, _name, _parent, _shift)		\
_parent           877 drivers/clk/mediatek/clk-mt6779.c 	GATE_MTK(_id, _name, _parent, &infra3_cg_regs, _shift,	\
_parent          1103 drivers/clk/mediatek/clk-mt6779.c #define GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, _flags)	\
_parent          1104 drivers/clk/mediatek/clk-mt6779.c 	GATE_MTK_FLAGS(_id, _name, _parent, &apmixed_cg_regs,		\
_parent          1107 drivers/clk/mediatek/clk-mt6779.c #define GATE_APMIXED(_id, _name, _parent, _shift)	\
_parent          1108 drivers/clk/mediatek/clk-mt6779.c 	GATE_APMIXED_FLAGS(_id, _name, _parent, _shift,	0)
_parent            19 drivers/clk/mediatek/clk-mt6797-img.c #define GATE_IMG(_id, _name, _parent, _shift) {		\
_parent            22 drivers/clk/mediatek/clk-mt6797-img.c 		.parent_name = _parent,			\
_parent            26 drivers/clk/mediatek/clk-mt6797-mm.c #define GATE_MM0(_id, _name, _parent, _shift) {			\
_parent            29 drivers/clk/mediatek/clk-mt6797-mm.c 	.parent_name = _parent,				\
_parent            35 drivers/clk/mediatek/clk-mt6797-mm.c #define GATE_MM1(_id, _name, _parent, _shift) {			\
_parent            38 drivers/clk/mediatek/clk-mt6797-mm.c 	.parent_name = _parent,				\
_parent            27 drivers/clk/mediatek/clk-mt6797-vdec.c #define GATE_VDEC0(_id, _name, _parent, _shift) {		\
_parent            30 drivers/clk/mediatek/clk-mt6797-vdec.c 	.parent_name = _parent,				\
_parent            36 drivers/clk/mediatek/clk-mt6797-vdec.c #define GATE_VDEC1(_id, _name, _parent, _shift) {		\
_parent            39 drivers/clk/mediatek/clk-mt6797-vdec.c 	.parent_name = _parent,				\
_parent            21 drivers/clk/mediatek/clk-mt6797-venc.c #define GATE_VENC(_id, _name, _parent, _shift) {	\
_parent            24 drivers/clk/mediatek/clk-mt6797-venc.c 		.parent_name = _parent,			\
_parent           423 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG0(_id, _name, _parent, _shift) {		\
_parent           426 drivers/clk/mediatek/clk-mt6797.c 	.parent_name = _parent,					\
_parent           432 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG1(_id, _name, _parent, _shift)			\
_parent           433 drivers/clk/mediatek/clk-mt6797.c 	GATE_ICG1_FLAGS(_id, _name, _parent, _shift, 0)
_parent           435 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG1_FLAGS(_id, _name, _parent, _shift, _flags) {	\
_parent           438 drivers/clk/mediatek/clk-mt6797.c 	.parent_name = _parent,					\
_parent           445 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG2(_id, _name, _parent, _shift)			\
_parent           446 drivers/clk/mediatek/clk-mt6797.c 	GATE_ICG2_FLAGS(_id, _name, _parent, _shift, 0)
_parent           448 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG2_FLAGS(_id, _name, _parent, _shift, _flags) {	\
_parent           451 drivers/clk/mediatek/clk-mt6797.c 	.parent_name = _parent,					\
_parent            19 drivers/clk/mediatek/clk-mt7622-aud.c #define GATE_AUDIO0(_id, _name, _parent, _shift) {	\
_parent            22 drivers/clk/mediatek/clk-mt7622-aud.c 		.parent_name = _parent,			\
_parent            28 drivers/clk/mediatek/clk-mt7622-aud.c #define GATE_AUDIO1(_id, _name, _parent, _shift) {	\
_parent            31 drivers/clk/mediatek/clk-mt7622-aud.c 		.parent_name = _parent,			\
_parent            37 drivers/clk/mediatek/clk-mt7622-aud.c #define GATE_AUDIO2(_id, _name, _parent, _shift) {	\
_parent            40 drivers/clk/mediatek/clk-mt7622-aud.c 		.parent_name = _parent,			\
_parent            46 drivers/clk/mediatek/clk-mt7622-aud.c #define GATE_AUDIO3(_id, _name, _parent, _shift) {	\
_parent            49 drivers/clk/mediatek/clk-mt7622-aud.c 		.parent_name = _parent,			\
_parent            19 drivers/clk/mediatek/clk-mt7622-eth.c #define GATE_ETH(_id, _name, _parent, _shift) {	\
_parent            22 drivers/clk/mediatek/clk-mt7622-eth.c 		.parent_name = _parent,			\
_parent            48 drivers/clk/mediatek/clk-mt7622-eth.c #define GATE_SGMII(_id, _name, _parent, _shift) {	\
_parent            51 drivers/clk/mediatek/clk-mt7622-eth.c 		.parent_name = _parent,			\
_parent            19 drivers/clk/mediatek/clk-mt7622-hif.c #define GATE_PCIE(_id, _name, _parent, _shift) {	\
_parent            22 drivers/clk/mediatek/clk-mt7622-hif.c 		.parent_name = _parent,			\
_parent            28 drivers/clk/mediatek/clk-mt7622-hif.c #define GATE_SSUSB(_id, _name, _parent, _shift) {	\
_parent            31 drivers/clk/mediatek/clk-mt7622-hif.c 		.parent_name = _parent,			\
_parent            52 drivers/clk/mediatek/clk-mt7622.c #define GATE_APMIXED(_id, _name, _parent, _shift) {			\
_parent            55 drivers/clk/mediatek/clk-mt7622.c 		.parent_name = _parent,					\
_parent            61 drivers/clk/mediatek/clk-mt7622.c #define GATE_INFRA(_id, _name, _parent, _shift) {			\
_parent            64 drivers/clk/mediatek/clk-mt7622.c 		.parent_name = _parent,					\
_parent            70 drivers/clk/mediatek/clk-mt7622.c #define GATE_TOP0(_id, _name, _parent, _shift) {			\
_parent            73 drivers/clk/mediatek/clk-mt7622.c 		.parent_name = _parent,					\
_parent            79 drivers/clk/mediatek/clk-mt7622.c #define GATE_TOP1(_id, _name, _parent, _shift) {			\
_parent            82 drivers/clk/mediatek/clk-mt7622.c 		.parent_name = _parent,					\
_parent            88 drivers/clk/mediatek/clk-mt7622.c #define GATE_PERI0(_id, _name, _parent, _shift) {			\
_parent            91 drivers/clk/mediatek/clk-mt7622.c 		.parent_name = _parent,					\
_parent            97 drivers/clk/mediatek/clk-mt7622.c #define GATE_PERI1(_id, _name, _parent, _shift) {			\
_parent           100 drivers/clk/mediatek/clk-mt7622.c 		.parent_name = _parent,					\
_parent            19 drivers/clk/mediatek/clk-mt7629-eth.c #define GATE_ETH(_id, _name, _parent, _shift) {		\
_parent            22 drivers/clk/mediatek/clk-mt7629-eth.c 		.parent_name = _parent,			\
_parent            48 drivers/clk/mediatek/clk-mt7629-eth.c #define GATE_SGMII(_id, _name, _parent, _shift) {	\
_parent            51 drivers/clk/mediatek/clk-mt7629-eth.c 		.parent_name = _parent,			\
_parent            19 drivers/clk/mediatek/clk-mt7629-hif.c #define GATE_PCIE(_id, _name, _parent, _shift) {	\
_parent            22 drivers/clk/mediatek/clk-mt7629-hif.c 		.parent_name = _parent,			\
_parent            28 drivers/clk/mediatek/clk-mt7629-hif.c #define GATE_SSUSB(_id, _name, _parent, _shift) {	\
_parent            31 drivers/clk/mediatek/clk-mt7629-hif.c 		.parent_name = _parent,			\
_parent            52 drivers/clk/mediatek/clk-mt7629.c #define GATE_APMIXED(_id, _name, _parent, _shift) {	\
_parent            55 drivers/clk/mediatek/clk-mt7629.c 		.parent_name = _parent,			\
_parent            61 drivers/clk/mediatek/clk-mt7629.c #define GATE_INFRA(_id, _name, _parent, _shift) {	\
_parent            64 drivers/clk/mediatek/clk-mt7629.c 		.parent_name = _parent,			\
_parent            70 drivers/clk/mediatek/clk-mt7629.c #define GATE_PERI0(_id, _name, _parent, _shift) {	\
_parent            73 drivers/clk/mediatek/clk-mt7629.c 		.parent_name = _parent,			\
_parent            79 drivers/clk/mediatek/clk-mt7629.c #define GATE_PERI1(_id, _name, _parent, _shift) {	\
_parent            82 drivers/clk/mediatek/clk-mt7629.c 		.parent_name = _parent,			\
_parent           403 drivers/clk/mediatek/clk-mt8135.c #define GATE_ICG(_id, _name, _parent, _shift) {	\
_parent           406 drivers/clk/mediatek/clk-mt8135.c 		.parent_name = _parent,				\
_parent           440 drivers/clk/mediatek/clk-mt8135.c #define GATE_PERI0(_id, _name, _parent, _shift) {	\
_parent           443 drivers/clk/mediatek/clk-mt8135.c 		.parent_name = _parent,				\
_parent           449 drivers/clk/mediatek/clk-mt8135.c #define GATE_PERI1(_id, _name, _parent, _shift) {	\
_parent           452 drivers/clk/mediatek/clk-mt8135.c 		.parent_name = _parent,				\
_parent           622 drivers/clk/mediatek/clk-mt8173.c #define GATE_ICG(_id, _name, _parent, _shift) {	\
_parent           625 drivers/clk/mediatek/clk-mt8173.c 		.parent_name = _parent,				\
_parent           661 drivers/clk/mediatek/clk-mt8173.c #define GATE_PERI0(_id, _name, _parent, _shift) {	\
_parent           664 drivers/clk/mediatek/clk-mt8173.c 		.parent_name = _parent,				\
_parent           670 drivers/clk/mediatek/clk-mt8173.c #define GATE_PERI1(_id, _name, _parent, _shift) {	\
_parent           673 drivers/clk/mediatek/clk-mt8173.c 		.parent_name = _parent,				\
_parent           737 drivers/clk/mediatek/clk-mt8173.c #define GATE_IMG(_id, _name, _parent, _shift) {			\
_parent           740 drivers/clk/mediatek/clk-mt8173.c 		.parent_name = _parent,				\
_parent           768 drivers/clk/mediatek/clk-mt8173.c #define GATE_MM0(_id, _name, _parent, _shift) {			\
_parent           771 drivers/clk/mediatek/clk-mt8173.c 		.parent_name = _parent,				\
_parent           777 drivers/clk/mediatek/clk-mt8173.c #define GATE_MM1(_id, _name, _parent, _shift) {			\
_parent           780 drivers/clk/mediatek/clk-mt8173.c 		.parent_name = _parent,				\
_parent           855 drivers/clk/mediatek/clk-mt8173.c #define GATE_VDEC0(_id, _name, _parent, _shift) {		\
_parent           858 drivers/clk/mediatek/clk-mt8173.c 		.parent_name = _parent,				\
_parent           864 drivers/clk/mediatek/clk-mt8173.c #define GATE_VDEC1(_id, _name, _parent, _shift) {		\
_parent           867 drivers/clk/mediatek/clk-mt8173.c 		.parent_name = _parent,				\
_parent           878 drivers/clk/mediatek/clk-mt8173.c #define GATE_VENC(_id, _name, _parent, _shift) {		\
_parent           881 drivers/clk/mediatek/clk-mt8173.c 		.parent_name = _parent,				\
_parent           894 drivers/clk/mediatek/clk-mt8173.c #define GATE_VENCLT(_id, _name, _parent, _shift) {		\
_parent           897 drivers/clk/mediatek/clk-mt8173.c 		.parent_name = _parent,				\
_parent          1010 drivers/clk/mediatek/clk-mt8173.c #define APMIXED_USB(_id, _name, _parent, _reg_ofs) {			\
_parent          1013 drivers/clk/mediatek/clk-mt8173.c 		.parent = _parent,					\
_parent            27 drivers/clk/mediatek/clk-mt8183-audio.c #define GATE_AUDIO0(_id, _name, _parent, _shift)		\
_parent            28 drivers/clk/mediatek/clk-mt8183-audio.c 	GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift,	\
_parent            31 drivers/clk/mediatek/clk-mt8183-audio.c #define GATE_AUDIO1(_id, _name, _parent, _shift)		\
_parent            32 drivers/clk/mediatek/clk-mt8183-audio.c 	GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift,	\
_parent            20 drivers/clk/mediatek/clk-mt8183-cam.c #define GATE_CAM(_id, _name, _parent, _shift)			\
_parent            21 drivers/clk/mediatek/clk-mt8183-cam.c 	GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift,	\
_parent            20 drivers/clk/mediatek/clk-mt8183-img.c #define GATE_IMG(_id, _name, _parent, _shift)			\
_parent            21 drivers/clk/mediatek/clk-mt8183-img.c 	GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift,	\
_parent            20 drivers/clk/mediatek/clk-mt8183-ipu0.c #define GATE_IPU_CORE0(_id, _name, _parent, _shift)			\
_parent            21 drivers/clk/mediatek/clk-mt8183-ipu0.c 	GATE_MTK(_id, _name, _parent, &ipu_core0_cg_regs, _shift,	\
_parent            20 drivers/clk/mediatek/clk-mt8183-ipu1.c #define GATE_IPU_CORE1(_id, _name, _parent, _shift)			\
_parent            21 drivers/clk/mediatek/clk-mt8183-ipu1.c 	GATE_MTK(_id, _name, _parent, &ipu_core1_cg_regs, _shift,	\
_parent            20 drivers/clk/mediatek/clk-mt8183-ipu_adl.c #define GATE_IPU_ADL_I(_id, _name, _parent, _shift)		\
_parent            21 drivers/clk/mediatek/clk-mt8183-ipu_adl.c 	GATE_MTK(_id, _name, _parent, &ipu_adl_cg_regs, _shift,	\
_parent            44 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN(_id, _name, _parent, _shift)			\
_parent            45 drivers/clk/mediatek/clk-mt8183-ipu_conn.c 	GATE_MTK(_id, _name, _parent, &ipu_conn_cg_regs, _shift,	\
_parent            48 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN_APB(_id, _name, _parent, _shift)			\
_parent            49 drivers/clk/mediatek/clk-mt8183-ipu_conn.c 	GATE_MTK(_id, _name, _parent, &ipu_conn_apb_cg_regs, _shift,	\
_parent            52 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN_AXI_I(_id, _name, _parent, _shift)		\
_parent            53 drivers/clk/mediatek/clk-mt8183-ipu_conn.c 	GATE_MTK(_id, _name, _parent, &ipu_conn_axi_cg_regs, _shift,	\
_parent            56 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN_AXI1_I(_id, _name, _parent, _shift)		\
_parent            57 drivers/clk/mediatek/clk-mt8183-ipu_conn.c 	GATE_MTK(_id, _name, _parent, &ipu_conn_axi1_cg_regs, _shift,	\
_parent            60 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN_AXI2_I(_id, _name, _parent, _shift)		\
_parent            61 drivers/clk/mediatek/clk-mt8183-ipu_conn.c 	GATE_MTK(_id, _name, _parent, &ipu_conn_axi2_cg_regs, _shift,	\
_parent            21 drivers/clk/mediatek/clk-mt8183-mfgcfg.c #define GATE_MFG(_id, _name, _parent, _shift)			\
_parent            22 drivers/clk/mediatek/clk-mt8183-mfgcfg.c 	GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift,	\
_parent            26 drivers/clk/mediatek/clk-mt8183-mm.c #define GATE_MM0(_id, _name, _parent, _shift)			\
_parent            27 drivers/clk/mediatek/clk-mt8183-mm.c 	GATE_MTK(_id, _name, _parent, &mm0_cg_regs, _shift,	\
_parent            30 drivers/clk/mediatek/clk-mt8183-mm.c #define GATE_MM1(_id, _name, _parent, _shift)			\
_parent            31 drivers/clk/mediatek/clk-mt8183-mm.c 	GATE_MTK(_id, _name, _parent, &mm1_cg_regs, _shift,	\
_parent            26 drivers/clk/mediatek/clk-mt8183-vdec.c #define GATE_VDEC0_I(_id, _name, _parent, _shift)		\
_parent            27 drivers/clk/mediatek/clk-mt8183-vdec.c 	GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift,	\
_parent            30 drivers/clk/mediatek/clk-mt8183-vdec.c #define GATE_VDEC1_I(_id, _name, _parent, _shift)		\
_parent            31 drivers/clk/mediatek/clk-mt8183-vdec.c 	GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift,	\
_parent            20 drivers/clk/mediatek/clk-mt8183-venc.c #define GATE_VENC_I(_id, _name, _parent, _shift)		\
_parent            21 drivers/clk/mediatek/clk-mt8183-venc.c 	GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift,	\
_parent           756 drivers/clk/mediatek/clk-mt8183.c #define GATE_TOP(_id, _name, _parent, _shift)			\
_parent           757 drivers/clk/mediatek/clk-mt8183.c 	GATE_MTK(_id, _name, _parent, &top_cg_regs, _shift,	\
_parent           790 drivers/clk/mediatek/clk-mt8183.c #define GATE_INFRA0(_id, _name, _parent, _shift)		\
_parent           791 drivers/clk/mediatek/clk-mt8183.c 	GATE_MTK(_id, _name, _parent, &infra0_cg_regs, _shift,	\
_parent           794 drivers/clk/mediatek/clk-mt8183.c #define GATE_INFRA1(_id, _name, _parent, _shift)		\
_parent           795 drivers/clk/mediatek/clk-mt8183.c 	GATE_MTK(_id, _name, _parent, &infra1_cg_regs, _shift,	\
_parent           798 drivers/clk/mediatek/clk-mt8183.c #define GATE_INFRA2(_id, _name, _parent, _shift)		\
_parent           799 drivers/clk/mediatek/clk-mt8183.c 	GATE_MTK(_id, _name, _parent, &infra2_cg_regs, _shift,	\
_parent           802 drivers/clk/mediatek/clk-mt8183.c #define GATE_INFRA3(_id, _name, _parent, _shift)		\
_parent           803 drivers/clk/mediatek/clk-mt8183.c 	GATE_MTK(_id, _name, _parent, &infra3_cg_regs, _shift,	\
_parent          1013 drivers/clk/mediatek/clk-mt8183.c #define GATE_PERI(_id, _name, _parent, _shift)			\
_parent          1014 drivers/clk/mediatek/clk-mt8183.c 	GATE_MTK(_id, _name, _parent, &peri_cg_regs, _shift,	\
_parent          1027 drivers/clk/mediatek/clk-mt8183.c #define GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, _flags)	\
_parent          1028 drivers/clk/mediatek/clk-mt8183.c 	GATE_MTK_FLAGS(_id, _name, _parent, &apmixed_cg_regs,		\
_parent          1031 drivers/clk/mediatek/clk-mt8183.c #define GATE_APMIXED(_id, _name, _parent, _shift)	\
_parent          1032 drivers/clk/mediatek/clk-mt8183.c 	GATE_APMIXED_FLAGS(_id, _name, _parent, _shift,	0)
_parent            25 drivers/clk/mediatek/clk-mt8516-aud.c #define GATE_AUD(_id, _name, _parent, _shift) {	\
_parent            28 drivers/clk/mediatek/clk-mt8516-aud.c 		.parent_name = _parent,		\
_parent           467 drivers/clk/mediatek/clk-mt8516.c #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) {	\
_parent           470 drivers/clk/mediatek/clk-mt8516.c 		.parent_name = _parent,				\
_parent           527 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP1(_id, _name, _parent, _shift) {	\
_parent           530 drivers/clk/mediatek/clk-mt8516.c 		.parent_name = _parent,			\
_parent           536 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP2(_id, _name, _parent, _shift) {	\
_parent           539 drivers/clk/mediatek/clk-mt8516.c 		.parent_name = _parent,			\
_parent           545 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP2_I(_id, _name, _parent, _shift) {	\
_parent           548 drivers/clk/mediatek/clk-mt8516.c 		.parent_name = _parent,			\
_parent           554 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP3(_id, _name, _parent, _shift) {	\
_parent           557 drivers/clk/mediatek/clk-mt8516.c 		.parent_name = _parent,			\
_parent           563 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP4_I(_id, _name, _parent, _shift) {	\
_parent           566 drivers/clk/mediatek/clk-mt8516.c 		.parent_name = _parent,			\
_parent           572 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP5(_id, _name, _parent, _shift) {	\
_parent           575 drivers/clk/mediatek/clk-mt8516.c 		.parent_name = _parent,			\
_parent            29 drivers/clk/mediatek/clk-mtk.h #define FIXED_CLK(_id, _name, _parent, _rate) {		\
_parent            32 drivers/clk/mediatek/clk-mtk.h 		.parent = _parent,			\
_parent            47 drivers/clk/mediatek/clk-mtk.h #define FACTOR(_id, _name, _parent, _mult, _div) {	\
_parent            50 drivers/clk/mediatek/clk-mtk.h 		.parent_name = _parent,			\
_parent           131 drivers/clk/mediatek/clk-mtk.h #define DIV_GATE(_id, _name, _parent, _gate_reg, _gate_shift, _div_reg,	\
_parent           134 drivers/clk/mediatek/clk-mtk.h 		.parent = _parent,					\
_parent           190 drivers/clk/mediatek/clk-mtk.h #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) {	\
_parent           193 drivers/clk/mediatek/clk-mtk.h 		.parent_name = _parent,				\
_parent           311 drivers/clk/pxa/clk-pxa25x.c #define DUMMY_CLK(_con_id, _dev_id, _parent) \
_parent           312 drivers/clk/pxa/clk-pxa25x.c 	{ .con_id = _con_id, .dev_id = _dev_id, .parent = _parent }
_parent           453 drivers/clk/pxa/clk-pxa27x.c #define DUMMY_CLK(_con_id, _dev_id, _parent) \
_parent           454 drivers/clk/pxa/clk-pxa27x.c 	{ .con_id = _con_id, .dev_id = _dev_id, .parent = _parent }
_parent           299 drivers/clk/pxa/clk-pxa3xx.c #define DUMMY_CLK(_con_id, _dev_id, _parent) \
_parent           300 drivers/clk/pxa/clk-pxa3xx.c 	{ .con_id = _con_id, .dev_id = _dev_id, .parent = _parent }
_parent            34 drivers/clk/renesas/rcar-gen3-cpg.h #define DEF_GEN3_SD(_name, _id, _parent, _offset)	\
_parent            35 drivers/clk/renesas/rcar-gen3-cpg.h 	DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset)
_parent            47 drivers/clk/renesas/rcar-gen3-cpg.h #define DEF_GEN3_OSC(_name, _id, _parent, _div)		\
_parent            48 drivers/clk/renesas/rcar-gen3-cpg.h 	DEF_BASE(_name, _id, CLK_TYPE_GEN3_OSC, _parent, .div = _div)
_parent            54 drivers/clk/renesas/rcar-gen3-cpg.h #define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset)	\
_parent            55 drivers/clk/renesas/rcar-gen3-cpg.h 	DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
_parent            46 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_BASE(_name, _id, _type, _parent...)	\
_parent            47 drivers/clk/renesas/renesas-cpg-mssr.h 	DEF_TYPE(_name, _id, _type, .parent = _parent)
_parent            51 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_FIXED(_name, _id, _parent, _div, _mult)	\
_parent            52 drivers/clk/renesas/renesas-cpg-mssr.h 	DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
_parent            53 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_DIV6P1(_name, _id, _parent, _offset)	\
_parent            54 drivers/clk/renesas/renesas-cpg-mssr.h 	DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset)
_parent            55 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div)	\
_parent            56 drivers/clk/renesas/renesas-cpg-mssr.h 	DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1)
_parent            75 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_MOD(_name, _mod, _parent...)	\
_parent            76 drivers/clk/renesas/renesas-cpg-mssr.h 	{ .name = _name, .id = MOD_CLK_ID(_mod), .parent = _parent }
_parent            83 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_MOD_STB(_name, _mod, _parent...)	\
_parent            84 drivers/clk/renesas/renesas-cpg-mssr.h 	{ .name = _name, .id = MOD_CLK_ID_10(_mod), .parent = _parent }
_parent            21 drivers/clk/sprd/composite.h #define SPRD_COMP_CLK_TABLE(_struct, _name, _parent, _reg, _table,	\
_parent            30 drivers/clk/sprd/composite.h 						       _parent,		\
_parent            36 drivers/clk/sprd/composite.h #define SPRD_COMP_CLK(_struct, _name, _parent, _reg, _mshift,	\
_parent            38 drivers/clk/sprd/composite.h 	SPRD_COMP_CLK_TABLE(_struct, _name, _parent, _reg,	\
_parent            38 drivers/clk/sprd/div.h #define SPRD_DIV_CLK(_struct, _name, _parent, _reg,			\
_parent            46 drivers/clk/sprd/div.h 						      _parent,		\
_parent            21 drivers/clk/sprd/gate.h #define SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, _sc_offset,	\
_parent            31 drivers/clk/sprd/gate.h 						      _parent,		\
_parent            37 drivers/clk/sprd/gate.h #define SPRD_GATE_CLK(_struct, _name, _parent, _reg,			\
_parent            39 drivers/clk/sprd/gate.h 	SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, 0,		\
_parent            43 drivers/clk/sprd/gate.h #define SPRD_SC_GATE_CLK(_struct, _name, _parent, _reg, _sc_offset,	\
_parent            45 drivers/clk/sprd/gate.h 	SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, _sc_offset,	\
_parent            64 drivers/clk/sprd/pll.h #define SPRD_PLL_WITH_ITABLE_K_FVCO(_struct, _name, _parent, _reg,	\
_parent            80 drivers/clk/sprd/pll.h 						      _parent,		\
_parent            86 drivers/clk/sprd/pll.h #define SPRD_PLL_WITH_ITABLE_K(_struct, _name, _parent, _reg,		\
_parent            89 drivers/clk/sprd/pll.h 	SPRD_PLL_WITH_ITABLE_K_FVCO(_struct, _name, _parent, _reg,	\
_parent            93 drivers/clk/sprd/pll.h #define SPRD_PLL_WITH_ITABLE_1K(_struct, _name, _parent, _reg,		\
_parent            95 drivers/clk/sprd/pll.h 	SPRD_PLL_WITH_ITABLE_K_FVCO(_struct, _name, _parent, _reg,	\
_parent            87 drivers/clk/sunxi-ng/ccu_div.h #define SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg,	\
_parent            97 drivers/clk/sunxi-ng/ccu_div.h 						      _parent,		\
_parent           104 drivers/clk/sunxi-ng/ccu_div.h #define SUNXI_CCU_DIV_TABLE(_struct, _name, _parent, _reg,		\
_parent           107 drivers/clk/sunxi-ng/ccu_div.h 	SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg,	\
_parent           149 drivers/clk/sunxi-ng/ccu_div.h #define SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg,		\
_parent           158 drivers/clk/sunxi-ng/ccu_div.h 						      _parent,		\
_parent           164 drivers/clk/sunxi-ng/ccu_div.h #define SUNXI_CCU_M(_struct, _name, _parent, _reg, _mshift, _mwidth,	\
_parent           166 drivers/clk/sunxi-ng/ccu_div.h 	SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg,		\
_parent            19 drivers/clk/sunxi-ng/ccu_gate.h #define SUNXI_CCU_GATE(_struct, _name, _parent, _reg, _gate, _flags)	\
_parent            25 drivers/clk/sunxi-ng/ccu_gate.h 						      _parent,		\
_parent            31 drivers/clk/sunxi-ng/ccu_gate.h #define SUNXI_CCU_GATE_HW(_struct, _name, _parent, _reg, _gate, _flags)	\
_parent            37 drivers/clk/sunxi-ng/ccu_gate.h 							 _parent,	\
_parent            43 drivers/clk/sunxi-ng/ccu_gate.h #define SUNXI_CCU_GATE_FW(_struct, _name, _parent, _reg, _gate, _flags)	\
_parent            49 drivers/clk/sunxi-ng/ccu_gate.h 							      _parent,	\
_parent            59 drivers/clk/sunxi-ng/ccu_gate.h #define SUNXI_CCU_GATE_HWS(_struct, _name, _parent, _reg, _gate, _flags) \
_parent            65 drivers/clk/sunxi-ng/ccu_gate.h 							  _parent,	\
_parent            45 drivers/clk/sunxi-ng/ccu_mult.h #define SUNXI_CCU_N_WITH_GATE_LOCK(_struct, _name, _parent, _reg,	\
_parent            55 drivers/clk/sunxi-ng/ccu_mult.h 						      _parent,		\
_parent            33 drivers/clk/sunxi-ng/ccu_nk.h #define SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(_struct, _name, _parent, _reg, \
_parent            48 drivers/clk/sunxi-ng/ccu_nk.h 						      _parent,		\
_parent            56 drivers/clk/sunxi-ng/ccu_nkm.h #define SUNXI_CCU_NKM_WITH_GATE_LOCK(_struct, _name, _parent, _reg,	\
_parent            70 drivers/clk/sunxi-ng/ccu_nkm.h 						      _parent,		\
_parent            35 drivers/clk/sunxi-ng/ccu_nkmp.h #define SUNXI_CCU_NKMP_WITH_GATE_LOCK(_struct, _name, _parent, _reg,	\
_parent            51 drivers/clk/sunxi-ng/ccu_nkmp.h 						      _parent,		\
_parent            38 drivers/clk/sunxi-ng/ccu_nm.h #define SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(_struct, _name, _parent, _reg,	\
_parent            55 drivers/clk/sunxi-ng/ccu_nm.h 						      _parent,		\
_parent            61 drivers/clk/sunxi-ng/ccu_nm.h #define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(_struct, _name, _parent, _reg,	\
_parent            79 drivers/clk/sunxi-ng/ccu_nm.h 						      _parent,		\
_parent            85 drivers/clk/sunxi-ng/ccu_nm.h #define SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN(_struct, _name, _parent,	\
_parent           105 drivers/clk/sunxi-ng/ccu_nm.h 						      _parent,		\
_parent           112 drivers/clk/sunxi-ng/ccu_nm.h 						 _parent, _reg,		\
_parent           134 drivers/clk/sunxi-ng/ccu_nm.h 						      _parent,		\
_parent           140 drivers/clk/sunxi-ng/ccu_nm.h #define SUNXI_CCU_NM_WITH_GATE_LOCK(_struct, _name, _parent, _reg,	\
_parent           152 drivers/clk/sunxi-ng/ccu_nm.h 						      _parent,		\
_parent            20 drivers/clk/sunxi-ng/ccu_phase.h #define SUNXI_CCU_PHASE(_struct, _name, _parent, _reg, _shift, _width, _flags) \
_parent            27 drivers/clk/sunxi-ng/ccu_phase.h 						      _parent,		\
_parent            83 drivers/clk/uniphier/clk-uniphier.h #define UNIPHIER_CLK_FACTOR(_name, _idx, _parent, _mult, _div)	\
_parent            89 drivers/clk/uniphier/clk-uniphier.h 			.parent_name = (_parent),		\
_parent            95 drivers/clk/uniphier/clk-uniphier.h #define UNIPHIER_CLK_GATE(_name, _idx, _parent, _reg, _bit)	\
_parent           101 drivers/clk/uniphier/clk-uniphier.h 			.parent_name = (_parent),		\
_parent            37 drivers/clk/zte/clk.h #define ZX_PLL(_name, _parent, _reg, _table, _pd, _lock)		\
_parent            44 drivers/clk/zte/clk.h 	.hw.init	 = CLK_HW_INIT(_name, _parent, &zx_pll_ops,	\
_parent            52 drivers/clk/zte/clk.h #define ZX296718_PLL(_name, _parent, _reg, _table)			\
_parent            53 drivers/clk/zte/clk.h ZX_PLL(_name, _parent, _reg, _table, 0xff, 30)
_parent            60 drivers/clk/zte/clk.h #define GATE(_id, _name, _parent, _reg, _bit, _flag, _gflags)		\
_parent            68 drivers/clk/zte/clk.h 					_parent,			\
_parent            80 drivers/clk/zte/clk.h #define FFACTOR(_id, _name, _parent, _mult, _div, _flag)		\
_parent            86 drivers/clk/zte/clk.h 					      _parent,			\
_parent            98 drivers/clk/zte/clk.h #define MUX_F(_id, _name, _parent, _reg, _shift, _width, _flag, _mflag)	\
_parent           107 drivers/clk/zte/clk.h 						      _parent,		\
_parent           114 drivers/clk/zte/clk.h #define MUX(_id, _name, _parent, _reg, _shift, _width)			\
_parent           115 drivers/clk/zte/clk.h MUX_F(_id, _name, _parent, _reg, _shift, _width, 0, 0)
_parent           122 drivers/clk/zte/clk.h #define DIV_T(_id, _name, _parent, _reg, _shift, _width, _flag, _table)	\
_parent           132 drivers/clk/zte/clk.h 					      _parent,			\
_parent           147 drivers/clk/zte/clk.h #define AUDIO_DIV(_id, _name, _parent, _reg)				\
_parent           152 drivers/clk/zte/clk.h 				      _parent,				\
_parent           730 drivers/iio/pressure/zpa2326.c #define zpa2326_init_runtime(_parent)
_parent           731 drivers/iio/pressure/zpa2326.c #define zpa2326_fini_runtime(_parent)
_parent           543 drivers/platform/x86/thinkpad_acpi.c 	static const acpi_handle * const object##_parent __initconst =	\
_parent           691 drivers/platform/x86/thinkpad_acpi.c 	drv_acpi_handle_init(#object, &object##_handle, *object##_parent, \
_parent           140 fs/cachefiles/namei.c 	struct rb_node **_p, *_parent = NULL;
_parent           159 fs/cachefiles/namei.c 		_parent = *_p;
_parent           160 fs/cachefiles/namei.c 		xobject = rb_entry(_parent,
_parent           173 fs/cachefiles/namei.c 	rb_link_node(&object->active_node, _parent, _p);
_parent           901 include/linux/clk-provider.h #define CLK_HW_INIT(_name, _parent, _ops, _flags)		\
_parent           905 include/linux/clk-provider.h 		.parent_names	= (const char *[]) { _parent },	\
_parent           910 include/linux/clk-provider.h #define CLK_HW_INIT_HW(_name, _parent, _ops, _flags)			\
_parent           914 include/linux/clk-provider.h 		.parent_hws	= (const struct clk_hw*[]) { _parent },	\
_parent           924 include/linux/clk-provider.h #define CLK_HW_INIT_HWS(_name, _parent, _ops, _flags)			\
_parent           928 include/linux/clk-provider.h 		.parent_hws	= _parent,				\
_parent           933 include/linux/clk-provider.h #define CLK_HW_INIT_FW_NAME(_name, _parent, _ops, _flags)		\
_parent           938 include/linux/clk-provider.h 					{ .fw_name = _parent },		\
_parent           980 include/linux/clk-provider.h #define CLK_FIXED_FACTOR(_struct, _name, _parent,			\
_parent           986 include/linux/clk-provider.h 					      _parent,			\
_parent           991 include/linux/clk-provider.h #define CLK_FIXED_FACTOR_HW(_struct, _name, _parent,			\
_parent           997 include/linux/clk-provider.h 						 _parent,		\
_parent          1006 include/linux/clk-provider.h #define CLK_FIXED_FACTOR_HWS(_struct, _name, _parent,			\
_parent          1012 include/linux/clk-provider.h 						  _parent,		\
_parent          1017 include/linux/clk-provider.h #define CLK_FIXED_FACTOR_FW_NAME(_struct, _name, _parent,		\
_parent          1023 include/linux/clk-provider.h 						      _parent,		\
_parent           117 include/linux/sh_clk.h #define SH_CLK_MSTP(_parent, _enable_reg, _enable_bit, _status_reg, _flags) \
_parent           119 include/linux/sh_clk.h 	.parent		= _parent,					\
_parent           151 include/linux/sh_clk.h #define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags)	\
_parent           153 include/linux/sh_clk.h 	.parent = _parent,					\
_parent           188 include/linux/sh_clk.h #define SH_CLK_DIV6(_parent, _reg, _flags)			\
_parent           190 include/linux/sh_clk.h 	.parent		= _parent,				\
_parent           205 include/linux/sh_clk.h #define SH_CLK_FSIDIV(_reg, _parent)		\
_parent           208 include/linux/sh_clk.h 	.parent		= _parent,		\
_parent           157 scripts/kconfig/qconf.h 		ConfigItem *_parent = (ConfigItem *)parent();
_parent           159 scripts/kconfig/qconf.h 		if(_parent) {
_parent           160 scripts/kconfig/qconf.h 			ret = (ConfigItem *)_parent->child(_parent->indexOfChild(this)+1);