_offset 519 arch/arm/mach-omap2/prcm-common.h #define OMAP_PRCM_IRQ(_name, _offset, _priority) { \ _offset 521 arch/arm/mach-omap2/prcm-common.h .offset = _offset, \ _offset 33 arch/powerpc/boot/libfdt-wrapper.c unsigned long _offset = (off); \ _offset 34 arch/powerpc/boot/libfdt-wrapper.c check_err(_offset) ? NULL : (void *)(_offset+1); \ _offset 511 drivers/atm/solos-pci.c #define SOLOS_GPIO_ATTR(_name, _mode, _show, _store, _offset) \ _offset 514 drivers/atm/solos-pci.c .offset = _offset } _offset 185 drivers/bcma/sprom.c #define SPEX(_field, _offset, _mask, _shift) \ _offset 186 drivers/bcma/sprom.c bus->sprom._field = ((sprom[SPOFF(_offset)] & (_mask)) >> (_shift)) _offset 188 drivers/bcma/sprom.c #define SPEX32(_field, _offset, _mask, _shift) \ _offset 189 drivers/bcma/sprom.c bus->sprom._field = ((((u32)sprom[SPOFF((_offset)+2)] << 16 | \ _offset 190 drivers/bcma/sprom.c sprom[SPOFF(_offset)]) & (_mask)) >> (_shift)) _offset 192 drivers/bcma/sprom.c #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ _offset 194 drivers/bcma/sprom.c SPEX(_field[0], _offset + 0, _mask, _shift); \ _offset 195 drivers/bcma/sprom.c SPEX(_field[1], _offset + 2, _mask, _shift); \ _offset 196 drivers/bcma/sprom.c SPEX(_field[2], _offset + 4, _mask, _shift); \ _offset 197 drivers/bcma/sprom.c SPEX(_field[3], _offset + 6, _mask, _shift); \ _offset 198 drivers/bcma/sprom.c SPEX(_field[4], _offset + 8, _mask, _shift); \ _offset 199 drivers/bcma/sprom.c SPEX(_field[5], _offset + 10, _mask, _shift); \ _offset 200 drivers/bcma/sprom.c SPEX(_field[6], _offset + 12, _mask, _shift); \ _offset 201 drivers/bcma/sprom.c SPEX(_field[7], _offset + 14, _mask, _shift); \ _offset 99 drivers/clk/bcm/clk-kona.h #define POLICY(_offset, _bit) \ _offset 101 drivers/clk/bcm/clk-kona.h .offset = (_offset), \ _offset 159 drivers/clk/bcm/clk-kona.h #define HW_SW_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ _offset 161 drivers/clk/bcm/clk-kona.h .offset = (_offset), \ _offset 171 drivers/clk/bcm/clk-kona.h #define HW_SW_GATE_AUTO(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ _offset 173 drivers/clk/bcm/clk-kona.h .offset = (_offset), \ _offset 182 drivers/clk/bcm/clk-kona.h #define HW_ENABLE_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ _offset 184 drivers/clk/bcm/clk-kona.h .offset = (_offset), \ _offset 193 drivers/clk/bcm/clk-kona.h #define SW_ONLY_GATE(_offset, _status_bit, _en_bit) \ _offset 195 drivers/clk/bcm/clk-kona.h .offset = (_offset), \ _offset 203 drivers/clk/bcm/clk-kona.h #define HW_ONLY_GATE(_offset, _status_bit) \ _offset 205 drivers/clk/bcm/clk-kona.h .offset = (_offset), \ _offset 219 drivers/clk/bcm/clk-kona.h #define HYST(_offset, _en_bit, _val_bit) \ _offset 221 drivers/clk/bcm/clk-kona.h .offset = (_offset), \ _offset 299 drivers/clk/bcm/clk-kona.h #define DIVIDER(_offset, _shift, _width) \ _offset 301 drivers/clk/bcm/clk-kona.h .u.s.offset = (_offset), \ _offset 309 drivers/clk/bcm/clk-kona.h #define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \ _offset 311 drivers/clk/bcm/clk-kona.h .u.s.offset = (_offset), \ _offset 350 drivers/clk/bcm/clk-kona.h #define SELECTOR(_offset, _shift, _width) \ _offset 352 drivers/clk/bcm/clk-kona.h .offset = (_offset), \ _offset 383 drivers/clk/bcm/clk-kona.h #define TRIGGER(_offset, _bit) \ _offset 385 drivers/clk/bcm/clk-kona.h .offset = (_offset), \ _offset 442 drivers/clk/bcm/clk-kona.h #define CCU_LVM_EN(_offset, _bit) \ _offset 444 drivers/clk/bcm/clk-kona.h .offset = (_offset), \ _offset 456 drivers/clk/bcm/clk-kona.h #define CCU_POLICY_CTL(_offset, _go_bit, _ac_bit, _atl_bit) \ _offset 458 drivers/clk/bcm/clk-kona.h .offset = (_offset), \ _offset 1092 drivers/clk/clk-stm32mp1.c #define GATE(_id, _name, _parent, _flags, _offset, _bit_idx, _gate_flags)\ _offset 1099 drivers/clk/clk-stm32mp1.c .reg_off = _offset,\ _offset 1119 drivers/clk/clk-stm32mp1.c #define DIV_TABLE(_id, _name, _parent, _flags, _offset, _shift, _width,\ _offset 1127 drivers/clk/clk-stm32mp1.c .reg_off = _offset,\ _offset 1136 drivers/clk/clk-stm32mp1.c #define DIV(_id, _name, _parent, _flags, _offset, _shift, _width, _div_flags)\ _offset 1137 drivers/clk/clk-stm32mp1.c DIV_TABLE(_id, _name, _parent, _flags, _offset, _shift, _width,\ _offset 1140 drivers/clk/clk-stm32mp1.c #define MUX(_id, _name, _parents, _flags, _offset, _shift, _width, _mux_flags)\ _offset 1148 drivers/clk/clk-stm32mp1.c .reg_off = _offset,\ _offset 1156 drivers/clk/clk-stm32mp1.c #define PLL(_id, _name, _parent, _flags, _offset)\ _offset 1163 drivers/clk/clk-stm32mp1.c .offset = _offset,\ _offset 1221 drivers/clk/clk-stm32mp1.c #define GATE_MP1(_id, _name, _parent, _flags, _offset, _bit_idx, _gate_flags)\ _offset 1223 drivers/clk/clk-stm32mp1.c _GATE_MP1(_offset, _bit_idx, _gate_flags)) _offset 1246 drivers/clk/clk-stm32mp1.c #define _STM32_MUX(_offset, _shift, _width, _mux_flags, _mmux, _ops)\ _offset 1249 drivers/clk/clk-stm32mp1.c .reg_off = _offset,\ _offset 1259 drivers/clk/clk-stm32mp1.c #define _MUX(_offset, _shift, _width, _mux_flags)\ _offset 1260 drivers/clk/clk-stm32mp1.c _STM32_MUX(_offset, _shift, _width, _mux_flags, NULL, NULL)\ _offset 1597 drivers/clk/clk-stm32mp1.c #define _K_MUX(_id, _offset, _shift, _width, _mux_flags, _mmux, _ops)\ _offset 1600 drivers/clk/clk-stm32mp1.c .reg_off = _offset,\ _offset 1610 drivers/clk/clk-stm32mp1.c #define K_MUX(_id, _offset, _shift, _width, _mux_flags)\ _offset 1611 drivers/clk/clk-stm32mp1.c _K_MUX(_id, _offset, _shift, _width, _mux_flags,\ _offset 1614 drivers/clk/clk-stm32mp1.c #define K_MMUX(_id, _offset, _shift, _width, _mux_flags)\ _offset 1615 drivers/clk/clk-stm32mp1.c _K_MUX(_id, _offset, _shift, _width, _mux_flags,\ _offset 34 drivers/clk/renesas/rcar-gen3-cpg.h #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ _offset 35 drivers/clk/renesas/rcar-gen3-cpg.h DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset) _offset 54 drivers/clk/renesas/rcar-gen3-cpg.h #define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset) \ _offset 55 drivers/clk/renesas/rcar-gen3-cpg.h DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset) _offset 53 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_DIV6P1(_name, _id, _parent, _offset) \ _offset 54 drivers/clk/renesas/renesas-cpg-mssr.h DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset) _offset 55 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div) \ _offset 56 drivers/clk/renesas/renesas-cpg-mssr.h DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1) _offset 38 drivers/clk/st/clkgen.h #define CLKGEN_FIELD(_offset, _mask, _shift) { \ _offset 39 drivers/clk/st/clkgen.h .offset = _offset, \ _offset 72 drivers/clk/sunxi-ng/ccu_div.h #define _SUNXI_CCU_DIV_OFFSET(_shift, _width, _offset) \ _offset 73 drivers/clk/sunxi-ng/ccu_div.h _SUNXI_CCU_DIV_OFFSET_MAX_FLAGS(_shift, _width, _offset, 0, 0) _offset 17 drivers/clk/sunxi-ng/ccu_mult.h #define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \ _offset 21 drivers/clk/sunxi-ng/ccu_mult.h .offset = _offset, \ _offset 29 drivers/clk/sunxi-ng/ccu_mult.h #define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset) \ _offset 30 drivers/clk/sunxi-ng/ccu_mult.h _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, 1, 0) _offset 52 drivers/clk/tegra/clk-tegra-audio.c #define AUDIO(_name, _offset) \ _offset 56 drivers/clk/tegra/clk-tegra-audio.c .offset = _offset,\ _offset 71 drivers/clk/tegra/clk-tegra-audio.c #define AUDIO2X(_name, _num, _offset) \ _offset 79 drivers/clk/tegra/clk-tegra-audio.c .div_offset = _offset,\ _offset 132 drivers/clk/tegra/clk-tegra-periph.c #define MUX(_name, _parents, _offset, \ _offset 134 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _offset 139 drivers/clk/tegra/clk-tegra-periph.c #define MUX_FLAGS(_name, _parents, _offset,\ _offset 141 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _offset 146 drivers/clk/tegra/clk-tegra-periph.c #define MUX8(_name, _parents, _offset, \ _offset 148 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _offset 153 drivers/clk/tegra/clk-tegra-periph.c #define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock) \ _offset 154 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \ _offset 159 drivers/clk/tegra/clk-tegra-periph.c #define MUX8_NOGATE(_name, _parents, _offset, _clk_id) \ _offset 160 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \ _offset 165 drivers/clk/tegra/clk-tegra-periph.c #define INT(_name, _parents, _offset, \ _offset 167 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _offset 172 drivers/clk/tegra/clk-tegra-periph.c #define INT_FLAGS(_name, _parents, _offset,\ _offset 174 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _offset 179 drivers/clk/tegra/clk-tegra-periph.c #define INT8(_name, _parents, _offset,\ _offset 181 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _offset 186 drivers/clk/tegra/clk-tegra-periph.c #define UART(_name, _parents, _offset,\ _offset 188 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _offset 193 drivers/clk/tegra/clk-tegra-periph.c #define UART8(_name, _parents, _offset,\ _offset 195 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _offset 200 drivers/clk/tegra/clk-tegra-periph.c #define I2C(_name, _parents, _offset,\ _offset 202 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _offset 207 drivers/clk/tegra/clk-tegra-periph.c #define XUSB(_name, _parents, _offset, \ _offset 209 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \ _offset 214 drivers/clk/tegra/clk-tegra-periph.c #define AUDIO(_name, _offset, _clk_num,\ _offset 217 drivers/clk/tegra/clk-tegra-periph.c _offset, 16, 0xE01F, 0, 0, 8, 1, \ _offset 221 drivers/clk/tegra/clk-tegra-periph.c #define NODIV(_name, _parents, _offset, \ _offset 224 drivers/clk/tegra/clk-tegra-periph.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _offset 240 drivers/clk/tegra/clk-tegra-periph.c #define DIV8(_name, _parent_name, _offset, _clk_id, _flags) \ _offset 248 drivers/clk/tegra/clk-tegra-periph.c .offset = _offset, \ _offset 850 drivers/clk/tegra/clk-tegra-periph.c #define PLL_OUT(_num, _offset, _div_shift, _div_flags, _rst_shift, _id) \ _offset 854 drivers/clk/tegra/clk-tegra-periph.c .offset = _offset,\ _offset 860 drivers/clk/tegra/clk-tegra-periph.c .lock = &_offset ##_lock,\ _offset 115 drivers/clk/tegra/clk-tegra114.c #define MUX8(_name, _parents, _offset, \ _offset 117 drivers/clk/tegra/clk-tegra114.c TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\ _offset 135 drivers/clk/tegra/clk-tegra20.c #define TEGRA_INIT_DATA_MUX(_name, _parents, _offset, \ _offset 137 drivers/clk/tegra/clk-tegra20.c TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset, \ _offset 142 drivers/clk/tegra/clk-tegra20.c #define TEGRA_INIT_DATA_DIV16(_name, _parents, _offset, \ _offset 144 drivers/clk/tegra/clk-tegra20.c TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset, \ _offset 149 drivers/clk/tegra/clk-tegra20.c #define TEGRA_INIT_DATA_NODIV(_name, _parents, _offset, \ _offset 152 drivers/clk/tegra/clk-tegra20.c TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset, \ _offset 156 drivers/clk/tegra/clk-tegra30.c #define TEGRA_INIT_DATA_MUX(_name, _parents, _offset, \ _offset 158 drivers/clk/tegra/clk-tegra30.c TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset, \ _offset 162 drivers/clk/tegra/clk-tegra30.c #define TEGRA_INIT_DATA_MUX8(_name, _parents, _offset, \ _offset 164 drivers/clk/tegra/clk-tegra30.c TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset, \ _offset 168 drivers/clk/tegra/clk-tegra30.c #define TEGRA_INIT_DATA_INT(_name, _parents, _offset, \ _offset 170 drivers/clk/tegra/clk-tegra30.c TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset, \ _offset 175 drivers/clk/tegra/clk-tegra30.c #define TEGRA_INIT_DATA_NODIV(_name, _parents, _offset, \ _offset 178 drivers/clk/tegra/clk-tegra30.c TEGRA_INIT_DATA(_name, NULL, NULL, _parents, _offset, \ _offset 624 drivers/clk/tegra/clk.h #define TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parent_names, _offset,\ _offset 639 drivers/clk/tegra/clk.h .offset = _offset, \ _offset 645 drivers/clk/tegra/clk.h #define TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parent_names, _offset,\ _offset 649 drivers/clk/tegra/clk.h TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parent_names, _offset,\ _offset 314 drivers/edac/pnd2_edac.c regname##_offset, \ _offset 321 drivers/edac/pnd2_edac.c regname##_offset, \ _offset 20 drivers/gpu/drm/msm/adreno/adreno_gpu.h #define REG_ADRENO_DEFINE(_offset, _reg) [_offset] = (_reg) + 1 _offset 22 drivers/gpu/drm/msm/adreno/adreno_gpu.h #define REG_ADRENO_SKIP(_offset) [_offset] = REG_SKIP _offset 189 drivers/gpu/drm/rockchip/rockchip_drm_vop.c uint32_t _offset, uint32_t _mask, uint32_t v, _offset 199 drivers/gpu/drm/rockchip/rockchip_drm_vop.c offset = reg->offset + _offset; _offset 1539 drivers/hwmon/dme1737.c static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \ _offset 454 drivers/infiniband/core/sysfs.c #define PORT_PMA_ATTR(_name, _counter, _width, _offset) \ _offset 457 drivers/infiniband/core/sysfs.c .index = (_offset) | ((_width) << 16) | ((_counter) << 24), \ _offset 461 drivers/infiniband/core/sysfs.c #define PORT_PMA_ATTR_EXT(_name, _width, _offset) \ _offset 464 drivers/infiniband/core/sysfs.c .index = (_offset) | ((_width) << 16), \ _offset 2080 drivers/infiniband/hw/mlx4/main.c #define DIAG_COUNTER(_name, _offset) \ _offset 2081 drivers/infiniband/hw/mlx4/main.c { .name = #_name, .offset = _offset } _offset 277 drivers/net/dsa/lantiq_gswip.c #define MIB_DESC(_size, _offset, _name) {.size = _size, .offset = _offset, .name = _name} _offset 107 drivers/net/ethernet/brocade/bna/bfi_enet.h #define BFI_ENET_TXQ_WI_L4_HDR_N_OFFSET(_hdr_size, _offset) \ _offset 108 drivers/net/ethernet/brocade/bna/bfi_enet.h (((_hdr_size) << 10) | ((_offset) & 0x3FF)) _offset 285 drivers/net/ethernet/brocade/bna/bna_hw_defs.h #define BNA_TXQ_WI_L4_HDR_N_OFFSET(_hdr_size, _offset) \ _offset 286 drivers/net/ethernet/brocade/bna/bna_hw_defs.h (((_hdr_size) << 10) | ((_offset) & 0x3FF)) _offset 52 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h #define MLXSW_AFK_ELEMENT_INFO(_type, _element, _offset, _shift, _size) \ _offset 57 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h .offset = _offset, \ _offset 64 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h #define MLXSW_AFK_ELEMENT_INFO_U32(_element, _offset, _shift, _size) \ _offset 66 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h _element, _offset, _shift, _size) _offset 68 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h #define MLXSW_AFK_ELEMENT_INFO_BUF(_element, _offset, _size) \ _offset 70 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h _element, _offset, 0, _size) _offset 116 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h #define MLXSW_AFK_ELEMENT_INST(_type, _element, _offset, \ _offset 122 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h .offset = _offset, \ _offset 131 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h #define MLXSW_AFK_ELEMENT_INST_U32(_element, _offset, _shift, _size) \ _offset 133 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h _element, _offset, _shift, _size, 0, false) _offset 135 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h #define MLXSW_AFK_ELEMENT_INST_EXT_U32(_element, _offset, \ _offset 139 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h _element, _offset, _shift, _size, \ _offset 142 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h #define MLXSW_AFK_ELEMENT_INST_BUF(_element, _offset, _size) \ _offset 144 drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h _element, _offset, 0, _size, 0, false) _offset 266 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM8(_type, _cname, _iname, _offset, _shift, _sizebits) \ _offset 268 drivers/net/ethernet/mellanox/mlxsw/item.h .offset = _offset, \ _offset 282 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM8_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ _offset 285 drivers/net/ethernet/mellanox/mlxsw/item.h .offset = _offset, \ _offset 307 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM16(_type, _cname, _iname, _offset, _shift, _sizebits) \ _offset 309 drivers/net/ethernet/mellanox/mlxsw/item.h .offset = _offset, \ _offset 323 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM16_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ _offset 326 drivers/net/ethernet/mellanox/mlxsw/item.h .offset = _offset, \ _offset 348 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM32(_type, _cname, _iname, _offset, _shift, _sizebits) \ _offset 350 drivers/net/ethernet/mellanox/mlxsw/item.h .offset = _offset, \ _offset 364 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM32_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \ _offset 367 drivers/net/ethernet/mellanox/mlxsw/item.h .offset = _offset, \ _offset 389 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM64(_type, _cname, _iname, _offset, _shift, _sizebits) \ _offset 391 drivers/net/ethernet/mellanox/mlxsw/item.h .offset = _offset, \ _offset 405 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM64_INDEXED(_type, _cname, _iname, _offset, _shift, \ _offset 408 drivers/net/ethernet/mellanox/mlxsw/item.h .offset = _offset, \ _offset 430 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM_BUF(_type, _cname, _iname, _offset, _sizebytes) \ _offset 432 drivers/net/ethernet/mellanox/mlxsw/item.h .offset = _offset, \ _offset 454 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM_BUF_INDEXED(_type, _cname, _iname, _offset, _sizebytes, \ _offset 457 drivers/net/ethernet/mellanox/mlxsw/item.h .offset = _offset, \ _offset 486 drivers/net/ethernet/mellanox/mlxsw/item.h #define MLXSW_ITEM_BIT_ARRAY(_type, _cname, _iname, _offset, _sizebytes, \ _offset 489 drivers/net/ethernet/mellanox/mlxsw/item.h .offset = _offset, \ _offset 256 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c #define MLXSW_SP2_AFK_BLOCK_LAYOUT(_block, _offset, _shift) \ _offset 258 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c .offset = _offset, \ _offset 56 drivers/net/ethernet/qlogic/qed/qed_mcp.c #define DRV_INNER_WR(_p_hwfn, _p_ptt, _ptr, _offset, _val) \ _offset 57 drivers/net/ethernet/qlogic/qed/qed_mcp.c qed_wr(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset), \ _offset 60 drivers/net/ethernet/qlogic/qed/qed_mcp.c #define DRV_INNER_RD(_p_hwfn, _p_ptt, _ptr, _offset) \ _offset 61 drivers/net/ethernet/qlogic/qed/qed_mcp.c qed_rd(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset)) _offset 199 drivers/net/ethernet/sfc/mcdi.h #define _MCDI_PTR(_buf, _offset) \ _offset 200 drivers/net/ethernet/sfc/mcdi.h ((u8 *)(_buf) + (_offset)) _offset 137 drivers/net/wireless/ath/ath9k/ath9k.h #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1)) _offset 274 drivers/net/wireless/intel/iwlwifi/iwl-trans.h int _offset; _offset 282 drivers/net/wireless/intel/iwlwifi/iwl-trans.h return (void *)((unsigned long)page_address(r->_page) + r->_offset); _offset 287 drivers/net/wireless/intel/iwlwifi/iwl-trans.h return r->_offset; _offset 1170 drivers/net/wireless/intel/iwlwifi/mvm/debugfs.c ._offset = 0, _offset 1022 drivers/net/wireless/intel/iwlwifi/mvm/ops.c entry->rxb._offset = rxb->_offset; _offset 1260 drivers/net/wireless/intel/iwlwifi/pcie/rx.c ._offset = offset, _offset 162 drivers/net/wireless/realtek/rtlwifi/efuse.c void read_efuse_byte(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf) _offset 170 drivers/net/wireless/realtek/rtlwifi/efuse.c (_offset & 0xff)); _offset 173 drivers/net/wireless/realtek/rtlwifi/efuse.c ((_offset >> 8) & 0x03) | (readbyte & 0xfc)); _offset 194 drivers/net/wireless/realtek/rtlwifi/efuse.c void read_efuse(struct ieee80211_hw *hw, u16 _offset, u16 _size_byte, u8 *pbuf) _offset 213 drivers/net/wireless/realtek/rtlwifi/efuse.c if ((_offset + _size_byte) > rtlpriv->cfg->maps[EFUSE_HWSET_MAX_SIZE]) { _offset 216 drivers/net/wireless/realtek/rtlwifi/efuse.c _offset, _size_byte); _offset 328 drivers/net/wireless/realtek/rtlwifi/efuse.c pbuf[i] = efuse_tbl[_offset + i]; _offset 74 drivers/net/wireless/realtek/rtlwifi/efuse.h void read_efuse_byte(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf); _offset 79 drivers/net/wireless/realtek/rtlwifi/efuse.h void read_efuse(struct ieee80211_hw *hw, u16 _offset, _offset 1690 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h #define IS_BB_REG_OFFSET_92S(_offset) \ _offset 1691 drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h ((_offset >= 0x800) && (_offset <= 0xfff)) _offset 1502 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h #define IS_BB_REG_OFFSET_92S(_offset) \ _offset 1503 drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h (((_offset) >= 0x800) && ((_offset) <= 0xfff)) _offset 1652 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h #define IS_BB_REG_OFFSET_92S(_offset) \ _offset 1653 drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h ((_offset >= 0x800) && (_offset <= 0xfff)) _offset 1544 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h #define IS_BB_REG_OFFSET_92S(_offset) \ _offset 1545 drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h ((_offset >= 0x800) && (_offset <= 0xfff)) _offset 1705 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h #define IS_BB_REG_OFFSET_92S(_offset) \ _offset 1706 drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h ((_offset >= 0x800) && (_offset <= 0xfff)) _offset 2338 drivers/net/wireless/realtek/rtlwifi/wifi.h void (*read_efuse_byte)(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf); _offset 404 drivers/phy/tegra/xusb-tegra124.c #define TEGRA124_LANE(_name, _offset, _shift, _mask, _type) \ _offset 407 drivers/phy/tegra/xusb-tegra124.c .offset = _offset, \ _offset 112 drivers/phy/tegra/xusb-tegra186.c #define TEGRA186_LANE(_name, _offset, _shift, _mask, _type) \ _offset 115 drivers/phy/tegra/xusb-tegra186.c .offset = _offset, \ _offset 839 drivers/phy/tegra/xusb-tegra210.c #define TEGRA210_LANE(_name, _offset, _shift, _mask, _type) \ _offset 842 drivers/phy/tegra/xusb-tegra210.c .offset = _offset, \ _offset 37 drivers/pinctrl/berlin/berlin.h #define BERLIN_PINCTRL_GROUP(_name, _offset, _width, _lsb, ...) \ _offset 40 drivers/pinctrl/berlin/berlin.h .offset = _offset, \ _offset 31 drivers/pinctrl/mediatek/pinctrl-mt2701.c #define MTK_PINMUX_SPEC(_pin, _offset, _bit) \ _offset 34 drivers/pinctrl/mediatek/pinctrl-mt2701.c .offset = _offset, \ _offset 109 drivers/pinctrl/mediatek/pinctrl-mtk-common.h #define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \ _offset 112 drivers/pinctrl/mediatek/pinctrl-mtk-common.h .offset = _offset, \ _offset 134 drivers/pinctrl/mediatek/pinctrl-mtk-common.h #define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0) \ _offset 137 drivers/pinctrl/mediatek/pinctrl-mtk-common.h .offset = _offset, \ _offset 157 drivers/pinctrl/mediatek/pinctrl-mtk-common.h #define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \ _offset 162 drivers/pinctrl/mediatek/pinctrl-mtk-common.h .offset = _offset, \ _offset 827 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c #define TEGRA124_LANE(_name, _offset, _shift, _mask, _iddq, _funcs) \ _offset 830 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c .offset = _offset, \ _offset 320 drivers/regulator/palmas-regulator.c #define EXTERNAL_REQUESTOR(_id, _offset, _pos) \ _offset 323 drivers/regulator/palmas-regulator.c .reg_offset = _offset, \ _offset 356 drivers/regulator/palmas-regulator.c #define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \ _offset 359 drivers/regulator/palmas-regulator.c .reg_offset = _offset, \ _offset 171 drivers/ssb/pci.c #define SPEX16(_outvar, _offset, _mask, _shift) \ _offset 172 drivers/ssb/pci.c out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift)) _offset 173 drivers/ssb/pci.c #define SPEX32(_outvar, _offset, _mask, _shift) \ _offset 174 drivers/ssb/pci.c out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \ _offset 175 drivers/ssb/pci.c in[SPOFF(_offset)]) & (_mask)) >> (_shift)) _offset 176 drivers/ssb/pci.c #define SPEX(_outvar, _offset, _mask, _shift) \ _offset 177 drivers/ssb/pci.c SPEX16(_outvar, _offset, _mask, _shift) _offset 179 drivers/ssb/pci.c #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ _offset 181 drivers/ssb/pci.c SPEX(_field[0], _offset + 0, _mask, _shift); \ _offset 182 drivers/ssb/pci.c SPEX(_field[1], _offset + 2, _mask, _shift); \ _offset 183 drivers/ssb/pci.c SPEX(_field[2], _offset + 4, _mask, _shift); \ _offset 184 drivers/ssb/pci.c SPEX(_field[3], _offset + 6, _mask, _shift); \ _offset 185 drivers/ssb/pci.c SPEX(_field[4], _offset + 8, _mask, _shift); \ _offset 186 drivers/ssb/pci.c SPEX(_field[5], _offset + 10, _mask, _shift); \ _offset 187 drivers/ssb/pci.c SPEX(_field[6], _offset + 12, _mask, _shift); \ _offset 188 drivers/ssb/pci.c SPEX(_field[7], _offset + 14, _mask, _shift); \ _offset 75 drivers/staging/rtl8188eu/core/rtw_efuse.c efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf) _offset 190 drivers/staging/rtl8188eu/core/rtw_efuse.c pbuf[i] = efuseTbl[_offset + i]; _offset 301 drivers/staging/rtl8188eu/core/rtw_efuse.c void efuse_ReadEFuse(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf) _offset 306 drivers/staging/rtl8188eu/core/rtw_efuse.c iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf); _offset 83 drivers/staging/rtl8188eu/include/rtw_efuse.h void efuse_ReadEFuse(struct adapter *Adapter, u8 efuseType, u16 _offset, _offset 170 drivers/staging/rtl8723bs/core/rtw_efuse.c u16 _offset, _offset 179 drivers/staging/rtl8723bs/core/rtw_efuse.c u16 _offset, _offset 185 drivers/staging/rtl8723bs/core/rtw_efuse.c Adapter->HalFunc.ReadEFuse(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); _offset 12 drivers/staging/rtl8723bs/hal/HalPhyRf.c #define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \ _offset 14 drivers/staging/rtl8723bs/hal/HalPhyRf.c for (_offset = 0; _offset < _size; _offset++) {\ _offset 15 drivers/staging/rtl8723bs/hal/HalPhyRf.c if (_deltaThermal < thermalThreshold[_direction][_offset]) {\ _offset 16 drivers/staging/rtl8723bs/hal/HalPhyRf.c if (_offset != 0)\ _offset 17 drivers/staging/rtl8723bs/hal/HalPhyRf.c _offset--;\ _offset 21 drivers/staging/rtl8723bs/hal/HalPhyRf.c if (_offset >= _size)\ _offset 22 drivers/staging/rtl8723bs/hal/HalPhyRf.c _offset = _size-1;\ _offset 859 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c u16 _offset, _offset 880 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c if ((_offset+_size_byte) > EFUSE_MAX_MAP_LEN) { _offset 881 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c DBG_8192C("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __func__, _offset, _size_byte); _offset 965 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c pbuf[i] = efuseTbl[_offset+i]; _offset 998 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c u16 _offset, _offset 1020 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c if ((_offset+_size_byte) > EFUSE_BT_MAP_LEN) { _offset 1021 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c DBG_8192C("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __func__, _offset, _size_byte); _offset 1104 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c pbuf[i] = efuseTbl[_offset+i]; _offset 1131 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c u16 _offset, _offset 1138 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c hal_ReadEFuse_WiFi(padapter, _offset, _size_byte, pbuf, bPseudoTest); _offset 1140 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c hal_ReadEFuse_BT(padapter, _offset, _size_byte, pbuf, bPseudoTest); _offset 251 drivers/staging/rtl8723bs/include/hal_intf.h void (*ReadEFuse)(struct adapter *padapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool bPseudoTest); _offset 74 drivers/thermal/qcom/tsens.h #define REG_FIELD_FOR_EACH_SENSOR11(_name, _offset, _startbit, _stopbit) \ _offset 75 drivers/thermal/qcom/tsens.h [_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \ _offset 76 drivers/thermal/qcom/tsens.h [_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \ _offset 77 drivers/thermal/qcom/tsens.h [_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \ _offset 78 drivers/thermal/qcom/tsens.h [_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \ _offset 79 drivers/thermal/qcom/tsens.h [_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \ _offset 80 drivers/thermal/qcom/tsens.h [_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \ _offset 81 drivers/thermal/qcom/tsens.h [_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \ _offset 82 drivers/thermal/qcom/tsens.h [_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \ _offset 83 drivers/thermal/qcom/tsens.h [_name##_##8] = REG_FIELD(_offset + 32, _startbit, _stopbit), \ _offset 84 drivers/thermal/qcom/tsens.h [_name##_##9] = REG_FIELD(_offset + 36, _startbit, _stopbit), \ _offset 85 drivers/thermal/qcom/tsens.h [_name##_##10] = REG_FIELD(_offset + 40, _startbit, _stopbit) _offset 87 drivers/thermal/qcom/tsens.h #define REG_FIELD_FOR_EACH_SENSOR16(_name, _offset, _startbit, _stopbit) \ _offset 88 drivers/thermal/qcom/tsens.h [_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \ _offset 89 drivers/thermal/qcom/tsens.h [_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \ _offset 90 drivers/thermal/qcom/tsens.h [_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \ _offset 91 drivers/thermal/qcom/tsens.h [_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \ _offset 92 drivers/thermal/qcom/tsens.h [_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \ _offset 93 drivers/thermal/qcom/tsens.h [_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \ _offset 94 drivers/thermal/qcom/tsens.h [_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \ _offset 95 drivers/thermal/qcom/tsens.h [_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \ _offset 96 drivers/thermal/qcom/tsens.h [_name##_##8] = REG_FIELD(_offset + 32, _startbit, _stopbit), \ _offset 97 drivers/thermal/qcom/tsens.h [_name##_##9] = REG_FIELD(_offset + 36, _startbit, _stopbit), \ _offset 98 drivers/thermal/qcom/tsens.h [_name##_##10] = REG_FIELD(_offset + 40, _startbit, _stopbit), \ _offset 99 drivers/thermal/qcom/tsens.h [_name##_##11] = REG_FIELD(_offset + 44, _startbit, _stopbit), \ _offset 100 drivers/thermal/qcom/tsens.h [_name##_##12] = REG_FIELD(_offset + 48, _startbit, _stopbit), \ _offset 101 drivers/thermal/qcom/tsens.h [_name##_##13] = REG_FIELD(_offset + 52, _startbit, _stopbit), \ _offset 102 drivers/thermal/qcom/tsens.h [_name##_##14] = REG_FIELD(_offset + 56, _startbit, _stopbit), \ _offset 103 drivers/thermal/qcom/tsens.h [_name##_##15] = REG_FIELD(_offset + 60, _startbit, _stopbit) _offset 20 drivers/usb/musb/musbhsdma.c #define MUSB_HSDMA_CHANNEL_OFFSET(_bchannel, _offset) \ _offset 21 drivers/usb/musb/musbhsdma.c (MUSB_HSDMA_BASE + (_bchannel << 4) + _offset) _offset 240 drivers/video/fbdev/vermilion/vermilion.h #define VML_READ32(_par, _offset) \ _offset 241 drivers/video/fbdev/vermilion/vermilion.h (ioread32((_par)->vdc_mem + (_offset))) _offset 242 drivers/video/fbdev/vermilion/vermilion.h #define VML_WRITE32(_par, _offset, _value) \ _offset 243 drivers/video/fbdev/vermilion/vermilion.h iowrite32(_value, (_par)->vdc_mem + (_offset)) _offset 151 fs/ext4/sysfs.c .attr_ptr = ptr_##_struct##_offset, \ _offset 414 fs/f2fs/sysfs.c #define F2FS_ATTR_OFFSET(_struct_type, _name, _mode, _show, _store, _offset) \ _offset 420 fs/f2fs/sysfs.c .offset = _offset \ _offset 41 net/rxrpc/insecure.c unsigned int *_offset, unsigned int *_len) _offset 270 net/rxrpc/recvmsg.c unsigned int *_offset, unsigned int *_len, _offset 296 net/rxrpc/recvmsg.c *_offset = offset; _offset 299 net/rxrpc/recvmsg.c call->security->locate_data(call, skb, _offset, _len); _offset 310 net/rxrpc/recvmsg.c size_t len, int flags, size_t *_offset) _offset 380 net/rxrpc/recvmsg.c remain = len - *_offset; _offset 395 net/rxrpc/recvmsg.c *_offset += copy; _offset 401 net/rxrpc/recvmsg.c ASSERTCMP(*_offset, ==, len); _offset 596 net/rxrpc/rxkad.c unsigned int *_offset, unsigned int *_len) _offset 600 net/rxrpc/rxkad.c if (skb_copy_bits(skb, *_offset, &sechdr, sizeof(sechdr)) < 0) _offset 602 net/rxrpc/rxkad.c *_offset += sizeof(sechdr); _offset 610 net/rxrpc/rxkad.c unsigned int *_offset, unsigned int *_len) _offset 614 net/rxrpc/rxkad.c if (skb_copy_bits(skb, *_offset, &sechdr, sizeof(sechdr)) < 0) _offset 616 net/rxrpc/rxkad.c *_offset += sizeof(sechdr); _offset 624 net/rxrpc/rxkad.c unsigned int *_offset, unsigned int *_len) _offset 628 net/rxrpc/rxkad.c rxkad_locate_data_1(call, skb, _offset, _len); _offset 631 net/rxrpc/rxkad.c rxkad_locate_data_2(call, skb, _offset, _len); _offset 4195 virt/kvm/kvm_main.c static int vm_stat_get(void *_offset, u64 *val) _offset 4197 virt/kvm/kvm_main.c unsigned offset = (long)_offset; _offset 4213 virt/kvm/kvm_main.c static int vm_stat_clear(void *_offset, u64 val) _offset 4215 virt/kvm/kvm_main.c unsigned offset = (long)_offset; _offset 4234 virt/kvm/kvm_main.c static int vcpu_stat_get(void *_offset, u64 *val) _offset 4236 virt/kvm/kvm_main.c unsigned offset = (long)_offset; _offset 4252 virt/kvm/kvm_main.c static int vcpu_stat_clear(void *_offset, u64 val) _offset 4254 virt/kvm/kvm_main.c unsigned offset = (long)_offset;