_hwid 8 arch/arm/mach-imx/devices/platform-flexcan.c #define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \ _hwid 11 arch/arm/mach-imx/devices/platform-flexcan.c .iobase = soc ## _CAN ## _hwid ## _BASE_ADDR, \ _hwid 13 arch/arm/mach-imx/devices/platform-flexcan.c .irq = soc ## _INT_CAN ## _hwid, \ _hwid 16 arch/arm/mach-imx/devices/platform-flexcan.c #define imx_flexcan_data_entry(soc, _id, _hwid, _size) \ _hwid 17 arch/arm/mach-imx/devices/platform-flexcan.c [_id] = imx_flexcan_data_entry_single(soc, _id, _hwid, _size) _hwid 21 arch/arm/mach-imx/devices/platform-flexcan.c #define imx35_flexcan_data_entry(_id, _hwid) \ _hwid 22 arch/arm/mach-imx/devices/platform-flexcan.c imx_flexcan_data_entry(MX35, _id, _hwid, SZ_16K) _hwid 9 arch/arm/mach-imx/devices/platform-imx-i2c.c #define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) \ _hwid 13 arch/arm/mach-imx/devices/platform-imx-i2c.c .iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \ _hwid 15 arch/arm/mach-imx/devices/platform-imx-i2c.c .irq = soc ## _INT_I2C ## _hwid, \ _hwid 18 arch/arm/mach-imx/devices/platform-imx-i2c.c #define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size) \ _hwid 19 arch/arm/mach-imx/devices/platform-imx-i2c.c [_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) _hwid 28 arch/arm/mach-imx/devices/platform-imx-i2c.c #define imx27_imx_i2c_data_entry(_id, _hwid) \ _hwid 29 arch/arm/mach-imx/devices/platform-imx-i2c.c imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K) _hwid 37 arch/arm/mach-imx/devices/platform-imx-i2c.c #define imx31_imx_i2c_data_entry(_id, _hwid) \ _hwid 38 arch/arm/mach-imx/devices/platform-imx-i2c.c imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K) _hwid 47 arch/arm/mach-imx/devices/platform-imx-i2c.c #define imx35_imx_i2c_data_entry(_id, _hwid) \ _hwid 48 arch/arm/mach-imx/devices/platform-imx-i2c.c imx_imx_i2c_data_entry(MX35, "imx21-i2c", _id, _hwid, SZ_4K) _hwid 9 arch/arm/mach-imx/devices/platform-imx-ssi.c #define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \ _hwid 12 arch/arm/mach-imx/devices/platform-imx-ssi.c .iobase = soc ## _SSI ## _hwid ## _BASE_ADDR, \ _hwid 14 arch/arm/mach-imx/devices/platform-imx-ssi.c .irq = soc ## _INT_SSI ## _hwid, \ _hwid 15 arch/arm/mach-imx/devices/platform-imx-ssi.c .dmatx0 = soc ## _DMA_REQ_SSI ## _hwid ## _TX0, \ _hwid 16 arch/arm/mach-imx/devices/platform-imx-ssi.c .dmarx0 = soc ## _DMA_REQ_SSI ## _hwid ## _RX0, \ _hwid 17 arch/arm/mach-imx/devices/platform-imx-ssi.c .dmatx1 = soc ## _DMA_REQ_SSI ## _hwid ## _TX1, \ _hwid 18 arch/arm/mach-imx/devices/platform-imx-ssi.c .dmarx1 = soc ## _DMA_REQ_SSI ## _hwid ## _RX1, \ _hwid 23 arch/arm/mach-imx/devices/platform-imx-ssi.c #define imx21_imx_ssi_data_entry(_id, _hwid) \ _hwid 24 arch/arm/mach-imx/devices/platform-imx-ssi.c imx_imx_ssi_data_entry(MX21, _id, _hwid, SZ_4K) _hwid 32 arch/arm/mach-imx/devices/platform-imx-ssi.c #define imx27_imx_ssi_data_entry(_id, _hwid) \ _hwid 33 arch/arm/mach-imx/devices/platform-imx-ssi.c imx_imx_ssi_data_entry(MX27, _id, _hwid, SZ_4K) _hwid 41 arch/arm/mach-imx/devices/platform-imx-ssi.c #define imx31_imx_ssi_data_entry(_id, _hwid) \ _hwid 42 arch/arm/mach-imx/devices/platform-imx-ssi.c imx_imx_ssi_data_entry(MX31, _id, _hwid, SZ_4K) _hwid 50 arch/arm/mach-imx/devices/platform-imx-ssi.c #define imx35_imx_ssi_data_entry(_id, _hwid) \ _hwid 51 arch/arm/mach-imx/devices/platform-imx-ssi.c imx_imx_ssi_data_entry(MX35, _id, _hwid, SZ_4K) _hwid 9 arch/arm/mach-imx/devices/platform-imx-uart.c #define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \ _hwid 12 arch/arm/mach-imx/devices/platform-imx-uart.c .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \ _hwid 14 arch/arm/mach-imx/devices/platform-imx-uart.c .irqrx = soc ## _INT_UART ## _hwid ## RX, \ _hwid 15 arch/arm/mach-imx/devices/platform-imx-uart.c .irqtx = soc ## _INT_UART ## _hwid ## TX, \ _hwid 16 arch/arm/mach-imx/devices/platform-imx-uart.c .irqrts = soc ## _INT_UART ## _hwid ## RTS, \ _hwid 19 arch/arm/mach-imx/devices/platform-imx-uart.c #define imx_imx_uart_1irq_data_entry(soc, _id, _hwid, _size) \ _hwid 22 arch/arm/mach-imx/devices/platform-imx-uart.c .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \ _hwid 24 arch/arm/mach-imx/devices/platform-imx-uart.c .irq = soc ## _INT_UART ## _hwid, \ _hwid 29 arch/arm/mach-imx/devices/platform-imx-uart.c #define imx21_imx_uart_data_entry(_id, _hwid) \ _hwid 30 arch/arm/mach-imx/devices/platform-imx-uart.c imx_imx_uart_1irq_data_entry(MX21, _id, _hwid, SZ_4K) _hwid 40 arch/arm/mach-imx/devices/platform-imx-uart.c #define imx27_imx_uart_data_entry(_id, _hwid) \ _hwid 41 arch/arm/mach-imx/devices/platform-imx-uart.c imx_imx_uart_1irq_data_entry(MX27, _id, _hwid, SZ_4K) _hwid 53 arch/arm/mach-imx/devices/platform-imx-uart.c #define imx31_imx_uart_data_entry(_id, _hwid) \ _hwid 54 arch/arm/mach-imx/devices/platform-imx-uart.c imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_4K) _hwid 65 arch/arm/mach-imx/devices/platform-imx-uart.c #define imx35_imx_uart_data_entry(_id, _hwid) \ _hwid 66 arch/arm/mach-imx/devices/platform-imx-uart.c imx_imx_uart_1irq_data_entry(MX35, _id, _hwid, SZ_16K) _hwid 11 arch/arm/mach-imx/devices/platform-imx2-wdt.c #define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) \ _hwid 14 arch/arm/mach-imx/devices/platform-imx2-wdt.c .iobase = soc ## _WDOG ## _hwid ## _BASE_ADDR, \ _hwid 17 arch/arm/mach-imx/devices/platform-imx2-wdt.c #define imx_imx2_wdt_data_entry(soc, _id, _hwid, _size) \ _hwid 18 arch/arm/mach-imx/devices/platform-imx2-wdt.c [_id] = imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) _hwid 11 arch/arm/mach-imx/devices/platform-mxc-mmc.c #define imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) \ _hwid 15 arch/arm/mach-imx/devices/platform-mxc-mmc.c .iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \ _hwid 17 arch/arm/mach-imx/devices/platform-mxc-mmc.c .irq = soc ## _INT_SDHC ## _hwid, \ _hwid 18 arch/arm/mach-imx/devices/platform-mxc-mmc.c .dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \ _hwid 20 arch/arm/mach-imx/devices/platform-mxc-mmc.c #define imx_mxc_mmc_data_entry(soc, _devid, _id, _hwid, _size) \ _hwid 21 arch/arm/mach-imx/devices/platform-mxc-mmc.c [_id] = imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) _hwid 25 arch/arm/mach-imx/devices/platform-mxc-mmc.c #define imx21_mxc_mmc_data_entry(_id, _hwid) \ _hwid 26 arch/arm/mach-imx/devices/platform-mxc-mmc.c imx_mxc_mmc_data_entry(MX21, "imx21-mmc", _id, _hwid, SZ_4K) _hwid 34 arch/arm/mach-imx/devices/platform-mxc-mmc.c #define imx27_mxc_mmc_data_entry(_id, _hwid) \ _hwid 35 arch/arm/mach-imx/devices/platform-mxc-mmc.c imx_mxc_mmc_data_entry(MX27, "imx21-mmc", _id, _hwid, SZ_4K) _hwid 43 arch/arm/mach-imx/devices/platform-mxc-mmc.c #define imx31_mxc_mmc_data_entry(_id, _hwid) \ _hwid 44 arch/arm/mach-imx/devices/platform-mxc-mmc.c imx_mxc_mmc_data_entry(MX31, "imx31-mmc", _id, _hwid, SZ_16K) _hwid 25 arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c #define imx35_sdhci_esdhc_imx_data_entry(_id, _hwid) \ _hwid 26 arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c imx_sdhci_esdhc_imx_data_entry(MX35, "sdhci-esdhc-imx35", _id, _hwid) _hwid 23 arch/arm/mach-imx/devices/platform-spi_imx.c #define imx21_cspi_data_entry(_id, _hwid) \ _hwid 24 arch/arm/mach-imx/devices/platform-spi_imx.c imx_spi_imx_data_entry(MX21, CSPI, "imx21-cspi", _id, _hwid, SZ_4K) _hwid 32 arch/arm/mach-imx/devices/platform-spi_imx.c #define imx27_cspi_data_entry(_id, _hwid) \ _hwid 33 arch/arm/mach-imx/devices/platform-spi_imx.c imx_spi_imx_data_entry(MX27, CSPI, "imx27-cspi", _id, _hwid, SZ_4K) _hwid 42 arch/arm/mach-imx/devices/platform-spi_imx.c #define imx31_cspi_data_entry(_id, _hwid) \ _hwid 43 arch/arm/mach-imx/devices/platform-spi_imx.c imx_spi_imx_data_entry(MX31, CSPI, "imx31-cspi", _id, _hwid, SZ_4K) _hwid 52 arch/arm/mach-imx/devices/platform-spi_imx.c #define imx35_cspi_data_entry(_id, _hwid) \ _hwid 53 arch/arm/mach-imx/devices/platform-spi_imx.c imx_spi_imx_data_entry(MX35, CSPI, "imx35-cspi", _id, _hwid, SZ_4K)