_div               38 drivers/clk/actions/owl-composite.h 		     _mux, _gate, _div, _flags)				\
_div               42 drivers/clk/actions/owl-composite.h 		.rate.div_hw	= _div,					\
_div               53 drivers/clk/actions/owl-composite.h 		     _gate, _div, _flags)				\
_div               56 drivers/clk/actions/owl-composite.h 		.rate.div_hw	= _div,					\
_div               82 drivers/clk/actions/owl-composite.h 			_gate, _mul, _div, _flags)			\
_div               86 drivers/clk/actions/owl-composite.h 		.rate.fix_fact_hw.div	= _div,				\
_div               16 drivers/clk/actions/owl-fixed-factor.h #define OWL_FIX_FACT(_struct, _name, _parent, _mul, _div, _flags)	\
_div               19 drivers/clk/actions/owl-fixed-factor.h 		.div		= _div,					\
_div              704 drivers/clk/clk-stm32f4.c #define to_pll_div_clk(_div) container_of(_div, struct stm32f4_pll_div, div)
_div             1106 drivers/clk/clk-stm32mp1.c #define FIXED_FACTOR(_id, _name, _parent, _flags, _mult, _div)\
_div             1114 drivers/clk/clk-stm32mp1.c 		.div = _div,\
_div             1270 drivers/clk/clk-stm32mp1.c #define COMPOSITE(_id, _name, _parents, _flags, _gate, _mux, _div)\
_div             1280 drivers/clk/clk-stm32mp1.c 		_div,\
_div               47 drivers/clk/mediatek/clk-mtk.h #define FACTOR(_id, _name, _parent, _mult, _div) {	\
_div               52 drivers/clk/mediatek/clk-mtk.h 		.div = _div,				\
_div              149 drivers/clk/meson/axg-audio.c 	AUD_DIV(_name##_div, _reg, 0, 16, _flag,		\
_div              171 drivers/clk/meson/axg-audio.c 	AUD_GATE(_name, _reg, 31,  aud_##_name##_div,		\
_div             1206 drivers/clk/nxp/clk-lpc32xx.c #define LPC32XX_DEFINE_COMPOSITE(_idx, _mux, _div, _gate)		\
_div             1213 drivers/clk/nxp/clk-lpc32xx.c 		.div = (CLK_PREFIX(_div) == LPC32XX_CLK__NULL ? NULL :	\
_div             1214 drivers/clk/nxp/clk-lpc32xx.c 			&clk_hw_proto[CLK_PREFIX(_div)].hw0),		\
_div               86 drivers/clk/pistachio/clk.h #define FIXED_FACTOR(_id, _name, _pname, _div)			\
_div               89 drivers/clk/pistachio/clk.h 		.div		= _div,				\
_div               74 drivers/clk/qcom/clk-rpmh.c 			  _res_en_offset, _res_on, _div)		\
_div               80 drivers/clk/qcom/clk-rpmh.c 		.div = _div,						\
_div               99 drivers/clk/qcom/clk-rpmh.c 		.div = _div,						\
_div              115 drivers/clk/qcom/clk-rpmh.c 			    _res_on, _div)				\
_div              117 drivers/clk/qcom/clk-rpmh.c 			  CLK_RPMH_ARC_EN_OFFSET, _res_on, _div)
_div              120 drivers/clk/qcom/clk-rpmh.c 				_div)					\
_div              122 drivers/clk/qcom/clk-rpmh.c 			  CLK_RPMH_VRM_EN_OFFSET, 1, _div)
_div               72 drivers/clk/renesas/r9a06g032-clocks.c #define D_ROOT(_idx, _n, _mul, _div) \
_div               74 drivers/clk/renesas/r9a06g032-clocks.c 		.div = _div, .mul = _mul }
_div               75 drivers/clk/renesas/r9a06g032-clocks.c #define D_FFC(_idx, _n, _src, _div) \
_div               78 drivers/clk/renesas/r9a06g032-clocks.c 		.div = _div, .mul = 1}
_div               47 drivers/clk/renesas/rcar-gen3-cpg.h #define DEF_GEN3_OSC(_name, _id, _parent, _div)		\
_div               48 drivers/clk/renesas/rcar-gen3-cpg.h 	DEF_BASE(_name, _id, CLK_TYPE_GEN3_OSC, _parent, .div = _div)
_div               54 drivers/clk/renesas/rcar-gen3-cpg.h #define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset)	\
_div               55 drivers/clk/renesas/rcar-gen3-cpg.h 	DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
_div               51 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_FIXED(_name, _id, _parent, _div, _mult)	\
_div               52 drivers/clk/renesas/renesas-cpg-mssr.h 	DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
_div               55 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div)	\
_div               56 drivers/clk/renesas/renesas-cpg-mssr.h 	DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1)
_div               83 drivers/clk/uniphier/clk-uniphier.h #define UNIPHIER_CLK_FACTOR(_name, _idx, _parent, _mult, _div)	\
_div               91 drivers/clk/uniphier/clk-uniphier.h 			.div = (_div),				\
_div               80 drivers/clk/zte/clk.h #define FFACTOR(_id, _name, _parent, _mult, _div, _flag)		\
_div               83 drivers/clk/zte/clk.h 		.div		= _div,					\
_div              394 drivers/hwmon/asb100.c static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
_div             1011 drivers/hwmon/vt1211.c 	SENSOR_ATTR_2(fan##ix##_div, S_IRUGO | S_IWUSR, \
_div             1325 drivers/hwmon/w83627hf.c 	&sensor_dev_attr_fan##_X_##_div.dev_attr.attr,		\
_div              929 drivers/hwmon/w83781d.c 	&sensor_dev_attr_fan##X##_div.dev_attr.attr,		\
_div              315 drivers/staging/comedi/drivers/dt2811.c 	unsigned int _div;
_div              322 drivers/staging/comedi/drivers/dt2811.c 	for (_div = 0; _div <= 7; _div++) {
_div              324 drivers/staging/comedi/drivers/dt2811.c 			unsigned int div = dt2811_clk_dividers[_div];
_div              327 drivers/staging/comedi/drivers/dt2811.c 			unsigned int divisor = DT2811_TMRCTR_MANTISSA(_div) |
_div              981 include/linux/clk-provider.h 			_div, _mult, _flags)				\
_div              983 include/linux/clk-provider.h 		.div		= _div,					\
_div              992 include/linux/clk-provider.h 			    _div, _mult, _flags)			\
_div              994 include/linux/clk-provider.h 		.div		= _div,					\
_div             1007 include/linux/clk-provider.h 			     _div, _mult, _flags)			\
_div             1009 include/linux/clk-provider.h 		.div		= _div,					\
_div             1018 include/linux/clk-provider.h 				 _div, _mult, _flags)			\
_div             1020 include/linux/clk-provider.h 		.div		= _div,					\