_core_peri_div     81 drivers/clk/rockchip/clk-rk3228.c #define RK3228_CLKSEL1(_core_aclk_div, _core_peri_div)				\
_core_peri_div     84 drivers/clk/rockchip/clk-rk3228.c 		.val = HIWORD_UPDATE(_core_peri_div, RK3228_DIV_PERI_MASK,	\
_core_peri_div     90 drivers/clk/rockchip/clk-rk3228.c #define RK3228_CPUCLK_RATE(_prate, _core_aclk_div, _core_peri_div)		\
_core_peri_div     94 drivers/clk/rockchip/clk-rk3228.c 			RK3228_CLKSEL1(_core_aclk_div, _core_peri_div),		\
_core_peri_div     72 drivers/clk/rockchip/clk-rv1108.c #define RV1108_CLKSEL0(_core_peri_div)	\
_core_peri_div     75 drivers/clk/rockchip/clk-rv1108.c 		.val = HIWORD_UPDATE(_core_peri_div, RV1108_DIV_CORE_MASK,\
_core_peri_div     79 drivers/clk/rockchip/clk-rv1108.c #define RV1108_CPUCLK_RATE(_prate, _core_peri_div)			\
_core_peri_div     83 drivers/clk/rockchip/clk-rv1108.c 			RV1108_CLKSEL0(_core_peri_div),		\