_core_aclk_div     80 drivers/clk/rockchip/clk-rk3128.c #define RK3128_CLKSEL1(_core_aclk_div, _pclk_dbg_div)			\
_core_aclk_div     85 drivers/clk/rockchip/clk-rk3128.c 	       HIWORD_UPDATE(_core_aclk_div, RK3128_DIV_ACLK_MASK,	\
_core_aclk_div     89 drivers/clk/rockchip/clk-rk3128.c #define RK3128_CPUCLK_RATE(_prate, _core_aclk_div, _pclk_dbg_div)	\
_core_aclk_div     93 drivers/clk/rockchip/clk-rk3128.c 		RK3128_CLKSEL1(_core_aclk_div, _pclk_dbg_div),		\
_core_aclk_div     81 drivers/clk/rockchip/clk-rk3228.c #define RK3228_CLKSEL1(_core_aclk_div, _core_peri_div)				\
_core_aclk_div     86 drivers/clk/rockchip/clk-rk3228.c 		       HIWORD_UPDATE(_core_aclk_div, RK3228_DIV_ACLK_MASK,	\
_core_aclk_div     90 drivers/clk/rockchip/clk-rk3228.c #define RK3228_CPUCLK_RATE(_prate, _core_aclk_div, _core_peri_div)		\
_core_aclk_div     94 drivers/clk/rockchip/clk-rk3228.c 			RK3228_CLKSEL1(_core_aclk_div, _core_peri_div),		\