_clk               57 arch/arm/mach-mmp/clock.h #define INIT_CLKREG(_clk, _devname, _conname)			\
_clk               59 arch/arm/mach-mmp/clock.h 		.clk		= _clk,				\
_clk              388 arch/arm/mach-omap2/display.c 		if (oc->_clk)
_clk              389 arch/arm/mach-omap2/display.c 			clk_prepare_enable(oc->_clk);
_clk              415 arch/arm/mach-omap2/display.c 		if (oc->_clk)
_clk              416 arch/arm/mach-omap2/display.c 			clk_disable_unprepare(oc->_clk);
_clk              263 arch/arm/mach-omap2/id.c 	OMAP3_SHOW_FEATURE(192mhz_clk);
_clk              665 arch/arm/mach-omap2/omap_hwmod.c 	} else if (oh->_clk) {
_clk              666 arch/arm/mach-omap2/omap_hwmod.c 		if (!omap2_clk_is_hw_omap(__clk_get_hw(oh->_clk)))
_clk              668 arch/arm/mach-omap2/omap_hwmod.c 		clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
_clk              863 arch/arm/mach-omap2/omap_hwmod.c 		oh->_clk = clk;
_clk              869 arch/arm/mach-omap2/omap_hwmod.c 		oh->_clk = clk_get(NULL, oh->main_clk);
_clk              872 arch/arm/mach-omap2/omap_hwmod.c 	if (IS_ERR(oh->_clk)) {
_clk              885 arch/arm/mach-omap2/omap_hwmod.c 	clk_prepare(oh->_clk);
_clk              918 arch/arm/mach-omap2/omap_hwmod.c 		os->_clk = c;
_clk              927 arch/arm/mach-omap2/omap_hwmod.c 		clk_prepare(os->_clk);
_clk              955 arch/arm/mach-omap2/omap_hwmod.c 		oc->_clk = c;
_clk              964 arch/arm/mach-omap2/omap_hwmod.c 		clk_prepare(oc->_clk);
_clk              978 arch/arm/mach-omap2/omap_hwmod.c 		if (oc->_clk) {
_clk              980 arch/arm/mach-omap2/omap_hwmod.c 				 __clk_get_name(oc->_clk));
_clk              981 arch/arm/mach-omap2/omap_hwmod.c 			clk_enable(oc->_clk);
_clk              993 arch/arm/mach-omap2/omap_hwmod.c 		if (oc->_clk) {
_clk              995 arch/arm/mach-omap2/omap_hwmod.c 				 __clk_get_name(oc->_clk));
_clk              996 arch/arm/mach-omap2/omap_hwmod.c 			clk_disable(oc->_clk);
_clk             1016 arch/arm/mach-omap2/omap_hwmod.c 	if (oh->_clk)
_clk             1017 arch/arm/mach-omap2/omap_hwmod.c 		clk_enable(oh->_clk);
_clk             1020 arch/arm/mach-omap2/omap_hwmod.c 		if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
_clk             1021 arch/arm/mach-omap2/omap_hwmod.c 			omap2_clk_deny_idle(os->_clk);
_clk             1022 arch/arm/mach-omap2/omap_hwmod.c 			clk_enable(os->_clk);
_clk             1071 arch/arm/mach-omap2/omap_hwmod.c 	if (oh->_clk)
_clk             1072 arch/arm/mach-omap2/omap_hwmod.c 		clk_disable(oh->_clk);
_clk             1075 arch/arm/mach-omap2/omap_hwmod.c 		if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
_clk             1076 arch/arm/mach-omap2/omap_hwmod.c 			clk_disable(os->_clk);
_clk             1077 arch/arm/mach-omap2/omap_hwmod.c 			omap2_clk_allow_idle(os->_clk);
_clk             2454 arch/arm/mach-omap2/omap_hwmod.c 		if (!os->_clk)
_clk             2465 arch/arm/mach-omap2/omap_hwmod.c 			clk_enable(os->_clk);
_clk             3825 arch/arm/mach-omap2/omap_hwmod.c 	if (oh->_clk) {
_clk             3826 arch/arm/mach-omap2/omap_hwmod.c 		c = oh->_clk;
_clk             3831 arch/arm/mach-omap2/omap_hwmod.c 		c = oi->_clk;
_clk              181 arch/arm/mach-omap2/omap_hwmod.h 	struct clk	*_clk;
_clk              244 arch/arm/mach-omap2/omap_hwmod.h 	struct clk			*_clk;
_clk              587 arch/arm/mach-omap2/omap_hwmod.h 	struct clk			*_clk;
_clk              448 arch/arm/mach-omap2/soc.h OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
_clk              357 drivers/clk/mvebu/kirkwood.c CLK_OF_DECLARE(98dx1135_clk, "marvell,mv98dx1135-core-clock",
_clk               60 drivers/clk/renesas/r9a06g032-clocks.c #define I_GATE(_clk, _rst, _rdy, _midle, _scon, _mirack, _mistat) \
_clk               61 drivers/clk/renesas/r9a06g032-clocks.c 	{ .gate = _clk, .reset = _rst, \
_clk              852 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c 		struct gm20b_clk *_clk = gm20b_clk(base);
_clk              856 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c 		_clk->uv = nvkm_volt_get(volt);
_clk              859 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c 		ret = gm20b_clk_init_dvfs(_clk);
_clk              200 include/linux/sh_clk.h #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
_clk              201 include/linux/sh_clk.h #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
_clk              202 include/linux/sh_clk.h #define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }