_bank 32 arch/arm/mach-s3c24xx/regs-mem.h #define S3C2410_BWSCON_GET(_bwscon, _bank) (((_bwscon) >> ((_bank) * 4)) & 0xf) _bank 630 arch/mips/include/asm/sn/klconfig.h #define KLCONFIG_MEMBNK_SIZE(_info, _bank) \ _bank 631 arch/mips/include/asm/sn/klconfig.h ((_info)->membnk_bnksz[(_bank)]) _bank 635 arch/mips/include/asm/sn/klconfig.h #define KLCONFIG_MEMBNK_PREMIUM(_info, _bank) \ _bank 636 arch/mips/include/asm/sn/klconfig.h ((_info)->membnk_attr & (MEMBNK_PREMIUM << (_bank))) _bank 203 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c #define CL22_WR_OVER_CL45(_bp, _phy, _bank, _addr, _val) \ _bank 206 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c (_bank + (_addr & 0xf)), \ _bank 209 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c #define CL22_RD_OVER_CL45(_bp, _phy, _bank, _addr, _val) \ _bank 212 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c (_bank + (_addr & 0xf)), \ _bank 1060 drivers/pinctrl/pinctrl-oxnas.c #define GPIO_BANK(_bank) \ _bank 1063 drivers/pinctrl/pinctrl-oxnas.c .label = "GPIO" #_bank, \ _bank 1072 drivers/pinctrl/pinctrl-oxnas.c .base = GPIO_BANK_START(_bank), \ _bank 1077 drivers/pinctrl/pinctrl-oxnas.c .name = "GPIO" #_bank, \ _bank 2106 drivers/pinctrl/pinctrl-pic32.c #define GPIO_BANK(_bank, _npins) \ _bank 2109 drivers/pinctrl/pinctrl-pic32.c .label = "GPIO" #_bank, \ _bank 2118 drivers/pinctrl/pinctrl-pic32.c .base = GPIO_BANK_START(_bank), \ _bank 2123 drivers/pinctrl/pinctrl-pic32.c .name = "GPIO" #_bank, \ _bank 1310 drivers/pinctrl/pinctrl-pistachio.c #define GPIO_BANK(_bank, _pin_base, _npins) \ _bank 1315 drivers/pinctrl/pinctrl-pistachio.c .label = "GPIO" #_bank, \ _bank 1327 drivers/pinctrl/pinctrl-pistachio.c .name = "GPIO" #_bank, \ _bank 210 drivers/pinctrl/sunxi/pinctrl-sunxi.h #define SUNXI_FUNCTION_IRQ_BANK(_val, _bank, _irq) \ _bank 214 drivers/pinctrl/sunxi/pinctrl-sunxi.h .irqbank = _bank, \ _bank 1071 drivers/regulator/ab8500.c #define REG_INIT(_id, _bank, _addr, _mask) \ _bank 1073 drivers/regulator/ab8500.c .bank = _bank, \