_atclk            138 drivers/clk/rockchip/clk-rk3288.c #define RK3288_CLKSEL37(_l2ram, _atclk, _pclk_dbg_pre)			\
_atclk            143 drivers/clk/rockchip/clk-rk3288.c 		       HIWORD_UPDATE(_atclk, RK3288_DIV_ATCLK_MASK,	\
_atclk            150 drivers/clk/rockchip/clk-rk3288.c #define RK3288_CPUCLK_RATE(_prate, _core_m0, _core_mp, _l2ram, _atclk, _pdbg) \
_atclk            155 drivers/clk/rockchip/clk-rk3288.c 			RK3288_CLKSEL37(_l2ram, _atclk, _pdbg),		\
_atclk            189 drivers/clk/rockchip/clk-rk3368.c #define RK3368_CLKSEL1(_offs, _atclk, _pdbg)				\
_atclk            192 drivers/clk/rockchip/clk-rk3368.c 		.val = HIWORD_UPDATE(_atclk, RK3368_DIV_ATCLK_MASK,	\
_atclk            199 drivers/clk/rockchip/clk-rk3368.c #define RK3368_CPUCLKB_RATE(_prate, _aclkm, _atclk, _pdbg)		\
_atclk            204 drivers/clk/rockchip/clk-rk3368.c 			RK3368_CLKSEL1(0, _atclk, _pdbg),		\
_atclk            209 drivers/clk/rockchip/clk-rk3368.c #define RK3368_CPUCLKL_RATE(_prate, _aclkm, _atclk, _pdbg)		\
_atclk            214 drivers/clk/rockchip/clk-rk3368.c 			RK3368_CLKSEL1(2, _atclk, _pdbg),		\
_atclk            324 drivers/clk/rockchip/clk-rk3399.c #define RK3399_CLKSEL1(_offs, _atclk, _pdbg)				\
_atclk            327 drivers/clk/rockchip/clk-rk3399.c 		.val = HIWORD_UPDATE(_atclk, RK3399_DIV_ATCLK_MASK,	\
_atclk            334 drivers/clk/rockchip/clk-rk3399.c #define RK3399_CPUCLKL_RATE(_prate, _aclkm, _atclk, _pdbg)		\
_atclk            339 drivers/clk/rockchip/clk-rk3399.c 			RK3399_CLKSEL1(0, _atclk, _pdbg),		\
_atclk            344 drivers/clk/rockchip/clk-rk3399.c #define RK3399_CPUCLKB_RATE(_prate, _aclkm, _atclk, _pdbg)		\
_atclk            349 drivers/clk/rockchip/clk-rk3399.c 			RK3399_CLKSEL1(2, _atclk, _pdbg),		\