__reg              35 arch/sparc/kernel/iommu.c #define iommu_read(__reg) \
__reg              39 arch/sparc/kernel/iommu.c 			     : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
__reg              43 arch/sparc/kernel/iommu.c #define iommu_write(__reg, __val) \
__reg              46 arch/sparc/kernel/iommu.c 			     : "r" (__val), "r" (__reg), \
__reg              84 arch/sparc/kernel/prom_irqtrans.c #define sabre_read(__reg) \
__reg              88 arch/sparc/kernel/prom_irqtrans.c 			     : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
__reg             318 arch/sparc/kernel/prom_irqtrans.c #define schizo_read(__reg) \
__reg             322 arch/sparc/kernel/prom_irqtrans.c 			     : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
__reg             326 arch/sparc/kernel/prom_irqtrans.c #define schizo_write(__reg, __val) \
__reg             329 arch/sparc/kernel/prom_irqtrans.c 			     : "r" (__val), "r" (__reg), \
__reg              27 drivers/clk/microchip/clk-pic32mzda.c #define DECLARE_PERIPHERAL_CLOCK(__clk_name, __reg, __flags)	\
__reg              29 drivers/clk/microchip/clk-pic32mzda.c 		.ctrl_reg = (__reg),				\
__reg              41 drivers/clk/microchip/clk-pic32mzda.c #define DECLARE_REFO_CLOCK(__clkid, __reg)				\
__reg              43 drivers/clk/microchip/clk-pic32mzda.c 		.ctrl_reg = (__reg),					\
__reg             241 drivers/fsi/fsi-master-hub.c 	__be32 __reg;
__reg             244 drivers/fsi/fsi-master-hub.c 	rc = fsi_device_read(fsi_dev, FSI_MVER, &__reg, sizeof(__reg));
__reg             248 drivers/fsi/fsi-master-hub.c 	reg = be32_to_cpu(__reg);
__reg              20 drivers/gpu/drm/armada/armada_crtc.h 		struct armada_regs *__reg = _r;	\
__reg              21 drivers/gpu/drm/armada/armada_crtc.h 		__reg[_i].offset = _o;		\
__reg              22 drivers/gpu/drm/armada/armada_crtc.h 		__reg[_i].mask = ~(_m);		\
__reg              23 drivers/gpu/drm/armada/armada_crtc.h 		__reg[_i].val = _v;		\
__reg             199 drivers/hwmon/adt7411.c #define ADT7411_BIT_ATTR(__name, __reg, __bit) \
__reg             201 drivers/hwmon/adt7411.c 	adt7411_set_bit, __bit, __reg)
__reg              37 drivers/media/dvb-frontends/stv090x_priv.h #define STV090x_READ_DEMOD(__state, __reg) ((			\
__reg              39 drivers/media/dvb-frontends/stv090x_priv.h 	stv090x_read_reg(__state, STV090x_P2_##__reg) :		\
__reg              40 drivers/media/dvb-frontends/stv090x_priv.h 	stv090x_read_reg(__state, STV090x_P1_##__reg))
__reg              42 drivers/media/dvb-frontends/stv090x_priv.h #define STV090x_WRITE_DEMOD(__state, __reg, __data) ((		\
__reg              44 drivers/media/dvb-frontends/stv090x_priv.h 	stv090x_write_reg(__state, STV090x_P2_##__reg, __data) :\
__reg              45 drivers/media/dvb-frontends/stv090x_priv.h 	stv090x_write_reg(__state, STV090x_P1_##__reg, __data))
__reg             159 drivers/media/platform/s3c-camif/camif-regs.h #define  CISTATUS_FRAMECNT(__reg)		(((__reg) >> 26) & 0x3)
__reg             452 drivers/mmc/host/dw_mmc.h #define mci_fifo_readw(__reg)	__raw_readw(__reg)
__reg             453 drivers/mmc/host/dw_mmc.h #define mci_fifo_readl(__reg)	__raw_readl(__reg)
__reg             454 drivers/mmc/host/dw_mmc.h #define mci_fifo_readq(__reg)	__raw_readq(__reg)
__reg             456 drivers/mmc/host/dw_mmc.h #define mci_fifo_writew(__value, __reg)	__raw_writew(__reg, __value)
__reg             457 drivers/mmc/host/dw_mmc.h #define mci_fifo_writel(__value, __reg)	__raw_writel(__reg, __value)
__reg             458 drivers/mmc/host/dw_mmc.h #define mci_fifo_writeq(__value, __reg)	__raw_writeq(__reg, __value)
__reg             492 drivers/mmc/host/dw_mmc.h #define __raw_writeq(__value, __reg) \
__reg             493 drivers/mmc/host/dw_mmc.h 	(*(volatile u64 __force *)(__reg) = (__value))
__reg             494 drivers/mmc/host/dw_mmc.h #define __raw_readq(__reg) (*(volatile u64 __force *)(__reg))
__reg             701 drivers/net/ethernet/cadence/macb.h #define macb_or_gem_writel(__bp, __reg, __value) \
__reg             704 drivers/net/ethernet/cadence/macb.h 			gem_writel((__bp), __reg, __value); \
__reg             706 drivers/net/ethernet/cadence/macb.h 			macb_writel((__bp), __reg, __value); \
__reg             709 drivers/net/ethernet/cadence/macb.h #define macb_or_gem_readl(__bp, __reg) \
__reg             713 drivers/net/ethernet/cadence/macb.h 			__v = gem_readl((__bp), __reg); \
__reg             715 drivers/net/ethernet/cadence/macb.h 			__v = macb_readl((__bp), __reg); \
__reg              35 drivers/net/ethernet/smsc/smc91x.h 		unsigned int __reg = (r);				\
__reg              36 drivers/net/ethernet/smsc/smc91x.h 		SMC_outb(__val16, a, __reg);				\
__reg              37 drivers/net/ethernet/smsc/smc91x.h 		SMC_outb(__val16 >> 8, a, __reg + (1 << SMC_IO_SHIFT));	\
__reg              43 drivers/net/ethernet/smsc/smc91x.h 		unsigned int __reg = r;					\
__reg              44 drivers/net/ethernet/smsc/smc91x.h 		__val16  = SMC_inb(a, __reg);				\
__reg              45 drivers/net/ethernet/smsc/smc91x.h 		__val16 |= SMC_inb(a, __reg + (1 << SMC_IO_SHIFT)) << 8; \
__reg             245 drivers/net/ethernet/sun/sunhme.c #define hme_write32(__hp, __reg, __val) \
__reg             246 drivers/net/ethernet/sun/sunhme.c 	((__hp)->write32((__reg), (__val)))
__reg             247 drivers/net/ethernet/sun/sunhme.c #define hme_read32(__hp, __reg) \
__reg             248 drivers/net/ethernet/sun/sunhme.c 	((__hp)->read32(__reg))
__reg             266 drivers/net/ethernet/sun/sunhme.c #define hme_write32(__hp, __reg, __val) \
__reg             267 drivers/net/ethernet/sun/sunhme.c 	sbus_writel((__val), (__reg))
__reg             268 drivers/net/ethernet/sun/sunhme.c #define hme_read32(__hp, __reg) \
__reg             269 drivers/net/ethernet/sun/sunhme.c 	sbus_readl(__reg)
__reg             291 drivers/net/ethernet/sun/sunhme.c #define hme_write32(__hp, __reg, __val) \
__reg             292 drivers/net/ethernet/sun/sunhme.c 	writel((__val), (__reg))
__reg             293 drivers/net/ethernet/sun/sunhme.c #define hme_read32(__hp, __reg) \
__reg             294 drivers/net/ethernet/sun/sunhme.c 	readl(__reg)
__reg              40 drivers/net/wireless/ralink/rt2x00/rt2400pci.c #define WAIT_FOR_BBP(__dev, __reg) \
__reg              41 drivers/net/wireless/ralink/rt2x00/rt2400pci.c 	rt2x00mmio_regbusy_read((__dev), BBPCSR, BBPCSR_BUSY, (__reg))
__reg              42 drivers/net/wireless/ralink/rt2x00/rt2400pci.c #define WAIT_FOR_RF(__dev, __reg) \
__reg              43 drivers/net/wireless/ralink/rt2x00/rt2400pci.c 	rt2x00mmio_regbusy_read((__dev), RFCSR, RFCSR_BUSY, (__reg))
__reg              40 drivers/net/wireless/ralink/rt2x00/rt2500pci.c #define WAIT_FOR_BBP(__dev, __reg) \
__reg              41 drivers/net/wireless/ralink/rt2x00/rt2500pci.c 	rt2x00mmio_regbusy_read((__dev), BBPCSR, BBPCSR_BUSY, (__reg))
__reg              42 drivers/net/wireless/ralink/rt2x00/rt2500pci.c #define WAIT_FOR_RF(__dev, __reg) \
__reg              43 drivers/net/wireless/ralink/rt2x00/rt2500pci.c 	rt2x00mmio_regbusy_read((__dev), RFCSR, RFCSR_BUSY, (__reg))
__reg             117 drivers/net/wireless/ralink/rt2x00/rt2500usb.c #define WAIT_FOR_BBP(__dev, __reg) \
__reg             118 drivers/net/wireless/ralink/rt2x00/rt2500usb.c 	rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
__reg             119 drivers/net/wireless/ralink/rt2x00/rt2500usb.c #define WAIT_FOR_RF(__dev, __reg) \
__reg             120 drivers/net/wireless/ralink/rt2x00/rt2500usb.c 	rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
__reg              51 drivers/net/wireless/ralink/rt2x00/rt2800lib.c #define WAIT_FOR_BBP(__dev, __reg) \
__reg              52 drivers/net/wireless/ralink/rt2x00/rt2800lib.c 	rt2800_regbusy_read((__dev), BBP_CSR_CFG, BBP_CSR_CFG_BUSY, (__reg))
__reg              53 drivers/net/wireless/ralink/rt2x00/rt2800lib.c #define WAIT_FOR_RFCSR(__dev, __reg) \
__reg              54 drivers/net/wireless/ralink/rt2x00/rt2800lib.c 	rt2800_regbusy_read((__dev), RF_CSR_CFG, RF_CSR_CFG_BUSY, (__reg))
__reg              55 drivers/net/wireless/ralink/rt2x00/rt2800lib.c #define WAIT_FOR_RFCSR_MT7620(__dev, __reg) \
__reg              57 drivers/net/wireless/ralink/rt2x00/rt2800lib.c 			    (__reg))
__reg              58 drivers/net/wireless/ralink/rt2x00/rt2800lib.c #define WAIT_FOR_RF(__dev, __reg) \
__reg              59 drivers/net/wireless/ralink/rt2x00/rt2800lib.c 	rt2800_regbusy_read((__dev), RF_CSR_CFG0, RF_CSR_CFG0_BUSY, (__reg))
__reg              60 drivers/net/wireless/ralink/rt2x00/rt2800lib.c #define WAIT_FOR_MCU(__dev, __reg) \
__reg              62 drivers/net/wireless/ralink/rt2x00/rt2800lib.c 			    H2M_MAILBOX_CSR_OWNER, (__reg))
__reg             235 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h #define SET_FIELD(__reg, __type, __field, __value)\
__reg             238 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h 	*(__reg) &= ~((__field).bit_mask);	\
__reg             239 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h 	*(__reg) |= ((__value) <<		\
__reg             244 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h #define GET_FIELD(__reg, __type, __field)	\
__reg             247 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h 	((__reg) & ((__field).bit_mask)) >>	\
__reg             251 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h #define rt2x00_set_field32(__reg, __field, __value) \
__reg             252 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h 	SET_FIELD(__reg, struct rt2x00_field32, __field, __value)
__reg             253 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h #define rt2x00_get_field32(__reg, __field) \
__reg             254 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h 	GET_FIELD(__reg, struct rt2x00_field32, __field)
__reg             256 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h #define rt2x00_set_field16(__reg, __field, __value) \
__reg             257 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h 	SET_FIELD(__reg, struct rt2x00_field16, __field, __value)
__reg             258 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h #define rt2x00_get_field16(__reg, __field) \
__reg             259 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h 	GET_FIELD(__reg, struct rt2x00_field16, __field)
__reg             261 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h #define rt2x00_set_field8(__reg, __field, __value) \
__reg             262 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h 	SET_FIELD(__reg, struct rt2x00_field8, __field, __value)
__reg             263 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h #define rt2x00_get_field8(__reg, __field) \
__reg             264 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h 	GET_FIELD(__reg, struct rt2x00_field8, __field)
__reg              46 drivers/net/wireless/ralink/rt2x00/rt61pci.c #define WAIT_FOR_BBP(__dev, __reg) \
__reg              47 drivers/net/wireless/ralink/rt2x00/rt61pci.c 	rt2x00mmio_regbusy_read((__dev), PHY_CSR3, PHY_CSR3_BUSY, (__reg))
__reg              48 drivers/net/wireless/ralink/rt2x00/rt61pci.c #define WAIT_FOR_RF(__dev, __reg) \
__reg              49 drivers/net/wireless/ralink/rt2x00/rt61pci.c 	rt2x00mmio_regbusy_read((__dev), PHY_CSR4, PHY_CSR4_BUSY, (__reg))
__reg              50 drivers/net/wireless/ralink/rt2x00/rt61pci.c #define WAIT_FOR_MCU(__dev, __reg) \
__reg              52 drivers/net/wireless/ralink/rt2x00/rt61pci.c 				H2M_MAILBOX_CSR_OWNER, (__reg))
__reg              47 drivers/net/wireless/ralink/rt2x00/rt73usb.c #define WAIT_FOR_BBP(__dev, __reg) \
__reg              48 drivers/net/wireless/ralink/rt2x00/rt73usb.c 	rt2x00usb_regbusy_read((__dev), PHY_CSR3, PHY_CSR3_BUSY, (__reg))
__reg              49 drivers/net/wireless/ralink/rt2x00/rt73usb.c #define WAIT_FOR_RF(__dev, __reg) \
__reg              50 drivers/net/wireless/ralink/rt2x00/rt73usb.c 	rt2x00usb_regbusy_read((__dev), PHY_CSR4, PHY_CSR4_BUSY, (__reg))
__reg             645 drivers/pinctrl/spear/pinctrl-plgpio.c #define plgpio_prepare_reg(__reg, _off, _mask, _tmp)		\
__reg             647 drivers/pinctrl/spear/pinctrl-plgpio.c 	_tmp = readl_relaxed(plgpio->regs.__reg + _off);		\
__reg             649 drivers/pinctrl/spear/pinctrl-plgpio.c 	plgpio->csave_regs[i].__reg =				\
__reg             650 drivers/pinctrl/spear/pinctrl-plgpio.c 		_tmp | (plgpio->csave_regs[i].__reg & _mask);	\
__reg              92 drivers/soc/amlogic/meson-ee-pwrc.c #define VPU_MEMPD(__reg)					\
__reg              93 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(1, 0) },				\
__reg              94 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(3, 2) },				\
__reg              95 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(5, 4) },				\
__reg              96 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(7, 6) },				\
__reg              97 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(9, 8) },				\
__reg              98 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(11, 10) },				\
__reg              99 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(13, 12) },				\
__reg             100 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(15, 14) },				\
__reg             101 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(17, 16) },				\
__reg             102 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(19, 18) },				\
__reg             103 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(21, 20) },				\
__reg             104 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(23, 22) },				\
__reg             105 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(25, 24) },				\
__reg             106 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(27, 26) },				\
__reg             107 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(29, 28) },				\
__reg             108 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, GENMASK(31, 30) }
__reg             110 drivers/soc/amlogic/meson-ee-pwrc.c #define VPU_HHI_MEMPD(__reg)					\
__reg             111 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, BIT(8) },					\
__reg             112 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, BIT(9) },					\
__reg             113 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, BIT(10) },					\
__reg             114 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, BIT(11) },					\
__reg             115 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, BIT(12) },					\
__reg             116 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, BIT(13) },					\
__reg             117 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, BIT(14) },					\
__reg             118 drivers/soc/amlogic/meson-ee-pwrc.c 	{ __reg, BIT(15) }
__reg              69 include/net/netfilter/nf_tables_offload.h #define NFT_OFFLOAD_MATCH(__key, __base, __field, __len, __reg)		\
__reg              70 include/net/netfilter/nf_tables_offload.h 	(__reg)->base_offset	=					\
__reg              72 include/net/netfilter/nf_tables_offload.h 	(__reg)->offset		=					\
__reg              74 include/net/netfilter/nf_tables_offload.h 	(__reg)->len		= __len;				\
__reg              75 include/net/netfilter/nf_tables_offload.h 	(__reg)->key		= __key;				\
__reg              76 include/net/netfilter/nf_tables_offload.h 	memset(&(__reg)->mask, 0xff, (__reg)->len);