__low 26 arch/mips/include/asm/div64.h unsigned long __high, __low; \ __low 30 arch/mips/include/asm/div64.h __low = __n; \ __low 60 arch/mips/include/asm/div64.h : "Jr" (base), "0" (__high), "1" (__low)); \ __low 24 arch/x86/include/asm/div64.h unsigned long __upper, __low, __high, __mod, __base; \ __low 30 arch/x86/include/asm/div64.h asm("" : "=a" (__low), "=d" (__high) : "A" (n));\ __low 36 arch/x86/include/asm/div64.h asm("divl %2" : "=a" (__low), "=d" (__mod) \ __low 37 arch/x86/include/asm/div64.h : "rm" (__base), "0" (__low), "1" (__upper)); \ __low 38 arch/x86/include/asm/div64.h asm("" : "=A" (n) : "a" (__low), "d" (__high)); \ __low 141 drivers/gpu/drm/i915/i915_reg.h #define REG_GENMASK(__high, __low) \ __low 142 drivers/gpu/drm/i915/i915_reg.h ((u32)(GENMASK(__high, __low) + \ __low 144 drivers/gpu/drm/i915/i915_reg.h __is_constexpr(__low) && \ __low 145 drivers/gpu/drm/i915/i915_reg.h ((__low) < 0 || (__high) > 31 || (__low) > (__high)))))