__loop_cache_range   64 arch/xtensa/include/asm/cacheasm.h 	.macro	__loop_cache_range ar as at insn line_width
__loop_cache_range  147 arch/xtensa/include/asm/cacheasm.h 	__loop_cache_range \ar \as \at dhwbi XCHAL_DCACHE_LINEWIDTH
__loop_cache_range  156 arch/xtensa/include/asm/cacheasm.h 	__loop_cache_range \ar \as \at dhwb XCHAL_DCACHE_LINEWIDTH
__loop_cache_range  165 arch/xtensa/include/asm/cacheasm.h 	__loop_cache_range \ar \as \at dhi XCHAL_DCACHE_LINEWIDTH
__loop_cache_range  174 arch/xtensa/include/asm/cacheasm.h 	__loop_cache_range \ar \as \at ihi XCHAL_ICACHE_LINEWIDTH