__loop_cache_page   76 arch/xtensa/include/asm/cacheasm.h 	.macro	__loop_cache_page ar at insn line_width max_immed
__loop_cache_page  184 arch/xtensa/include/asm/cacheasm.h 	__loop_cache_page \ar \as dhwbi XCHAL_DCACHE_LINEWIDTH 1020
__loop_cache_page  193 arch/xtensa/include/asm/cacheasm.h 	__loop_cache_page \ar \as dhwb XCHAL_DCACHE_LINEWIDTH 1020
__loop_cache_page  202 arch/xtensa/include/asm/cacheasm.h 	__loop_cache_page \ar \as dhi XCHAL_DCACHE_LINEWIDTH 1020
__loop_cache_page  211 arch/xtensa/include/asm/cacheasm.h 	__loop_cache_page \ar \as ihi XCHAL_ICACHE_LINEWIDTH 1020