____raw_writeq    222 arch/mips/include/asm/txx9/tx4927.h 	____raw_writeq(____raw_readq(adr) & ~bits, adr);
____raw_writeq    233 arch/mips/include/asm/txx9/tx4927.h 	____raw_writeq(____raw_readq(adr) | bits, adr);
____raw_writeq    242 arch/mips/include/asm/txx9/tx4927.h 	____raw_writeq(____raw_readq(&tx4927_ccfgptr->ccfg)
____raw_writeq    248 arch/mips/include/asm/txx9/tx4927.h 	____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg)
____raw_writeq    254 arch/mips/include/asm/txx9/tx4927.h 	____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg)
____raw_writeq     86 arch/mips/kernel/cevt-bcm1480.c 	____raw_writeq(tmode, cfg);
____raw_writeq     85 arch/mips/kernel/cevt-sb1250.c 	____raw_writeq(tmode, cfg);
____raw_writeq    250 arch/mips/pci/ops-tx4927.c 	____raw_writeq((channel->io_resource->start +
____raw_writeq    258 arch/mips/pci/ops-tx4927.c 	____raw_writeq(channel->io_resource->start - channel->io_offset,
____raw_writeq    262 arch/mips/pci/ops-tx4927.c 		____raw_writeq(0, &pcicptr->g2pmgbase[i]);
____raw_writeq    263 arch/mips/pci/ops-tx4927.c 		____raw_writeq(0, &pcicptr->g2pmpbase[i]);
____raw_writeq    269 arch/mips/pci/ops-tx4927.c 		____raw_writeq(channel->mem_resource->start |
____raw_writeq    276 arch/mips/pci/ops-tx4927.c 		____raw_writeq(channel->mem_resource->start -
____raw_writeq    282 arch/mips/pci/ops-tx4927.c 	____raw_writeq(0, &pcicptr->p2giogbase);
____raw_writeq    286 arch/mips/pci/ops-tx4927.c 	____raw_writeq(TX4927_PCIC_P2GMnGBASE_TMEMEN |
____raw_writeq    296 arch/mips/pci/ops-tx4927.c 	____raw_writeq(0, &pcicptr->p2gmgbase[1]);
____raw_writeq    299 arch/mips/pci/ops-tx4927.c 	____raw_writeq(0, &pcicptr->p2gmgbase[2]);
____raw_writeq     55 arch/mips/sibyte/bcm1480/irq.c 	____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing));
____raw_writeq     72 arch/mips/sibyte/bcm1480/irq.c 	____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing));
____raw_writeq    106 arch/mips/sibyte/bcm1480/irq.c 			____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING)));
____raw_writeq    113 arch/mips/sibyte/bcm1480/irq.c 			____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING)));
____raw_writeq     50 arch/mips/sibyte/sb1250/irq.c 	____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) +
____raw_writeq     64 arch/mips/sibyte/sb1250/irq.c 	____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) +
____raw_writeq     94 arch/mips/sibyte/sb1250/irq.c 		____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(old_cpu) +
____raw_writeq    103 arch/mips/sibyte/sb1250/irq.c 		____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) +
____raw_writeq    158 arch/mips/sibyte/sb1250/smp.c 	____raw_writeq(((u64)action) << 48, mailbox_clear_regs[cpu]);
____raw_writeq    102 arch/mips/txx9/rbtx4939/setup.c 			____raw_writeq(default_ebccr[i],
____raw_writeq    105 arch/mips/txx9/rbtx4939/setup.c 			____raw_writeq(____raw_readq(&tx4939_ebuscptr->cr[i])
____raw_writeq     62 drivers/char/hw_random/tx4939-rng.c 	return ____raw_writeq(val, base + offset);