WatermarkRow 717 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table->WatermarkRow[1][i].MinClock = WatermarkRow 721 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table->WatermarkRow[1][i].MaxClock = WatermarkRow 725 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table->WatermarkRow[1][i].MinUclk = WatermarkRow 729 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table->WatermarkRow[1][i].MaxUclk = WatermarkRow 733 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table->WatermarkRow[1][i].WmSetting = (uint8_t) WatermarkRow 738 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table->WatermarkRow[0][i].MinClock = WatermarkRow 742 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table->WatermarkRow[0][i].MaxClock = WatermarkRow 746 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table->WatermarkRow[0][i].MinUclk = WatermarkRow 750 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table->WatermarkRow[0][i].MaxUclk = WatermarkRow 754 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c table->WatermarkRow[0][i].WmSetting = (uint8_t) WatermarkRow 46 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h struct watermark_row_generic_t WatermarkRow[2][4]; WatermarkRow 69 drivers/gpu/drm/amd/powerplay/inc/smu10_driver_if.h WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; WatermarkRow 698 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h WatermarkRowGeneric_t WatermarkRow[WM_COUNT_PP][NUM_WM_RANGES]; WatermarkRow 908 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_navi10.h WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; WatermarkRow 73 drivers/gpu/drm/amd/powerplay/inc/smu12_driver_if.h WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; WatermarkRow 347 drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h WatermarkRowGeneric_t WatermarkRow[WM_COUNT][NUM_WM_RANGES]; WatermarkRow 591 drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h WatermarkRowGeneric_t WatermarkRow[WM_COUNT_PP][NUM_WM_RANGES]; WatermarkRow 1308 drivers/gpu/drm/amd/powerplay/navi10_ppt.c table->WatermarkRow[1][i].MinClock = WatermarkRow 1312 drivers/gpu/drm/amd/powerplay/navi10_ppt.c table->WatermarkRow[1][i].MaxClock = WatermarkRow 1316 drivers/gpu/drm/amd/powerplay/navi10_ppt.c table->WatermarkRow[1][i].MinUclk = WatermarkRow 1320 drivers/gpu/drm/amd/powerplay/navi10_ppt.c table->WatermarkRow[1][i].MaxUclk = WatermarkRow 1324 drivers/gpu/drm/amd/powerplay/navi10_ppt.c table->WatermarkRow[1][i].WmSetting = (uint8_t) WatermarkRow 1329 drivers/gpu/drm/amd/powerplay/navi10_ppt.c table->WatermarkRow[0][i].MinClock = WatermarkRow 1333 drivers/gpu/drm/amd/powerplay/navi10_ppt.c table->WatermarkRow[0][i].MaxClock = WatermarkRow 1337 drivers/gpu/drm/amd/powerplay/navi10_ppt.c table->WatermarkRow[0][i].MinUclk = WatermarkRow 1341 drivers/gpu/drm/amd/powerplay/navi10_ppt.c table->WatermarkRow[0][i].MaxUclk = WatermarkRow 1345 drivers/gpu/drm/amd/powerplay/navi10_ppt.c table->WatermarkRow[0][i].WmSetting = (uint8_t) WatermarkRow 3076 drivers/gpu/drm/amd/powerplay/vega20_ppt.c table->WatermarkRow[1][i].MinClock = WatermarkRow 3080 drivers/gpu/drm/amd/powerplay/vega20_ppt.c table->WatermarkRow[1][i].MaxClock = WatermarkRow 3084 drivers/gpu/drm/amd/powerplay/vega20_ppt.c table->WatermarkRow[1][i].MinUclk = WatermarkRow 3088 drivers/gpu/drm/amd/powerplay/vega20_ppt.c table->WatermarkRow[1][i].MaxUclk = WatermarkRow 3092 drivers/gpu/drm/amd/powerplay/vega20_ppt.c table->WatermarkRow[1][i].WmSetting = (uint8_t) WatermarkRow 3097 drivers/gpu/drm/amd/powerplay/vega20_ppt.c table->WatermarkRow[0][i].MinClock = WatermarkRow 3101 drivers/gpu/drm/amd/powerplay/vega20_ppt.c table->WatermarkRow[0][i].MaxClock = WatermarkRow 3105 drivers/gpu/drm/amd/powerplay/vega20_ppt.c table->WatermarkRow[0][i].MinUclk = WatermarkRow 3109 drivers/gpu/drm/amd/powerplay/vega20_ppt.c table->WatermarkRow[0][i].MaxUclk = WatermarkRow 3113 drivers/gpu/drm/amd/powerplay/vega20_ppt.c table->WatermarkRow[0][i].WmSetting = (uint8_t)