zbc_depth          23 drivers/gpu/drm/nouveau/include/nvkm/subdev/ltc.h 	u32 zbc_depth[NVKM_LTC_MAX_ZBC_CNT];
zbc_depth         103 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 	if (gr->zbc_depth[zbc].format)
zbc_depth         104 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 		nvkm_wr32(device, 0x405818, gr->zbc_depth[zbc].ds);
zbc_depth         105 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 	nvkm_wr32(device, 0x40581c, gr->zbc_depth[zbc].format);
zbc_depth         118 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 		if (gr->zbc_depth[i].format) {
zbc_depth         119 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 			if (gr->zbc_depth[i].format != format)
zbc_depth         121 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 			if (gr->zbc_depth[i].ds != ds)
zbc_depth         123 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 			if (gr->zbc_depth[i].l2 != l2) {
zbc_depth         136 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 	gr->zbc_depth[zbc].format = format;
zbc_depth         137 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 	gr->zbc_depth[zbc].ds = ds;
zbc_depth         138 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 	gr->zbc_depth[zbc].l2 = l2;
zbc_depth         111 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h 	struct gf100_gr_zbc_depth zbc_depth[NVKM_LTC_MAX_ZBC_CNT];
zbc_depth          58 drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c 	if (gr->zbc_depth[zbc].format)
zbc_depth          59 drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c 		nvkm_wr32(device, 0x418110 + zoff, gr->zbc_depth[zbc].ds);
zbc_depth          62 drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c 			  gr->zbc_depth[zbc].format << ((znum % 4) * 7));
zbc_depth          53 drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.c 	ltc->zbc_depth[index] = depth;
zbc_depth         102 drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.c 		ltc->func->zbc_clear_depth(ltc, i, ltc->zbc_depth[i]);