WB_WARM_UP_MODE_CTL2  245 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c 	REG_UPDATE(WB_WARM_UP_MODE_CTL2, DATA_VALUE_WARMUP, warmup_params->warmup_data);
WB_WARM_UP_MODE_CTL2  246 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c 	REG_UPDATE(WB_WARM_UP_MODE_CTL2, MODE_WARMUP, warmup_params->warmup_mode);
WB_WARM_UP_MODE_CTL2  247 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c 	REG_UPDATE(WB_WARM_UP_MODE_CTL2, DATA_DEPTH_WARMUP, warmup_params->warmup_depth);
WB_WARM_UP_MODE_CTL2  103 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WB_WARM_UP_MODE_CTL2, CNV, inst)
WB_WARM_UP_MODE_CTL2  225 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SF(WB_WARM_UP_MODE_CTL2, DATA_VALUE_WARMUP, mask_sh),\
WB_WARM_UP_MODE_CTL2  226 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SF(WB_WARM_UP_MODE_CTL2, MODE_WARMUP, mask_sh),\
WB_WARM_UP_MODE_CTL2  227 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SF(WB_WARM_UP_MODE_CTL2, DATA_DEPTH_WARMUP, mask_sh)
WB_WARM_UP_MODE_CTL2  403 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	uint32_t WB_WARM_UP_MODE_CTL2;