WB_WARM_UP_MODE_CTL1 130 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c REG_UPDATE(WB_WARM_UP_MODE_CTL1, GMC_WARM_UP_ENABLE, 0); WB_WARM_UP_MODE_CTL1 241 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c REG_UPDATE(WB_WARM_UP_MODE_CTL1, GMC_WARM_UP_ENABLE, warmup_params->warmup_en); WB_WARM_UP_MODE_CTL1 242 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c REG_UPDATE(WB_WARM_UP_MODE_CTL1, WIDTH_WARMUP, warmup_params->warmup_width); WB_WARM_UP_MODE_CTL1 243 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c REG_UPDATE(WB_WARM_UP_MODE_CTL1, HEIGHT_WARMUP, warmup_params->warmup_height); WB_WARM_UP_MODE_CTL1 102 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h SRI2(WB_WARM_UP_MODE_CTL1, CNV, inst),\ WB_WARM_UP_MODE_CTL1 222 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h SF(WB_WARM_UP_MODE_CTL1, WIDTH_WARMUP, mask_sh),\ WB_WARM_UP_MODE_CTL1 223 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h SF(WB_WARM_UP_MODE_CTL1, HEIGHT_WARMUP, mask_sh),\ WB_WARM_UP_MODE_CTL1 224 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h SF(WB_WARM_UP_MODE_CTL1, GMC_WARM_UP_ENABLE, mask_sh),\ WB_WARM_UP_MODE_CTL1 402 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h uint32_t WB_WARM_UP_MODE_CTL1;