xive_timaval 261 arch/powerpc/include/asm/kvm_ppc.h u64 xive_timaval[2]; xive_timaval 1141 arch/powerpc/kvm/book3s_xive_native.c val->xive_timaval[0] = vcpu->arch.xive_saved_state.w01; xive_timaval 1152 arch/powerpc/kvm/book3s_xive_native.c val->xive_timaval[0] |= cpu_to_be64(opal_state & TM_IPB_MASK); xive_timaval 1172 arch/powerpc/kvm/book3s_xive_native.c val->xive_timaval[0], val->xive_timaval[1]); xive_timaval 1188 arch/powerpc/kvm/book3s_xive_native.c vcpu->arch.xive_saved_state.w01 = val->xive_timaval[0];