xive_saved_state 778 arch/powerpc/include/asm/kvm_host.h union xive_tma_w01 xive_saved_state; /* W0..1 of XIVE thread state */ xive_saved_state 758 arch/powerpc/kernel/asm-offsets.c arch.xive_saved_state)); xive_saved_state 3745 arch/powerpc/kvm/book3s_hv.c return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr < xive_saved_state 3746 arch/powerpc/kvm/book3s_hv.c vcpu->arch.xive_saved_state.cppr; xive_saved_state 79 arch/powerpc/kvm/book3s_xive.c __raw_writeq(vcpu->arch.xive_saved_state.w01, tima + TM_QW1_OS); xive_saved_state 865 arch/powerpc/kvm/book3s_xive.c vcpu->arch.xive_saved_state.cppr = cppr; xive_saved_state 1266 arch/powerpc/kvm/book3s_xive.c vcpu->arch.xive_saved_state.w01 = cpu_to_be64(0xff000000); xive_saved_state 185 arch/powerpc/kvm/book3s_xive_native.c vcpu->arch.xive_saved_state.w01 = cpu_to_be64(0xff000000); xive_saved_state 1141 arch/powerpc/kvm/book3s_xive_native.c val->xive_timaval[0] = vcpu->arch.xive_saved_state.w01; xive_saved_state 1156 arch/powerpc/kvm/book3s_xive_native.c vcpu->arch.xive_saved_state.nsr, xive_saved_state 1157 arch/powerpc/kvm/book3s_xive_native.c vcpu->arch.xive_saved_state.cppr, xive_saved_state 1158 arch/powerpc/kvm/book3s_xive_native.c vcpu->arch.xive_saved_state.ipb, xive_saved_state 1159 arch/powerpc/kvm/book3s_xive_native.c vcpu->arch.xive_saved_state.pipr, xive_saved_state 1160 arch/powerpc/kvm/book3s_xive_native.c vcpu->arch.xive_saved_state.w01, xive_saved_state 1188 arch/powerpc/kvm/book3s_xive_native.c vcpu->arch.xive_saved_state.w01 = val->xive_timaval[0]; xive_saved_state 1223 arch/powerpc/kvm/book3s_xive_native.c vcpu->arch.xive_saved_state.nsr, xive_saved_state 1224 arch/powerpc/kvm/book3s_xive_native.c vcpu->arch.xive_saved_state.cppr, xive_saved_state 1225 arch/powerpc/kvm/book3s_xive_native.c vcpu->arch.xive_saved_state.ipb, xive_saved_state 1226 arch/powerpc/kvm/book3s_xive_native.c vcpu->arch.xive_saved_state.pipr, xive_saved_state 1227 arch/powerpc/kvm/book3s_xive_native.c vcpu->arch.xive_saved_state.w01,