xirr 448 arch/powerpc/include/asm/kvm_ppc.h u32 xirr; xirr 450 arch/powerpc/include/asm/kvm_ppc.h xirr = get_paca()->kvm_hstate.saved_xirr; xirr 452 arch/powerpc/include/asm/kvm_ppc.h return xirr; xirr 624 arch/powerpc/include/asm/kvm_ppc.h extern long kvmppc_deliver_irq_passthru(struct kvm_vcpu *vcpu, __be32 xirr, xirr 793 arch/powerpc/include/asm/kvm_ppc.h int kvmppc_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr); xirr 238 arch/powerpc/include/asm/opal.h int64_t opal_int_eoi(uint32_t xirr); xirr 44 arch/powerpc/kvm/book3s_hv_builtin.c int (*__xive_vm_h_eoi)(struct kvm_vcpu *vcpu, unsigned long xirr); xirr 393 arch/powerpc/kvm/book3s_hv_builtin.c static int kvmppc_check_passthru(u32 xisr, __be32 xirr, bool *again) xirr 412 arch/powerpc/kvm/book3s_hv_builtin.c return kvmppc_deliver_irq_passthru(vcpu, xirr, irq_map, pimap, again); xirr 416 arch/powerpc/kvm/book3s_hv_builtin.c static inline int kvmppc_check_passthru(u32 xisr, __be32 xirr, bool *again) xirr 455 arch/powerpc/kvm/book3s_hv_builtin.c __be32 xirr; xirr 473 arch/powerpc/kvm/book3s_hv_builtin.c xirr = cpu_to_be32(retbuf[0]); xirr 478 arch/powerpc/kvm/book3s_hv_builtin.c rc = opal_int_get_xirr(&xirr, false); xirr 480 arch/powerpc/kvm/book3s_hv_builtin.c xirr = __raw_rm_readl(xics_phys + XICS_XIRR); xirr 491 arch/powerpc/kvm/book3s_hv_builtin.c h_xirr = be32_to_cpu(xirr); xirr 518 arch/powerpc/kvm/book3s_hv_builtin.c __raw_rm_writel(xirr, xics_phys + XICS_XIRR); xirr 564 arch/powerpc/kvm/book3s_hv_builtin.c return kvmppc_check_passthru(xisr, xirr, again); xirr 645 arch/powerpc/kvm/book3s_hv_builtin.c int kvmppc_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr) xirr 651 arch/powerpc/kvm/book3s_hv_builtin.c return xive_rm_h_eoi(vcpu, xirr); xirr 654 arch/powerpc/kvm/book3s_hv_builtin.c return __xive_vm_h_eoi(vcpu, xirr); xirr 656 arch/powerpc/kvm/book3s_hv_builtin.c return xics_rm_h_eoi(vcpu, xirr); xirr 495 arch/powerpc/kvm/book3s_hv_rm_xics.c u32 xirr; xirr 513 arch/powerpc/kvm/book3s_hv_rm_xics.c xirr = old_state.xisr | (((u32)old_state.cppr) << 24); xirr 523 arch/powerpc/kvm/book3s_hv_rm_xics.c vcpu->arch.regs.gpr[4] = xirr; xirr 735 arch/powerpc/kvm/book3s_hv_rm_xics.c int xics_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr) xirr 739 arch/powerpc/kvm/book3s_hv_rm_xics.c u32 irq = xirr & 0x00ffffff; xirr 758 arch/powerpc/kvm/book3s_hv_rm_xics.c icp_rm_down_cppr(xics, icp, xirr >> 24); xirr 769 arch/powerpc/kvm/book3s_hv_rm_xics.c static void icp_eoi(struct irq_chip *c, u32 hwirq, __be32 xirr, bool *again) xirr 792 arch/powerpc/kvm/book3s_hv_rm_xics.c __raw_rm_writel(xirr, xics_phys + XICS_XIRR); xirr 794 arch/powerpc/kvm/book3s_hv_rm_xics.c rc = opal_int_eoi(be32_to_cpu(xirr)); xirr 854 arch/powerpc/kvm/book3s_hv_rm_xics.c __be32 xirr, xirr 890 arch/powerpc/kvm/book3s_hv_rm_xics.c icp_eoi(irq_desc_get_chip(irq_map->desc), irq_map->r_hwirq, xirr, xirr 590 arch/powerpc/kvm/book3s_xics.c u32 xirr; xirr 605 arch/powerpc/kvm/book3s_xics.c xirr = old_state.xisr | (((u32)old_state.cppr) << 24); xirr 614 arch/powerpc/kvm/book3s_xics.c XICS_DBG("h_xirr vcpu %d xirr %#x\n", vcpu->vcpu_id, xirr); xirr 616 arch/powerpc/kvm/book3s_xics.c return xirr; xirr 817 arch/powerpc/kvm/book3s_xics.c static noinline int kvmppc_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr) xirr 821 arch/powerpc/kvm/book3s_xics.c u32 irq = xirr & 0x00ffffff; xirr 823 arch/powerpc/kvm/book3s_xics.c XICS_DBG("h_eoi vcpu %d eoi %#lx\n", vcpu->vcpu_id, xirr); xirr 839 arch/powerpc/kvm/book3s_xics.c icp_down_cppr(xics, icp, xirr >> 24); xirr 149 arch/powerpc/kvm/book3s_xics.h extern int xics_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr); xirr 276 arch/powerpc/kvm/book3s_xive.h extern int xive_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr); xirr 283 arch/powerpc/kvm/book3s_xive.h extern int (*__xive_vm_h_eoi)(struct kvm_vcpu *vcpu, unsigned long xirr); xirr 498 arch/powerpc/kvm/book3s_xive_template.c X_STATIC int GLUE(X_PFX,h_eoi)(struct kvm_vcpu *vcpu, unsigned long xirr) xirr 505 arch/powerpc/kvm/book3s_xive_template.c u8 new_cppr = xirr >> 24; xirr 506 arch/powerpc/kvm/book3s_xive_template.c u32 irq = xirr & 0x00ffffff, hw_num; xirr 510 arch/powerpc/kvm/book3s_xive_template.c pr_devel("H_EOI(xirr=%08lx)\n", xirr); xirr 105 arch/powerpc/sysdev/xics/icp-hv.c unsigned int xirr = icp_hv_get_xirr(xics_cppr_top()); xirr 106 arch/powerpc/sysdev/xics/icp-hv.c unsigned int vec = xirr & 0x00ffffff; xirr 122 arch/powerpc/sysdev/xics/icp-hv.c icp_hv_set_xirr(xirr); xirr 34 arch/powerpc/sysdev/xics/icp-native.c } xirr; xirr 50 arch/powerpc/sysdev/xics/icp-native.c unsigned int xirr; xirr 53 arch/powerpc/sysdev/xics/icp-native.c xirr = kvmppc_get_xics_latch(); xirr 54 arch/powerpc/sysdev/xics/icp-native.c if (xirr) xirr 55 arch/powerpc/sysdev/xics/icp-native.c return xirr; xirr 57 arch/powerpc/sysdev/xics/icp-native.c return in_be32(&icp_native_regs[cpu]->xirr.word); xirr 64 arch/powerpc/sysdev/xics/icp-native.c out_be32(&icp_native_regs[cpu]->xirr.word, value); xirr 71 arch/powerpc/sysdev/xics/icp-native.c out_8(&icp_native_regs[cpu]->xirr.bytes[0], value); xirr 117 arch/powerpc/sysdev/xics/icp-native.c unsigned int xirr = icp_native_get_xirr(); xirr 118 arch/powerpc/sysdev/xics/icp-native.c unsigned int vec = xirr & 0x00ffffff; xirr 134 arch/powerpc/sysdev/xics/icp-native.c icp_native_set_xirr(xirr); xirr 174 arch/powerpc/sysdev/xics/icp-native.c unsigned int xirr = icp_native_get_xirr(); xirr 175 arch/powerpc/sysdev/xics/icp-native.c unsigned int vec = xirr & 0x00ffffff; xirr 190 arch/powerpc/sysdev/xics/icp-native.c icp_native_set_xirr(xirr); xirr 63 arch/powerpc/sysdev/xics/icp-opal.c unsigned int xirr; xirr 67 arch/powerpc/sysdev/xics/icp-opal.c xirr = icp_opal_get_xirr(); xirr 68 arch/powerpc/sysdev/xics/icp-opal.c vec = xirr & 0x00ffffff; xirr 82 arch/powerpc/sysdev/xics/icp-opal.c if (opal_int_eoi(xirr) > 0) xirr 149 arch/powerpc/sysdev/xics/icp-opal.c unsigned int xirr; xirr 153 arch/powerpc/sysdev/xics/icp-opal.c xirr = icp_opal_get_xirr(); xirr 154 arch/powerpc/sysdev/xics/icp-opal.c vec = xirr & 0x00ffffff; xirr 169 arch/powerpc/sysdev/xics/icp-opal.c } while (opal_int_eoi(xirr) > 0);