xfm_mask 37 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->xfm_shift->field_name, xfm_dce->xfm_mask->field_name xfm_mask 124 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (xfm_dce->xfm_mask->SCL_PSCL_EN != 0) xfm_mask 140 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (xfm_dce->xfm_mask->SCL_PSCL_EN != 0) xfm_mask 1348 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c const struct dce_transform_mask *xfm_mask) xfm_mask 1357 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->xfm_mask = xfm_mask; xfm_mask 473 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h const struct dce_transform_mask *xfm_mask; xfm_mask 490 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h const struct dce_transform_mask *xfm_mask); xfm_mask 181 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c static const struct dce_transform_mask xfm_mask = { xfm_mask 543 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c &xfm_regs[inst], &xfm_shift, &xfm_mask); xfm_mask 210 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c static const struct dce_transform_mask xfm_mask = { xfm_mask 589 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c &xfm_regs[inst], &xfm_shift, &xfm_mask); xfm_mask 215 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c static const struct dce_transform_mask xfm_mask = { xfm_mask 557 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c &xfm_regs[inst], &xfm_shift, &xfm_mask); xfm_mask 224 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c static const struct dce_transform_mask xfm_mask = { xfm_mask 820 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c &xfm_regs[inst], &xfm_shift, &xfm_mask); xfm_mask 198 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c static const struct dce_transform_mask xfm_mask = { xfm_mask 655 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c &xfm_regs[inst], &xfm_shift, &xfm_mask);