xfm_dce 33 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c (xfm_dce->regs->reg) xfm_dce 37 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->xfm_shift->field_name, xfm_dce->xfm_mask->field_name xfm_dce 40 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->base.ctx xfm_dce 42 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->base.ctx->logger xfm_dce 117 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 124 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (xfm_dce->xfm_mask->SCL_PSCL_EN != 0) xfm_dce 140 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (xfm_dce->xfm_mask->SCL_PSCL_EN != 0) xfm_dce 150 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 158 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (xfm_dce->base.ctx->dc->debug.visual_confirm != VISUAL_CONFIRM_DISABLE) { xfm_dce 181 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 236 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 251 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 283 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 325 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 333 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c LB_MEMORY_SIZE, xfm_dce->lb_memory_size); xfm_dce 339 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c program_overscan(xfm_dce, data); xfm_dce 342 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c is_scaling_required = setup_scaling_configuration(xfm_dce, data); xfm_dce 348 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c calculate_inits(xfm_dce, data, &inits); xfm_dce 350 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c program_scl_ratios_inits(xfm_dce, &inits); xfm_dce 355 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (coeffs_v != xfm_dce->filter_v || coeffs_h != xfm_dce->filter_h) { xfm_dce 357 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (xfm_dce->filter_v == NULL) xfm_dce 361 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce, xfm_dce 366 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce, xfm_dce 372 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (xfm_dce->filter_h == NULL) xfm_dce 376 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce, xfm_dce 381 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce, xfm_dce 386 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->filter_v = coeffs_v; xfm_dce 387 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->filter_h = coeffs_h; xfm_dce 393 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c program_viewport(xfm_dce, &data->viewport); xfm_dce 412 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 489 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 557 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 619 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 656 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c set_clamp(xfm_dce, depth); xfm_dce 657 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c set_round(xfm_dce, trunc_mode, trunc_round_depth); xfm_dce 658 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c set_dither(xfm_dce, xfm_dce 668 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 682 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c pixels_per_entries = xfm_dce->lb_bits_per_entry / 18; xfm_dce 686 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c pixels_per_entries = xfm_dce->lb_bits_per_entry / 24; xfm_dce 690 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c pixels_per_entries = xfm_dce->lb_bits_per_entry / 30; xfm_dce 694 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c pixels_per_entries = xfm_dce->lb_bits_per_entry / 36; xfm_dce 708 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->lb_memory_size; xfm_dce 714 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 752 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 785 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c set_denormalization(xfm_dce, color_depth); xfm_dce 786 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c program_bit_depth_reduction(xfm_dce, color_depth, bit_depth_params); xfm_dce 792 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (!(xfm_dce->lb_pixel_depth_supported & depth)) { xfm_dce 801 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 849 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 854 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c program_gamut_remap(xfm_dce, NULL); xfm_dce 865 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c program_gamut_remap(xfm_dce, arr_reg_val); xfm_dce 896 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 900 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (xfm_dce->prescaler_on && xfm_dce 905 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce, xfm_dce 955 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 957 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->filter_h = NULL; xfm_dce 958 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->filter_v = NULL; xfm_dce 962 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 999 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 1081 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 1086 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce, tbl_entry, GRPH_COLOR_MATRIX_SW); xfm_dce 1089 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c configure_graphics_mode(xfm_dce, config, GRAPHICS_CSC_ADJUST_TYPE_SW, xfm_dce 1097 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 1121 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c program_color_matrix(xfm_dce, elm, option); xfm_dce 1132 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c configure_graphics_mode(xfm_dce, config, xfm_dce 1137 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c static void program_pwl(struct dce_transform *xfm_dce, xfm_dce 1209 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c static void regamma_config_regions_and_segments(struct dce_transform *xfm_dce, xfm_dce 1291 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 1294 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c regamma_config_regions_and_segments(xfm_dce, params); xfm_dce 1297 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c program_pwl(xfm_dce, params); xfm_dce 1303 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 1319 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 1343 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c struct dce_transform *xfm_dce, xfm_dce 1350 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->base.ctx = ctx; xfm_dce 1352 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->base.inst = inst; xfm_dce 1353 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->base.funcs = &dce_transform_funcs; xfm_dce 1355 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->regs = regs; xfm_dce 1356 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->xfm_shift = xfm_shift; xfm_dce 1357 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->xfm_mask = xfm_mask; xfm_dce 1359 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->prescaler_on = true; xfm_dce 1360 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->lb_pixel_depth_supported = xfm_dce 1365 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->lb_bits_per_entry = LB_BITS_PER_ENTRY; xfm_dce 1366 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->lb_memory_size = LB_TOTAL_NUMBER_OF_ENTRIES; /*0x6B0*/ xfm_dce 485 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h void dce_transform_construct(struct dce_transform *xfm_dce, xfm_dce 109 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_csc_v.c struct dce_transform *xfm_dce, xfm_dce 113 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_csc_v.c struct dc_context *ctx = xfm_dce->base.ctx; xfm_dce 359 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_csc_v.c struct dce_transform *xfm_dce, xfm_dce 364 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_csc_v.c struct dc_context *ctx = xfm_dce->base.ctx; xfm_dce 675 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_csc_v.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 700 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_csc_v.c program_color_matrix_v(xfm_dce, elm, option); xfm_dce 714 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_csc_v.c configure_graphics_mode_v(xfm_dce, config, xfm_dce 725 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_csc_v.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 730 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_csc_v.c xfm_dce, tbl_entry, GRPH_COLOR_MATRIX_SW); xfm_dce 733 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_csc_v.c configure_graphics_mode_v(xfm_dce, config, GRAPHICS_CSC_ADJUST_TYPE_SW, xfm_dce 86 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c static void set_bypass_input_gamma(struct dce_transform *xfm_dce) xfm_dce 90 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c value = dm_read_reg(xfm_dce->base.ctx, xfm_dce 99 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 103 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c static void configure_regamma_mode(struct dce_transform *xfm_dce, uint32_t mode) xfm_dce 113 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, mmGAMMA_CORR_CONTROL, 0); xfm_dce 133 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c struct dce_transform *xfm_dce, const struct pwl_params *params) xfm_dce 151 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, mmGAMMA_CORR_CNTLA_START_CNTL, xfm_dce 162 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 173 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 190 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 223 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c xfm_dce->base.ctx, xfm_dce 255 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 287 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 319 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 351 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 383 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 415 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 447 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 453 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c static void program_pwl(struct dce_transform *xfm_dce, xfm_dce 464 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 467 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 478 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, addr, rgb->red_reg); xfm_dce 479 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, addr, rgb->green_reg); xfm_dce 480 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, addr, rgb->blue_reg); xfm_dce 482 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, addr, xfm_dce 484 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, addr, xfm_dce 486 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c dm_write_reg(xfm_dce->base.ctx, addr, xfm_dce 499 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 502 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c regamma_config_regions_and_segments(xfm_dce, params); xfm_dce 504 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c set_bypass_input_gamma(xfm_dce); xfm_dce 510 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c program_pwl(xfm_dce, params); xfm_dce 513 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c configure_regamma_mode(xfm_dce, 1); xfm_dce 80 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dce_transform *xfm_dce, xfm_dce 84 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dc_context *ctx = xfm_dce->base.ctx; xfm_dce 160 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dce_transform *xfm_dce, xfm_dce 164 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dc_context *ctx = xfm_dce->base.ctx; xfm_dce 231 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dce_transform *xfm_dce, xfm_dce 240 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c if (xfm_dce->base.ctx->dc->debug.visual_confirm != VISUAL_CONFIRM_DISABLE) { xfm_dce 266 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 270 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c dm_write_reg(xfm_dce->base.ctx, xfm_dce 276 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dce_transform *xfm_dce) xfm_dce 280 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c value = dm_read_reg(xfm_dce->base.ctx, mmSCLV_UPDATE); xfm_dce 282 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c dm_write_reg(xfm_dce->base.ctx, mmSCLV_UPDATE, value); xfm_dce 286 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dce_transform *xfm_dce, xfm_dce 291 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dc_context *ctx = xfm_dce->base.ctx; xfm_dce 371 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dce_transform *xfm_dce, xfm_dce 393 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dce_transform *xfm_dce, xfm_dce 396 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dc_context *ctx = xfm_dce->base.ctx; xfm_dce 508 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 511 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c value = dm_read_reg(xfm_dce->base.ctx, mmLBV_MEMORY_CTRL); xfm_dce 516 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c set_reg_field_value(value, xfm_dce->lb_memory_size, LBV_MEMORY_CTRL, xfm_dce 519 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c dm_write_reg(xfm_dce->base.ctx, mmLBV_MEMORY_CTRL, value); xfm_dce 528 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 543 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c program_overscan(xfm_dce, data); xfm_dce 546 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c is_scaling_required = setup_scaling_configuration(xfm_dce, data); xfm_dce 554 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce, xfm_dce 560 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c program_scl_ratios_inits(xfm_dce, &inits); xfm_dce 567 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c if (coeffs_v != xfm_dce->filter_v xfm_dce 568 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c || coeffs_v_c != xfm_dce->filter_v_c xfm_dce 569 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c || coeffs_h != xfm_dce->filter_h xfm_dce 570 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c || coeffs_h_c != xfm_dce->filter_h_c) { xfm_dce 573 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce, xfm_dce 578 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce, xfm_dce 585 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce, xfm_dce 590 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce, xfm_dce 595 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->filter_v = coeffs_v; xfm_dce 596 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->filter_v_c = coeffs_v_c; xfm_dce 597 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->filter_h = coeffs_h; xfm_dce 598 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->filter_h_c = coeffs_h_c; xfm_dce 604 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c program_viewport(xfm_dce, &luma_viewport, &chroma_viewport); xfm_dce 608 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c set_coeff_update_complete(xfm_dce); xfm_dce 613 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 615 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->filter_h = NULL; xfm_dce 616 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->filter_v = NULL; xfm_dce 617 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->filter_h_c = NULL; xfm_dce 618 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->filter_v_c = NULL; xfm_dce 633 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm); xfm_dce 674 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c if (!(xfm_dce->lb_pixel_depth_supported & depth)) { xfm_dce 702 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c struct dce_transform *xfm_dce, xfm_dce 705 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->base.ctx = ctx; xfm_dce 707 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->base.funcs = &dce110_xfmv_funcs; xfm_dce 709 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->lb_pixel_depth_supported = xfm_dce 714 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->prescaler_on = true; xfm_dce 715 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->lb_bits_per_entry = LB_BITS_PER_ENTRY; xfm_dce 716 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->lb_memory_size = LB_TOTAL_NUMBER_OF_ENTRIES; /*0x6B0*/