VddcOffsetVid     103 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     VddcOffsetVid;
VddcOffsetVid      98 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     VddcOffsetVid;
VddcOffsetVid      96 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h 	uint8_t     VddcOffsetVid;
VddcOffsetVid     125 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t     VddcOffsetVid;
VddcOffsetVid     130 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t     VddcOffsetVid;
VddcOffsetVid     161 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     VddcOffsetVid;
VddcOffsetVid     973 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			state->VddcOffsetVid = 0;
VddcOffsetVid     975 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			state->VddcOffsetVid = (uint8_t)(
VddcOffsetVid     809 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset *
VddcOffsetVid     742 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			state->VddcOffsetVid = 0;
VddcOffsetVid     744 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			state->VddcOffsetVid = (uint8_t)(
VddcOffsetVid     745 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset *
VddcOffsetVid     489 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset *
VddcOffsetVid     549 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset *
VddcOffsetVid    3144 drivers/gpu/drm/radeon/ci_dpm.c 			state->VddcOffsetVid = 0;
VddcOffsetVid    3146 drivers/gpu/drm/radeon/ci_dpm.c 			state->VddcOffsetVid = (u8)
VddcOffsetVid     161 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     VddcOffsetVid;