xauiCtl           117 arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c 	union cvmx_pcsxx_control1_reg xauiCtl;
xauiCtl           156 arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c 	xauiCtl.u64 = cvmx_read_csr(CVMX_PCSXX_CONTROL1_REG(interface));
xauiCtl           157 arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c 	xauiCtl.s.lo_pwr = 0;
xauiCtl           162 arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c 		xauiCtl.s.reset = 1;
xauiCtl           164 arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c 	cvmx_write_csr(CVMX_PCSXX_CONTROL1_REG(interface), xauiCtl.u64);