wrval            5566 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	u32 val, rdval, wrval;
wrval            5577 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	wrval = MVPP22_AXI_CODE_CACHE_WR_CACHE
wrval            5579 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	wrval |= MVPP22_AXI_CODE_DOMAIN_OUTER_DOM
wrval            5583 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	mvpp2_write(priv, MVPP22_AXI_BM_WR_ATTR_REG, wrval);
wrval            5588 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	mvpp2_write(priv, MVPP22_AXI_TXQ_DESCR_WR_ATTR_REG, wrval);
wrval            5590 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	mvpp2_write(priv, MVPP22_AXI_RXQ_DESCR_WR_ATTR_REG, wrval);
wrval            5594 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 	mvpp2_write(priv, MVPP22_AXI_RX_DATA_WR_ATTR_REG, wrval);
wrval            2645 drivers/scsi/qla4xxx/ql4_nx.c 	uint32_t addr1, addr2, value, data, temp, wrval;
wrval            2687 drivers/scsi/qla4xxx/ql4_nx.c 			wrval = ((temp << 16) | temp);
wrval            2689 drivers/scsi/qla4xxx/ql4_nx.c 			ha->isp_ops->wr_reg_indirect(ha, addr2, wrval);
wrval            2726 drivers/scsi/qla4xxx/ql4_nx.c 			*data_ptr++ = cpu_to_le32(wrval);