write_val         165 drivers/hid/hid-alps.c 	u8 *read_val, u8 write_val, bool read_flag)
write_val         182 drivers/hid/hid-alps.c 		input[8] = write_val;
write_val         252 drivers/hid/hid-alps.c 	u8 *read_val, u8 write_val, bool read_flag)
write_val         269 drivers/hid/hid-alps.c 		input[6] = write_val;
write_val         150 drivers/media/radio/radio-shark.c 	.write_val = shark_write_val,
write_val          87 drivers/media/radio/tea575x.c 	if (tea->ops->write_val)
write_val          88 drivers/media/radio/tea575x.c 		return tea->ops->write_val(tea, val);
write_val         209 drivers/pci/controller/pci-thunder-pem.c 	u64 write_val, read_val;
write_val         272 drivers/pci/controller/pci-thunder-pem.c 	write_val = (((u64)val) << 32) | where_aligned;
write_val         273 drivers/pci/controller/pci-thunder-pem.c 	writeq(write_val, pem_pci->pem_reg_base + PEM_CFG_WR);
write_val         149 drivers/staging/rtl8188eu/hal/rf.c 	u32 write_val, customer_limit, rf;
write_val         160 drivers/staging/rtl8188eu/hal/rf.c 			write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
write_val         170 drivers/staging/rtl8188eu/hal/rf.c 			write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
write_val         175 drivers/staging/rtl8188eu/hal/rf.c 			write_val = (index < 2) ? powerbase0[rf] : powerbase1[rf];
write_val         207 drivers/staging/rtl8188eu/hal/rf.c 			write_val = customer_limit + ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
write_val         211 drivers/staging/rtl8188eu/hal/rf.c 			write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] +
write_val         220 drivers/staging/rtl8188eu/hal/rf.c 			write_val = 0x14141414;
write_val         222 drivers/staging/rtl8188eu/hal/rf.c 			write_val = 0x00000000;
write_val         224 drivers/staging/rtl8188eu/hal/rf.c 		*(out_val+rf) = write_val;
write_val         237 drivers/staging/rtl8188eu/hal/rf.c 	u32 write_val;
write_val         241 drivers/staging/rtl8188eu/hal/rf.c 		write_val = pvalue[rf];
write_val         243 drivers/staging/rtl8188eu/hal/rf.c 			pwr_val[i] = (u8)((write_val & (0x7f<<(i*8)))>>(i*8));
write_val         247 drivers/staging/rtl8188eu/hal/rf.c 		write_val = (pwr_val[3]<<24) | (pwr_val[2]<<16) |
write_val         255 drivers/staging/rtl8188eu/hal/rf.c 		phy_set_bb_reg(adapt, regoffset, bMaskDWord, write_val);
write_val         264 drivers/staging/rtl8188eu/hal/rf.c 	u32 write_val[2], powerbase0[2], powerbase1[2], pwrtrac_value;
write_val         277 drivers/staging/rtl8188eu/hal/rf.c 					&write_val[0]);
write_val         280 drivers/staging/rtl8188eu/hal/rf.c 			write_val[0] += pwrtrac_value;
write_val         281 drivers/staging/rtl8188eu/hal/rf.c 			write_val[1] += pwrtrac_value;
write_val         283 drivers/staging/rtl8188eu/hal/rf.c 			write_val[0] -= pwrtrac_value;
write_val         284 drivers/staging/rtl8188eu/hal/rf.c 			write_val[1] -= pwrtrac_value;
write_val         286 drivers/staging/rtl8188eu/hal/rf.c 		write_ofdm_pwr_reg(adapt, index, &write_val[0]);
write_val          28 include/media/drv-intf/tea575x.h 	void (*write_val)(struct snd_tea575x *tea, u32 val);
write_val        3258 sound/pci/hda/patch_ca0132.c 	unsigned int write_val;
write_val        3270 sound/pci/hda/patch_ca0132.c 	write_val = (target & 0xff);
write_val        3271 sound/pci/hda/patch_ca0132.c 	write_val |= (value << 8);
write_val        3274 sound/pci/hda/patch_ca0132.c 	writel(write_val, spec->mem_base + 0x204);
write_val        3297 sound/pci/hda/patch_ca0132.c 	unsigned int write_val;
write_val        3309 sound/pci/hda/patch_ca0132.c 	write_val = (target & 0xff);
write_val        3310 sound/pci/hda/patch_ca0132.c 	write_val |= (value << 8);
write_val        3313 sound/pci/hda/patch_ca0132.c 	writel(write_val, spec->mem_base + 0x204);