write_gcr_co_reset_base  223 arch/mips/kernel/smp-cps.c 	write_gcr_co_reset_base(CKSEG1ADDR((unsigned long)mips_cps_core_entry));
write_gcr_co_reset_base  325 arch/mips/kernel/smp-cps.c 		write_gcr_co_reset_base(core_entry);