wq_size 179 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h u32 wq_size; wq_size 376 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c desc->wq_size = GUC_WQ_SIZE; wq_size 1943 drivers/gpu/drm/i915/i915_debugfs.c desc->wq_addr, desc->wq_size); wq_size 138 drivers/infiniband/hw/i40iw/i40iw_verbs.c uresp.wq_size = iwdev->max_qp_wr * 2; wq_size 334 drivers/infiniband/hw/mlx5/qp.c int wq_size; wq_size 360 drivers/infiniband/hw/mlx5/qp.c wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; wq_size 361 drivers/infiniband/hw/mlx5/qp.c wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); wq_size 362 drivers/infiniband/hw/mlx5/qp.c qp->rq.wqe_cnt = wq_size / wqe_size; wq_size 480 drivers/infiniband/hw/mlx5/qp.c int wq_size; wq_size 500 drivers/infiniband/hw/mlx5/qp.c wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); wq_size 501 drivers/infiniband/hw/mlx5/qp.c qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; wq_size 515 drivers/infiniband/hw/mlx5/qp.c qp->sq.max_post = wq_size / wqe_size; wq_size 518 drivers/infiniband/hw/mlx5/qp.c return wq_size; wq_size 373 drivers/net/ethernet/huawei/hinic/hinic_hw_io.c size_t qps_size, wq_size, db_size; wq_size 382 drivers/net/ethernet/huawei/hinic/hinic_hw_io.c wq_size = num_qps * sizeof(*func_to_io->sq_wq); wq_size 383 drivers/net/ethernet/huawei/hinic/hinic_hw_io.c func_to_io->sq_wq = devm_kzalloc(&pdev->dev, wq_size, GFP_KERNEL); wq_size 389 drivers/net/ethernet/huawei/hinic/hinic_hw_io.c wq_size = num_qps * sizeof(*func_to_io->rq_wq); wq_size 390 drivers/net/ethernet/huawei/hinic/hinic_hw_io.c func_to_io->rq_wq = devm_kzalloc(&pdev->dev, wq_size, GFP_KERNEL); wq_size 174 drivers/net/ethernet/mellanox/mlx5/core/en.h static inline u16 mlx5_min_rx_wqes(int wq_type, u32 wq_size) wq_size 179 drivers/net/ethernet/mellanox/mlx5/core/en.h wq_size / 2); wq_size 182 drivers/net/ethernet/mellanox/mlx5/core/en.h wq_size / 2); wq_size 1391 drivers/staging/qlge/qlge.h u32 wq_size; /* size in bytes of queue area */ wq_size 1664 drivers/staging/qlge/qlge_dbg.c pr_err("tx_ring->size = %d\n", tx_ring->wq_size); wq_size 2786 drivers/staging/qlge/qlge_main.c pci_free_consistent(qdev->pdev, tx_ring->wq_size, wq_size 2798 drivers/staging/qlge/qlge_main.c pci_alloc_consistent(qdev->pdev, tx_ring->wq_size, wq_size 2813 drivers/staging/qlge/qlge_main.c pci_free_consistent(qdev->pdev, tx_ring->wq_size, wq_size 4128 drivers/staging/qlge/qlge_main.c tx_ring->wq_size = wq_size 53 include/uapi/rdma/i40iw-abi.h __u32 wq_size; /* size of the WQs (sq+rq) allocated to the mmaped area */