wndw 22 drivers/gpu/drm/nouveau/dispnv50/atom.h } wndw; wndw 34 drivers/gpu/drm/nouveau/dispnv50/base507c.c base507c_update(struct nv50_wndw *wndw, u32 *interlock) wndw 37 drivers/gpu/drm/nouveau/dispnv50/base507c.c if ((push = evo_wait(&wndw->wndw, 2))) { wndw 40 drivers/gpu/drm/nouveau/dispnv50/base507c.c evo_kick(push, &wndw->wndw); wndw 45 drivers/gpu/drm/nouveau/dispnv50/base507c.c base507c_image_clr(struct nv50_wndw *wndw) wndw 48 drivers/gpu/drm/nouveau/dispnv50/base507c.c if ((push = evo_wait(&wndw->wndw, 4))) { wndw 53 drivers/gpu/drm/nouveau/dispnv50/base507c.c evo_kick(push, &wndw->wndw); wndw 58 drivers/gpu/drm/nouveau/dispnv50/base507c.c base507c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 61 drivers/gpu/drm/nouveau/dispnv50/base507c.c if ((push = evo_wait(&wndw->wndw, 13))) { wndw 86 drivers/gpu/drm/nouveau/dispnv50/base507c.c evo_kick(push, &wndw->wndw); wndw 91 drivers/gpu/drm/nouveau/dispnv50/base507c.c base507c_xlut_clr(struct nv50_wndw *wndw) wndw 94 drivers/gpu/drm/nouveau/dispnv50/base507c.c if ((push = evo_wait(&wndw->wndw, 2))) { wndw 97 drivers/gpu/drm/nouveau/dispnv50/base507c.c evo_kick(push, &wndw->wndw); wndw 102 drivers/gpu/drm/nouveau/dispnv50/base507c.c base507c_xlut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 105 drivers/gpu/drm/nouveau/dispnv50/base507c.c if ((push = evo_wait(&wndw->wndw, 2))) { wndw 108 drivers/gpu/drm/nouveau/dispnv50/base507c.c evo_kick(push, &wndw->wndw); wndw 126 drivers/gpu/drm/nouveau/dispnv50/base507c.c base507c_ntfy_clr(struct nv50_wndw *wndw) wndw 129 drivers/gpu/drm/nouveau/dispnv50/base507c.c if ((push = evo_wait(&wndw->wndw, 2))) { wndw 132 drivers/gpu/drm/nouveau/dispnv50/base507c.c evo_kick(push, &wndw->wndw); wndw 137 drivers/gpu/drm/nouveau/dispnv50/base507c.c base507c_ntfy_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 140 drivers/gpu/drm/nouveau/dispnv50/base507c.c if ((push = evo_wait(&wndw->wndw, 3))) { wndw 144 drivers/gpu/drm/nouveau/dispnv50/base507c.c evo_kick(push, &wndw->wndw); wndw 155 drivers/gpu/drm/nouveau/dispnv50/base507c.c base507c_sema_clr(struct nv50_wndw *wndw) wndw 158 drivers/gpu/drm/nouveau/dispnv50/base507c.c if ((push = evo_wait(&wndw->wndw, 2))) { wndw 161 drivers/gpu/drm/nouveau/dispnv50/base507c.c evo_kick(push, &wndw->wndw); wndw 166 drivers/gpu/drm/nouveau/dispnv50/base507c.c base507c_sema_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 169 drivers/gpu/drm/nouveau/dispnv50/base507c.c if ((push = evo_wait(&wndw->wndw, 5))) { wndw 175 drivers/gpu/drm/nouveau/dispnv50/base507c.c evo_kick(push, &wndw->wndw); wndw 180 drivers/gpu/drm/nouveau/dispnv50/base507c.c base507c_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, wndw 187 drivers/gpu/drm/nouveau/dispnv50/base507c.c base507c_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, wndw 200 drivers/gpu/drm/nouveau/dispnv50/base507c.c if (!wndw->func->ilut) { wndw 266 drivers/gpu/drm/nouveau/dispnv50/base507c.c struct nv50_wndw *wndw; wndw 271 drivers/gpu/drm/nouveau/dispnv50/base507c.c NV50_DISP_INTERLOCK_BASE, interlock_data, &wndw); wndw 272 drivers/gpu/drm/nouveau/dispnv50/base507c.c if (*pwndw = wndw, ret) wndw 277 drivers/gpu/drm/nouveau/dispnv50/base507c.c disp->sync->bo.offset, &wndw->wndw); wndw 283 drivers/gpu/drm/nouveau/dispnv50/base507c.c ret = nvif_notify_init(&wndw->wndw.base.user, wndw->notify.func, wndw 288 drivers/gpu/drm/nouveau/dispnv50/base507c.c &wndw->notify); wndw 292 drivers/gpu/drm/nouveau/dispnv50/base507c.c wndw->ntfy = NV50_DISP_BASE_NTFY(wndw->id); wndw 293 drivers/gpu/drm/nouveau/dispnv50/base507c.c wndw->sema = NV50_DISP_BASE_SEM0(wndw->id); wndw 294 drivers/gpu/drm/nouveau/dispnv50/base507c.c wndw->data = 0x00000000; wndw 25 drivers/gpu/drm/nouveau/dispnv50/base827c.c base827c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 28 drivers/gpu/drm/nouveau/dispnv50/base827c.c if ((push = evo_wait(&wndw->wndw, 13))) { wndw 52 drivers/gpu/drm/nouveau/dispnv50/base827c.c evo_kick(push, &wndw->wndw); wndw 25 drivers/gpu/drm/nouveau/dispnv50/base907c.c base907c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 28 drivers/gpu/drm/nouveau/dispnv50/base907c.c if ((push = evo_wait(&wndw->wndw, 10))) { wndw 43 drivers/gpu/drm/nouveau/dispnv50/base907c.c evo_kick(push, &wndw->wndw); wndw 48 drivers/gpu/drm/nouveau/dispnv50/base907c.c base907c_xlut_clr(struct nv50_wndw *wndw) wndw 51 drivers/gpu/drm/nouveau/dispnv50/base907c.c if ((push = evo_wait(&wndw->wndw, 6))) { wndw 58 drivers/gpu/drm/nouveau/dispnv50/base907c.c evo_kick(push, &wndw->wndw); wndw 63 drivers/gpu/drm/nouveau/dispnv50/base907c.c base907c_xlut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 66 drivers/gpu/drm/nouveau/dispnv50/base907c.c if ((push = evo_wait(&wndw->wndw, 6))) { wndw 74 drivers/gpu/drm/nouveau/dispnv50/base907c.c evo_kick(push, &wndw->wndw); wndw 79 drivers/gpu/drm/nouveau/dispnv50/base907c.c base907c_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 105 drivers/gpu/drm/nouveau/dispnv50/base907c.c base907c_csc(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, wndw 125 drivers/gpu/drm/nouveau/dispnv50/base907c.c base907c_csc_clr(struct nv50_wndw *wndw) wndw 128 drivers/gpu/drm/nouveau/dispnv50/base907c.c if ((push = evo_wait(&wndw->wndw, 2))) { wndw 131 drivers/gpu/drm/nouveau/dispnv50/base907c.c evo_kick(push, &wndw->wndw); wndw 136 drivers/gpu/drm/nouveau/dispnv50/base907c.c base907c_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 139 drivers/gpu/drm/nouveau/dispnv50/base907c.c if ((push = evo_wait(&wndw->wndw, 13))) { wndw 144 drivers/gpu/drm/nouveau/dispnv50/base907c.c evo_kick(push, &wndw->wndw); wndw 32 drivers/gpu/drm/nouveau/dispnv50/curs507a.c curs507a_update(struct nv50_wndw *wndw, u32 *interlock) wndw 34 drivers/gpu/drm/nouveau/dispnv50/curs507a.c nvif_wr32(&wndw->wimm.base.user, 0x0080, 0x00000000); wndw 38 drivers/gpu/drm/nouveau/dispnv50/curs507a.c curs507a_point(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 40 drivers/gpu/drm/nouveau/dispnv50/curs507a.c nvif_wr32(&wndw->wimm.base.user, 0x0084, asyw->point.y << 16 | wndw 51 drivers/gpu/drm/nouveau/dispnv50/curs507a.c curs507a_prepare(struct nv50_wndw *wndw, struct nv50_head_atom *asyh, wndw 54 drivers/gpu/drm/nouveau/dispnv50/curs507a.c u32 handle = nv50_disp(wndw->plane.dev)->core->chan.vram.handle; wndw 64 drivers/gpu/drm/nouveau/dispnv50/curs507a.c curs507a_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, wndw 71 drivers/gpu/drm/nouveau/dispnv50/curs507a.c curs507a_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, wndw 117 drivers/gpu/drm/nouveau/dispnv50/curs507a.c struct nv50_wndw *wndw; wndw 122 drivers/gpu/drm/nouveau/dispnv50/curs507a.c NV50_DISP_INTERLOCK_CURS, interlock_data, &wndw); wndw 123 drivers/gpu/drm/nouveau/dispnv50/curs507a.c if (*pwndw = wndw, ret) wndw 127 drivers/gpu/drm/nouveau/dispnv50/curs507a.c sizeof(args), &wndw->wimm.base.user); wndw 133 drivers/gpu/drm/nouveau/dispnv50/curs507a.c nvif_object_map(&wndw->wimm.base.user, NULL, 0); wndw 134 drivers/gpu/drm/nouveau/dispnv50/curs507a.c wndw->immd = func; wndw 135 drivers/gpu/drm/nouveau/dispnv50/curs507a.c wndw->ctxdma.parent = NULL; wndw 26 drivers/gpu/drm/nouveau/dispnv50/cursc37a.c cursc37a_update(struct nv50_wndw *wndw, u32 *interlock) wndw 28 drivers/gpu/drm/nouveau/dispnv50/cursc37a.c nvif_wr32(&wndw->wimm.base.user, 0x0200, 0x00000001); wndw 32 drivers/gpu/drm/nouveau/dispnv50/cursc37a.c cursc37a_point(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 34 drivers/gpu/drm/nouveau/dispnv50/cursc37a.c nvif_wr32(&wndw->wimm.base.user, 0x0208, asyw->point.y << 16 | wndw 1816 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_wndw *wndw = nv50_wndw(plane); wndw 1817 drivers/gpu/drm/nouveau/dispnv50/disp.c if (interlock[wndw->interlock.type] & wndw->interlock.data) { wndw 1818 drivers/gpu/drm/nouveau/dispnv50/disp.c if (wndw->func->update) wndw 1819 drivers/gpu/drm/nouveau/dispnv50/disp.c wndw->func->update(wndw, interlock); wndw 1869 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_wndw *wndw = nv50_wndw(plane); wndw 1876 drivers/gpu/drm/nouveau/dispnv50/disp.c nv50_wndw_flush_clr(wndw, interlock, atom->flush_disable, asyw); wndw 1956 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_wndw *wndw = nv50_wndw(plane); wndw 1964 drivers/gpu/drm/nouveau/dispnv50/disp.c nv50_wndw_flush_set(wndw, interlock, asyw); wndw 1986 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_wndw *wndw = nv50_wndw(plane); wndw 1987 drivers/gpu/drm/nouveau/dispnv50/disp.c int ret = nv50_wndw_wait_armed(wndw, asyw); wndw 2060 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_wndw *wndw = nv50_wndw(plane); wndw 2063 drivers/gpu/drm/nouveau/dispnv50/disp.c nv50_wndw_ntfy_enable(wndw, asyw); wndw 2259 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_wndw *wndw = nv50_wndw(plane); wndw 2262 drivers/gpu/drm/nouveau/dispnv50/disp.c nv50_wndw_fini(wndw); wndw 2291 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_wndw *wndw = nv50_wndw(plane); wndw 2294 drivers/gpu/drm/nouveau/dispnv50/disp.c nv50_wndw_init(wndw); wndw 222 drivers/gpu/drm/nouveau/dispnv50/head.c if (asyh->wndw.olut) { wndw 226 drivers/gpu/drm/nouveau/dispnv50/head.c if (asyh->wndw.olut != asyh->wndw.mask) wndw 332 drivers/gpu/drm/nouveau/dispnv50/head.c memcmp(&armh->wndw, &asyh->wndw, sizeof(asyh->wndw))) { wndw 425 drivers/gpu/drm/nouveau/dispnv50/head.c asyh->wndw = armh->wndw; wndw 27 drivers/gpu/drm/nouveau/dispnv50/oimm.c nv50_oimm_init(struct nouveau_drm *drm, struct nv50_wndw *wndw) wndw 50 drivers/gpu/drm/nouveau/dispnv50/oimm.c return oimms[cid].init(drm, oimms[cid].oclass, wndw); wndw 28 drivers/gpu/drm/nouveau/dispnv50/oimm507b.c s32 oclass, struct nv50_wndw *wndw) wndw 31 drivers/gpu/drm/nouveau/dispnv50/oimm507b.c .head = wndw->id, wndw 37 drivers/gpu/drm/nouveau/dispnv50/oimm507b.c sizeof(args), &wndw->wimm.base.user); wndw 43 drivers/gpu/drm/nouveau/dispnv50/oimm507b.c nvif_object_map(&wndw->wimm.base.user, NULL, 0); wndw 44 drivers/gpu/drm/nouveau/dispnv50/oimm507b.c wndw->immd = func; wndw 49 drivers/gpu/drm/nouveau/dispnv50/oimm507b.c oimm507b_init(struct nouveau_drm *drm, s32 oclass, struct nv50_wndw *wndw) wndw 51 drivers/gpu/drm/nouveau/dispnv50/oimm507b.c return oimm507b_init_(&curs507a, drm, oclass, wndw); wndw 33 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c ovly507e_update(struct nv50_wndw *wndw, u32 *interlock) wndw 36 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c if ((push = evo_wait(&wndw->wndw, 2))) { wndw 39 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c evo_kick(push, &wndw->wndw); wndw 44 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c ovly507e_scale_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 47 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c if ((push = evo_wait(&wndw->wndw, 4))) { wndw 52 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c evo_kick(push, &wndw->wndw); wndw 57 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c ovly507e_image_clr(struct nv50_wndw *wndw) wndw 60 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c if ((push = evo_wait(&wndw->wndw, 4))) { wndw 65 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c evo_kick(push, &wndw->wndw); wndw 70 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c ovly507e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 73 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c if ((push = evo_wait(&wndw->wndw, 12))) { wndw 91 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c evo_kick(push, &wndw->wndw); wndw 96 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c ovly507e_ntfy_clr(struct nv50_wndw *wndw) wndw 99 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c if ((push = evo_wait(&wndw->wndw, 2))) { wndw 102 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c evo_kick(push, &wndw->wndw); wndw 107 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c ovly507e_ntfy_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 110 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c if ((push = evo_wait(&wndw->wndw, 3))) { wndw 114 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c evo_kick(push, &wndw->wndw); wndw 119 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c ovly507e_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, wndw 126 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c ovly507e_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, wndw 177 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c struct nv50_wndw *wndw; wndw 183 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c &wndw); wndw 184 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c if (*pwndw = wndw, ret) wndw 189 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c disp->sync->bo.offset, &wndw->wndw); wndw 195 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c ret = nvif_notify_init(&wndw->wndw.base.user, wndw->notify.func, false, wndw 200 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c &wndw->notify); wndw 204 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c wndw->ntfy = NV50_DISP_OVLY_NTFY(wndw->id); wndw 205 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c wndw->sema = NV50_DISP_OVLY_SEM0(wndw->id); wndw 206 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c wndw->data = 0x00000000; wndw 28 drivers/gpu/drm/nouveau/dispnv50/ovly827e.c ovly827e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 31 drivers/gpu/drm/nouveau/dispnv50/ovly827e.c if ((push = evo_wait(&wndw->wndw, 12))) { wndw 48 drivers/gpu/drm/nouveau/dispnv50/ovly827e.c evo_kick(push, &wndw->wndw); wndw 26 drivers/gpu/drm/nouveau/dispnv50/ovly907e.c ovly907e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 29 drivers/gpu/drm/nouveau/dispnv50/ovly907e.c if ((push = evo_wait(&wndw->wndw, 12))) { wndw 46 drivers/gpu/drm/nouveau/dispnv50/ovly907e.c evo_kick(push, &wndw->wndw); wndw 27 drivers/gpu/drm/nouveau/dispnv50/wimm.c nv50_wimm_init(struct nouveau_drm *drm, struct nv50_wndw *wndw) wndw 47 drivers/gpu/drm/nouveau/dispnv50/wimm.c return wimms[cid].init(drm, wimms[cid].oclass, wndw); wndw 29 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c wimmc37b_update(struct nv50_wndw *wndw, u32 *interlock) wndw 32 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c if ((push = evo_wait(&wndw->wimm, 2))) { wndw 34 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c if (interlock[NV50_DISP_INTERLOCK_WNDW] & wndw->interlock.data) wndw 38 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c evo_kick(push, &wndw->wimm); wndw 43 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c wimmc37b_point(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 46 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c if ((push = evo_wait(&wndw->wimm, 2))) { wndw 49 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c evo_kick(push, &wndw->wimm); wndw 61 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c s32 oclass, struct nv50_wndw *wndw) wndw 64 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c .pushbuf = 0xb0007b00 | wndw->id, wndw 65 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c .index = wndw->id, wndw 72 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c &wndw->wimm); wndw 78 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c wndw->interlock.wimm = wndw->interlock.data; wndw 79 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c wndw->immd = func; wndw 84 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c wimmc37b_init(struct nouveau_drm *drm, s32 oclass, struct nv50_wndw *wndw) wndw 86 drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c return wimmc37b_init_(&wimmc37b, drm, oclass, wndw); wndw 42 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_ctxdma_new(struct nv50_wndw *wndw, struct nouveau_framebuffer *fb) wndw 59 drivers/gpu/drm/nouveau/dispnv50/wndw.c list_for_each_entry(ctxdma, &wndw->ctxdma.list, head) { wndw 66 drivers/gpu/drm/nouveau/dispnv50/wndw.c list_add(&ctxdma->head, &wndw->ctxdma.list); wndw 91 drivers/gpu/drm/nouveau/dispnv50/wndw.c ret = nvif_object_init(wndw->ctxdma.parent, handle, NV_DMA_IN_MEMORY, wndw 102 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_wait_armed(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 104 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nv50_disp *disp = nv50_disp(wndw->plane.dev); wndw 106 drivers/gpu/drm/nouveau/dispnv50/wndw.c return wndw->func->ntfy_wait_begun(disp->sync, wndw 108 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->wndw.base.device); wndw 114 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_flush_clr(struct nv50_wndw *wndw, u32 *interlock, bool flush, wndw 120 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (clr.sema ) wndw->func-> sema_clr(wndw); wndw 121 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (clr.ntfy ) wndw->func-> ntfy_clr(wndw); wndw 122 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (clr.xlut ) wndw->func-> xlut_clr(wndw); wndw 123 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (clr.csc ) wndw->func-> csc_clr(wndw); wndw 124 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (clr.image) wndw->func->image_clr(wndw); wndw 126 drivers/gpu/drm/nouveau/dispnv50/wndw.c interlock[wndw->interlock.type] |= wndw->interlock.data; wndw 130 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_flush_set(struct nv50_wndw *wndw, u32 *interlock, wndw 138 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (asyw->set.sema ) wndw->func->sema_set (wndw, asyw); wndw 139 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (asyw->set.ntfy ) wndw->func->ntfy_set (wndw, asyw); wndw 140 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (asyw->set.image) wndw->func->image_set(wndw, asyw); wndw 145 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_lut_load(&wndw->ilut, asyw->xlut.i.buffer, wndw 148 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->func->xlut_set(wndw, asyw); wndw 151 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (asyw->set.csc ) wndw->func->csc_set (wndw, asyw); wndw 152 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (asyw->set.scale) wndw->func->scale_set(wndw, asyw); wndw 153 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (asyw->set.blend) wndw->func->blend_set(wndw, asyw); wndw 156 drivers/gpu/drm/nouveau/dispnv50/wndw.c interlock[wndw->interlock.type] |= wndw->interlock.data; wndw 157 drivers/gpu/drm/nouveau/dispnv50/wndw.c interlock[NV50_DISP_INTERLOCK_WIMM] |= wndw->interlock.wimm; wndw 159 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->immd->point(wndw, asyw); wndw 160 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->immd->update(wndw, interlock); wndw 162 drivers/gpu/drm/nouveau/dispnv50/wndw.c interlock[wndw->interlock.type] |= wndw->interlock.data; wndw 167 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_ntfy_enable(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 169 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nv50_disp *disp = nv50_disp(wndw->plane.dev); wndw 171 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyw->ntfy.handle = wndw->wndw.sync.handle; wndw 172 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyw->ntfy.offset = wndw->ntfy; wndw 176 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->func->ntfy_reset(disp->sync, wndw->ntfy); wndw 177 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->ntfy ^= 0x10; wndw 181 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_atomic_check_release(struct nv50_wndw *wndw, wndw 185 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev); wndw 186 drivers/gpu/drm/nouveau/dispnv50/wndw.c NV_ATOMIC(drm, "%s release\n", wndw->plane.name); wndw 187 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->func->release(wndw, asyw, asyh); wndw 232 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_atomic_check_acquire(struct nv50_wndw *wndw, bool modeset, wndw 238 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev); wndw 241 drivers/gpu/drm/nouveau/dispnv50/wndw.c NV_ATOMIC(drm, "%s acquire\n", wndw->plane.name); wndw 275 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyw->set.image = wndw->func->image_set != NULL; wndw 278 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (wndw->func->scale_set) { wndw 289 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (wndw->func->blend_set) { wndw 311 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (wndw->immd) { wndw 318 drivers/gpu/drm/nouveau/dispnv50/wndw.c return wndw->func->acquire(wndw, asyw, asyh); wndw 322 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_atomic_check_lut(struct nv50_wndw *wndw, wndw 346 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (wndw->func->ilut) wndw 347 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyh->wndw.olut |= BIT(wndw->id); wndw 349 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyh->wndw.olut &= ~BIT(wndw->id); wndw 352 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (!ilut && wndw->func->ilut_identity && wndw 361 drivers/gpu/drm/nouveau/dispnv50/wndw.c if ((asyw->ilut = wndw->func->ilut ? ilut : NULL)) { wndw 362 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->func->ilut(wndw, asyw); wndw 363 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyw->xlut.handle = wndw->wndw.vram.handle; wndw 371 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (wndw->func->olut_core && wndw 375 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (wndw->func->csc && asyh->state.ctm) { wndw 377 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->func->csc(wndw, asyw, ctm); wndw 393 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nv50_wndw *wndw = nv50_wndw(plane); wndw 394 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nv50_wndw_atom *armw = nv50_wndw_atom(wndw->plane.state); wndw 423 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (asyw->visible && wndw->func->xlut_set && wndw 428 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_atomic_check_lut(wndw, armw, asyw, asyh); wndw 432 drivers/gpu/drm/nouveau/dispnv50/wndw.c ret = nv50_wndw_atomic_check_acquire(wndw, modeset, wndw 437 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyh->wndw.mask |= BIT(wndw->id); wndw 440 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_atomic_check_release(wndw, asyw, harm); wndw 441 drivers/gpu/drm/nouveau/dispnv50/wndw.c harm->wndw.mask &= ~BIT(wndw->id); wndw 457 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (wndw->func->image_clr) wndw 482 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nv50_wndw *wndw = nv50_wndw(plane); wndw 496 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (wndw->ctxdma.parent) { wndw 497 drivers/gpu/drm/nouveau/dispnv50/wndw.c ctxdma = nv50_wndw_ctxdma_new(wndw, fb); wndw 509 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (wndw->func->prepare) { wndw 514 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->func->prepare(wndw, asyh, asyw); wndw 582 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nv50_wndw *wndw = nv50_wndw(plane); wndw 585 drivers/gpu/drm/nouveau/dispnv50/wndw.c list_for_each_entry_safe(ctxdma, ctxtmp, &wndw->ctxdma.list, head) { wndw 589 drivers/gpu/drm/nouveau/dispnv50/wndw.c nvif_notify_fini(&wndw->notify); wndw 590 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_dmac_destroy(&wndw->wimm); wndw 591 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_dmac_destroy(&wndw->wndw); wndw 593 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_lut_fini(&wndw->ilut); wndw 595 drivers/gpu/drm/nouveau/dispnv50/wndw.c drm_plane_cleanup(&wndw->plane); wndw 596 drivers/gpu/drm/nouveau/dispnv50/wndw.c kfree(wndw); wndw 616 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_fini(struct nv50_wndw *wndw) wndw 618 drivers/gpu/drm/nouveau/dispnv50/wndw.c nvif_notify_put(&wndw->notify); wndw 622 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_init(struct nv50_wndw *wndw) wndw 624 drivers/gpu/drm/nouveau/dispnv50/wndw.c nvif_notify_get(&wndw->notify); wndw 637 drivers/gpu/drm/nouveau/dispnv50/wndw.c struct nv50_wndw *wndw; wndw 641 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (!(wndw = *pwndw = kzalloc(sizeof(*wndw), GFP_KERNEL))) wndw 643 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->func = func; wndw 644 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->id = index; wndw 645 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->interlock.type = interlock_type; wndw 646 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->interlock.data = interlock_data; wndw 648 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->ctxdma.parent = &wndw->wndw.base.user; wndw 649 drivers/gpu/drm/nouveau/dispnv50/wndw.c INIT_LIST_HEAD(&wndw->ctxdma.list); wndw 653 drivers/gpu/drm/nouveau/dispnv50/wndw.c ret = drm_universal_plane_init(dev, &wndw->plane, heads, &nv50_wndw, wndw 662 drivers/gpu/drm/nouveau/dispnv50/wndw.c drm_plane_helper_add(&wndw->plane, &nv50_wndw_helper); wndw 664 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (wndw->func->ilut) { wndw 665 drivers/gpu/drm/nouveau/dispnv50/wndw.c ret = nv50_lut_init(disp, mmu, &wndw->ilut); wndw 670 drivers/gpu/drm/nouveau/dispnv50/wndw.c wndw->notify.func = nv50_wndw_notify; wndw 672 drivers/gpu/drm/nouveau/dispnv50/wndw.c if (wndw->func->blend_set) { wndw 673 drivers/gpu/drm/nouveau/dispnv50/wndw.c ret = drm_plane_create_zpos_property(&wndw->plane, wndw 674 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_zpos_default(&wndw->plane), 0, 254); wndw 678 drivers/gpu/drm/nouveau/dispnv50/wndw.c ret = drm_plane_create_alpha_property(&wndw->plane); wndw 682 drivers/gpu/drm/nouveau/dispnv50/wndw.c ret = drm_plane_create_blend_mode_property(&wndw->plane, wndw 689 drivers/gpu/drm/nouveau/dispnv50/wndw.c ret = drm_plane_create_zpos_immutable_property(&wndw->plane, wndw 690 drivers/gpu/drm/nouveau/dispnv50/wndw.c nv50_wndw_zpos_default(&wndw->plane)); wndw 30 drivers/gpu/drm/nouveau/dispnv50/wndw.h struct nv50_dmac wndw; wndw 32 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_csc_clr(struct nv50_wndw *wndw) wndw 37 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 40 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c if ((push = evo_wait(&wndw->wndw, 13))) { wndw 44 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c evo_kick(push, &wndw->wndw); wndw 49 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_ilut_clr(struct nv50_wndw *wndw) wndw 52 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c if ((push = evo_wait(&wndw->wndw, 2))) { wndw 55 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c evo_kick(push, &wndw->wndw); wndw 60 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_ilut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 63 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c if ((push = evo_wait(&wndw->wndw, 4))) { wndw 70 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c evo_kick(push, &wndw->wndw); wndw 75 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 85 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_blend_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 88 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c if ((push = evo_wait(&wndw->wndw, 8))) { wndw 100 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c evo_kick(push, &wndw->wndw); wndw 105 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_image_clr(struct nv50_wndw *wndw) wndw 108 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c if ((push = evo_wait(&wndw->wndw, 4))) { wndw 113 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c evo_kick(push, &wndw->wndw); wndw 118 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 122 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c if (!(push = evo_wait(&wndw->wndw, 17))) wndw 147 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c evo_kick(push, &wndw->wndw); wndw 151 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_ntfy_clr(struct nv50_wndw *wndw) wndw 154 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c if ((push = evo_wait(&wndw->wndw, 2))) { wndw 157 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c evo_kick(push, &wndw->wndw); wndw 162 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_ntfy_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 165 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c if ((push = evo_wait(&wndw->wndw, 3))) { wndw 169 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c evo_kick(push, &wndw->wndw); wndw 174 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_sema_clr(struct nv50_wndw *wndw) wndw 177 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c if ((push = evo_wait(&wndw->wndw, 2))) { wndw 180 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c evo_kick(push, &wndw->wndw); wndw 185 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_sema_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 188 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c if ((push = evo_wait(&wndw->wndw, 5))) { wndw 194 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c evo_kick(push, &wndw->wndw); wndw 199 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_update(struct nv50_wndw *wndw, u32 *interlock) wndw 202 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c if ((push = evo_wait(&wndw->wndw, 5))) { wndw 208 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c if (interlock[NV50_DISP_INTERLOCK_WIMM] & wndw->interlock.data) wndw 212 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c evo_kick(push, &wndw->wndw); wndw 217 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, wndw 223 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndwc37e_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, wndw 285 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c struct nv50_wndw *wndw; wndw 290 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c BIT(index), &wndw); wndw 291 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c if (*pwndw = wndw, ret) wndw 296 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c disp->sync->bo.offset, &wndw->wndw); wndw 302 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndw->ntfy = NV50_DISP_WNDW_NTFY(wndw->id); wndw 303 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndw->sema = NV50_DISP_WNDW_SEM0(wndw->id); wndw 304 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c wndw->data = 0x00000000; wndw 32 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c wndwc57e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 36 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c if (!(push = evo_wait(&wndw->wndw, 17))) wndw 60 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c evo_kick(push, &wndw->wndw); wndw 64 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c wndwc57e_csc_clr(struct nv50_wndw *wndw) wndw 67 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c if ((push = evo_wait(&wndw->wndw, 13))) { wndw 81 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c evo_kick(push, &wndw->wndw); wndw 86 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c wndwc57e_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 89 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c if ((push = evo_wait(&wndw->wndw, 13))) { wndw 93 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c evo_kick(push, &wndw->wndw); wndw 98 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c wndwc57e_ilut_clr(struct nv50_wndw *wndw) wndw 101 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c if ((push = evo_wait(&wndw->wndw, 2))) { wndw 104 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c evo_kick(push, &wndw->wndw); wndw 109 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c wndwc57e_ilut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 112 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c if ((push = evo_wait(&wndw->wndw, 4))) { wndw 119 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c evo_kick(push, &wndw->wndw); wndw 160 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c wndwc57e_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw) wndw 150 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c int wndw; wndw 160 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c for_each_set_bit(wndw, &wndws, disp->wndw.nr) { wndw 161 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c nv50_disp_chan_uevent_send(disp, 1 + wndw); wndw 185 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c for_each_set_bit(head, &mask, disp->wndw.nr) { wndw 204 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c int wndw; wndw 206 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c for_each_set_bit(wndw, &stat, disp->wndw.nr) { wndw 207 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c nvkm_wr32(device, 0x611850, BIT(wndw)); wndw 208 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c gv100_disp_exception(disp, 33 + wndw); wndw 209 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c stat &= ~BIT(wndw); wndw 224 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c int wndw; wndw 226 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c for_each_set_bit(wndw, &stat, disp->wndw.nr) { wndw 227 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c nvkm_wr32(device, 0x61184c, BIT(wndw)); wndw 228 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c gv100_disp_exception(disp, 1 + wndw); wndw 229 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c stat &= ~BIT(wndw); wndw 355 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c for (i = 0; i < disp->wndw.nr; i++) { wndw 392 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c nvkm_wr32(device, 0x611ce8, disp->wndw.mask); /* MSK. */ wndw 396 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c nvkm_wr32(device, 0x611ce4, disp->wndw.mask); /* MSK. */ wndw 420 drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c .wndw = { .cnt = gv100_disp_wndw_cnt }, wndw 90 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c if (func->wndw.cnt) { wndw 91 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c disp->wndw.nr = func->wndw.cnt(&disp->base, &disp->wndw.mask); wndw 93 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c disp->wndw.nr, disp->wndw.mask); wndw 23 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h } wndw, head, dac; wndw 67 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h } wndw, head, dac, sor, pior; wndw 76 drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c for (i = 0; i < disp->wndw.nr; i++) { wndw 114 drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c nvkm_wr32(device, 0x611ce8, disp->wndw.mask); /* MSK. */ wndw 118 drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c nvkm_wr32(device, 0x611ce4, disp->wndw.mask); /* MSK. */ wndw 142 drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c .wndw = { .cnt = gv100_disp_wndw_cnt }, wndw 57 drivers/gpu/drm/nouveau/nvkm/engine/disp/wimmgv100.c int wndw, ret = -ENOSYS; wndw 65 drivers/gpu/drm/nouveau/nvkm/engine/disp/wimmgv100.c if (!(disp->wndw.mask & BIT(args->v0.index))) wndw 68 drivers/gpu/drm/nouveau/nvkm/engine/disp/wimmgv100.c wndw = args->v0.index; wndw 72 drivers/gpu/drm/nouveau/nvkm/engine/disp/wimmgv100.c return nv50_disp_dmac_new_(func, mthd, disp, chid + wndw, wndw 73 drivers/gpu/drm/nouveau/nvkm/engine/disp/wimmgv100.c wndw, push, oclass, pobject); wndw 159 drivers/gpu/drm/nouveau/nvkm/engine/disp/wndwgv100.c int wndw, ret = -ENOSYS; wndw 167 drivers/gpu/drm/nouveau/nvkm/engine/disp/wndwgv100.c if (!(disp->wndw.mask & BIT(args->v0.index))) wndw 170 drivers/gpu/drm/nouveau/nvkm/engine/disp/wndwgv100.c wndw = args->v0.index; wndw 174 drivers/gpu/drm/nouveau/nvkm/engine/disp/wndwgv100.c return nv50_disp_dmac_new_(func, mthd, disp, chid + wndw, wndw 175 drivers/gpu/drm/nouveau/nvkm/engine/disp/wndwgv100.c wndw, push, oclass, pobject);