wm_with_clock_ranges  478 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges)
wm_with_clock_ranges  550 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges;
wm_with_clock_ranges  551 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	struct dm_pp_clock_range_for_dmif_wm_set_soc15 *wm_dce_clocks = wm_with_clock_ranges.wm_dmif_clocks_ranges;
wm_with_clock_ranges  552 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	struct dm_pp_clock_range_for_mcif_wm_set_soc15 *wm_soc_clocks = wm_with_clock_ranges.wm_mcif_clocks_ranges;
wm_with_clock_ranges  555 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	wm_with_clock_ranges.num_wm_dmif_sets = ranges->num_reader_wm_sets;
wm_with_clock_ranges  556 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	wm_with_clock_ranges.num_wm_mcif_sets = ranges->num_writer_wm_sets;
wm_with_clock_ranges  558 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	for (i = 0; i < wm_with_clock_ranges.num_wm_dmif_sets; i++) {
wm_with_clock_ranges  574 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	for (i = 0; i < wm_with_clock_ranges.num_wm_mcif_sets; i++) {
wm_with_clock_ranges  592 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 							   &wm_with_clock_ranges);
wm_with_clock_ranges  596 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 						    &wm_with_clock_ranges);
wm_with_clock_ranges  670 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges;
wm_with_clock_ranges  672 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 			wm_with_clock_ranges.wm_dmif_clocks_ranges;
wm_with_clock_ranges  674 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 			wm_with_clock_ranges.wm_mcif_clocks_ranges;
wm_with_clock_ranges  677 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	wm_with_clock_ranges.num_wm_dmif_sets = ranges->num_reader_wm_sets;
wm_with_clock_ranges  678 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	wm_with_clock_ranges.num_wm_mcif_sets = ranges->num_writer_wm_sets;
wm_with_clock_ranges  680 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	for (i = 0; i < wm_with_clock_ranges.num_wm_dmif_sets; i++) {
wm_with_clock_ranges  696 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	for (i = 0; i < wm_with_clock_ranges.num_wm_mcif_sets; i++) {
wm_with_clock_ranges  719 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 			&wm_with_clock_ranges))
wm_with_clock_ranges  215 drivers/gpu/drm/amd/display/dc/dm_services.h 	struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges);
wm_with_clock_ranges 1157 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges;
wm_with_clock_ranges 1161 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	smu_set_watermarks_for_clocks_ranges(table,wm_with_clock_ranges);
wm_with_clock_ranges  705 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 		struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges)
wm_with_clock_ranges  710 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	if (!table || !wm_with_clock_ranges)
wm_with_clock_ranges  713 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	if (wm_with_clock_ranges->num_wm_dmif_sets > 4 || wm_with_clock_ranges->num_wm_mcif_sets > 4)
wm_with_clock_ranges  716 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	for (i = 0; i < wm_with_clock_ranges->num_wm_dmif_sets; i++) {
wm_with_clock_ranges  719 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 			(wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_min_dcfclk_clk_in_khz /
wm_with_clock_ranges  723 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 			(wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_max_dcfclk_clk_in_khz /
wm_with_clock_ranges  727 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 			(wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_min_mem_clk_in_khz /
wm_with_clock_ranges  731 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 			(wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_max_mem_clk_in_khz /
wm_with_clock_ranges  734 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 				wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_set_id;
wm_with_clock_ranges  737 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	for (i = 0; i < wm_with_clock_ranges->num_wm_mcif_sets; i++) {
wm_with_clock_ranges  740 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 			(wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_min_socclk_clk_in_khz /
wm_with_clock_ranges  744 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 			(wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_max_socclk_clk_in_khz /
wm_with_clock_ranges  748 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 			(wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_min_mem_clk_in_khz /
wm_with_clock_ranges  752 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 			(wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_max_mem_clk_in_khz /
wm_with_clock_ranges  755 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 				wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_set_id;
wm_with_clock_ranges  122 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h 		struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges);
wm_with_clock_ranges 4356 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_range;
wm_with_clock_ranges 4361 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges);
wm_with_clock_ranges 1867 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 	struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges;
wm_with_clock_ranges 1872 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 		smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges);
wm_with_clock_ranges 2892 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges;
wm_with_clock_ranges 2897 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 		smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges);