width_in_mb 524 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c unsigned width_in_mb = width / 16; width_in_mb 526 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c unsigned fs_in_mb = width_in_mb * height_in_mb; width_in_mb 571 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c min_dpb_size += width_in_mb * height_in_mb * num_dpb_buffer * 192; width_in_mb 574 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c min_dpb_size += width_in_mb * height_in_mb * 32; width_in_mb 583 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c min_dpb_size += width_in_mb * height_in_mb * 128; width_in_mb 586 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c min_dpb_size += width_in_mb * 64; width_in_mb 589 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c min_dpb_size += width_in_mb * 128; width_in_mb 592 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c tmp = max(width_in_mb, height_in_mb); width_in_mb 608 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c min_dpb_size += width_in_mb * height_in_mb * 64; width_in_mb 611 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c min_dpb_size += ALIGN(width_in_mb * height_in_mb * 32, 64); width_in_mb 651 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c width_in_mb * height_in_mb * num_dpb_buffer * 192; width_in_mb 654 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c min_dpb_size += width_in_mb * height_in_mb * 32; width_in_mb 658 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c width_in_mb * height_in_mb * num_dpb_buffer * 192; width_in_mb 362 drivers/gpu/drm/radeon/radeon_uvd.c unsigned width_in_mb = width / 16; width_in_mb 378 drivers/gpu/drm/radeon/radeon_uvd.c min_dpb_size += width_in_mb * height_in_mb * 17 * 192; width_in_mb 381 drivers/gpu/drm/radeon/radeon_uvd.c min_dpb_size += width_in_mb * height_in_mb * 32; width_in_mb 390 drivers/gpu/drm/radeon/radeon_uvd.c min_dpb_size += width_in_mb * height_in_mb * 128; width_in_mb 393 drivers/gpu/drm/radeon/radeon_uvd.c min_dpb_size += width_in_mb * 64; width_in_mb 396 drivers/gpu/drm/radeon/radeon_uvd.c min_dpb_size += width_in_mb * 128; width_in_mb 399 drivers/gpu/drm/radeon/radeon_uvd.c tmp = max(width_in_mb, height_in_mb); width_in_mb 415 drivers/gpu/drm/radeon/radeon_uvd.c min_dpb_size += width_in_mb * height_in_mb * 64; width_in_mb 418 drivers/gpu/drm/radeon/radeon_uvd.c min_dpb_size += ALIGN(width_in_mb * height_in_mb * 32, 64);