wcreg 185 sound/pci/rme32.c u32 wcreg; /* cached write control register value */ wcreg 223 sound/pci/rme32.c #define RME32_ISWORKING(rme32) ((rme32)->wcreg & RME32_WCR_START) wcreg 408 sound/pci/rme32.c writel(rme32->wcreg | RME32_WCR_PD, wcreg 410 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 417 sound/pci/rme32.c rate = ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) + wcreg 418 sound/pci/rme32.c (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1); wcreg 432 sound/pci/rme32.c return (rme32->wcreg & RME32_WCR_DS_BM) ? rate << 1 : rate; wcreg 501 sound/pci/rme32.c ds = rme32->wcreg & RME32_WCR_DS_BM; wcreg 504 sound/pci/rme32.c rme32->wcreg &= ~RME32_WCR_DS_BM; wcreg 505 sound/pci/rme32.c rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) & wcreg 509 sound/pci/rme32.c rme32->wcreg &= ~RME32_WCR_DS_BM; wcreg 510 sound/pci/rme32.c rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) & wcreg 514 sound/pci/rme32.c rme32->wcreg &= ~RME32_WCR_DS_BM; wcreg 515 sound/pci/rme32.c rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) | wcreg 521 sound/pci/rme32.c rme32->wcreg |= RME32_WCR_DS_BM; wcreg 522 sound/pci/rme32.c rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) & wcreg 528 sound/pci/rme32.c rme32->wcreg |= RME32_WCR_DS_BM; wcreg 529 sound/pci/rme32.c rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) & wcreg 535 sound/pci/rme32.c rme32->wcreg |= RME32_WCR_DS_BM; wcreg 536 sound/pci/rme32.c rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) | wcreg 542 sound/pci/rme32.c if ((!ds && rme32->wcreg & RME32_WCR_DS_BM) || wcreg 543 sound/pci/rme32.c (ds && !(rme32->wcreg & RME32_WCR_DS_BM))) wcreg 548 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 558 sound/pci/rme32.c rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) & wcreg 563 sound/pci/rme32.c rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) & wcreg 568 sound/pci/rme32.c rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) | wcreg 573 sound/pci/rme32.c rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) | wcreg 579 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 585 sound/pci/rme32.c return ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) + wcreg 586 sound/pci/rme32.c (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1); wcreg 593 sound/pci/rme32.c rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) & wcreg 597 sound/pci/rme32.c rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) & wcreg 601 sound/pci/rme32.c rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) | wcreg 605 sound/pci/rme32.c rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) | wcreg 611 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 617 sound/pci/rme32.c return ((rme32->wcreg >> RME32_WCR_BITPOS_INP_0) & 1) + wcreg 618 sound/pci/rme32.c (((rme32->wcreg >> RME32_WCR_BITPOS_INP_1) & 1) << 1); wcreg 633 sound/pci/rme32.c frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1; wcreg 636 sound/pci/rme32.c frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1; wcreg 645 sound/pci/rme32.c rme32->wcreg &= ~RME32_WCR_MODE24; wcreg 648 sound/pci/rme32.c rme32->wcreg |= RME32_WCR_MODE24; wcreg 653 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 702 sound/pci/rme32.c if ((rme32->wcreg & RME32_WCR_ADAT) == 0) { wcreg 703 sound/pci/rme32.c rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP); wcreg 704 sound/pci/rme32.c rme32->wcreg |= rme32->wcreg_spdif_stream; wcreg 705 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 733 sound/pci/rme32.c rme32->wcreg |= RME32_WCR_AUTOSYNC; wcreg 734 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 756 sound/pci/rme32.c rme32->wcreg &= ~RME32_WCR_AUTOSYNC; wcreg 757 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 788 sound/pci/rme32.c rme32->wcreg |= RME32_WCR_START; wcreg 789 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 802 sound/pci/rme32.c rme32->wcreg &= ~RME32_WCR_START; wcreg 803 sound/pci/rme32.c if (rme32->wcreg & RME32_WCR_SEL) wcreg 804 sound/pci/rme32.c rme32->wcreg |= RME32_WCR_MUTE; wcreg 805 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 862 sound/pci/rme32.c rme32->wcreg &= ~RME32_WCR_ADAT; wcreg 863 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 944 sound/pci/rme32.c rme32->wcreg |= RME32_WCR_ADAT; wcreg 945 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 1007 sound/pci/rme32.c spdif = (rme32->wcreg & RME32_WCR_ADAT) == 0; wcreg 1041 sound/pci/rme32.c if (rme32->wcreg & RME32_WCR_SEL) wcreg 1042 sound/pci/rme32.c rme32->wcreg &= ~RME32_WCR_MUTE; wcreg 1043 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 1436 sound/pci/rme32.c rme32->wcreg = RME32_WCR_SEL | /* normal playback */ wcreg 1439 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 1481 sound/pci/rme32.c if (rme32->wcreg & RME32_WCR_MODE24) { wcreg 1486 sound/pci/rme32.c if (rme32->wcreg & RME32_WCR_MONO) { wcreg 1520 sound/pci/rme32.c if (rme32->wcreg & RME32_WCR_SEL) { wcreg 1525 sound/pci/rme32.c if (rme32->wcreg & RME32_WCR_MUTE) { wcreg 1533 sound/pci/rme32.c ((!(rme32->wcreg & RME32_WCR_FREQ_0)) wcreg 1534 sound/pci/rme32.c && (!(rme32->wcreg & RME32_WCR_FREQ_1)))) { wcreg 1543 sound/pci/rme32.c if (rme32->wcreg & RME32_WCR_PRO) { wcreg 1548 sound/pci/rme32.c if (rme32->wcreg & RME32_WCR_EMP) { wcreg 1574 sound/pci/rme32.c rme32->wcreg & RME32_WCR_SEL ? 0 : 1; wcreg 1588 sound/pci/rme32.c val = (rme32->wcreg & ~RME32_WCR_SEL) | val; wcreg 1589 sound/pci/rme32.c change = val != rme32->wcreg; wcreg 1594 sound/pci/rme32.c rme32->wcreg = val; wcreg 1804 sound/pci/rme32.c rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP); wcreg 1805 sound/pci/rme32.c rme32->wcreg |= val; wcreg 1806 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); wcreg 219 sound/pci/rme96.c u32 wcreg; /* cached write control register value */ wcreg 261 sound/pci/rme96.c #define RME96_ISPLAYING(rme96) ((rme96)->wcreg & RME96_WCR_START) wcreg 262 sound/pci/rme96.c #define RME96_ISRECORDING(rme96) ((rme96)->wcreg & RME96_WCR_START_2) wcreg 540 sound/pci/rme96.c writel(rme96->wcreg | RME96_WCR_PD, wcreg 542 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); wcreg 548 sound/pci/rme96.c return ((rme96->wcreg >> RME96_WCR_BITPOS_MONITOR_0) & 1) + wcreg 549 sound/pci/rme96.c (((rme96->wcreg >> RME96_WCR_BITPOS_MONITOR_1) & 1) << 1); wcreg 557 sound/pci/rme96.c rme96->wcreg |= RME96_WCR_MONITOR_0; wcreg 559 sound/pci/rme96.c rme96->wcreg &= ~RME96_WCR_MONITOR_0; wcreg 562 sound/pci/rme96.c rme96->wcreg |= RME96_WCR_MONITOR_1; wcreg 564 sound/pci/rme96.c rme96->wcreg &= ~RME96_WCR_MONITOR_1; wcreg 566 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); wcreg 573 sound/pci/rme96.c return ((rme96->wcreg >> RME96_WCR_BITPOS_GAIN_0) & 1) + wcreg 574 sound/pci/rme96.c (((rme96->wcreg >> RME96_WCR_BITPOS_GAIN_1) & 1) << 1); wcreg 583 sound/pci/rme96.c rme96->wcreg = (rme96->wcreg & ~RME96_WCR_GAIN_0) & wcreg 587 sound/pci/rme96.c rme96->wcreg = (rme96->wcreg | RME96_WCR_GAIN_0) & wcreg 591 sound/pci/rme96.c rme96->wcreg = (rme96->wcreg & ~RME96_WCR_GAIN_0) | wcreg 595 sound/pci/rme96.c rme96->wcreg = (rme96->wcreg | RME96_WCR_GAIN_0) | wcreg 601 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); wcreg 673 sound/pci/rme96.c if (!(rme96->wcreg & RME96_WCR_MASTER) && wcreg 680 sound/pci/rme96.c rate = ((rme96->wcreg >> RME96_WCR_BITPOS_FREQ_0) & 1) + wcreg 681 sound/pci/rme96.c (((rme96->wcreg >> RME96_WCR_BITPOS_FREQ_1) & 1) << 1); wcreg 695 sound/pci/rme96.c return (rme96->wcreg & RME96_WCR_DS) ? rate << 1 : rate; wcreg 704 sound/pci/rme96.c ds = rme96->wcreg & RME96_WCR_DS; wcreg 707 sound/pci/rme96.c rme96->wcreg &= ~RME96_WCR_DS; wcreg 708 sound/pci/rme96.c rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) & wcreg 712 sound/pci/rme96.c rme96->wcreg &= ~RME96_WCR_DS; wcreg 713 sound/pci/rme96.c rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_1) & wcreg 717 sound/pci/rme96.c rme96->wcreg &= ~RME96_WCR_DS; wcreg 718 sound/pci/rme96.c rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) | wcreg 722 sound/pci/rme96.c rme96->wcreg |= RME96_WCR_DS; wcreg 723 sound/pci/rme96.c rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) & wcreg 727 sound/pci/rme96.c rme96->wcreg |= RME96_WCR_DS; wcreg 728 sound/pci/rme96.c rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_1) & wcreg 732 sound/pci/rme96.c rme96->wcreg |= RME96_WCR_DS; wcreg 733 sound/pci/rme96.c rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) | wcreg 739 sound/pci/rme96.c if ((!ds && rme96->wcreg & RME96_WCR_DS) || wcreg 740 sound/pci/rme96.c (ds && !(rme96->wcreg & RME96_WCR_DS))) wcreg 746 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); wcreg 800 sound/pci/rme96.c rme96->wcreg &= ~RME96_WCR_MASTER; wcreg 805 sound/pci/rme96.c rme96->wcreg |= RME96_WCR_MASTER; wcreg 810 sound/pci/rme96.c rme96->wcreg |= RME96_WCR_MASTER; wcreg 816 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); wcreg 827 sound/pci/rme96.c return (rme96->wcreg & RME96_WCR_MASTER) ? RME96_CLOCKMODE_MASTER : wcreg 839 sound/pci/rme96.c rme96->wcreg = (rme96->wcreg & ~RME96_WCR_INP_0) & wcreg 843 sound/pci/rme96.c rme96->wcreg = (rme96->wcreg | RME96_WCR_INP_0) & wcreg 847 sound/pci/rme96.c rme96->wcreg = (rme96->wcreg & ~RME96_WCR_INP_0) | wcreg 859 sound/pci/rme96.c rme96->wcreg = (rme96->wcreg | RME96_WCR_INP_0) | wcreg 888 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); wcreg 898 sound/pci/rme96.c return ((rme96->wcreg >> RME96_WCR_BITPOS_INP_0) & 1) + wcreg 899 sound/pci/rme96.c (((rme96->wcreg >> RME96_WCR_BITPOS_INP_1) & 1) << 1); wcreg 916 sound/pci/rme96.c frlog += (rme96->wcreg & RME96_WCR_MODE24) ? 2 : 1; wcreg 919 sound/pci/rme96.c frlog += (rme96->wcreg & RME96_WCR_MODE24_2) ? 2 : 1; wcreg 929 sound/pci/rme96.c rme96->wcreg &= ~RME96_WCR_MODE24; wcreg 932 sound/pci/rme96.c rme96->wcreg |= RME96_WCR_MODE24; wcreg 937 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); wcreg 946 sound/pci/rme96.c rme96->wcreg &= ~RME96_WCR_MODE24_2; wcreg 949 sound/pci/rme96.c rme96->wcreg |= RME96_WCR_MODE24_2; wcreg 954 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); wcreg 964 sound/pci/rme96.c rme96->wcreg &= ~RME96_WCR_ISEL; wcreg 967 sound/pci/rme96.c rme96->wcreg |= RME96_WCR_ISEL; wcreg 973 sound/pci/rme96.c rme96->wcreg &= ~RME96_WCR_IDIS; wcreg 974 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); wcreg 992 sound/pci/rme96.c if (!(rme96->wcreg & RME96_WCR_MASTER) && wcreg 1024 sound/pci/rme96.c if ((rme96->wcreg & RME96_WCR_ADAT) == 0) { wcreg 1025 sound/pci/rme96.c rme96->wcreg &= ~(RME96_WCR_PRO | RME96_WCR_DOLBY | RME96_WCR_EMP); wcreg 1026 sound/pci/rme96.c writel(rme96->wcreg |= rme96->wcreg_spdif_stream, rme96->iobase + RME96_IO_CONTROL_REGISTER); wcreg 1113 sound/pci/rme96.c rme96->wcreg |= RME96_WCR_START; wcreg 1115 sound/pci/rme96.c rme96->wcreg &= ~RME96_WCR_START; wcreg 1117 sound/pci/rme96.c rme96->wcreg |= RME96_WCR_START_2; wcreg 1119 sound/pci/rme96.c rme96->wcreg &= ~RME96_WCR_START_2; wcreg 1120 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); wcreg 1192 sound/pci/rme96.c rme96->wcreg &= ~RME96_WCR_ADAT; wcreg 1193 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); wcreg 1198 sound/pci/rme96.c if (!(rme96->wcreg & RME96_WCR_MASTER) && wcreg 1261 sound/pci/rme96.c rme96->wcreg |= RME96_WCR_ADAT; wcreg 1262 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); wcreg 1267 sound/pci/rme96.c if (!(rme96->wcreg & RME96_WCR_MASTER) && wcreg 1327 sound/pci/rme96.c spdif = (rme96->wcreg & RME96_WCR_ADAT) == 0; wcreg 1680 sound/pci/rme96.c rme96->wcreg = wcreg 1688 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER); wcreg 1738 sound/pci/rme96.c if (rme96->wcreg & RME96_WCR_IDIS) { wcreg 1741 sound/pci/rme96.c } else if (rme96->wcreg & RME96_WCR_ISEL) { wcreg 1775 sound/pci/rme96.c if (rme96->wcreg & RME96_WCR_MODE24_2) { wcreg 1782 sound/pci/rme96.c if (rme96->wcreg & RME96_WCR_SEL) { wcreg 1789 sound/pci/rme96.c if (rme96->wcreg & RME96_WCR_MODE24) { wcreg 1796 sound/pci/rme96.c } else if (rme96->wcreg & RME96_WCR_MASTER) { wcreg 1805 sound/pci/rme96.c if (rme96->wcreg & RME96_WCR_PRO) { wcreg 1810 sound/pci/rme96.c if (rme96->wcreg & RME96_WCR_EMP) { wcreg 1815 sound/pci/rme96.c if (rme96->wcreg & RME96_WCR_DOLBY) { wcreg 1872 sound/pci/rme96.c ucontrol->value.integer.value[0] = rme96->wcreg & RME96_WCR_SEL ? 0 : 1; wcreg 1885 sound/pci/rme96.c val = (rme96->wcreg & ~RME96_WCR_SEL) | val; wcreg 1886 sound/pci/rme96.c change = val != rme96->wcreg; wcreg 1887 sound/pci/rme96.c rme96->wcreg = val; wcreg 2185 sound/pci/rme96.c rme96->wcreg &= ~(RME96_WCR_PRO | RME96_WCR_DOLBY | RME96_WCR_EMP); wcreg 2186 sound/pci/rme96.c rme96->wcreg |= val; wcreg 2187 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);