wave 623 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c uint32_t offset, se, sh, cu, wave, simd, data[32]; wave 633 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c wave = (*pos & GENMASK_ULL(36, 31)) >> 31; wave 642 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->gfx.funcs->read_wave_data(adev, simd, wave, data, &x); wave 695 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data; wave 705 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c wave = (*pos & GENMASK_ULL(43, 36)) >> 36; wave 720 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->gfx.funcs->read_wave_vgprs(adev, simd, wave, thread, offset, size>>2, data); wave 723 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c adev->gfx.funcs->read_wave_sgprs(adev, simd, wave, offset, size>>2, data); wave 191 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h uint32_t wave, uint32_t *dst, int *no_fields); wave 193 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h uint32_t wave, uint32_t thread, uint32_t start, wave 196 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h uint32_t wave, uint32_t start, uint32_t size, wave 1110 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t wave, uint32_t address) wave 1113 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | wave 1118 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void wave_read_regs(struct amdgpu_device *adev, uint32_t wave, wave 1123 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | wave 1131 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c static void gfx_v10_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) wave 1140 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS); wave 1141 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO); wave 1142 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); wave 1143 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO); wave 1144 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_HI); wave 1145 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID1); wave 1146 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID2); wave 1147 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_INST_DW0); wave 1148 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_GPR_ALLOC); wave 1149 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_LDS_ALLOC); wave 1150 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_TRAPSTS); wave 1151 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_STS); wave 1152 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_STS2); wave 1153 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_DBG1); wave 1154 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_M0); wave 1158 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c uint32_t wave, uint32_t start, wave 1164 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev, wave, 0, start + SQIND_WAVE_SGPRS_OFFSET, size, wave 1169 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c uint32_t wave, uint32_t thread, wave 1174 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c adev, wave, thread, wave 2987 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address) wave 2990 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | wave 2998 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c uint32_t wave, uint32_t thread, wave 3002 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | wave 3012 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) wave 3016 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); wave 3017 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); wave 3018 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); wave 3019 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); wave 3020 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); wave 3021 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); wave 3022 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); wave 3023 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); wave 3024 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC); wave 3025 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC); wave 3026 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS); wave 3027 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS); wave 3028 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO); wave 3029 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI); wave 3030 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO); wave 3031 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI); wave 3032 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0); wave 3033 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); wave 3037 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c uint32_t wave, uint32_t start, wave 3041 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c adev, simd, wave, 0, wave 4141 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address) wave 4144 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | wave 4152 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c uint32_t wave, uint32_t thread, wave 4156 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | wave 4166 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c static void gfx_v7_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) wave 4170 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); wave 4171 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); wave 4172 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); wave 4173 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); wave 4174 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); wave 4175 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); wave 4176 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); wave 4177 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); wave 4178 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC); wave 4179 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC); wave 4180 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS); wave 4181 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS); wave 4182 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO); wave 4183 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI); wave 4184 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO); wave 4185 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI); wave 4186 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0); wave 4187 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); wave 4191 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c uint32_t wave, uint32_t start, wave 4195 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c adev, simd, wave, 0, wave 5241 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address) wave 5244 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | wave 5252 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c uint32_t wave, uint32_t thread, wave 5256 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | wave 5266 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c static void gfx_v8_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) wave 5270 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); wave 5271 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); wave 5272 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); wave 5273 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); wave 5274 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); wave 5275 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); wave 5276 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); wave 5277 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); wave 5278 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC); wave 5279 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC); wave 5280 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS); wave 5281 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS); wave 5282 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO); wave 5283 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI); wave 5284 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO); wave 5285 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI); wave 5286 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0); wave 5287 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); wave 5291 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c uint32_t wave, uint32_t start, wave 5295 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c adev, simd, wave, 0, wave 1776 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address) wave 1779 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | wave 1787 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c uint32_t wave, uint32_t thread, wave 1791 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | wave 1801 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c static void gfx_v9_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) wave 1805 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); wave 1806 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); wave 1807 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); wave 1808 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); wave 1809 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); wave 1810 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); wave 1811 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); wave 1812 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); wave 1813 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC); wave 1814 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC); wave 1815 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS); wave 1816 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS); wave 1817 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0); wave 1818 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); wave 1822 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c uint32_t wave, uint32_t start, wave 1826 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev, simd, wave, 0, wave 1831 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c uint32_t wave, uint32_t thread, wave 1836 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c adev, simd, wave, thread, wave 120 drivers/gpu/ipu-v3/ipu-dc.c int map, int wave, int glue, int sync, int stop) wave 129 drivers/gpu/ipu-v3/ipu-dc.c reg1 = sync | glue << 4 | ++wave << 11 | ((operand << 15) & 0xffff8000); wave 132 drivers/gpu/ipu-v3/ipu-dc.c reg1 = sync | glue << 4 | ++wave << 11 | ++map << 15 | ((operand << 20) & 0xfff00000); wave 91 sound/pci/ad1889.c struct ad1889_register_state wave; wave 191 sound/pci/ad1889.c chip->wave.reg = reg; wave 373 sound/pci/ad1889.c chip->wave.size = size; wave 374 sound/pci/ad1889.c chip->wave.reg = reg; wave 375 sound/pci/ad1889.c chip->wave.addr = rt->dma_addr; wave 377 sound/pci/ad1889.c ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg); wave 383 sound/pci/ad1889.c ad1889_load_wave_buffer_address(chip, chip->wave.addr); wave 394 sound/pci/ad1889.c chip->wave.addr, count, size, reg, rt->rate); wave 475 sound/pci/ad1889.c chip->wave.reg = wsmc; wave 531 sound/pci/ad1889.c if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN))) wave 535 sound/pci/ad1889.c ptr -= chip->wave.addr; wave 537 sound/pci/ad1889.c if (snd_BUG_ON(ptr >= chip->wave.size)) wave 316 sound/pci/au88x0/au88x0.c sizeof(snd_vortex_synth_arg_t), &wave) < 0 wave 317 sound/pci/au88x0/au88x0.c || wave == NULL) { wave 322 sound/pci/au88x0/au88x0.c arg = SNDRV_SEQ_DEVICE_ARGPTR(wave); wave 323 sound/pci/au88x0/au88x0.c strcpy(wave->name, "Aureal Synth"); wave 93 sound/pci/emu10k1/emu10k1.c struct snd_seq_device *wave = NULL; wave 155 sound/pci/emu10k1/emu10k1.c sizeof(struct snd_emu10k1_synth_arg), &wave) < 0 || wave 156 sound/pci/emu10k1/emu10k1.c wave == NULL) { wave 161 sound/pci/emu10k1/emu10k1.c arg = SNDRV_SEQ_DEVICE_ARGPTR(wave); wave 162 sound/pci/emu10k1/emu10k1.c strcpy(wave->name, "Emu-10k1 Synth");