wal 53 drivers/gpu/drm/i915/gt/intel_workarounds.c static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name) wal 55 drivers/gpu/drm/i915/gt/intel_workarounds.c wal->name = name; wal 56 drivers/gpu/drm/i915/gt/intel_workarounds.c wal->engine_name = engine_name; wal 61 drivers/gpu/drm/i915/gt/intel_workarounds.c static void wa_init_finish(struct i915_wa_list *wal) wal 64 drivers/gpu/drm/i915/gt/intel_workarounds.c if (!IS_ALIGNED(wal->count, WA_LIST_CHUNK)) { wal 65 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa *list = kmemdup(wal->list, wal 66 drivers/gpu/drm/i915/gt/intel_workarounds.c wal->count * sizeof(*list), wal 70 drivers/gpu/drm/i915/gt/intel_workarounds.c kfree(wal->list); wal 71 drivers/gpu/drm/i915/gt/intel_workarounds.c wal->list = list; wal 75 drivers/gpu/drm/i915/gt/intel_workarounds.c if (!wal->count) wal 79 drivers/gpu/drm/i915/gt/intel_workarounds.c wal->wa_count, wal->name, wal->engine_name); wal 82 drivers/gpu/drm/i915/gt/intel_workarounds.c static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa) wal 85 drivers/gpu/drm/i915/gt/intel_workarounds.c unsigned int start = 0, end = wal->count; wal 91 drivers/gpu/drm/i915/gt/intel_workarounds.c if (IS_ALIGNED(wal->count, grow)) { /* Either uninitialized or full. */ wal 94 drivers/gpu/drm/i915/gt/intel_workarounds.c list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa), wal 101 drivers/gpu/drm/i915/gt/intel_workarounds.c if (wal->list) wal 102 drivers/gpu/drm/i915/gt/intel_workarounds.c memcpy(list, wal->list, sizeof(*wa) * wal->count); wal 104 drivers/gpu/drm/i915/gt/intel_workarounds.c wal->list = list; wal 110 drivers/gpu/drm/i915/gt/intel_workarounds.c if (i915_mmio_reg_offset(wal->list[mid].reg) < addr) { wal 112 drivers/gpu/drm/i915/gt/intel_workarounds.c } else if (i915_mmio_reg_offset(wal->list[mid].reg) > addr) { wal 115 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_ = &wal->list[mid]; wal 125 drivers/gpu/drm/i915/gt/intel_workarounds.c wal->wa_count++; wal 133 drivers/gpu/drm/i915/gt/intel_workarounds.c wal->wa_count++; wal 134 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_ = &wal->list[wal->count++]; wal 137 drivers/gpu/drm/i915/gt/intel_workarounds.c while (wa_-- > wal->list) { wal 149 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, wal 159 drivers/gpu/drm/i915/gt/intel_workarounds.c _wa_add(wal, &wa); wal 163 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) wal 165 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_masked_or(wal, reg, val, _MASKED_BIT_ENABLE(val)); wal 169 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write(struct i915_wa_list *wal, i915_reg_t reg, u32 val) wal 171 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_masked_or(wal, reg, ~0, val); wal 175 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(struct i915_wa_list *wal, i915_reg_t reg, u32 val) wal 177 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_masked_or(wal, reg, val, val); wal 181 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_masked_or(wal, (addr), (mask), _MASKED_BIT_ENABLE(mask)) wal 184 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_masked_or(wal, (addr), (mask), _MASKED_BIT_DISABLE(mask)) wal 187 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_masked_or(wal, (addr), (mask), _MASKED_FIELD((mask), (value))) wal 190 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal) wal 238 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal) wal 242 drivers/gpu/drm/i915/gt/intel_workarounds.c gen8_ctx_workarounds_init(engine, wal); wal 266 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal) wal 268 drivers/gpu/drm/i915/gt/intel_workarounds.c gen8_ctx_workarounds_init(engine, wal); wal 278 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal) wal 371 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal) wal 411 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal) wal 413 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_ctx_workarounds_init(engine, wal); wal 414 drivers/gpu/drm/i915/gt/intel_workarounds.c skl_tune_iz_hashing(engine, wal); wal 418 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal) wal 420 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_ctx_workarounds_init(engine, wal); wal 432 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal) wal 436 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_ctx_workarounds_init(engine, wal); wal 449 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal) wal 451 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_ctx_workarounds_init(engine, wal); wal 459 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal) wal 461 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_ctx_workarounds_init(engine, wal); wal 473 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal) wal 513 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal) wal 518 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write(wal, wal 552 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_masked_or(wal, wal 568 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal) wal 574 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal, wal 582 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_init_start(wal, name, engine->name); wal 585 drivers/gpu/drm/i915/gt/intel_workarounds.c tgl_ctx_workarounds_init(engine, wal); wal 587 drivers/gpu/drm/i915/gt/intel_workarounds.c icl_ctx_workarounds_init(engine, wal); wal 589 drivers/gpu/drm/i915/gt/intel_workarounds.c cnl_ctx_workarounds_init(engine, wal); wal 591 drivers/gpu/drm/i915/gt/intel_workarounds.c cfl_ctx_workarounds_init(engine, wal); wal 593 drivers/gpu/drm/i915/gt/intel_workarounds.c glk_ctx_workarounds_init(engine, wal); wal 595 drivers/gpu/drm/i915/gt/intel_workarounds.c kbl_ctx_workarounds_init(engine, wal); wal 597 drivers/gpu/drm/i915/gt/intel_workarounds.c bxt_ctx_workarounds_init(engine, wal); wal 599 drivers/gpu/drm/i915/gt/intel_workarounds.c skl_ctx_workarounds_init(engine, wal); wal 601 drivers/gpu/drm/i915/gt/intel_workarounds.c chv_ctx_workarounds_init(engine, wal); wal 603 drivers/gpu/drm/i915/gt/intel_workarounds.c bdw_ctx_workarounds_init(engine, wal); wal 609 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_init_finish(wal); wal 619 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal = &rq->engine->ctx_wa_list; wal 625 drivers/gpu/drm/i915/gt/intel_workarounds.c if (wal->count == 0) wal 632 drivers/gpu/drm/i915/gt/intel_workarounds.c cs = intel_ring_begin(rq, (wal->count * 2 + 2)); wal 636 drivers/gpu/drm/i915/gt/intel_workarounds.c *cs++ = MI_LOAD_REGISTER_IMM(wal->count); wal 637 drivers/gpu/drm/i915/gt/intel_workarounds.c for (i = 0, wa = wal->list; i < wal->count; i++, wa++) { wal 653 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) wal 657 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 667 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 673 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 679 drivers/gpu/drm/i915/gt/intel_workarounds.c skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) wal 681 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_gt_workarounds_init(i915, wal); wal 684 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 690 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 696 drivers/gpu/drm/i915/gt/intel_workarounds.c bxt_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) wal 698 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_gt_workarounds_init(i915, wal); wal 701 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 707 drivers/gpu/drm/i915/gt/intel_workarounds.c kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) wal 709 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_gt_workarounds_init(i915, wal); wal 713 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 718 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 723 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 729 drivers/gpu/drm/i915/gt/intel_workarounds.c glk_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) wal 731 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_gt_workarounds_init(i915, wal); wal 735 drivers/gpu/drm/i915/gt/intel_workarounds.c cfl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) wal 737 drivers/gpu/drm/i915/gt/intel_workarounds.c gen9_gt_workarounds_init(i915, wal); wal 740 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 745 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 751 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal) wal 819 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_masked_or(wal, GEN8_MCR_SELECTOR, mcr_mask, mcr); wal 823 drivers/gpu/drm/i915/gt/intel_workarounds.c cnl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) wal 825 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_init_mcr(i915, wal); wal 829 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 834 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 840 drivers/gpu/drm/i915/gt/intel_workarounds.c icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) wal 842 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_init_mcr(i915, wal); wal 845 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 850 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_masked_or(wal, wal 858 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 866 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 872 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 877 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 883 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 890 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 896 drivers/gpu/drm/i915/gt/intel_workarounds.c tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) wal 901 drivers/gpu/drm/i915/gt/intel_workarounds.c gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal) wal 904 drivers/gpu/drm/i915/gt/intel_workarounds.c tgl_gt_workarounds_init(i915, wal); wal 906 drivers/gpu/drm/i915/gt/intel_workarounds.c icl_gt_workarounds_init(i915, wal); wal 908 drivers/gpu/drm/i915/gt/intel_workarounds.c cnl_gt_workarounds_init(i915, wal); wal 910 drivers/gpu/drm/i915/gt/intel_workarounds.c cfl_gt_workarounds_init(i915, wal); wal 912 drivers/gpu/drm/i915/gt/intel_workarounds.c glk_gt_workarounds_init(i915, wal); wal 914 drivers/gpu/drm/i915/gt/intel_workarounds.c kbl_gt_workarounds_init(i915, wal); wal 916 drivers/gpu/drm/i915/gt/intel_workarounds.c bxt_gt_workarounds_init(i915, wal); wal 918 drivers/gpu/drm/i915/gt/intel_workarounds.c skl_gt_workarounds_init(i915, wal); wal 927 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal = &i915->gt_wa_list; wal 929 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_init_start(wal, "GT", "global"); wal 930 drivers/gpu/drm/i915/gt/intel_workarounds.c gt_init_workarounds(i915, wal); wal 931 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_init_finish(wal); wal 935 drivers/gpu/drm/i915/gt/intel_workarounds.c wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal) wal 941 drivers/gpu/drm/i915/gt/intel_workarounds.c for (i = 0, wa = wal->list; i < wal->count; i++, wa++) wal 966 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_list_apply(struct intel_uncore *uncore, const struct i915_wa_list *wal) wal 973 drivers/gpu/drm/i915/gt/intel_workarounds.c if (!wal->count) wal 976 drivers/gpu/drm/i915/gt/intel_workarounds.c fw = wal_get_fw_for_rmw(uncore, wal); wal 981 drivers/gpu/drm/i915/gt/intel_workarounds.c for (i = 0, wa = wal->list; i < wal->count; i++, wa++) { wal 986 drivers/gpu/drm/i915/gt/intel_workarounds.c wal->name, "application"); wal 999 drivers/gpu/drm/i915/gt/intel_workarounds.c const struct i915_wa_list *wal, wal 1006 drivers/gpu/drm/i915/gt/intel_workarounds.c for (i = 0, wa = wal->list; i < wal->count; i++, wa++) wal 1009 drivers/gpu/drm/i915/gt/intel_workarounds.c wal->name, from); wal 1034 drivers/gpu/drm/i915/gt/intel_workarounds.c whitelist_reg_ext(struct i915_wa_list *wal, i915_reg_t reg, u32 flags) wal 1040 drivers/gpu/drm/i915/gt/intel_workarounds.c if (GEM_DEBUG_WARN_ON(wal->count >= RING_MAX_NONPRIV_SLOTS)) wal 1047 drivers/gpu/drm/i915/gt/intel_workarounds.c _wa_add(wal, &wa); wal 1051 drivers/gpu/drm/i915/gt/intel_workarounds.c whitelist_reg(struct i915_wa_list *wal, i915_reg_t reg) wal 1053 drivers/gpu/drm/i915/gt/intel_workarounds.c whitelist_reg_ext(wal, reg, RING_FORCE_TO_NONPRIV_ACCESS_RW); wal 1235 drivers/gpu/drm/i915/gt/intel_workarounds.c const struct i915_wa_list *wal = &engine->whitelist; wal 1241 drivers/gpu/drm/i915/gt/intel_workarounds.c if (!wal->count) wal 1244 drivers/gpu/drm/i915/gt/intel_workarounds.c for (i = 0, wa = wal->list; i < wal->count; i++, wa++) wal 1257 drivers/gpu/drm/i915/gt/intel_workarounds.c rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) wal 1263 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_masked_en(wal, wal 1268 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 1276 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 1284 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_masked_or(wal, wal 1288 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_masked_or(wal, wal 1297 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 1302 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 1310 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 1315 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 1320 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_masked_or(wal, wal 1328 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_masked_en(wal, wal 1335 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 1342 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_masked_en(wal, wal 1349 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_masked_en(wal, wal 1354 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 1360 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_masked_or(wal, wal 1367 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write_or(wal, wal 1374 drivers/gpu/drm/i915/gt/intel_workarounds.c xcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) wal 1380 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_write(wal, wal 1387 drivers/gpu/drm/i915/gt/intel_workarounds.c engine_init_workarounds(struct intel_engine_cs *engine, struct i915_wa_list *wal) wal 1393 drivers/gpu/drm/i915/gt/intel_workarounds.c rcs_engine_wa_init(engine, wal); wal 1395 drivers/gpu/drm/i915/gt/intel_workarounds.c xcs_engine_wa_init(engine, wal); wal 1400 drivers/gpu/drm/i915/gt/intel_workarounds.c struct i915_wa_list *wal = &engine->wa_list; wal 1405 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_init_start(wal, "engine", engine->name); wal 1406 drivers/gpu/drm/i915/gt/intel_workarounds.c engine_init_workarounds(engine, wal); wal 1407 drivers/gpu/drm/i915/gt/intel_workarounds.c wa_init_finish(wal); wal 1463 drivers/gpu/drm/i915/gt/intel_workarounds.c const struct i915_wa_list *wal, wal 1475 drivers/gpu/drm/i915/gt/intel_workarounds.c for (i = 0, wa = wal->list; i < wal->count; i++, wa++) { wal 1484 drivers/gpu/drm/i915/gt/intel_workarounds.c for (i = 0, wa = wal->list; i < wal->count; i++, wa++) { wal 1501 drivers/gpu/drm/i915/gt/intel_workarounds.c const struct i915_wa_list * const wal, wal 1511 drivers/gpu/drm/i915/gt/intel_workarounds.c if (!wal->count) wal 1514 drivers/gpu/drm/i915/gt/intel_workarounds.c vma = create_scratch(&ce->engine->gt->ggtt->vm, wal->count); wal 1524 drivers/gpu/drm/i915/gt/intel_workarounds.c err = wa_list_srm(rq, wal, vma); wal 1541 drivers/gpu/drm/i915/gt/intel_workarounds.c for (i = 0, wa = wal->list; i < wal->count; i++, wa++) { wal 1545 drivers/gpu/drm/i915/gt/intel_workarounds.c if (!wa_verify(wa, results[i], wal->name, from)) wal 19 drivers/gpu/drm/i915/gt/intel_workarounds.h static inline void intel_wa_list_free(struct i915_wa_list *wal) wal 21 drivers/gpu/drm/i915/gt/intel_workarounds.h kfree(wal->list); wal 22 drivers/gpu/drm/i915/gt/intel_workarounds.h memset(wal, 0, sizeof(*wal)); wal 49 drivers/gpu/drm/i915/gt/selftest_workarounds.c struct i915_wa_list *wal = &lists->engine[id].wa_list; wal 51 drivers/gpu/drm/i915/gt/selftest_workarounds.c wa_init_start(wal, "REF", engine->name); wal 52 drivers/gpu/drm/i915/gt/selftest_workarounds.c engine_init_workarounds(engine, wal); wal 53 drivers/gpu/drm/i915/gt/selftest_workarounds.c wa_init_finish(wal); wal 2879 drivers/gpu/drm/i915/i915_debugfs.c const struct i915_wa_list *wal = &engine->ctx_wa_list; wal 2883 drivers/gpu/drm/i915/i915_debugfs.c count = wal->count; wal 2890 drivers/gpu/drm/i915/i915_debugfs.c for (wa = wal->list; count--; wa++)