wait_time_limit_from_irdy_to_trdy 59 arch/mips/include/asm/vr41xx/pci.h uint8_t wait_time_limit_from_irdy_to_trdy; /* Only VR4122 is supported */ wait_time_limit_from_irdy_to_trdy 77 arch/mips/pci/pci-vr41xx.c .wait_time_limit_from_irdy_to_trdy = 0, wait_time_limit_from_irdy_to_trdy 220 arch/mips/pci/pci-vr41xx.c pciu_write(PCITRDYVREG, TRDYV(setup->wait_time_limit_from_irdy_to_trdy));