wait_reg_mem 831 drivers/gpu/drm/radeon/r600_cs.c struct radeon_cs_packet p3reloc, wait_reg_mem; wait_reg_mem 840 drivers/gpu/drm/radeon/r600_cs.c r = radeon_cs_packet_parse(p, &wait_reg_mem, p->idx); wait_reg_mem 845 drivers/gpu/drm/radeon/r600_cs.c if (wait_reg_mem.type != RADEON_PACKET_TYPE3 || wait_reg_mem 846 drivers/gpu/drm/radeon/r600_cs.c wait_reg_mem.opcode != PACKET3_WAIT_REG_MEM) { wait_reg_mem 851 drivers/gpu/drm/radeon/r600_cs.c wait_reg_mem_info = radeon_get_ib_value(p, wait_reg_mem.idx + 1); wait_reg_mem 867 drivers/gpu/drm/radeon/r600_cs.c if ((radeon_get_ib_value(p, wait_reg_mem.idx + 2) << 2) != vline_status[0]) { wait_reg_mem 872 drivers/gpu/drm/radeon/r600_cs.c if (radeon_get_ib_value(p, wait_reg_mem.idx + 5) != RADEON_VLINE_STAT) { wait_reg_mem 878 drivers/gpu/drm/radeon/r600_cs.c r = radeon_cs_packet_parse(p, &p3reloc, p->idx + wait_reg_mem.count + 2); wait_reg_mem 883 drivers/gpu/drm/radeon/r600_cs.c p->idx += wait_reg_mem.count + 2;